602 Commits
Author SHA1 Message Date
Dr-Noob 9aef2d8493 Merge remote-tracking branch 'origin/master' into bugfix2 2021-04-08 10:10:26 +02:00
Dr-Noob 812ee0acc6 [v0.96] Add PREFIX to Makefile and uninstall target, as requested by many users 2021-04-08 09:36:21 +02:00
Dr-Noob d239906f22 [v0.96] Consider the case where present file does not contain a hyphen 2021-04-07 20:22:29 +02:00
Dr-Noob 7916e8cbb4 [v0.96] Replace "Simplistic" by "Simple" in description 2021-04-07 20:06:24 +02:00
Dr-Noob 41dbb22a20 [v0.96] Merge branch bugfix3 to include an ARM SoC fix 2021-04-07 19:55:58 +02:00
Dr-Noob bb9fb17ec8 [v0.96] Tracking issue #54 2021-04-07 16:25:31 +02:00
Dr-Noob 586283a1be [v0.96] Add string names for recently added uarchs 2021-04-07 16:07:24 +02:00
Dr-Noob cc356ecb07 [v0.96] Tracking issue #44. Add missing old uarchs 2021-04-07 15:36:01 +02:00
Dr-Noob b3ed3e9240 [v0.96] Add 32bit support in Makefile 2021-04-07 14:52:52 +02:00
Dr-Noob 044608f31f [v0.95] Add 0x8000001D sublevel query to --raw option 2021-04-07 14:35:45 +02:00
Dr-Noob 27c6507acb [v0.96] Tracking issue #44 2021-04-07 13:08:46 +02:00
Dr-Noob 2879876500 [v0.96] Dont treat unknown unified cache as a bug, since there are some processors with eDRAM which supports this level, like #41 2021-04-07 11:17:43 +02:00
Dr-Noob c7cc8be712 [v0.96] Use lower verbosity for some errors found in cpuid 2021-04-07 10:37:17 +02:00
Dr-Noob 654d2e27e1 [v0.96] Replace Makefile var names (use C names instead of C++) 2021-04-07 10:14:20 +02:00
Dr-Noob 09cbb8874b [v0.96] Fix previous mistake: use level 0xB to check if the level is supported or not, according to Intel docs 2021-04-06 20:37:49 +02:00
Dr-Noob fe95ca3e10 [v0.96] Fix bug where ebx returned 0 in apic.c when CPU max level >= 0xB but CPU does not support x2apic 2021-04-06 16:56:26 +02:00
Dr-Noob ec2ad4fef6 [v0.96] Do not consider missing frequency file as a bug 2021-04-06 16:35:12 +02:00
Dr-Noob d56f7ffd14 [v0.96] Fix segfault when invalid cache size is found 2021-04-06 12:56:44 +02:00
Dr-Noob 4900c10eb3 [v0.96] Remove space between badges in README 2021-03-31 15:33:15 +02:00
Dr-Noob 9f0dc85bd8 [v0.96] Small modifications to README 2021-03-31 15:31:46 +02:00
Dr-Noob 36aeba0e73 [v0.96] Improve README with badges and ToC 2021-03-31 15:15:01 +02:00
Dr-Noob ca7091bc5e [v0.96] Add short options. Improve --help flag. Update man page 2021-03-31 12:40:19 +02:00
Dr-Noob 8abbd8f69f [v0.96] Fix AMD ASCII art. Add third digit in frequency output 2021-03-31 11:03:54 +02:00
Dr-Noob 7420792ef5 [v0.95] Fetch topology extensions field in AMD processors 2021-03-30 10:39:27 +02:00
Dr-Noob db32cccd91 [v0.95] Add --raw option 2021-03-15 21:49:47 +01:00
Dr-Noob a8d8ac2e91 [v0.95] Temporarily disable cache sanity checks 2021-03-06 22:13:32 +01:00
Dr-Noob 2f61ebd35a [0.95] Update README table 2021-01-14 19:30:36 +01:00
Dr-Noob e21ca95da8 [0.95][x86] Merge bugfix branch, which adds macOS support to cpufetch 2021-01-14 18:46:41 +01:00
Dr-Noob 3bac5cbfe2 [v0.95][x86] Print CPUID 0x1 EAX register with debug flag 2021-01-10 22:03:25 +01:00
Dr-Noob 04f0bfcbde [v0.94][x86] Add uarch detection for Intel families derived from Kaby Lake 2021-01-10 22:01:17 +01:00
Dr-Noob 697a921042 [X86] Avoid checking /sys directory in macOS to find frequency 2021-01-10 09:01:50 +01:00
Dr-Noob 3b624f3025 [X86] Fix bug where unknown hypervisor caused a segfault. This should solve issue #38 2021-01-05 17:37:26 +01:00
Dr-Noob 2494b56a49 [X86] Fix compilation error in MacOS. MacOS does not provide any method to bin threads to cores, so its pretty hard to get apic ids. This first approach is really dark and I hope I can improve it in the future 2021-01-05 17:35:57 +01:00
Dr-Noob 797c708f2d [v0.94][x86] Consider missing frequency file in x86_64 as a bug if no hypervisor is present. Took this idea from issue #37. Add if hypervisor is present to debug mode to prevent more confusions in the future 2020-12-29 00:09:01 +01:00
Dr-Noob 56a1da3428 [v0.94] Do not consider missing frequency file in x86_64 as a bug. Fix typos 2020-12-26 08:52:14 +01:00
Dr-Noob 1ef6daf943 Fix pictures links and add ARM pictures 2020-12-25 18:39:58 +01:00
Dr-Noob cc20fff6ea Fix grammar and typos 2020-12-25 17:50:10 +01:00
Dr-Noob c7d1165a94 Update documentation 2020-12-25 15:42:33 +01:00
Dr-Noob fce0bbf012 [v0.94][ARM] Do not print cache sizes v0.94 2020-12-08 18:33:42 +01:00
Dr-Noob 2939d5b352 [v0.94] When SoC string is not matched against any SoC is not considered a bug anymore 2020-12-08 18:04:13 +01:00
Dr-Noob 7e532d57a6 [v0.94] Add reminder in Qualcomm SoCs, that need more time to work properly 2020-12-08 18:01:26 +01:00
Dr-Noob a96d95eba1 [v0.94] Reviewed MTK SoCs 2020-12-08 15:56:13 +01:00
Dr-Noob 5b9a9e90d0 [v0.94] Fix compilation issues 2020-12-05 11:56:40 +01:00
Dr-Noob f68c81395b [v0.94] Reviewed snapdragon 6XX, 7XX and 8XX (some SoC models needs more work) 2020-12-05 11:10:15 +01:00
Dr-Noob 4971774ce4 [v0.94] Reviewed snapdragon 2XX and 4XX 2020-12-04 20:23:48 +01:00
Dr-Noob ea5d07504c [v0.94] Fix snapdragon SoC models 2020-12-04 15:41:33 +01:00
Dr-Noob c111eb9a41 [v0.94] SoC detection stores the exact SoC model 2020-12-04 10:11:07 +01:00
Dr-Noob 01e22b8090 [v0.94] Fix compilation issues 2020-12-01 16:13:38 +01:00
Dr-Noob b1f3196e0d [v0.94] Refactor CPU features in a separate struct. Remove x86 debug functions 2020-12-01 12:16:12 +01:00
Dr-Noob d04d535807 [v0.94][ARM] Add CPU feature detection, such as NEON, AES, SHA... Take into account NEON capabilities for PP computation 2020-12-01 11:40:09 +01:00