Fix #21 and #22: Obtain the number of caches of every level instead of guessing them. It is done by fetching cache topology from apic. It works, but it needs a big refactoring. Moreover, it currently works only on Intel CPUs, so this breaks the cache in AMD.

This commit is contained in:
Dr-Noob
2020-08-29 21:50:51 +02:00
parent d8dad29a57
commit 69cc08759a
6 changed files with 206 additions and 103 deletions

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@@ -10,6 +10,8 @@ struct apic {
uint32_t core_mask;
uint32_t smt_mask_width;
uint32_t smt_mask;
uint32_t* cache_select_mask;
uint32_t* cache_id_apic;
};
bool get_topology_from_apic(uint32_t cpuid_max_levels, struct topology** topo);