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[v1.05][X86] Hygon logo and uarch detection (#244)

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Dr-Noob
2024-07-07 11:46:42 +01:00
parent 9018a3b98e
commit 7e9d308bea
2 changed files with 40 additions and 17 deletions
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28
src/common/ascii.h
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@@ -105,22 +105,18 @@ $C1 MMM :MMM NMM dMMK dMMX MMN \
$C1 MMM :MMM NMM dMMMoo OMM0....:Nx. MMN \ $C1 MMM :MMM NMM dMMMoo OMM0....:Nx. MMN \
$C1 MMM :WWW XWW lONMM 'xXMMMMNOc MMN " $C1 MMM :WWW XWW lONMM 'xXMMMMNOc MMN "
// TODO real logo
#define ASCII_HYGON \ #define ASCII_HYGON \
"$C1 .#################. \ "$C1 \
$C1 .#### ####. \ $C1 \
$C1 .## ### \ $C1 \
$C1 ## :## ### \ $C1 ## ## ## ## ###### ###### ## # \
$C1 # ## :## ## \ $C1 ##....## ## ## ## ## ## #### # \
$C1 ## ## ######. #### ###### :## ## \ $C1 ######## ## ## ##. ## ## # #### \
$C1 ## ## ##: ##: ## ## ### :## ### \ $C1 ## ## ## *######. ###### # ## \
$C1## ## ##: ##: ## :######## :## ## \ $C1 \
$C1## ## ##: ##: ## ##. . :## #### \ $C1 \
$C1## # ##: ##: #### #####: ## \ $C1 \
$C1 ## \ $C1 "
$C1 ###. ..o####. \
$C1 ######oo... ..oo####### \
$C1 o###############o "
#define ASCII_SNAPD \ #define ASCII_SNAPD \
" $C1@@$C2######## \ " $C1@@$C2######## \
@@ -555,7 +551,7 @@ typedef struct ascii_logo asciiL;
asciiL logo_amd = { ASCII_AMD, 39, 15, false, {C_FG_WHITE, C_FG_GREEN}, {C_FG_WHITE, C_FG_GREEN} }; asciiL logo_amd = { ASCII_AMD, 39, 15, false, {C_FG_WHITE, C_FG_GREEN}, {C_FG_WHITE, C_FG_GREEN} };
asciiL logo_intel = { ASCII_INTEL, 48, 14, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} }; asciiL logo_intel = { ASCII_INTEL, 48, 14, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} };
asciiL logo_intel_new = { ASCII_INTEL_NEW, 51, 9, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} }; asciiL logo_intel_new = { ASCII_INTEL_NEW, 51, 9, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} };
asciiL logo_hygon = { ASCII_HYGON, 48, 14, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} }; asciiL logo_hygon = { ASCII_HYGON, 51, 11, false, {C_FG_RED}, {C_FG_RED, C_FG_WHITE} };
asciiL logo_snapd = { ASCII_SNAPD, 39, 16, false, {C_FG_RED, C_FG_WHITE}, {C_FG_RED, C_FG_WHITE} }; asciiL logo_snapd = { ASCII_SNAPD, 39, 16, false, {C_FG_RED, C_FG_WHITE}, {C_FG_RED, C_FG_WHITE} };
asciiL logo_mtk = { ASCII_MTK, 59, 5, false, {C_FG_BLUE, C_FG_YELLOW}, {C_FG_BLUE, C_FG_YELLOW} }; asciiL logo_mtk = { ASCII_MTK, 59, 5, false, {C_FG_BLUE, C_FG_YELLOW}, {C_FG_BLUE, C_FG_YELLOW} };
asciiL logo_exynos = { ASCII_EXYNOS, 22, 13, true, {C_BG_BLUE, C_FG_WHITE}, {C_FG_BLUE, C_FG_WHITE} }; asciiL logo_exynos = { ASCII_EXYNOS, 22, 13, true, {C_BG_BLUE, C_FG_WHITE}, {C_FG_BLUE, C_FG_WHITE} };

29
src/x86/uarch.c
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@@ -392,6 +392,25 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
return arch; return arch;
} }
struct uarch* get_uarch_from_cpuid_hygon(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
struct uarch* arch = emalloc(sizeof(struct uarch));
// EF: Extended Family //
// F: Family //
// EM: Extended Model //
// M: Model //
// S: Stepping //
// ----------------------------------------------------------------------------- //
// EF F EM M S //
UARCH_START
// https://www.phoronix.com/news/Hygon-Dhyana-AMD-China-CPUs
CHECK_UARCH(arch, 9, 15, 0, 1, NA, "Zen", UARCH_ZEN, UNK) // https://github.com/Dr-Noob/cpufetch/issues/244
// CHECK_UARCH(arch, 9, 15, 0, 2, NA, "???", ?????????, UNK) // http://instlatx64.atw.hu/
UARCH_END
return arch;
}
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) { struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
if(cpu->cpu_vendor == CPU_VENDOR_INTEL) { if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
struct uarch* arch = emalloc(sizeof(struct uarch)); struct uarch* arch = emalloc(sizeof(struct uarch));
@@ -436,8 +455,16 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
} }
return get_uarch_from_cpuid_intel(ef, f, em, m, s); return get_uarch_from_cpuid_intel(ef, f, em, m, s);
} }
else else if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
return get_uarch_from_cpuid_amd(ef, f, em, m, s); return get_uarch_from_cpuid_amd(ef, f, em, m, s);
}
else if(cpu->cpu_vendor == CPU_VENDOR_HYGON) {
return get_uarch_from_cpuid_hygon(ef, f, em, m, s);
}
else {
printBug("Invalid CPU vendor: %d", cpu->cpu_vendor);
return NULL;
}
} }
// If we cannot get the CPU name from CPUID, try to infer it from uarch // If we cannot get the CPU name from CPUID, try to infer it from uarch