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[v1.00] Add preeliminary support for Phytium chip

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Dr-Noob
2021-10-31 20:19:37 +01:00
parent 7692a3cd49
commit a426f231c6
4 changed files with 10 additions and 2 deletions
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8
src/arm/uarch.c
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@@ -103,7 +103,9 @@ enum {
UARCH_BRAHMA_B15, UARCH_BRAHMA_B15,
UARCH_BRAHMA_B53, UARCH_BRAHMA_B53,
UARCH_XGENE, // Applied Micro X-Gene. UARCH_XGENE, // Applied Micro X-Gene.
UARCH_TAISHAN_V110 // HiSilicon TaiShan v110 (Huawei Kunpeng 920 series processors). UARCH_TAISHAN_V110, // HiSilicon TaiShan v110 (Huawei Kunpeng 920 series processors).
// PHYTIUM
UARCH_XIAOMI, // Not to be confused with Xiaomi Inc
}; };
static const ISA isas_uarch[] = { static const ISA isas_uarch[] = {
@@ -156,6 +158,7 @@ static const ISA isas_uarch[] = {
[UARCH_ICESTORM] = ISA_ARMv8_4_A, [UARCH_ICESTORM] = ISA_ARMv8_4_A,
[UARCH_FIRESTORM] = ISA_ARMv8_4_A, [UARCH_FIRESTORM] = ISA_ARMv8_4_A,
[UARCH_PJ4] = ISA_ARMv7_A, [UARCH_PJ4] = ISA_ARMv7_A,
[UARCH_XIAOMI] = ISA_ARMv8_A,
}; };
static char* isas_string[] = { static char* isas_string[] = {
@@ -289,6 +292,9 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
CHECK_UARCH(arch, cpu, 'S', 0x003, 1, NA, "Exynos M4", UARCH_EXYNOS_M4, CPU_VENDOR_SAMSUNG) // Exynos 9820 CHECK_UARCH(arch, cpu, 'S', 0x003, 1, NA, "Exynos M4", UARCH_EXYNOS_M4, CPU_VENDOR_SAMSUNG) // Exynos 9820
CHECK_UARCH(arch, cpu, 'S', 0x004, 1, NA, "Exynos M5", UARCH_EXYNOS_M5, CPU_VENDOR_SAMSUNG) // Exynos 9820 (this one looks wrong at uarch.c ...) CHECK_UARCH(arch, cpu, 'S', 0x004, 1, NA, "Exynos M5", UARCH_EXYNOS_M5, CPU_VENDOR_SAMSUNG) // Exynos 9820 (this one looks wrong at uarch.c ...)
CHECK_UARCH(arch, cpu, 'p', 0x663, 1, NA, "Xiaomi", UARCH_XIAOMI, CPU_VENDOR_PHYTIUM) // From a fellow contributor (https://github.com/Dr-Noob/cpufetch/issues/125)
// Also interesting: https://en.wikipedia.org/wiki/FeiTeng_(processor)
CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm", UARCH_ICESTORM, CPU_VENDOR_APPLE) CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm", UARCH_ICESTORM, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm", UARCH_FIRESTORM, CPU_VENDOR_APPLE) CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm", UARCH_FIRESTORM, CPU_VENDOR_APPLE)

1
src/common/cpu.h
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@@ -19,6 +19,7 @@ enum {
CPU_VENDOR_HUAWUEI, CPU_VENDOR_HUAWUEI,
CPU_VENDOR_SAMSUNG, CPU_VENDOR_SAMSUNG,
CPU_VENDOR_MARVELL, CPU_VENDOR_MARVELL,
CPU_VENDOR_PHYTIUM,
// OTHERS // OTHERS
CPU_VENDOR_UNKNOWN, CPU_VENDOR_UNKNOWN,
CPU_VENDOR_INVALID CPU_VENDOR_INVALID

2
src/common/global.c
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@@ -60,7 +60,7 @@ void printBug(const char *fmt, ...) {
#if defined(ARCH_X86) || defined(ARCH_PPC) #if defined(ARCH_X86) || defined(ARCH_PPC)
fprintf(stderr, "Please, create a new issue with this error message, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n"); fprintf(stderr, "Please, create a new issue with this error message, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
#elif ARCH_ARM #elif ARCH_ARM
fprintf(stderr, "Please, create a new issue with this error message, your smartphone/computer model, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n"); fprintf(stderr, "Please, create a new issue with this error message, your smartphone/computer model, the output of 'cpufetch --verbose' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
#endif #endif
} }

1
src/x86/apic.c
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@@ -244,6 +244,7 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
for(uint32_t c=0; c < size; c++) { for(uint32_t c=0; c < size; c++) {
if(apic_id[c] > 0) num_caches++; if(apic_id[c] > 0) num_caches++;
} }
topo->cach->cach_arr[i]->num_caches = num_caches; topo->cach->cach_arr[i]->num_caches = num_caches;
} }