Fix ascii logo in AMD. Fix output on CPUs without L3

This commit is contained in:
Dr-Noob
2020-07-03 16:24:14 +02:00
parent b076189b32
commit c8fde107dd
3 changed files with 18 additions and 17 deletions

View File

@@ -517,6 +517,10 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
printBug("Invalid L3 size: %dMB", cach->L3/(1048576)); printBug("Invalid L3 size: %dMB", cach->L3/(1048576));
return NULL; return NULL;
} }
if(cach->L2 == UNKNOWN) {
printBug("Could not find L2 cache");
return NULL;
}
return cach; return cach;
} }
@@ -887,20 +891,16 @@ char* get_str_l1d(struct cache* cach, struct topology* topo) {
} }
char* get_str_l2(struct cache* cach, struct topology* topo) { char* get_str_l2(struct cache* cach, struct topology* topo) {
if(cach->L2 == UNKNOWN) { assert(cach->L2 != UNKNOWN);
char* string = malloc(sizeof(char) * 5); if(cach->L3 == UNKNOWN)
snprintf(string, 5, STRING_NONE); return get_str_cache(cach->L2, topo, true);
return string; else
} return get_str_cache(cach->L2, topo, false);
return get_str_cache(cach->L2, topo, false);
} }
char* get_str_l3(struct cache* cach, struct topology* topo) { char* get_str_l3(struct cache* cach, struct topology* topo) {
if(cach->L3 == UNKNOWN) { if(cach->L3 == UNKNOWN)
char* string = malloc(sizeof(char) * 5); return NULL;
snprintf(string, 5, STRING_NONE);
return string;
}
return get_str_cache(cach->L3, topo, true); return get_str_cache(cach->L3, topo, true);
} }

View File

@@ -6,7 +6,7 @@
#include "cpuid.h" #include "cpuid.h"
#include "global.h" #include "global.h"
static const char* VERSION = "0.54"; static const char* VERSION = "0.55";
void print_help(char *argv[]) { void print_help(char *argv[]) {
printf("Usage: %s [--version] [--help] [--levels] [--style fancy|retro] [--color 'R,G,B:R,G,B:R,G,B:R,G,B']\n\ printf("Usage: %s [--version] [--help] [--levels] [--style fancy|retro] [--color 'R,G,B:R,G,B:R,G,B:R,G,B']\n\

View File

@@ -14,8 +14,8 @@
#define COL_INTEL_FANCY_4 "\x1b[37;1m" #define COL_INTEL_FANCY_4 "\x1b[37;1m"
#define COL_INTEL_RETRO_1 "\x1b[36;1m" #define COL_INTEL_RETRO_1 "\x1b[36;1m"
#define COL_INTEL_RETRO_2 "\x1b[37;1m" #define COL_INTEL_RETRO_2 "\x1b[37;1m"
#define COL_AMD_FANCY_1 "\x1b[37;1m" #define COL_AMD_FANCY_1 "\x1b[47;1m"
#define COL_AMD_FANCY_2 "\x1b[31;1m" #define COL_AMD_FANCY_2 "\x1b[41;1m"
#define COL_AMD_FANCY_3 "\x1b[37;1m" #define COL_AMD_FANCY_3 "\x1b[37;1m"
#define COL_AMD_FANCY_4 "\x1b[31;1m" #define COL_AMD_FANCY_4 "\x1b[31;1m"
#define COL_AMD_RETRO_1 "\x1b[37;1m" #define COL_AMD_RETRO_1 "\x1b[37;1m"
@@ -333,7 +333,6 @@ bool print_cpufetch(struct cpuInfo* cpu, struct cache* cach, struct frequency* f
setAttribute(art,ATTRIBUTE_L1i,l1i); setAttribute(art,ATTRIBUTE_L1i,l1i);
setAttribute(art,ATTRIBUTE_L1d,l1d); setAttribute(art,ATTRIBUTE_L1d,l1d);
setAttribute(art,ATTRIBUTE_L2,l2); setAttribute(art,ATTRIBUTE_L2,l2);
setAttribute(art,ATTRIBUTE_L3,l3);
setAttribute(art,ATTRIBUTE_PEAK,pp); setAttribute(art,ATTRIBUTE_PEAK,pp);
uint32_t socket_num = get_nsockets(topo); uint32_t socket_num = get_nsockets(topo);
@@ -341,7 +340,9 @@ bool print_cpufetch(struct cpuInfo* cpu, struct cache* cach, struct frequency* f
setAttribute(art, ATTRIBUTE_SOCKETS, sockets); setAttribute(art, ATTRIBUTE_SOCKETS, sockets);
setAttribute(art, ATTRIBUTE_NCORES_DUAL, n_cores_dual); setAttribute(art, ATTRIBUTE_NCORES_DUAL, n_cores_dual);
} }
if(l3 != NULL) {
setAttribute(art,ATTRIBUTE_L3,l3);
}
if(art->n_attributes_set > NUMBER_OF_LINES) { if(art->n_attributes_set > NUMBER_OF_LINES) {
printBug("The number of attributes set is bigger than the max that can be displayed"); printBug("The number of attributes set is bigger than the max that can be displayed");
return false; return false;