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[v1.03][x86] Fix Zen4 peak performance calculation

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Dr-Noob
2023-04-24 17:47:29 +02:00
parent 5be6f8bba0
commit de638aba50
2 changed files with 7 additions and 4 deletions
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7
src/x86/cpuid.c
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@@ -223,9 +223,10 @@ int64_t get_peak_performance(struct cpuInfo* cpu, bool accurate_pp) {
if(feat->FMA3 || feat->FMA4) if(feat->FMA3 || feat->FMA4)
flops = flops*2; flops = flops*2;
// Ice Lake has AVX512, but it has 1 VPU for AVX512, while // NOTE:
// it has 2 for AVX2. If this is a Ice Lake CPU, we are computing // Some CPUs (Ice Lake, Zen 4) have AVX512, but they have only
// the peak performance supposing AVX2, not AVX512 // 1 VPU for AVX512, while they have 2 for AVX2. In such cases,
// we are computing the peak performance supposing AVX2, not AVX512
if(feat->AVX512 && vpus_are_AVX512(ptr)) if(feat->AVX512 && vpus_are_AVX512(ptr))
flops = flops*16; flops = flops*16;
else if(feat->AVX || feat->AVX2) else if(feat->AVX || feat->AVX2)

4
src/x86/uarch.c
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@@ -414,7 +414,9 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
} }
bool vpus_are_AVX512(struct cpuInfo* cpu) { bool vpus_are_AVX512(struct cpuInfo* cpu) {
return cpu->arch->uarch != UARCH_ICE_LAKE && cpu->arch->uarch != UARCH_TIGER_LAKE; return cpu->arch->uarch != UARCH_ICE_LAKE &&
cpu->arch->uarch != UARCH_TIGER_LAKE &&
cpu->arch->uarch != UARCH_ZEN4;
} }
bool is_knights_landing(struct cpuInfo* cpu) { bool is_knights_landing(struct cpuInfo* cpu) {