mirror of
https://github.com/Dr-Noob/cpufetch.git
synced 2026-03-25 07:50:40 +01:00
[v0.98] Use malloc/calloc wrapper that exits when alloc fails, as suggested by #90
This commit is contained in:
Dr-Noob
168
src/x86/apic.c
168
src/x86/apic.c
@@ -60,7 +60,7 @@ uint32_t get_apic_id(bool x2apic_id) {
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uint32_t ebx = 0;
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uint32_t ecx = 0;
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uint32_t edx = 0;
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if(x2apic_id) {
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eax = 0x0000000B;
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cpuid(&eax, &ebx, &ecx, &edx);
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@@ -92,12 +92,12 @@ bool bind_to_cpu(int cpu_id) {
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cpuset_t currentCPU;
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CPU_ZERO(¤tCPU);
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CPU_SET(cpu_id, ¤tCPU);
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if(cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset_t), ¤tCPU) == -1) {
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if(cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset_t), ¤tCPU) == -1) {
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perror("cpuset_setaffinity");
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return false;
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}
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return true;
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#endif
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#endif
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}
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#endif
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@@ -109,51 +109,51 @@ bool fill_topo_masks_apic(struct topology* topo) {
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uint32_t core_plus_smt_id_max_cnt;
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uint32_t core_id_max_cnt;
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uint32_t smt_id_per_core_max_cnt;
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cpuid(&eax, &ebx, &ecx, &edx);
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core_plus_smt_id_max_cnt = (ebx >> 16) & 0xFF;
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eax = 0x00000004;
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ecx = 0;
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cpuid(&eax, &ebx, &ecx, &edx);
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core_id_max_cnt = (eax >> 26) + 1;
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smt_id_per_core_max_cnt = core_plus_smt_id_max_cnt / core_id_max_cnt;
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topo->apic->smt_mask = create_mask(smt_id_per_core_max_cnt, &(topo->apic->smt_mask_width));
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smt_id_per_core_max_cnt = core_plus_smt_id_max_cnt / core_id_max_cnt;
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topo->apic->smt_mask = create_mask(smt_id_per_core_max_cnt, &(topo->apic->smt_mask_width));
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topo->apic->core_mask = create_mask(core_id_max_cnt,&(topo->apic->pkg_mask_shift));
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topo->apic->pkg_mask_shift += topo->apic->smt_mask_width;
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topo->apic->core_mask <<= topo->apic->smt_mask_width;
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topo->apic->pkg_mask = (-1) ^ (topo->apic->core_mask | topo->apic->smt_mask);
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return true;
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}
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bool fill_topo_masks_x2apic(struct topology* topo) {
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int32_t level_type;
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int32_t level_shift;
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int32_t coreplus_smt_mask = 0;
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bool level2 = false;
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bool level1 = false;
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uint32_t eax = 0;
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uint32_t ebx = 0;
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uint32_t ecx = 0;
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uint32_t edx = 0;
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uint32_t i = 0;
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while(true) {
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eax = 0x0000000B;
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ecx = i;
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cpuid(&eax, &ebx, &ecx, &edx);
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if(ebx == 0) break;
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level_type = (ecx >> 8) & 0xFF;
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level_shift = eax & 0xFFF;
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switch(level_type) {
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level_shift = eax & 0xFFF;
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switch(level_type) {
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case 1: // SMT
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topo->apic->smt_mask = ~(0xFFFFFFFF << level_shift);
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topo->apic->smt_mask_width = level_shift;
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@@ -170,10 +170,10 @@ bool fill_topo_masks_x2apic(struct topology* topo) {
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printErr("Found invalid level when querying topology: %d", level_type);
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break;
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}
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i++; // sublevel to query
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}
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if (level1 && level2) {
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topo->apic->core_mask = coreplus_smt_mask ^ topo->apic->smt_mask;
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}
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@@ -194,13 +194,13 @@ bool fill_topo_masks_x2apic(struct topology* topo) {
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// as the number of cores, but in the case of Xeon Phi KNL it is not
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uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
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uint32_t max = 0;
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for(int i=0; i < topo->cach->max_cache_level; i++) {
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for(int j=0; j < topo->total_cores; j++) {
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for(int j=0; j < topo->total_cores; j++) {
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if(cache_id_apic[j][i] > max) max = cache_id_apic[j][i];
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}
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}
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max++;
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if(max > (uint32_t) topo->total_cores) return max;
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return topo->total_cores;
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@@ -208,15 +208,15 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
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bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
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uint32_t size = max_apic_id_size(cache_id_apic, topo);
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uint32_t* sockets = malloc(sizeof(uint32_t) * size);
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uint32_t* smt = malloc(sizeof(uint32_t) * size);
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uint32_t* apic_id = malloc(sizeof(uint32_t) * size);
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uint32_t* sockets = emalloc(sizeof(uint32_t) * size);
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uint32_t* smt = emalloc(sizeof(uint32_t) * size);
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uint32_t* apic_id = emalloc(sizeof(uint32_t) * size);
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uint32_t num_caches = 0;
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memset(sockets, 0, sizeof(uint32_t) * size);
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memset(smt, 0, sizeof(uint32_t) * size);
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memset(apic_id, 0, sizeof(uint32_t) * size);
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memset(apic_id, 0, sizeof(uint32_t) * size);
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// System topology
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for(int i=0; i < topo->total_cores; i++) {
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sockets[apic_pkg[i]] = 1;
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@@ -228,44 +228,44 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
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if(smt[i] != 0)
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topo->smt_available++;
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}
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topo->logical_cores = topo->total_cores / topo->sockets;
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topo->physical_cores = topo->logical_cores / topo->smt_available;
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// Cache topology
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for(int i=0; i < topo->cach->max_cache_level; i++) {
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num_caches = 0;
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memset(apic_id, 0, sizeof(uint32_t) * size);
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for(int c=0; c < topo->total_cores; c++) {
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for(int c=0; c < topo->total_cores; c++) {
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apic_id[cache_id_apic[c][i]]++;
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}
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for(uint32_t c=0; c < size; c++) {
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for(uint32_t c=0; c < size; c++) {
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if(apic_id[c] > 0) num_caches++;
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}
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topo->cach->cach_arr[i]->num_caches = num_caches;
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}
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free(sockets);
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free(smt);
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free(apic_id);
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return true;
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}
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void get_cache_topology_from_apic(struct topology* topo) {
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void get_cache_topology_from_apic(struct topology* topo) {
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uint32_t eax = 0x00000004;
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uint32_t ebx = 0;
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uint32_t ecx = 0;
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uint32_t edx = 0;
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for(int i=0; i < topo->cach->max_cache_level; i++) {
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for(int i=0; i < topo->cach->max_cache_level; i++) {
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eax = 0x00000004;
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ecx = i;
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cpuid(&eax, &ebx, &ecx, &edx);
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uint32_t SMTMaxCntPerEachCache = ((eax >> 14) & 0x7FF) + 1;
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uint32_t dummy;
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topo->apic->cache_select_mask[i] = create_mask(SMTMaxCntPerEachCache,&dummy);
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@@ -289,15 +289,15 @@ void add_apic_to_array(uint32_t apic, uint32_t* apic_ids, int n) {
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if(apic_ids[i] != (uint32_t) -1) last = i+1;
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i++;
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}
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if(!found) {
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if(!found) {
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apic_ids[last] = apic;
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//printf("Added %d\n", apic);
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}
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}
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bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
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#ifdef __APPLE__
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#ifdef __APPLE__
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// macOS extremely dirty approach...
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printf("cpufetch is computing APIC IDs, please wait...\n");
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bool end = false;
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@@ -306,11 +306,11 @@ bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
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while(!end) {
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apic = get_apic_id(x2apic_id);
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add_apic_to_array(apic, apic_ids, n);
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end = apic_array_full(apic_ids, n);
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end = apic_array_full(apic_ids, n);
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usleep(1000);
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}
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}
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#else
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for(int i=0; i < n; i++) {
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if(!bind_to_cpu(i)) {
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@@ -323,14 +323,14 @@ bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
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return true;
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}
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bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
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uint32_t apic_id;
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uint32_t* apic_ids = malloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t* apic_pkg = malloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t* apic_core = malloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t* apic_smt = malloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t** cache_smt_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
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uint32_t** cache_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
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bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
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uint32_t apic_id;
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uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores);
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uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
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uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
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bool x2apic_id;
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if(cpu->maxLevels >= 0x0000000B) {
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@@ -347,48 +347,48 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
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else {
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x2apic_id = false;
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}
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for(int i=0; i < topo->total_cores; i++) {
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cache_smt_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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cache_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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cache_smt_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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cache_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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}
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topo->apic->cache_select_mask = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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topo->apic->cache_id_apic = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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topo->apic->cache_select_mask = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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topo->apic->cache_id_apic = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
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if(x2apic_id) {
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if(!fill_topo_masks_x2apic(topo))
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return false;
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}
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else {
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if(!fill_topo_masks_apic(topo))
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return false;
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return false;
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}
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get_cache_topology_from_apic(topo);
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get_cache_topology_from_apic(topo);
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if(!fill_apic_ids(apic_ids, topo->total_cores, x2apic_id))
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return false;
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for(int i=0; i < topo->total_cores; i++) {
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for(int i=0; i < topo->total_cores; i++) {
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apic_id = apic_ids[i];
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apic_pkg[i] = (apic_id & topo->apic->pkg_mask) >> topo->apic->pkg_mask_shift;
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apic_core[i] = (apic_id & topo->apic->core_mask) >> topo->apic->smt_mask_width;
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apic_smt[i] = apic_id & topo->apic->smt_mask;
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for(int c=0; c < topo->cach->max_cache_level; c++) {
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cache_smt_id_apic[i][c] = apic_id & topo->apic->cache_select_mask[c];
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cache_id_apic[i][c] = apic_id & (-1 ^ topo->apic->cache_select_mask[c]);
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}
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}
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/* DEBUG
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for(int i=0; i < topo->cach->max_cache_level; i++) {
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printf("[CACH %1d]", i);
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for(int j=0; j < topo->total_cores; j++)
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printf("[%03d]", cache_id_apic[j][i]);
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printf("\n");
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}
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}
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for(int i=0; i < topo->total_cores; i++)
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printf("[%2d] 0x%.8X\n", i, apic_pkg[i]);
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printf("\n");
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@@ -397,16 +397,16 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
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printf("\n");
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for(int i=0; i < topo->total_cores; i++)
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printf("[%2d] 0x%.8X\n", i, apic_smt[i]);*/
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bool ret = build_topo_from_apic(apic_pkg, apic_smt, cache_id_apic, topo);
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// Assumption: If we cant get smt_available, we assume it is equal to smt_supported...
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if (!x2apic_id) {
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printWarn("Can't read SMT from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x0000000B, cpu->maxLevels);
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printWarn("Can't read SMT from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x0000000B, cpu->maxLevels);
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topo->smt_supported = topo->smt_available;
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}
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free(apic_pkg);
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free(apic_core);
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free(apic_smt);
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@@ -416,17 +416,17 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
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}
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free(cache_smt_id_apic);
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free(cache_id_apic);
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return ret;
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}
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}
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uint32_t is_smt_enabled_amd(struct topology* topo) {
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#ifdef __APPLE__
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UNUSED(topo);
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return 1;
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#else
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#else
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uint32_t id;
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for(int i = 0; i < topo->total_cores; i++) {
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if(!bind_to_cpu(i)) {
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printErr("Failed binding to CPU %d", i);
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@@ -435,7 +435,7 @@ uint32_t is_smt_enabled_amd(struct topology* topo) {
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id = get_apic_id(false) & 1; // get the last bit
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if(id == 1) return 2; // We assume there isn't any AMD CPU with more than 2th per core.
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}
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return 1;
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#endif
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return 1;
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#endif
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}
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