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[v1.03][X86] Refactor --raw. Add support for printing HV level

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Dr-Noob
2023-05-06 11:14:46 +02:00
parent 985bd6f25f
commit f6bf00e33d
1 changed files with 36 additions and 45 deletions
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81
src/x86/cpuid.c
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@@ -1091,12 +1091,29 @@ void print_debug(struct cpuInfo* cpu) {
free_cpuinfo_struct(cpu); free_cpuinfo_struct(cpu);
} }
// TODO: Query HV and Xeon Phi levels void print_raw_level(uint32_t reg) {
uint32_t eax = reg;
uint32_t ebx = 0;
uint32_t ecx = 0;
uint32_t edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
}
void print_raw_sublevel(uint32_t reg, uint32_t reg2) {
uint32_t eax = reg;
uint32_t ebx = 0;
uint32_t ecx = reg2;
uint32_t edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
}
void print_raw(struct cpuInfo* cpu) { void print_raw(struct cpuInfo* cpu) {
uint32_t eax;
uint32_t ebx;
uint32_t ecx;
uint32_t edx;
printf("%s\n\n", cpu->cpu_name); printf("%s\n\n", cpu->cpu_name);
printf(" CPUID leaf sub EAX EBX ECX EDX \n"); printf(" CPUID leaf sub EAX EBX ECX EDX \n");
printf("--------------------------------------------------------------\n"); printf("--------------------------------------------------------------\n");
@@ -1111,66 +1128,40 @@ void print_raw(struct cpuInfo* cpu) {
printf("CPU %d:\n", c); printf("CPU %d:\n", c);
// Standard levels
for(uint32_t reg=0x00000000; reg <= cpu->maxLevels; reg++) { for(uint32_t reg=0x00000000; reg <= cpu->maxLevels; reg++) {
if(reg == 0x00000004) { if(reg == 0x00000004) {
for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) { for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) {
eax = reg; print_raw_sublevel(reg, reg2);
ebx = 0;
ecx = reg2;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
} }
} }
else if(reg == 0x0000000B) { else if(reg == 0x0000000B) {
for(uint32_t reg2=0x00000000; reg2 < cpu->topo->smt_supported; reg2++) { for(uint32_t reg2=0x00000000; reg2 < cpu->topo->smt_supported; reg2++) {
eax = reg; print_raw_sublevel(reg, reg2);
ebx = 0;
ecx = reg2;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
} }
} }
else { else {
eax = reg; print_raw_level(reg);
ebx = 0;
ecx = 0;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
} }
} }
// Hypervisor levels
for(uint32_t reg=0x40000000; reg <= 0x40000006; reg++) {
print_raw_level(reg);
}
// Extended levels
for(uint32_t reg=0x80000000; reg <= cpu->maxExtendedLevels; reg++) { for(uint32_t reg=0x80000000; reg <= cpu->maxExtendedLevels; reg++) {
if(reg == 0x8000001D) { if(reg == 0x8000001D) {
for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) { for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) {
eax = reg; print_raw_sublevel(reg, reg2);
ebx = 0;
ecx = reg2;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
} }
} }
else { else {
eax = reg; print_raw_level(reg);
ebx = 0;
ecx = 0;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
} }
} }
} }
} }