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[v0.97] Merge branch bugfix2

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Dr-Noob
2021-04-24 23:13:34 +02:00
parent c04dd86523 a67a605fb5
commit fe7a99087d
3 changed files with 56 additions and 17 deletions
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21
src/arm/uarch.c
View File

@@ -24,6 +24,10 @@ struct uarch {
};
enum {
ISA_ARMv6,
ISA_ARMv6_T2,
ISA_ARMv6_KZ,
ISA_ARMv6_K,
ISA_ARMv7_A,
ISA_ARMv8_A,
ISA_ARMv8_A_AArch32,
@@ -37,7 +41,10 @@ enum {
// ARM
UARCH_ARM7,
UARCH_ARM9,
UARCH_ARM11, // ARM 1136, ARM 1156, ARM 1176, or ARM 11MPCore.
UARCH_ARM1136,
UARCH_ARM1156,
UARCH_ARM1176,
UARCH_ARM11MPCORE,
UARCH_CORTEX_A5,
UARCH_CORTEX_A7,
UARCH_CORTEX_A8,
@@ -98,6 +105,10 @@ enum {
};
static const ISA isas_uarch[] = {
[UARCH_ARM1136] = ISA_ARMv6,
[UARCH_ARM1156] = ISA_ARMv6_T2,
[UARCH_ARM1176] = ISA_ARMv6_KZ,
[UARCH_ARM11MPCORE] = ISA_ARMv6_K,
[UARCH_CORTEX_A5] = ISA_ARMv7_A,
[UARCH_CORTEX_A7] = ISA_ARMv7_A,
[UARCH_CORTEX_A8] = ISA_ARMv7_A,
@@ -143,6 +154,10 @@ static const ISA isas_uarch[] = {
};
static char* isas_string[] = {
[ISA_ARMv6] = "ARMv6",
[ISA_ARMv6_T2] = "ARMv6T2",
[ISA_ARMv6_KZ] = "ARMv6KZ",
[ISA_ARMv6_K] = "ARMv6K",
[ISA_ARMv7_A] = "ARMv7",
[ISA_ARMv8_A] = "ARMv8",
[ISA_ARMv8_A_AArch32] = "ARMv8 AArch32",
@@ -190,6 +205,10 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
// ----------------------------------------------------------------------- //
// IM P V R //
UARCH_START
CHECK_UARCH(arch, cpu, 'A', 0xB36, NA, NA, "ARM1136", UARCH_ARM1136, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xB56, NA, NA, "ARM1156", UARCH_ARM1156, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xB76, NA, NA, "ARM1176", UARCH_ARM1176, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xB02, NA, NA, "ARM11 MPCore", UARCH_ARM11MPCORE, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xC05, NA, NA, "Cortex-A5", UARCH_CORTEX_A5, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xC07, NA, NA, "Cortex-A7", UARCH_CORTEX_A7, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xC08, NA, NA, "Cortex-A8", UARCH_CORTEX_A8, CPU_VENDOR_ARM)

15
src/arm/udev.c
View File

@@ -18,8 +18,9 @@
int get_ncores_from_cpuinfo() {
// Examples:
// 0-271
// 0-5
// 0-7
// 0
int filelen;
char* buf;
if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
@@ -27,8 +28,16 @@ int get_ncores_from_cpuinfo() {
return UNKNOWN;
}
int ncores = 0;
char* tmp1 = strstr(buf, "-") + 1;
int ncores;
char* tmp1;
if((tmp1 = strstr(buf, "-")) == NULL) {
// file contains no - character, we assume that it contains 0,
// which means that the CPU contains only one core
return 1;
}
else {
tmp1++;
}
char* tmp2 = strstr(buf, "\n");
char ncores_str[filelen];
memset(ncores_str, 0, sizeof(char) * filelen);

19
src/x86/uarch.c
View File

@@ -38,6 +38,8 @@
typedef uint32_t MICROARCH;
#define STRING_UNKNOWN "Unknown"
// Data not available
#define NA -1
@@ -402,13 +404,22 @@ char* get_str_uarch(struct cpuInfo* cpu) {
}
char* get_str_process(struct cpuInfo* cpu) {
char* str = malloc(sizeof(char) * (4+2+1));
uint32_t process = cpu->arch->process;
char* str = malloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
int32_t process = cpu->arch->process;
if(process > 100)
if(process == UNK) {
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
}
else if(process > 100) {
sprintf(str, "%.2fum", (double)process/100);
else
}
else if(process > 0){
sprintf(str, "%dnm", process);
}
else {
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
printBug("Found invalid process: '%d'", process);
}
return str;
}