[v1.05][X86] Print core or cores depending on the number of CPU cores

Makefile

@@ -30,10 +30,6 @@ ifneq ($(OS),Windows_NT)
 			HEADERS += $(SRC_DIR)freq/freq.h
 			CFLAGS += -pthread
 		endif
-		ifeq ($(os), FreeBSD)
-			SOURCE += $(SRC_COMMON)sysctl.c
-			HEADERS += $(SRC_COMMON)sysctl.h
-		endif
 		CFLAGS += -DARCH_X86 -std=c99 -fstack-protector-all
 	else ifeq ($(arch), $(filter $(arch), ppc64le ppc64 ppcle ppc))
 		SRC_DIR=src/ppc/
@@ -42,16 +38,10 @@ ifneq ($(OS),Windows_NT)
 		CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all -Wno-language-extension-token
 	else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
 		SRC_DIR=src/arm/
-		SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_COMMON)pci.c $(SRC_DIR)udev.c sve.o
+		SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_COMMON)pci.c $(SRC_DIR)udev.c
 		HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h  $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_COMMON)pci.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
 		CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99 -fstack-protector-all
 
-		# Check if the compiler supports -march=armv8-a+sve. We will use it (if supported) to compile SVE detection code later
-		is_sve_flag_supported := $(shell $(CC) -march=armv8-a+sve -c $(SRC_DIR)sve.c -o sve_test.o 2> /dev/null && echo 'yes'; rm -f sve_test.o)
-		ifeq ($(is_sve_flag_supported), yes)
-			SVE_FLAGS += -march=armv8-a+sve
-		endif
-
 		ifeq ($(os), Darwin)
 			SOURCE += $(SRC_COMMON)sysctl.c
 			HEADERS += $(SRC_COMMON)sysctl.h
@@ -101,9 +91,6 @@ freq_avx.o: Makefile $(SRC_DIR)freq/freq_avx.c $(SRC_DIR)freq/freq_avx.h $(SRC_D
 freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.h $(SRC_DIR)freq/freq.h
 	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -pthread $(SRC_DIR)freq/freq_avx512.c -o $@
 
-sve.o: Makefile $(SRC_DIR)sve.c $(SRC_DIR)sve.h
-	$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SVE_FLAGS) -c $(SRC_DIR)sve.c -o $@
-
 $(OUTPUT): Makefile $(SOURCE) $(HEADERS)
 ifeq ($(GIT_VERSION),"")
 	$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
@@ -120,9 +107,9 @@ clean:
 install: $(OUTPUT)
 	install -Dm755 "cpufetch"   "$(DESTDIR)$(PREFIX)/bin/cpufetch"
 	install -Dm644 "LICENSE"    "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
-	install -Dm644 "cpufetch.1" "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1"
+	install -Dm644 "cpufetch.1" "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"
 
 uninstall:
 	rm -f "$(DESTDIR)$(PREFIX)/bin/cpufetch"
 	rm -f "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
-	rm -f "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1"
+	rm -f "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"

README.md

@@ -45,7 +45,6 @@ cpufetch is a command-line tool written in C that displays the CPU information i
   - [3.1 x86_64](#31-x86_64)
   - [3.2 ARM](#32-arm)
   - [3.3 PowerPC](#33-powerpc)
-  - [3.4 RISC-V](#34-risc-v)
 - [4. Colors](#4-colors)
   - [4.1 Specifying a name](#41-specifying-a-name)
   - [4.2 Specifying the colors in RGB format](#42-specifying-the-colors-in-rgb-format)
@@ -121,11 +120,6 @@ make
 <p align="center"><img width=90% src="pictures/ibm.png"></p>
 <p align="center">Talos II</p>
 
-## 3.4 RISC-V
-
-<p align="center"><img width=80% src="pictures/starfive.png"></p>
-<p align="center">StarFive VisionFive 2</p>
-
 ## 4. Colors
 By default, `cpufetch` will print the CPU logo with the system colorscheme. However, you can set a custom color scheme in two different ways:
 
@@ -181,7 +175,6 @@ Thanks to the fellow contributors and interested people in the project. Special
 - [mdoksa76](https://github.com/mdoksa76) and [exkc](https://github.com/exkc): Excellent ideas and feedback for supporting Allwinner SoCs.
 - [Sakura286](https://github.com/Sakura286), [exkc](https://github.com/exkc) and [Patola](https://github.com/Patola): Helped with RISC-V port with ssh access, ideas, testing, etc.
 - [ThomasKaiser](https://github.com/ThomasKaiser): Very valuable feedback on improving ARM SoC detection (Apple, Allwinner, Rockchip).
-- [zerkerX](https://github.com/zerkerX): Helped with feedback for supporting old (e.g., Pentium III) Intel CPUs.
 
 ## 8. cpufetch for GPUs (gpufetch)
 See [gpufetch](https://github.com/Dr-Noob/gpufetch) project!

src/arm/midr.c

@@ -19,7 +19,6 @@
 #include "udev.h"
 #include "midr.h"
 #include "uarch.h"
-#include "sve.h"
 
 bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
   return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
@@ -169,17 +168,6 @@ struct features* get_features_info(void) {
     feat->SHA1 = hwcaps & HWCAP_SHA1;
     feat->SHA2 = hwcaps & HWCAP_SHA2;
     feat->NEON = hwcaps & HWCAP_ASIMD;
-    feat->SVE = hwcaps & HWCAP_SVE;
-
-    hwcaps = getauxval(AT_HWCAP2);
-    if (errno == ENOENT) {
-      printWarn("Unable to retrieve AT_HWCAP2 using getauxval");
-    }
-    else {
-      #ifdef HWCAP2_SVE2
-        feat->SVE2 = hwcaps & HWCAP2_SVE2;
-      #endif
-    }
   }
 #else
   else {
@@ -195,8 +183,6 @@ struct features* get_features_info(void) {
     feat->CRC32 = hwcaps & HWCAP2_CRC32;
     feat->SHA1 = hwcaps & HWCAP2_SHA1;
     feat->SHA2 = hwcaps & HWCAP2_SHA2;
-    feat->SVE = false;
-    feat->SVE2 = false;
   }
 #endif // ifdef __aarch64__
 #elif defined __APPLE__ || __MACH__
@@ -206,14 +192,8 @@ struct features* get_features_info(void) {
   feat->SHA1 = true;
   feat->SHA2 = true;
   feat->NEON = true;
-  feat->SVE = false;
-  feat->SVE2 = false;
 #endif  // ifdef __linux__
 
-  if (feat->SVE || feat->SVE2) {
-    feat->cntb = sve_cntb();
-  }
-
   return feat;
 }
 
@@ -414,7 +394,6 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
     cpu->peak_performance = get_peak_performance(cpu);
   }
   else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
-          cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2   ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
     fill_cpu_info_everest_sawtooth(cpu, pcores, ecores);
@@ -451,7 +430,7 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
 
 char* get_str_features(struct cpuInfo* cpu) {
   struct features* feat = cpu->feat;
-  uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,SVE,SVE2,") + 1;
+  uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,") + 1;
   uint32_t len = 0;
   char* string = ecalloc(max_len, sizeof(char));
 
@@ -459,14 +438,6 @@ char* get_str_features(struct cpuInfo* cpu) {
     strcat(string, "NEON,");
     len += 5;
   }
-  if(feat->SVE) {
-    strcat(string, "SVE,");
-    len += 4;
-  }
-  if(feat->SVE2) {
-    strcat(string, "SVE2,");
-    len += 5;
-  }
   if(feat->SHA1) {
     strcat(string, "SHA1,");
     len += 5;
@@ -516,10 +487,6 @@ void print_debug(struct cpuInfo* cpu) {
     }
   }
 
-  if (cpu->feat->SVE || cpu->feat->SVE2) {
-    printf("- cntb: %d\n", (int) cpu->feat->cntb);
-  }
-
   #if defined(__APPLE__) || defined(__MACH__)
     printf("hw.cpufamily: 0x%.8X\n", get_sys_info_by_name("hw.cpufamily"));
     printf("hw.cpusubfamily: 0x%.8X\n", get_sys_info_by_name("hw.cpusubfamily"));

src/arm/soc.c

@@ -18,11 +18,6 @@
 #define min(a,b) (((a)<(b))?(a):(b))
 #define ARRAY_SIZE(arr)     (sizeof(arr) / sizeof((arr)[0]))
 
-#define PROP_MTK_PLATFORM   "ro.mediatek.platform"
-#define PROP_SOC_MODEL      "ro.soc.model"
-#define PROP_PRODUCT_BOARD  "ro.product.board"
-#define PROP_BOARD_PLATFORM "ro.board.platform"
-
 static char* soc_rpi_string[] = {
   "BCM2835",
   "BCM2836",
@@ -33,7 +28,8 @@ static char* soc_rpi_string[] = {
 
 char* toupperstr(char* str) {
   int len = strlen(str) + 1;
-  char* ret = ecalloc(len, sizeof(char));
+  char* ret = emalloc(sizeof(char) * len);
+  memset(ret, 0, sizeof(char) * len);
 
   for(int i=0; i < len; i++) {
     ret[i] = toupper((unsigned char) str[i]);
@@ -106,7 +102,7 @@ bool get_sunxisoc_from_sid(struct system_on_chip* soc, char* raw_name, uint32_t
   int index = 0;
   while(socFromSid[index].sid != 0x0) {
     if(socFromSid[index].sid == sid) {
-      fill_soc(soc, socFromSid[index].soc.name, socFromSid[index].soc.model, socFromSid[index].soc.process);
+      fill_soc(soc, socFromSid[index].soc.soc_name, socFromSid[index].soc.soc_model, socFromSid[index].soc.process);
       return true;
     }
     index++;
@@ -132,24 +128,24 @@ bool match_broadcom(char* soc_name, struct system_on_chip* soc) {
   if((tmp = strstr(soc_name, "BCM")) == NULL)
     return false;
 
-  soc->vendor = SOC_VENDOR_BROADCOM;
+  soc->soc_vendor = SOC_VENDOR_BROADCOM;
 
   SOC_START
-  SOC_EQ(tmp, "BCM2835",              "BCM2835",              SOC_BCM_2835,   soc, 65)
+  SOC_EQ(tmp, "BCM2835",              "2835",              SOC_BCM_2835,   soc, 65)
-  SOC_EQ(tmp, "BCM2836",              "BCM2836",              SOC_BCM_2836,   soc, 40)
+  SOC_EQ(tmp, "BCM2836",              "2836",              SOC_BCM_2836,   soc, 40)
-  SOC_EQ(tmp, "BCM2837",              "BCM2837",              SOC_BCM_2837,   soc, 40)
+  SOC_EQ(tmp, "BCM2837",              "2837",              SOC_BCM_2837,   soc, 40)
-  SOC_EQ(tmp, "BCM2837B0",            "BCM2837B0",            SOC_BCM_2837B0, soc, 40)
+  SOC_EQ(tmp, "BCM2837B0",            "2837B0",            SOC_BCM_2837B0, soc, 40)
-  SOC_EQ(tmp, "BCM21553",             "BCM21553",             SOC_BCM_21553,  soc, 65)
+  SOC_EQ(tmp, "BCM21553",             "21553",             SOC_BCM_21553,  soc, 65)
-  SOC_EQ(tmp, "BCM21553-Thunderbird", "BCM21553 Thunderbird", SOC_BCM_21553T, soc, 65)
+  SOC_EQ(tmp, "BCM21553-Thunderbird", "21553 Thunderbird", SOC_BCM_21553T, soc, 65)
-  SOC_EQ(tmp, "BCM21663",             "BCM21663",             SOC_BCM_21663,  soc, 40)
+  SOC_EQ(tmp, "BCM21663",             "21663",             SOC_BCM_21663,  soc, 40)
-  SOC_EQ(tmp, "BCM21664",             "BCM21664",             SOC_BCM_21664,  soc, 40)
+  SOC_EQ(tmp, "BCM21664",             "21664",             SOC_BCM_21664,  soc, 40)
-  SOC_EQ(tmp, "BCM28155",             "BCM28155",             SOC_BCM_28155,  soc, 40)
+  SOC_EQ(tmp, "BCM28155",             "28155",             SOC_BCM_28155,  soc, 40)
-  SOC_EQ(tmp, "BCM23550",             "BCM23550",             SOC_BCM_23550,  soc, 40)
+  SOC_EQ(tmp, "BCM23550",             "23550",             SOC_BCM_23550,  soc, 40)
-  SOC_EQ(tmp, "BCM28145",             "BCM28145",             SOC_BCM_28145,  soc, 40)
+  SOC_EQ(tmp, "BCM28145",             "28145",             SOC_BCM_28145,  soc, 40)
-  SOC_EQ(tmp, "BCM2157",              "BCM2157",              SOC_BCM_2157,   soc, 65)
+  SOC_EQ(tmp, "BCM2157",              "2157",              SOC_BCM_2157,   soc, 65)
-  SOC_EQ(tmp, "BCM21654",             "BCM21654",             SOC_BCM_21654,  soc, 40)
+  SOC_EQ(tmp, "BCM21654",             "21654",             SOC_BCM_21654,  soc, 40)
-  SOC_EQ(tmp, "BCM2711",              "BCM2711",              SOC_BCM_2711,   soc, 28)
+  SOC_EQ(tmp, "BCM2711",              "2711",              SOC_BCM_2711,   soc, 28)
-  SOC_EQ(tmp, "BCM2712",              "BCM2712",              SOC_BCM_2712,   soc, 16)
+  SOC_EQ(tmp, "BCM2712",              "2712",              SOC_BCM_2712,   soc, 16)
   SOC_END
 }
 
@@ -160,7 +156,7 @@ bool match_google(char* soc_name, struct system_on_chip* soc) {
   if((tmp = strstr(soc_name, "gs")) == NULL)
     return false;
 
-  soc->vendor = SOC_VENDOR_GOOGLE;
+  soc->soc_vendor = SOC_VENDOR_GOOGLE;
 
   SOC_START
   SOC_EQ(tmp, "gs101", "Tensor",    SOC_GOOGLE_TENSOR,    soc, 5)
@@ -171,15 +167,13 @@ bool match_google(char* soc_name, struct system_on_chip* soc) {
 
 // https://www.techinsights.com/
 // https://datasheetspdf.com/pdf-file/1316605/HiSilicon/Hi3660/1
-// https://github.com/Dr-Noob/cpufetch/issues/259
 bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
   char* tmp;
 
-  if((tmp = strstr(soc_name, "hi")) != NULL);
+  if((tmp = strstr(soc_name, "hi")) == NULL)
-  else if((tmp = strstr(soc_name, "kirin")) != NULL);
+    return false;
-  else return false;
 
-  soc->vendor = SOC_VENDOR_KIRIN;
+  soc->soc_vendor = SOC_VENDOR_KIRIN;
 
   SOC_START
   SOC_EQ(tmp, "hi3620GFC",  "K3V2",  SOC_HISILICON_3620, soc, 40)
@@ -210,7 +204,6 @@ bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "hi3680",     "980",   SOC_HISILICON_3680, soc,  7)
   //SOC_EQ(tmp, "?",        "985",   SOC_KIRIN, soc,  7)
   SOC_EQ(tmp, "hi3690",     "990",   SOC_HISILICON_3690, soc,  7)
-  SOC_EQ(tmp, "kirin9000s", "9000s", SOC_HISILICON_9000S,soc,  7)
   SOC_END
 }
 
@@ -221,7 +214,7 @@ bool match_exynos(char* soc_name, struct system_on_chip* soc) {
   else if((tmp = strstr(soc_name, "exynos")) != NULL);
   else return false;
 
-  soc->vendor = SOC_VENDOR_EXYNOS;
+  soc->soc_vendor = SOC_VENDOR_EXYNOS;
 
   // Because exynos are recently using "exynosXXXX" instead
   // of "universalXXXX" as codenames, SOC_EXY_EQ will check for
@@ -281,7 +274,7 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
   if((tmp = strstr(soc_name_upper, "MT")) == NULL)
     return false;
 
-  soc->vendor = SOC_VENDOR_MEDIATEK;
+  soc->soc_vendor = SOC_VENDOR_MEDIATEK;
 
   SOC_START
   // Dimensity //
@@ -428,9 +421,6 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
 }
 
 /*
- * Good sources:
- * https://www.geektopia.es/es/products/company/qualcomm/socs/
- *
  * APQ: Application Processor Qualcomm
  * MSM: Mobile Station Modem
  * In a APQXXXX or MSMXXXX, the second digit represents:
@@ -464,7 +454,7 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   else if((tmp = strstr(soc_name_upper, "QSD")) != NULL);
   else return false;
 
-  soc->vendor = SOC_VENDOR_SNAPDRAGON;
+  soc->soc_vendor = SOC_VENDOR_SNAPDRAGON;
 
   SOC_START
   // Snapdragon S1 //
@@ -588,25 +578,6 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "SM8250-AB",      "865+",      SOC_SNAPD_SM8250_AB,      soc,  7)
   SOC_EQ(tmp, "SM8350",         "888",       SOC_SNAPD_SM8350,         soc,  5)
   SOC_EQ(tmp, "SM8350-AC",      "888+",      SOC_SNAPD_SM8350,         soc,  5)
-  // Snapdragon Gen 4 //
-  SOC_EQ(tmp, "SM4375",         "4 Gen 1",   SOC_SNAPD_SM4375,         soc,  6)
-  SOC_EQ(tmp, "SM4450",         "4 Gen 2",   SOC_SNAPD_SM4450,         soc,  4)
-  SOC_EQ(tmp, "SM4635",         "4s Gen 2",  SOC_SNAPD_SM4635,         soc,  4)
-  // Snapdragon Gen 6 //
-  SOC_EQ(tmp, "SM6375-AC",      "6s Gen 3",  SOC_SNAPD_SM6375_AC,      soc,  6)
-  SOC_EQ(tmp, "SM6450",         "6 Gen 1",   SOC_SNAPD_SM6450,         soc,  4)
-  // Snapdragon Gen 7 //
-  SOC_EQ(tmp, "SM7435-AB",      "7s Gen 2",  SOC_SNAPD_SM7435_AB,      soc,  4)
-  SOC_EQ(tmp, "SM7450",         "7 Gen 1",   SOC_SNAPD_SM7450,         soc,  4)
-  SOC_EQ(tmp, "SM7475",         "7+ Gen 2",  SOC_SNAPD_SM7475,         soc,  4)
-  SOC_EQ(tmp, "SM7550-AB",      "7 Gen 3",   SOC_SNAPD_SM7550_AB,      soc,  4)
-  SOC_EQ(tmp, "SM7675-AB",      "7+ Gen 3",  SOC_SNAPD_SM7675_AB,      soc,  4)
-  // Snapdragon Gen 8 //
-  SOC_EQ(tmp, "SM8450",         "8 Gen 1",   SOC_SNAPD_SM8450,         soc,  4)
-  SOC_EQ(tmp, "SM8475",         "8+ Gen 1",  SOC_SNAPD_SM8475,         soc,  4)
-  SOC_EQ(tmp, "SM8550-AB",      "8 Gen 2",   SOC_SNAPD_SM8550_AB,      soc,  4)
-  SOC_EQ(tmp, "SM8635",         "8s Gen 3",  SOC_SNAPD_SM8635,         soc,  4)
-  SOC_EQ(tmp, "SM8650-AB",      "8 Gen 3",   SOC_SNAPD_SM8650_AB,      soc,  4)
   SOC_END
 }
 
@@ -617,7 +588,7 @@ bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
   if((tmp = strstr(soc_name, "sun")) == NULL)
     return false;
 
-  soc->vendor = SOC_VENDOR_ALLWINNER;
+  soc->soc_vendor = SOC_VENDOR_ALLWINNER;
 
   SOC_START
   // SoCs we can detect just with with the name
@@ -653,37 +624,12 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
     return true;
   }
 
-  // New Snapdragon SoCs codenames
+  // Snapdragon 8 Gen 1 reported as "taro"
-  // https://github.com/sm8450-mainline/fdt?tab=readme-ov-file#chipsets
-  // https://github.com/Dr-Noob/cpufetch/issues/253
-  if (strcmp(soc_name, "cape") == 0) {
-    fill_soc(soc, "8+ Gen 1", SOC_SNAPD_SM8475, 4);
-    return true;
-  }
-
   if(strcmp(soc_name, "taro") == 0) {
     fill_soc(soc, "8 Gen 1", SOC_SNAPD_SM8450, 4);
     return true;
   }
 
-  if(strcmp(soc_name, "ukee") == 0) {
-    fill_soc(soc, "7+ Gen 2", SOC_SNAPD_SM7475, 4);
-    return true;
-  }
-
-  if(strcmp(soc_name, "diwali") == 0) {
-    fill_soc(soc, "7 Gen 1", SOC_SNAPD_SM7450, 4);
-    return true;
-  }
-
-  // parrot can be either SM7435 or SM6450, we need more data
-  // to distingish between those two
-
-  if(strcmp(soc_name, "ravelin") == 0) {
-    fill_soc(soc, "4 Gen 2", SOC_SNAPD_SM4450, 4);
-    return true;
-  }
-
   // Google Pixel 6
   // https://github.com/Dr-Noob/cpufetch/issues/134
   if(strcmp(soc_name, "oriole") == 0) {
@@ -741,7 +687,7 @@ void try_parse_soc_from_string(struct system_on_chip* soc, int soc_len, char* so
   soc->raw_name = emalloc(sizeof(char) * (soc_len + 1));
   strncpy(soc->raw_name, soc_str, soc_len + 1);
   soc->raw_name[soc_len] = '\0';
-  soc->vendor = SOC_VENDOR_UNKNOWN;
+  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
   parse_soc_from_string(soc);
 }
 
@@ -749,34 +695,24 @@ struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
   char tmp[100];
   int property_len = 0;
 
-  property_len = android_property_get(PROP_MTK_PLATFORM, (char *) &tmp);
+  property_len = android_property_get("ro.mediatek.platform", (char *) &tmp);
   if(property_len > 0) {
     try_parse_soc_from_string(soc, property_len, tmp);
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_MTK_PLATFORM, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.mediatek.platform: %s", tmp);
     else return soc;
   }
 
-  // https://github.com/Dr-Noob/cpufetch/issues/253
+  property_len = android_property_get("ro.product.board", (char *) &tmp);
-  // ro.soc.model might be more reliable than ro.product.board or
-  // ro.board.platform, so try with it first
-  property_len = android_property_get(PROP_SOC_MODEL, (char *) &tmp);
   if(property_len > 0) {
     try_parse_soc_from_string(soc, property_len, tmp);
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_SOC_MODEL, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.product.board: %s", tmp);
     else return soc;
   }
 
-  property_len = android_property_get(PROP_PRODUCT_BOARD, (char *) &tmp);
+  property_len = android_property_get("ro.board.platform", (char *) &tmp);
   if(property_len > 0) {
     try_parse_soc_from_string(soc, property_len, tmp);
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_PRODUCT_BOARD, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.board.platform: %s", tmp);
-    else return soc;
-  }
-
-  property_len = android_property_get(PROP_BOARD_PLATFORM, (char *) &tmp);
-  if(property_len > 0) {
-    try_parse_soc_from_string(soc, property_len, tmp);
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_BOARD_PLATFORM, tmp);
     else return soc;
   }
 
@@ -842,7 +778,7 @@ bool get_rk_soc_from_efuse(struct system_on_chip* soc, char* efuse) {
   int index = 0;
   while(socFromRK[index].rk_soc != 0x0) {
     if(socFromRK[index].rk_soc == rk_soc) {
-      fill_soc(soc, socFromRK[index].soc.name, socFromRK[index].soc.model, socFromRK[index].soc.process);
+      fill_soc(soc, socFromRK[index].soc.soc_name, socFromRK[index].soc.soc_model, socFromRK[index].soc.process);
       return true;
     }
     index++;
@@ -889,7 +825,7 @@ struct system_on_chip* guess_soc_from_uarch(struct system_on_chip* soc, struct c
   int index = 0;
   while(socFromUarch[index].u != UARCH_UNKNOWN) {
     if(socFromUarch[index].u == get_uarch(arch)) {
-      fill_soc(soc, socFromUarch[index].soc.name, socFromUarch[index].soc.model, socFromUarch[index].soc.process);
+      fill_soc(soc, socFromUarch[index].soc.soc_name, socFromUarch[index].soc.soc_model, socFromUarch[index].soc.process);
       return soc;
     }
     index++;
@@ -899,96 +835,6 @@ struct system_on_chip* guess_soc_from_uarch(struct system_on_chip* soc, struct c
   return soc;
 }
 
-// Return the dt string without the NULL characters.
-char* get_dt_str(char* dt, int filelen) {
-  char* dt_without_null = (char *) malloc(sizeof(char) * filelen);
-  memcpy(dt_without_null, dt, filelen);
-
-  for (int i=0; i < filelen-1; i++) {
-    if (dt_without_null[i] == '\0')
-      dt_without_null[i] = ',';
-  }
-  return dt_without_null;
-}
-
-bool match_dt(struct system_on_chip* soc, char* dt, int filelen, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
-  // The /proc/device-tree/compatible file (passed by dt) uses NULL
-  // to separate the strings, so we need to make an special case here
-  // and iterate over the NULL characters, thus iterating over each
-  // individual compatible strings.
-
-  if (strstr(dt, expected_name) != NULL) {
-    fill_soc(soc, soc_name, soc_model, process);
-    return true;
-  }
-
-  char *compatible = dt;
-  char *end_of_dt = dt + filelen;
-
-  while ((compatible = strchr(compatible, '\0')) != end_of_dt) {
-    compatible++;
-    if (strstr(compatible, expected_name) != NULL) {
-      fill_soc(soc, soc_name, soc_model, process);
-      return true;
-    }
-  }
-
-  return false;
-}
-
-#define DT_START if (false) {}
-#define DT_EQ(dt, filelen, soc, expected_name, soc_name, soc_model, process) \
-   else if (match_dt(soc, dt, filelen, expected_name, soc_name, soc_model, process)) return soc;
-#define DT_END(dt, filelen) else { printWarn("guess_soc_from_devtree: No match found for '%s'", get_dt_str(dt, filelen)); return soc; }
-
-// TODO: Move this to doc
-// The number of fields seems non-standard, so for now it seems wiser
-// to just get the entire string with all fields and just look for the
-// substring.
-// TODO: Implement this by going trough NULL-separated fields rather than
-// using strstr.
-// https://trac.gateworks.com/wiki/linux/devicetree
-struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
-  int len;
-  char* dt = get_devtree_compatible(&len);
-  if (dt == NULL) {
-    return soc;
-  }
-
-  DT_START
-  // The following are internal codenames of Asahi Linux
-  // https://github.com/AsahiLinux/docs/wiki/Codenames
-  // https://github.com/Dr-Noob/cpufetch/issues/263
-  DT_EQ(dt, len, soc, "apple,t8103", "M1",       SOC_APPLE_M1,       5)
-  DT_EQ(dt, len, soc, "apple,t6000", "M1 Pro",   SOC_APPLE_M1_PRO,   5)
-  DT_EQ(dt, len, soc, "apple,t6001", "M1 Max",   SOC_APPLE_M1_MAX,   5)
-  DT_EQ(dt, len, soc, "apple,t6002", "M1 Ultra", SOC_APPLE_M1_ULTRA, 5)
-  DT_EQ(dt, len, soc, "apple,t8112", "M2",       SOC_APPLE_M2,       5)
-  DT_EQ(dt, len, soc, "apple,t6020", "M2 Pro",   SOC_APPLE_M2_PRO,   5)
-  DT_EQ(dt, len, soc, "apple,t6021", "M2 Max",   SOC_APPLE_M2_MAX,   5)
-  DT_EQ(dt, len, soc, "apple,t6022", "M2 Ultra", SOC_APPLE_M2_ULTRA, 5)
-  DT_EQ(dt, len, soc, "apple,t8122", "M3",       SOC_APPLE_M3,       3)
-  DT_EQ(dt, len, soc, "apple,t6030", "M3 Pro",   SOC_APPLE_M3_PRO,   3)
-  DT_EQ(dt, len, soc, "apple,t6031", "M3 Max",   SOC_APPLE_M3_MAX,   3)
-  DT_EQ(dt, len, soc, "apple,t6034", "M3 Max",   SOC_APPLE_M3_MAX,   3)
-  // grep -oR -h --color -E '"fsl,.*' *.dtsi | sort | uniq | cut -d ',' -f1-2 | grep -v '-'
-  // https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm64/boot/dts/freescale    
-  DT_EQ(dt, len, soc, "fsl,imx8qm",  "i.MX 8QuadMax",   SOC_NXP_IMX8QM,  28) // https://www.nxp.com/docs/en/fact-sheet/IMX8FAMFS.pdf  
-  DT_EQ(dt, len, soc, "fsl,imx8qp",  "i.MX 8QuadPlus",  SOC_NXP_IMX8QP,  28) // Actually not in dtsi, compatible string is just a guess
-  DT_EQ(dt, len, soc, "fsl,imx8mp",  "i.MX 8M Plus",    SOC_NXP_IMX8MP,  14) // https://www.nxp.com/docs/en/fact-sheet/IMX8MPLUSFS.pdf https://github.com/Dr-Noob/cpufetch/issues/261
-  DT_EQ(dt, len, soc, "fsl,imx8mn",  "i.MX 8M Nano",    SOC_NXP_IMX8MN,  NA)
-  DT_EQ(dt, len, soc, "fsl,imx8mm",  "i.MX 8M Mini",    SOC_NXP_IMX8MM,  NA) // https://www.nxp.com/docs/en/fact-sheet/IMX8MMINIFS.pdf
-  DT_EQ(dt, len, soc, "fsl,imx8dxp", "i.MX 8DualXPlus", SOC_NXP_IMX8DXP, NA)
-  DT_EQ(dt, len, soc, "fsl,imx8qxp", "i.MX 8QuadXPlus", SOC_NXP_IMX8QXP, NA)
-  DT_EQ(dt, len, soc, "fsl,imx93",   "i.MX 93",         SOC_NXP_IMX93,   NA)  
-  // TODO: Add more Amlogic SoCs: https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm64/boot/dts/amlogic
-  // https://github.com/Dr-Noob/cpufetch/issues/268
-  // https://www.amlogic.com/#Products/393/index.html
-  // https://wikimovel.com/index.php/Amlogic_A311D
-  DT_EQ(dt, len, soc, "amlogic,a311d", "A311D", SOC_AMLOGIC_A311D, 12)
-  DT_END(dt, len)
-}
-
 struct system_on_chip* guess_soc_from_pci(struct system_on_chip* soc, struct cpuInfo* cpu) {
   struct pci_devices * pci = get_pci_devices();
   if (pci == NULL) {
@@ -1003,10 +849,9 @@ struct system_on_chip* guess_soc_from_pci(struct system_on_chip* soc, struct cpu
   } pciToSoC;
 
   pciToSoC socFromPCI[] = {
-    {PCI_VENDOR_NVIDIA, PCI_DEVICE_TEGRA_X1, {SOC_TEGRA_X1,     SOC_VENDOR_NVIDIA,  20, "Tegra X1", NULL} },
+    {PCI_VENDOR_NVIDIA, PCI_DEVICE_TEGRA_X1, {SOC_TEGRA_X1, SOC_VENDOR_NVIDIA,  20, "Tegra X1", NULL} },
-    // {PCI_VENDOR_NVIDIA, PCI_DEVICE_GH_200,{SOC_GH_200,       SOC_VENDOR_NVIDIA,   ?, "Grace Hopper", NULL} },
+    // {PCI_VENDOR_NVIDIA, PCI_DEVICE_GH_200,{SOC_GH_200,   SOC_VENDOR_NVIDIA,  ?, "Grace Hopper", NULL} },
-    {PCI_VENDOR_AMPERE, PCI_DEVICE_ALTRA,    {SOC_AMPERE_ALTRA, SOC_VENDOR_AMPERE,   7, "Altra",    NULL} }, // https://www.anandtech.com/show/15575/amperes-altra-80-core-n1-soc-for-hyperscalers-against-rome-and-xeon
+    {0x0000,            0x0000,              {UNKNOWN,      SOC_VENDOR_UNKNOWN, -1,          "", NULL} }
-    {0x0000,            0x0000,              {UNKNOWN,          SOC_VENDOR_UNKNOWN, -1,      "",    NULL} }
   };
 
   int index = 0;
@@ -1016,7 +861,7 @@ struct system_on_chip* guess_soc_from_pci(struct system_on_chip* soc, struct cpu
 
       if (socFromPCI[index].vendor_id == dev->vendor_id &&
           socFromPCI[index].device_id == dev->device_id) {
-        fill_soc(soc, socFromPCI[index].soc.name, socFromPCI[index].soc.model, socFromPCI[index].soc.process);
+        fill_soc(soc, socFromPCI[index].soc.soc_name, socFromPCI[index].soc.soc_model, socFromPCI[index].soc.process);
         return soc;
       }
     }
@@ -1100,12 +945,12 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
       }
       else {
         printBug("Found invalid physical cpu number: %d", physicalcpu);
-        soc->vendor = SOC_VENDOR_UNKNOWN;
+        soc->soc_vendor = SOC_VENDOR_UNKNOWN;
       }
     }
     else {
       printBugCheckRelease("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
-      soc->vendor = SOC_VENDOR_UNKNOWN;
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
     }
   }
   else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
@@ -1127,21 +972,19 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
       }
       else {
         printBug("Found invalid physical cpu number: %d", physicalcpu);
-        soc->vendor = SOC_VENDOR_UNKNOWN;
+        soc->soc_vendor = SOC_VENDOR_UNKNOWN;
       }
     }
     else {
       printBugCheckRelease("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
-      soc->vendor = SOC_VENDOR_UNKNOWN;
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
     }
   }
   else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
-          cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2   ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
     // Check M3 version
-    if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
+    if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH) {
-       cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2) {
       fill_soc(soc, "M3", SOC_APPLE_M3, 3);
     }
     else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO) {
@@ -1152,12 +995,12 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
     }
     else {
       printBugCheckRelease("Found invalid cpu_family: 0x%.8X", cpu_family);
-      soc->vendor = SOC_VENDOR_UNKNOWN;
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
     }
   }
   else {
     printBugCheckRelease("Found invalid cpu_family: 0x%.8X", cpu_family);
-    soc->vendor = SOC_VENDOR_UNKNOWN;
+    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
   }
   return soc;
 }
@@ -1166,15 +1009,15 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
 struct system_on_chip* get_soc(struct cpuInfo* cpu) {
   struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
   soc->raw_name = NULL;
-  soc->vendor = SOC_VENDOR_UNKNOWN;
+  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-  soc->model = SOC_MODEL_UNKNOWN;
+  soc->soc_model = SOC_MODEL_UNKNOWN;
   soc->process = UNKNOWN;
 
 #ifdef __linux__
   bool isRPi = is_raspberry_pi();
   if(isRPi) {
     soc = guess_soc_raspbery_pi(soc);
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
       printErr("[RPi] SoC detection failed using revision code, falling back to cpuinfo detection");
     }
     else {
@@ -1183,7 +1026,7 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
   }
 
   soc = guess_soc_from_cpuinfo(soc);
-  if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
     if(soc->raw_name != NULL) {
       printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);
     }
@@ -1195,30 +1038,26 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
     if(soc->raw_name == NULL) {
       printWarn("SoC detection failed using Android: No string found");
     }
-    else if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+    else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
       printWarn("SoC detection failed using Android: Found '%s' string", soc->raw_name);
     }
 #endif // ifdef __ANDROID__
-    // If previous steps failed, try with the device tree
-    if (soc->vendor == SOC_VENDOR_UNKNOWN) {
-      soc = guess_soc_from_devtree(soc);
-    }
     // If previous steps failed, try with nvmem
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
       soc = guess_soc_from_nvmem(soc);
     }
     // If previous steps failed, try infering it from the microarchitecture
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
       soc = guess_soc_from_uarch(soc, cpu);
     }
     // If previous steps failed, try infering it from the pci device id
-    if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
       soc = guess_soc_from_pci(soc, cpu);
     }
   }
 #elif defined __APPLE__ || __MACH__
   soc = guess_soc_apple(soc);
-  if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
     printWarn("SoC detection failed using cpu_subfamily");
   }
   else {
@@ -1226,7 +1065,7 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
   }
 #endif // ifdef __linux__
 
-  if(soc->model == SOC_MODEL_UNKNOWN) {
+  if(soc->soc_model == SOC_MODEL_UNKNOWN) {
     // raw_name might not be NULL, but if we were unable to find
     // the exact SoC, just print "Unkwnown"
     soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));

src/arm/socs.h

@@ -29,7 +29,6 @@ enum {
   SOC_HISILICON_3670,
   SOC_HISILICON_3680,
   SOC_HISILICON_3690,
-  SOC_HISILICON_9000S,
   // Kunpeng //
   SOC_KUNPENG_920,
   SOC_KUNPENG_930,
@@ -271,16 +270,11 @@ enum {
   SOC_SNAPD_SDM660,
   SOC_SNAPD_SM6115,
   SOC_SNAPD_SM6125,
-  SOC_SNAPD_SM6375_AC,
-  SOC_SNAPD_SM6450,
   SOC_SNAPD_SDM670,
   SOC_SNAPD_SM6150,
   SOC_SNAPD_SM6350,
   SOC_SNAPD_SDM710,
   SOC_SNAPD_SDM712,
-  SOC_SNAPD_SM4375,
-  SOC_SNAPD_SM4450,
-  SOC_SNAPD_SM4635,
   SOC_SNAPD_SM7125,
   SOC_SNAPD_SM7150_AA,
   SOC_SNAPD_SM7150_AB,
@@ -289,11 +283,6 @@ enum {
   SOC_SNAPD_SM7250_AA,
   SOC_SNAPD_SM7250_AB,
   SOC_SNAPD_SM7250_AC,
-  SOC_SNAPD_SM7435_AB,
-  SOC_SNAPD_SM7450,
-  SOC_SNAPD_SM7475,
-  SOC_SNAPD_SM7550_AB,
-  SOC_SNAPD_SM7675_AB,
   SOC_SNAPD_MSM8974AA,
   SOC_SNAPD_MSM8974AB,
   SOC_SNAPD_MSM8974AC,
@@ -314,10 +303,6 @@ enum {
   SOC_SNAPD_SM8250_AB,
   SOC_SNAPD_SM8350,
   SOC_SNAPD_SM8450,
-  SOC_SNAPD_SM8475,
-  SOC_SNAPD_SM8550_AB,
-  SOC_SNAPD_SM8635,
-  SOC_SNAPD_SM8650_AB,
   // APPLE
   SOC_APPLE_M1,
   SOC_APPLE_M1_PRO,
@@ -380,38 +365,22 @@ enum {
   SOC_GOOGLE_TENSOR_G3,
   // NVIDIA,
   SOC_TEGRA_X1,
-  // ALTRA
-  SOC_AMPERE_ALTRA,
-  // NXP
-  SOC_NXP_IMX8QM,
-  SOC_NXP_IMX8QP,
-  SOC_NXP_IMX8MP,
-  SOC_NXP_IMX8MN,
-  SOC_NXP_IMX8MM,
-  SOC_NXP_IMX8DXP,
-  SOC_NXP_IMX8QXP,
-  SOC_NXP_IMX93,
-  // AMLOGIC
-  SOC_AMLOGIC_A311D,
   // UNKNOWN
   SOC_MODEL_UNKNOWN
 };
 
 inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
   if(soc >= SOC_BCM_2835 && soc <= SOC_BCM_2712) return SOC_VENDOR_BROADCOM;
-  else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_9000S) return SOC_VENDOR_KIRIN;
+  else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
   else if(soc >= SOC_KUNPENG_920 && soc <= SOC_KUNPENG_930) return SOC_VENDOR_KUNPENG;
   else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
   else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
-  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8650_AB) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8450) return SOC_VENDOR_SNAPDRAGON;
   else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M3_MAX) return SOC_VENDOR_APPLE;
   else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
   else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588) return SOC_VENDOR_ROCKCHIP;
   else if(soc >= SOC_GOOGLE_TENSOR && soc <= SOC_GOOGLE_TENSOR_G3) return SOC_VENDOR_GOOGLE;
   else if(soc >= SOC_TEGRA_X1 && soc <= SOC_TEGRA_X1) return SOC_VENDOR_NVIDIA;
-  else if(soc >= SOC_AMPERE_ALTRA && soc <= SOC_AMPERE_ALTRA) return SOC_VENDOR_AMPERE;
-  else if(soc >= SOC_NXP_IMX8QM && soc <= SOC_NXP_IMX93) return SOC_VENDOR_NXP;
-  else if(soc >= SOC_AMLOGIC_A311D && soc <= SOC_AMLOGIC_A311D) return SOC_VENDOR_AMLOGIC;
   return SOC_VENDOR_UNKNOWN;
 }
 

src/arm/sve.c

@@ -1,15 +0,0 @@
-#include <stdint.h>
-#include "../common/global.h"
-
-// https://learn.arm.com/learning-paths/servers-and-cloud-computing/sve/sve_basics/#:~:text=Using%20a%20text%20editor%20of%20your%20choice%2C%20copy,svcntb%28%29%29%3B%20%7D%20This%20program%20prints%20the%20vector%20length
-uint64_t sve_cntb(void) {
-  #ifdef __ARM_FEATURE_SVE
-    uint64_t x0 = 0;
-    __asm volatile("cntb %0"
-         : "=r"(x0));
-    return x0;
-  #else
-    printWarn("sve_cntb: Hardware supports SVE, but it was not enabled by the compiler");
-    return 0;
-  #endif
-}

src/arm/sve.h

@@ -1,6 +0,0 @@
-#ifndef __SVE_DETECTION__
-#define __SVE_DETECTION__
-
-uint64_t sve_cntb(void);
-
-#endif

src/arm/uarch.c

@@ -33,9 +33,7 @@ enum {
   ISA_ARMv8_3_A,
   ISA_ARMv8_4_A,
   ISA_ARMv8_5_A,
-  ISA_ARMv8_6_A,
+  ISA_ARMv9_A
-  ISA_ARMv9_A,
-  ISA_ARMv9_2_A
 };
 
 static const ISA isas_uarch[] = {
@@ -63,32 +61,20 @@ static const ISA isas_uarch[] = {
   [UARCH_CORTEX_A76]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A77]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A78]   = ISA_ARMv8_2_A,
-  [UARCH_CORTEX_A78C]  = ISA_ARMv8_2_A,
-  [UARCH_CORTEX_A78AE] = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A510]   = ISA_ARMv9_A,
-  [UARCH_CORTEX_A520]  = ISA_ARMv9_2_A,
   [UARCH_CORTEX_A710]   = ISA_ARMv9_A,
   [UARCH_CORTEX_A715]  = ISA_ARMv9_A,
-  [UARCH_CORTEX_A720]  = ISA_ARMv9_2_A,
-  [UARCH_CORTEX_A725]  = ISA_ARMv9_2_A,
   [UARCH_CORTEX_X1]    = ISA_ARMv8_2_A,
-  [UARCH_CORTEX_X1C]   = ISA_ARMv8_2_A, // Assuming same as X1
   [UARCH_CORTEX_X2]    = ISA_ARMv9_A,
   [UARCH_CORTEX_X3]    = ISA_ARMv9_A,
-  [UARCH_CORTEX_X4]    = ISA_ARMv9_2_A,
-  [UARCH_CORTEX_X925]  = ISA_ARMv9_2_A,
   [UARCH_NEOVERSE_N1]  = ISA_ARMv8_2_A,
-  [UARCH_NEOVERSE_N2]  = ISA_ARMv9_A,
   [UARCH_NEOVERSE_E1]  = ISA_ARMv8_2_A,
   [UARCH_NEOVERSE_V1]  = ISA_ARMv8_4_A,
-  [UARCH_NEOVERSE_V2]  = ISA_ARMv9_A,
-  [UARCH_NEOVERSE_V3]  = ISA_ARMv9_2_A,
   [UARCH_BRAHMA_B15]   = ISA_ARMv7_A,   // Same as Cortex-A15
   [UARCH_BRAHMA_B53]   = ISA_ARMv8_A,   // Same as Cortex-A53
   [UARCH_THUNDERX]     = ISA_ARMv8_A,
   [UARCH_THUNDERX2]    = ISA_ARMv8_1_A,
   [UARCH_TAISHAN_V110] = ISA_ARMv8_2_A,
-  [UARCH_TAISHAN_V120] = ISA_ARMv8_2_A, // Not confirmed
   [UARCH_TAISHAN_V200] = ISA_ARMv8_2_A, // Not confirmed
   [UARCH_DENVER]       = ISA_ARMv8_A,
   [UARCH_DENVER2]      = ISA_ARMv8_A,
@@ -106,10 +92,8 @@ static const ISA isas_uarch[] = {
   [UARCH_EXYNOS_M5]    = ISA_ARMv8_2_A,
   [UARCH_ICESTORM]     = ISA_ARMv8_5_A, // https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/AArch64TargetParser.def
   [UARCH_FIRESTORM]    = ISA_ARMv8_5_A,
-  [UARCH_BLIZZARD]     = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
+  [UARCH_BLIZZARD]     = ISA_ARMv8_5_A, // Not confirmed
-  [UARCH_AVALANCHE]    = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
+  [UARCH_AVALANCHE]    = ISA_ARMv8_5_A,
-  [UARCH_SAWTOOTH]     = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
-  [UARCH_EVEREST]      = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
   [UARCH_PJ4]          = ISA_ARMv7_A,
   [UARCH_XIAOMI]       = ISA_ARMv8_A,
 };
@@ -127,9 +111,7 @@ static char* isas_string[] = {
   [ISA_ARMv8_3_A] = "ARMv8.3",
   [ISA_ARMv8_4_A] = "ARMv8.4",
   [ISA_ARMv8_5_A] = "ARMv8.5",
-  [ISA_ARMv8_6_A] = "ARMv8.6",
+  [ISA_ARMv9_A] = "ARMv9"
-  [ISA_ARMv9_A] = "ARMv9",
-  [ISA_ARMv9_2_A] = "ARMv9.2",
 };
 
 #define UARCH_START if (false) {}
@@ -201,24 +183,13 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD40, NA, NA, "Neoverse V1",           UARCH_NEOVERSE_V1,  CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78",            UARCH_CORTEX_A78,   CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD42, NA, NA, "Cortex-A78AE",          UARCH_CORTEX_A78AE, CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1",             UARCH_CORTEX_X1,    CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD46, NA, NA, "Cortex‑A510",           UARCH_CORTEX_A510,  CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD47, NA, NA, "Cortex‑A710",           UARCH_CORTEX_A710,  CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD48, NA, NA, "Cortex-X2",             UARCH_CORTEX_X2,    CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD49, NA, NA, "Neoverse N2",           UARCH_NEOVERSE_N2,  CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1",           UARCH_NEOVERSE_E1,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD4B, NA, NA, "Cortex-A78C",           UARCH_CORTEX_A78C,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD4C, NA, NA, "Cortex-X1C",            UARCH_CORTEX_X1C,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD4D, NA, NA, "Cortex-A715",           UARCH_CORTEX_A715,  CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD4E, NA, NA, "Cortex-X3",             UARCH_CORTEX_X3,    CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD4F, NA, NA, "Neoverse V2",           UARCH_NEOVERSE_V2,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD80, NA, NA, "Cortex-A520",           UARCH_CORTEX_A520,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD81, NA, NA, "Cortex-A720",           UARCH_CORTEX_A720,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD82, NA, NA, "Cortex-X4",             UARCH_CORTEX_X4,    CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD84, NA, NA, "Neoverse V3",           UARCH_NEOVERSE_V3,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD85, NA, NA, "Cortex-X925",           UARCH_CORTEX_X925,  CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD87, NA, NA, "Cortex-A725",           UARCH_CORTEX_A725,  CPU_VENDOR_ARM)
 
   CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15",            UARCH_BRAHMA_B15,   CPU_VENDOR_BROADCOM)
   CHECK_UARCH(arch, cpu, 'B', 0x100, NA, NA, "Brahma B53",            UARCH_BRAHMA_B53,   CPU_VENDOR_BROADCOM)
@@ -231,10 +202,8 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'C', 0x0AF, NA, NA, "ThunderX2 99XX",        UARCH_THUNDERX2,    CPU_VENDOR_CAVIUM)
 
   CHECK_UARCH(arch, cpu, 'H', 0xD01, NA, NA, "TaiShan v110",          UARCH_TAISHAN_V110, CPU_VENDOR_HUAWEI) // Kunpeng 920 series
-  CHECK_UARCH(arch, cpu, 'H', 0xD02,  2,  2, "TaiShan v120",          UARCH_TAISHAN_V120, CPU_VENDOR_HUAWEI) // Kiring 9000S Big cores (https://github.com/Dr-Noob/cpufetch/issues/259)
   CHECK_UARCH(arch, cpu, 'H', 0xD02, NA, NA, "TaiShan v200",          UARCH_TAISHAN_V200, CPU_VENDOR_HUAWEI) // Kunpeng 930 series (found in openeuler: https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/XQCV7NX2UKRIUWUFKRF4PO3QENCOUFR3)
   CHECK_UARCH(arch, cpu, 'H', 0xD40, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)    // Kirin 980 Big/Medium cores -> Cortex-A76
-  CHECK_UARCH(arch, cpu, 'H', 0xD42, NA, NA, "TaiShan v120",          UARCH_TAISHAN_V120, CPU_VENDOR_HUAWEI) // Kiring 9000S Small Cores (https://github.com/Dr-Noob/cpufetch/issues/259)
 
   CHECK_UARCH(arch, cpu, 'N', 0x000, NA, NA, "Denver",                UARCH_DENVER,       CPU_VENDOR_NVIDIA)
   CHECK_UARCH(arch, cpu, 'N', 0x003, NA, NA, "Denver2",               UARCH_DENVER2,      CPU_VENDOR_NVIDIA)
@@ -276,8 +245,6 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
 
   CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm",              UARCH_ICESTORM,     CPU_VENDOR_APPLE)
   CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm",             UARCH_FIRESTORM,    CPU_VENDOR_APPLE)
-  CHECK_UARCH(arch, cpu, 'a', 0x024, NA, NA, "Icestorm",              UARCH_ICESTORM,     CPU_VENDOR_APPLE)     // https://github.com/Dr-Noob/cpufetch/issues/263
-  CHECK_UARCH(arch, cpu, 'a', 0x025, NA, NA, "Firestorm",             UARCH_FIRESTORM,    CPU_VENDOR_APPLE)     // https://github.com/Dr-Noob/cpufetch/issues/263
   CHECK_UARCH(arch, cpu, 'a', 0x030, NA, NA, "Blizzard",              UARCH_BLIZZARD,     CPU_VENDOR_APPLE)
   CHECK_UARCH(arch, cpu, 'a', 0x031, NA, NA, "Avalanche",             UARCH_AVALANCHE,    CPU_VENDOR_APPLE)
   CHECK_UARCH(arch, cpu, 'a', 0x048, NA, NA, "Sawtooth",              UARCH_SAWTOOTH,     CPU_VENDOR_APPLE)
@@ -292,7 +259,14 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
 }
 
 bool is_ARMv8_or_newer(struct cpuInfo* cpu) {
-  return cpu->arch->isa >= ISA_ARMv8_A;
+  return cpu->arch->isa == ISA_ARMv8_A         ||
+         cpu->arch->isa == ISA_ARMv8_A_AArch32 ||
+         cpu->arch->isa == ISA_ARMv8_1_A       ||
+         cpu->arch->isa == ISA_ARMv8_2_A       ||
+         cpu->arch->isa == ISA_ARMv8_3_A       ||
+         cpu->arch->isa == ISA_ARMv8_4_A       ||
+         cpu->arch->isa == ISA_ARMv8_5_A       ||
+         cpu->arch->isa == ISA_ARMv9_A;
 }
 
 bool has_fma_support(struct cpuInfo* cpu) {
@@ -305,26 +279,29 @@ int get_vpus_width(struct cpuInfo* cpu) {
   // If the CPU has NEON, width can be 64 or 128 [1].
   // In >= ARMv8, NEON are 128 bits width [2]
   // If the CPU has SVE/SVE2, width can be between 128-2048 [3],
-  // so we get the exact value from cntb [4]
+  // so we must check the exact width depending on
+  // the exact chip (Neoverse V1 uses 256b implementations.)
   //
   // [1] https://en.wikipedia.org/wiki/ARM_architecture_family#Advanced_SIMD_(Neon)
   // [2] https://developer.arm.com/documentation/102474/0100/Fundamentals-of-Armv8-Neon-technology
   // [3] https://www.anandtech.com/show/16640/arm-announces-neoverse-v1-n2-platforms-cpus-cmn700-mesh/5
-  // [4] https://developer.arm.com/documentation/ddi0596/2020-12/SVE-Instructions/CNTB--CNTD--CNTH--CNTW--Set-scalar-to-multiple-of-predicate-constraint-element-count-
 
-  if (cpu->feat->SVE && cpu->feat->cntb > 0) {
+  MICROARCH ua = cpu->arch->uarch;
-    return cpu->feat->cntb * 8;
+  switch(ua) {
-  }
+    case UARCH_NEOVERSE_V1:
-  else if (cpu->feat->NEON) {
+      return 256;
-    if(is_ARMv8_or_newer(cpu)) {
+    default:
-      return 128;
+      if(cpu->feat->NEON) {
-    }
+        if(is_ARMv8_or_newer(cpu)) {
-    else {
+          return 128;
-      return 64;
+        }
-    }
+        else {
-  }
+          return 64;
-  else {
+        }
-    return 32;
+      }
+      else {
+        return 32;
+      }
   }
 }
 
@@ -332,19 +309,13 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
   MICROARCH ua = cpu->arch->uarch;
 
   switch(ua) {
-    case UARCH_CORTEX_X925: // [https://www.anandtech.com/show/21399/arm-unveils-2024-cpu-core-designs-cortex-x925-a725-and-a520-arm-v9-2-redefined-for-3nm-/2]
-      return 6;
     case UARCH_EVEREST:     // Just a guess, needs confirmation.
     case UARCH_FIRESTORM:   // [https://dougallj.github.io/applecpu/firestorm-simd.html]
     case UARCH_AVALANCHE:   // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
     case UARCH_CORTEX_X1:   // [https://www.anandtech.com/show/15813/arm-cortex-a78-cortex-x1-cpu-ip-diverging/3]
-    case UARCH_CORTEX_X1C:  // Assuming same as X1
     case UARCH_CORTEX_X2:   // [https://www.anandtech.com/show/16693/arm-announces-mobile-armv9-cpu-microarchitectures-cortexx2-cortexa710-cortexa510/2]
     case UARCH_CORTEX_X3:   // [https://www.hwcooling.net/en/cortex-x3-the-new-fastest-arm-core-architecture-analysis: "The FPU and SIMD unit of the core still has four pipelines"]
-    case UARCH_CORTEX_X4:   // [https://www.anandtech.com/show/18871/arm-unveils-armv92-mobile-architecture-cortex-x4-a720-and-a520-64bit-exclusive/2]: "Cortex-X4: Out-of-Order Core"
     case UARCH_NEOVERSE_V1: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_v1]
-    case UARCH_NEOVERSE_V2: // [https://chipsandcheese.com/2023/09/11/hot-chips-2023-arms-neoverse-v2/]
-    case UARCH_NEOVERSE_V3: // Assuming same as V2
       return 4;
     case UARCH_SAWTOOTH:    // Needs confirmation, rn this is the best we know: https://mastodon.social/@dougall/111118317031041336
     case UARCH_EXYNOS_M3:   // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
@@ -354,7 +325,6 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
     case UARCH_ICESTORM:    // [https://dougallj.github.io/applecpu/icestorm-simd.html]
     case UARCH_BLIZZARD:    // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
     case UARCH_TAISHAN_V110:// [https://www-file.huawei.com/-/media/corp2020/pdf/publications/huawei-research/2022/huawei-research-issue1-en.pdf]: "128-bit x 2 for single precision"
-    case UARCH_TAISHAN_V120:// Not confirmed, asssuming same as v110
     case UARCH_TAISHAN_V200:// Not confirmed, asssuming same as v110
     case UARCH_CORTEX_A57:  // [https://www.anandtech.com/show/8718/the-samsung-galaxy-note-4-exynos-review/5]
     case UARCH_CORTEX_A72:  // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
@@ -363,22 +333,16 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
     case UARCH_CORTEX_A76:  // [https://www.anandtech.com/show/12785/arm-cortex-a76-cpu-unveiled-7nm-powerhouse/3]
     case UARCH_CORTEX_A77:  // [https://fuse.wikichip.org/news/2339/arm-unveils-cortex-a77-emphasizes-single-thread-performance]
     case UARCH_CORTEX_A78:  // [https://fuse.wikichip.org/news/3536/arm-unveils-the-cortex-a78-when-less-is-more]
-    case UARCH_CORTEX_A78C: // Assuming same as A78
-    case UARCH_CORTEX_A78AE:// Assuming same as A78
     case UARCH_EXYNOS_M1:   // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
     case UARCH_EXYNOS_M2:   // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
     case UARCH_NEOVERSE_N1: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_n1#Individual_Core]
-    case UARCH_NEOVERSE_N2: // [https://chipsandcheese.com/2023/08/18/arms-neoverse-n2-cortex-a710-for-servers/]
     case UARCH_CORTEX_A710: // [https://chipsandcheese.com/2023/08/11/arms-cortex-a710-winning-by-default/]: Fig in Core Overview. Table in Instruction Scheduling and Execution
     case UARCH_CORTEX_A715: // [https://www.hwcooling.net/en/arm-introduces-new-cortex-a715-core-architecture-analysis/]: "the numbers of ALU and FPU execution units themselves >
-    case UARCH_CORTEX_A720: // Assuming same as A715: https://www.anandtech.com/show/18871/arm-unveils-armv92-mobile-architecture-cortex-x4-a720-and-a520-64bit-exclusive/3
-    case UARCH_CORTEX_A725: // Assuming same as A720
       return 2;
     case UARCH_NEOVERSE_E1: // [https://www.anandtech.com/show/13959/arm-announces-neoverse-n1-platform/5]
     // A510 is integrated as part of a Complex. Normally, each complex would incorporate two Cortex-A510 cores.
     // Each complex incorporates a single VPU with 2 ports, so for each A510 there is theoretically 1 port.
     case UARCH_CORTEX_A510: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/cortex-a510#Vector_Processing_Unit_.28VPU.29]
-    case UARCH_CORTEX_A520: // Assuming same as A50: https://www.anandtech.com/show/18871/arm-unveils-armv92-mobile-architecture-cortex-x4-a720-and-a520-64bit-exclusive/4
       return 1;
     default:
       // ARMv6

src/arm/uarch.h

@@ -34,26 +34,15 @@ enum {
   UARCH_CORTEX_A76,
   UARCH_CORTEX_A77,
   UARCH_CORTEX_A78,
-  UARCH_CORTEX_A78AE,
-  UARCH_CORTEX_A78C,
   UARCH_CORTEX_A510,
-  UARCH_CORTEX_A520,
   UARCH_CORTEX_A710,
   UARCH_CORTEX_A715,
-  UARCH_CORTEX_A720,
-  UARCH_CORTEX_A725,
   UARCH_CORTEX_X1,
-  UARCH_CORTEX_X1C,
   UARCH_CORTEX_X2,
   UARCH_CORTEX_X3,
-  UARCH_CORTEX_X4,
-  UARCH_CORTEX_X925,
   UARCH_NEOVERSE_N1,
-  UARCH_NEOVERSE_N2,
   UARCH_NEOVERSE_E1,
   UARCH_NEOVERSE_V1,
-  UARCH_NEOVERSE_V2,
-  UARCH_NEOVERSE_V3,
   UARCH_SCORPION,
   UARCH_KRAIT,
   UARCH_KYRO,
@@ -94,9 +83,7 @@ enum {
   UARCH_BRAHMA_B15,
   UARCH_BRAHMA_B53,
   UARCH_XGENE,        // Applied Micro X-Gene.
-  // HUAWEI
   UARCH_TAISHAN_V110, // HiSilicon TaiShan v110
-  UARCH_TAISHAN_V120, // HiSilicon TaiShan v120
   UARCH_TAISHAN_V200, // HiSilicon TaiShan v200
   // PHYTIUM
   UARCH_XIAOMI,       // Not to be confused with Xiaomi Inc

src/common/args.c

@@ -225,7 +225,8 @@ bool parse_color(char* optarg_str, struct color*** cs) {
 char* build_short_options(void) {
   const char *c = args_chr;
   int len = sizeof(args_chr) / sizeof(args_chr[0]);
-  char* str = (char *) ecalloc(len*2 + 1, sizeof(char));
+  char* str = (char *) emalloc(sizeof(char) * (len*2 + 1));
+  memset(str, 0, sizeof(char) * (len*2 + 1));
 
 #ifdef ARCH_X86
   sprintf(str, "%c:%c:%c%c%c%c%c%c%c%c%c%c%c%c",

src/common/ascii.h

@@ -394,45 +394,6 @@ $C2##   ##  ##   ##  ##  ##   ##  ##   #: :#    \
 $C2##   ##   ## ##   ##  ##   ##  ##  #######   \
 $C2##   ##    ###    ##  ######   ## ##     ##  "
 
-#define ASCII_AMPERE \
-"$C1                                                  \
-$C1                                                  \
-$C1                             ##                   \
-$C1                            ####                  \
-$C1                           ### ##                 \
-$C1                          ###   ###               \
-$C1                         ###     ###              \
-$C1                        ###        ###            \
-$C1                       ##           ###           \
-$C1                 #######   ###       ###          \
-$C1            ######  ##        ######   ###        \
-$C1        ####      ###              ########       \
-$C1      ####       ###                    ####      \
-$C1    ###         ###                       ####    \
-$C1  ##           ###                          ###   \
-$C1                                                  \
-$C1                                                  "
-
-#define ASCII_NXP \
-"$C1#####          # $C2#######      ####### $C3##########       \
-$C1#######        ## $C2#######    ####### $C3###############   \
-$C1##########     #### $C2######  ######  $C3###        ######  \
-$C1############   ##### $C2############ $C3#####         #####  \
-$C1#####  ####### #####  $C2########## $C3###################   \
-$C1#####     ######### $C2############## $C3###############     \
-$C1#####       ###### $C2######    ###### $C3####               \
-$C1#####         ## $C2######        ###### $C3##               "
-
-#define ASCII_AMLOGIC \
-"$C1      .#####.             ###                  ###        \
-$C1     ########             ###                             \
-$C1    ####..###  ########## ###   ###     #####  ###   ###  \
-$C1  .## #.  ###  ##  ##  ## ### ##   ## ##   ##  ### ##     \
-$C1 #### #.# ###  ##  ##  ## ### ##   ## ##   ##  ### ##     \
-$C1#########.###  ##  ##  ##  ##   ###    ######   ##   ###  \
-$C1                                          ###             \
-$C1                                       ###                "
-
 // --------------------- LONG LOGOS ------------------------- //
 #define ASCII_AMD_L \
 "$C1                                                              \
@@ -608,9 +569,6 @@ asciiL logo_sifive      = { ASCII_SIFIVE,      48, 19, true,  {C_BG_WHITE, C_BG_
 asciiL logo_starfive    = { ASCII_STARFIVE,    33, 17, false, {C_FG_WHITE},                                   {C_FG_WHITE,   C_FG_BLUE}    };
 asciiL logo_sipeed      = { ASCII_SIPEED,      41, 16, true,  {C_BG_RED, C_BG_WHITE},                         {C_FG_RED,     C_FG_WHITE}   };
 asciiL logo_nvidia      = { ASCII_NVIDIA,      45, 19, false, {C_FG_GREEN, C_FG_WHITE},                       {C_FG_WHITE,   C_FG_GREEN}   };
-asciiL logo_ampere      = { ASCII_AMPERE,      50, 17, false, {C_FG_RED},                                     {C_FG_WHITE,   C_FG_RED}     };
-asciiL logo_nxp         = { ASCII_NXP,         55,  8, false, {C_FG_YELLOW, C_FG_CYAN, C_FG_GREEN},           {C_FG_CYAN,    C_FG_WHITE}   };
-asciiL logo_amlogic     = { ASCII_AMLOGIC,     58,  8, false, {C_FG_BLUE},                                    {C_FG_BLUE,    C_FG_B_WHITE} };
 
 // Long variants          | ----------------------------------------------------------------------------------------------------------------|
 asciiL logo_amd_l       = { ASCII_AMD_L,       62, 19, true,  {C_BG_WHITE, C_BG_GREEN},                       {C_FG_WHITE, C_FG_GREEN}     };

src/common/cpu.c

@@ -34,12 +34,6 @@ int64_t get_freq(struct frequency* freq) {
   return freq->max;
 }
 
-#ifdef ARCH_X86
-int64_t get_freq_pp(struct frequency* freq) {
-  return freq->max_pp;
-}
-#endif
-
 #if defined(ARCH_X86) || defined(ARCH_PPC)
 char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname) {
   #ifdef ARCH_X86

src/common/cpu.h

@@ -60,11 +60,6 @@ struct frequency {
   int32_t max;
   // Indicates if max frequency was measured
   bool measured;
-#ifdef ARCH_X86
-  // Max frequency when running vectorized code.
-  // Used only for peak performance computation.
-  int32_t max_pp;
-#endif
 };
 
 struct hypervisor {
@@ -129,9 +124,6 @@ struct features {
   bool SHA1;
   bool SHA2;
   bool CRC32;
-  bool SVE;
-  bool SVE2;
-  uint64_t cntb;
 #endif  
 };
 
@@ -193,8 +185,6 @@ struct cpuInfo {
 #ifdef ARCH_X86
   // The index of the first core in the module
   uint32_t first_core_id;
-  // The index of this module
-  uint32_t module_id;
 #endif
 #endif
 };
@@ -207,9 +197,6 @@ uint32_t get_nsockets(struct topology* topo);
 
 VENDOR get_cpu_vendor(struct cpuInfo* cpu);
 int64_t get_freq(struct frequency* freq);
-#ifdef ARCH_X86
-int64_t get_freq_pp(struct frequency* freq);
-#endif
 
 char* get_str_aes(struct cpuInfo* cpu);
 char* get_str_sha(struct cpuInfo* cpu);

src/common/global.c

@@ -62,7 +62,7 @@
 #endif
 
 #ifndef GIT_FULL_VERSION
-  static const char* VERSION = "1.06";
+  static const char* VERSION = "1.05";
 #endif
 
 enum {

src/common/pci.c

@@ -14,6 +14,14 @@
 #define PCI_PATH "/sys/bus/pci/devices/"
 #define MAX_LENGTH_PCI_DIR_NAME 1024
 
+/*
+ * doc: https://wiki.osdev.org/PCI#Class_Codes
+ *      https://pci-ids.ucw.cz/read/PC
+ */
+#define PCI_VENDOR_ID_AMD    0x1002
+#define CLASS_VGA_CONTROLLER 0x0300
+#define CLASS_3D_CONTROLLER  0x0302
+
 // Return a list of PCI devices containing only
 // the sysfs path
 struct pci_devices * get_pci_paths(void) {
@@ -66,7 +74,7 @@ struct pci_devices * get_pci_paths(void) {
     if ((stbuf.st_mode & S_IFMT) == S_IFDIR) {
       int strLen = min(MAX_LENGTH_PCI_DIR_NAME, strlen(dp->d_name)) + 1;
       pci->devices[i] = emalloc(sizeof(struct pci_device));
-      pci->devices[i]->path = ecalloc(strLen, sizeof(char));
+      pci->devices[i]->path = ecalloc(sizeof(char), strLen);
       strncpy(pci->devices[i]->path, dp->d_name, strLen);
       i++;
     }        
@@ -90,7 +98,7 @@ void populate_pci_devices(struct pci_devices * pci) {
     int path_size = strlen(PCI_PATH) + strlen(dev->path) + 2;
 
     // Read vendor_id
-    char *vendor_id_path = emalloc(sizeof(char) * (path_size + strlen("vendor") + 1));
+    char *vendor_id_path = emalloc(sizeof(char) * (path_size + strlen("vendor")));
     sprintf(vendor_id_path, "%s/%s/%s", PCI_PATH, dev->path, "vendor");
     
     if ((buf = read_file(vendor_id_path, &filelen)) == NULL) {
@@ -102,7 +110,7 @@ void populate_pci_devices(struct pci_devices * pci) {
     }
 
     // Read device_id
-    char *device_id_path = emalloc(sizeof(char) * (path_size + strlen("device") + 1));
+    char *device_id_path = emalloc(sizeof(char) * (path_size + strlen("device")));
     sprintf(device_id_path, "%s/%s/%s", PCI_PATH, dev->path, "device");
 
     if ((buf = read_file(device_id_path, &filelen)) == NULL) {
@@ -118,6 +126,43 @@ void populate_pci_devices(struct pci_devices * pci) {
   }
 }
 
+// Right now, we are interested in PCI devices which
+// vendor is NVIDIA (to be extended in the future).
+// Should we also restrict to VGA controllers only?
+bool pci_device_is_useful(struct pci_device* dev) {
+  return dev->vendor_id == PCI_VENDOR_NVIDIA;
+}
+
+// Filter the input list in order to get only those PCI devices which 
+// we are interested in (decided by pci_device_is_useful)
+// and return the filtered result.
+struct pci_devices * filter_pci_devices(struct pci_devices * pci) {
+  int * devices_to_get = emalloc(sizeof(int) * pci->num_devices);
+  int dev_ptr = 0;
+
+  for (int i=0; i < pci->num_devices; i++) {
+    if (pci_device_is_useful(pci->devices[i])) {
+      devices_to_get[dev_ptr] = i;
+      dev_ptr++;
+    }
+  }
+
+  struct pci_devices * pci_filtered = emalloc(sizeof(struct pci_devices));
+  pci_filtered->num_devices = dev_ptr;
+
+  if (pci_filtered->num_devices == 0) {
+    pci_filtered->devices = NULL;
+  }
+  else {
+    pci_filtered->devices = emalloc(sizeof(struct pci_device) * pci_filtered->num_devices);  
+
+    for (int i=0; i < pci_filtered->num_devices; i++)
+      pci_filtered->devices[i] = pci->devices[devices_to_get[i]];
+  }
+
+  return pci_filtered;
+}
+
 // Return a list of PCI devices that could be used to infer the SoC.
 // The criteria to determine which devices are suitable for this task
 // is decided in filter_pci_devices.
@@ -129,5 +174,5 @@ struct pci_devices * get_pci_devices(void) {
 
   populate_pci_devices(pci);  
 
-  return pci;
+  return filter_pci_devices(pci);
 }

src/common/pci.h

@@ -1,11 +1,8 @@
 #ifndef __PCI__
 #define __PCI__
 
-#define PCI_VENDOR_NVIDIA   0x10de
+#define PCI_VENDOR_NVIDIA 0x10de
-#define PCI_VENDOR_AMPERE   0x1def
-
 #define PCI_DEVICE_TEGRA_X1 0x0faf
-#define PCI_DEVICE_ALTRA    0xe100
 
 struct pci_device {
   char * path;

src/common/printer.c

@@ -389,12 +389,6 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
     art->art = &logo_allwinner;
   else if(art->vendor == SOC_VENDOR_ROCKCHIP)
     art->art = &logo_rockchip;
-  else if(art->vendor == SOC_VENDOR_AMPERE)
-    art->art = &logo_ampere;
-  else if(art->vendor == SOC_VENDOR_NXP)
-    art->art = &logo_nxp;
-  else if(art->vendor == SOC_VENDOR_AMLOGIC)
-    art->art = &logo_amlogic;
   else if(art->vendor == SOC_VENDOR_NVIDIA)
     art->art = choose_ascii_art_aux(&logo_nvidia_l, &logo_nvidia, term, lf);
   else {
@@ -640,10 +634,9 @@ bool print_cpufetch_x86(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
     }
 
     // Show the most modern vector instructions.
+    // If AVX is supported show it, otherwise show SSE
     if (strcmp(avx, "No") == 0) {
-      if (strcmp(sse, "No") != 0) {
+      setAttribute(art, ATTRIBUTE_SSE, sse);
-        setAttribute(art, ATTRIBUTE_SSE, sse);
-      }
     }
     else {
       setAttribute(art, ATTRIBUTE_AVX, avx);

src/common/soc.c

@@ -16,14 +16,11 @@ static char* soc_trademark_string[] = {
   [SOC_VENDOR_EXYNOS]     = "Exynos ",
   [SOC_VENDOR_KIRIN]      = "Kirin ",
   [SOC_VENDOR_KUNPENG]    = "Kunpeng ",
-  [SOC_VENDOR_BROADCOM]   = "Broadcom ",
+  [SOC_VENDOR_BROADCOM]   = "Broadcom BCM",
   [SOC_VENDOR_APPLE]      = "Apple ",
   [SOC_VENDOR_ROCKCHIP]   = "Rockchip ",
   [SOC_VENDOR_GOOGLE]     = "Google ",
   [SOC_VENDOR_NVIDIA]     = "NVIDIA ",
-  [SOC_VENDOR_AMPERE]     = "Ampere ",
-  [SOC_VENDOR_NXP]        = "NXP ",
-  [SOC_VENDOR_AMLOGIC]    = "Amlogic ",
   // RISC-V
   [SOC_VENDOR_SIFIVE]     = "SiFive ",
   [SOC_VENDOR_STARFIVE]   = "StarFive ",
@@ -33,7 +30,7 @@ static char* soc_trademark_string[] = {
 };
 
 VENDOR get_soc_vendor(struct system_on_chip* soc) {
-  return soc->vendor;
+  return soc->soc_vendor;
 }
 
 char* get_str_process(struct system_on_chip* soc) {
@@ -44,37 +41,39 @@ char* get_str_process(struct system_on_chip* soc) {
     snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
   }
   else {
-    int max_process_len = 5 + 1;
+    str = emalloc(sizeof(char) * 5);
-    str = ecalloc(max_process_len, sizeof(char));
+    memset(str, 0, sizeof(char) * 5);
-    snprintf(str, max_process_len, "%dnm", soc->process);
+    snprintf(str, 5, "%dnm", soc->process);
   }
   return str;
 }
 
 char* get_soc_name(struct system_on_chip* soc) {
-  if(soc->model == SOC_MODEL_UNKNOWN)
+  if(soc->soc_model == SOC_MODEL_UNKNOWN)
     return soc->raw_name;
-  return soc->name;
+  return soc->soc_name;
 }
 
 void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process) {
-  soc->model = soc_model;
+  soc->soc_model = soc_model;
-  soc->vendor = get_soc_vendor_from_soc(soc_model);
+  soc->soc_vendor = get_soc_vendor_from_soc(soc_model);
   soc->process = process;
-  if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
-    printBug("fill_soc: soc->vendor == SOC_VENDOR_UNKOWN");
+    printBug("fill_soc: soc->soc_vendor == SOC_VENDOR_UNKOWN");
     // If we fall here there is a bug in socs.h
     // Reset everything to avoid segfault
-    soc->vendor = SOC_VENDOR_UNKNOWN;
+    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-    soc->model = SOC_MODEL_UNKNOWN;
+    soc->soc_model = SOC_MODEL_UNKNOWN;
     soc->process = UNKNOWN;
     soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
     snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
   }
   else {
-    int len = strlen(soc_name) + strlen(soc_trademark_string[soc->vendor]) + 1;
+    soc->process = process;
-    soc->name = emalloc(sizeof(char) * len);
+    int len = strlen(soc_name) + strlen(soc_trademark_string[soc->soc_vendor]) + 1;
-    sprintf(soc->name, "%s%s", soc_trademark_string[soc->vendor], soc_name);
+    soc->soc_name = emalloc(sizeof(char) * len);
+    memset(soc->soc_name, 0, sizeof(char) * len);
+    sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);
   }
 }
 

src/common/soc.h

@@ -25,9 +25,6 @@ enum {
   SOC_VENDOR_ROCKCHIP,
   SOC_VENDOR_GOOGLE,
   SOC_VENDOR_NVIDIA,
-  SOC_VENDOR_AMPERE,
-  SOC_VENDOR_NXP,
-  SOC_VENDOR_AMLOGIC,
   // RISC-V
   SOC_VENDOR_SIFIVE,
   SOC_VENDOR_STARFIVE,
@@ -37,10 +34,10 @@ enum {
 };
 
 struct system_on_chip {
-  SOC model;
+  SOC soc_model;
-  VENDOR vendor;
+  VENDOR soc_vendor;
   int32_t process;
-  char* name;
+  char* soc_name;
   char* raw_name;
 };
 

src/common/sysctl.h

@@ -21,12 +21,9 @@
   #define CPUFAMILY_ARM_AVALANCHE_BLIZZARD 0xDA33D83D
 #endif
 // M3 / A16 / A17
-// M3:   https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
+// https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
-// M3_2: https://github.com/Dr-Noob/cpufetch/issues/230
+// https://github.com/Dr-Noob/cpufetch/issues/210
-// PRO:  https://github.com/Dr-Noob/cpufetch/issues/225
-// MAX:  https://github.com/Dr-Noob/cpufetch/issues/210
 #define CPUFAMILY_ARM_EVEREST_SAWTOOTH     0x8765EDEA
-#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_2   0xFA33415E
 #define CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO 0x5F4DEA93
 #define CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX 0x72015832
 
@@ -43,14 +40,6 @@
   #define CPUSUBFAMILY_ARM_HC_HD 5
 #endif
 
-// For alternative way to get CPU frequency on macOS and *BSD
-#ifdef __APPLE__
-  #define CPUFREQUENCY_SYSCTL "hw.cpufrequency_max"
-#else
-  // For FreeBSD, not sure about other *BSD
-  #define CPUFREQUENCY_SYSCTL "dev.cpu.0.freq"
-#endif
-
 uint32_t get_sys_info_by_name(char* name);
 
 #endif

src/common/udev.c

@@ -1,10 +1,7 @@
-#include "../common/global.h"
 #include "udev.h"
 #include "global.h"
 #include "cpu.h"
 
-#define _PATH_DEVTREE          "/proc/device-tree/compatible"
-
 // https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
 int get_ncores_from_cpuinfo(void) {
   // Examples:
@@ -146,7 +143,8 @@ char* get_field_from_cpuinfo(char* CPUINFO_FIELD) {
   char* tmp2 = strstr(tmp1, "\n");
 
   int strlen = (1 + (tmp2-tmp1));
-  char* hardware = ecalloc(strlen, sizeof(char));
+  char* hardware = emalloc(sizeof(char) * strlen);
+  memset(hardware, 0, sizeof(char) * strlen);
   strncpy(hardware, tmp1, tmp2-tmp1);
 
   return hardware;
@@ -351,13 +349,3 @@ bool is_devtree_compatible(char* str) {
   }
   return true;
 }
-
-char* get_devtree_compatible(int *filelen) {
-  char* buf;
-
-  if ((buf = read_file(_PATH_DEVTREE, filelen)) == NULL) {
-    printWarn("read_file: %s: %s", _PATH_DEVTREE, strerror(errno));
-  }
-
-  return buf;
-}

src/common/udev.h

@@ -43,6 +43,5 @@ int get_num_sockets_package_cpus(struct topology* topo);
 int get_ncores_from_cpuinfo(void);
 char* get_field_from_cpuinfo(char* CPUINFO_FIELD);
 bool is_devtree_compatible(char* str);
-char* get_devtree_compatible(int *filelen);
 
 #endif

src/ppc/ppc.c

@@ -81,13 +81,9 @@ struct topology* get_topology_info(struct cache* cach) {
   if(!fill_package_ids_from_sys(package_ids, topo->total_cores)) {
     printWarn("fill_package_ids_from_sys failed, output may be incomplete/invalid");
     for(int i=0; i < topo->total_cores; i++) package_ids[i] = 0;
-    // fill_package_ids_from_sys failed, use udev to try
+    // fill_package_ids_from_sys failed, use a
-    // to find the number of sockets
+    // more sophisticated wat to find the number of sockets
     topo->sockets = get_num_sockets_package_cpus(topo);
-    if (topo->sockets == UNKNOWN_DATA) {
-      printWarn("get_num_sockets_package_cpus failed: assuming 1 socket");
-      topo->sockets = 1;
-    }
   }
   else {
     // fill_package_ids_from_sys succeeded, use the

src/ppc/uarch.c

@@ -25,7 +25,6 @@ enum {
   UARCH_PPC603,
   UARCH_PPC440,
   UARCH_PPC470,
-  UARCH_ESPRESSO, // Not exactly an uarch, but the codename of Wii U
   UARCH_PPC970,
   UARCH_PPC970FX,
   UARCH_PPC970MP,
@@ -76,7 +75,6 @@ void fill_uarch(struct uarch* arch, MICROARCH u) {
   FILL_UARCH(arch->uarch, UARCH_PPC603,      "PowerPC 603",   UNK) // varies
   FILL_UARCH(arch->uarch, UARCH_PPC440,      "PowerPC 440",   UNK)
   FILL_UARCH(arch->uarch, UARCH_PPC470,      "PowerPC 470",    45) // strange...
-  FILL_UARCH(arch->uarch, UARCH_ESPRESSO,    "Espresso",       45) // https://en.wikipedia.org/wiki/PowerPC_7xx#Espresso, https://en.wikipedia.org/wiki/Espresso_(processor), https://github.com/Dr-Noob/cpufetch/issues/231
   FILL_UARCH(arch->uarch, UARCH_PPC970,      "PowerPC 970",   130)
   FILL_UARCH(arch->uarch, UARCH_PPC970FX,    "PowerPC 970FX",  90)
   FILL_UARCH(arch->uarch, UARCH_PPC970MP,    "PowerPC 970MP",  90)
@@ -236,7 +234,6 @@ struct uarch* get_uarch_from_pvr(uint32_t pvr) {
   CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff50000, UARCH_PPC470)
   CHECK_UARCH(arch, pvr, 0xffff0000, 0x00050000, UARCH_PPC470)
   CHECK_UARCH(arch, pvr, 0xffff0000, 0x11a50000, UARCH_PPC470)
-  CHECK_UARCH(arch, pvr, 0xffffffff, 0x70010201, UARCH_ESPRESSO)
   UARCH_END
 
   return arch;

src/ppc/udev.c

@@ -13,7 +13,7 @@ bool fill_array_from_sys(int *core_ids, int total_cores, char* SYS_PATH) {
   char* buf;
   char* end;
   char path[128];
-  memset(name, 0, sizeof(char) * 128);
+  memset(path, 0, 128);
 
   for(int i=0; i < total_cores; i++) {
     sprintf(path, "%s%s/cpu%d/%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, SYS_PATH);

src/riscv/riscv.c

@@ -100,8 +100,9 @@ struct extensions* get_extensions_from_str(char* str) {
     return ext;
   }
 
-  int len = strlen(str);
+  int len = sizeof(char) * (strlen(str)+1);
-  ext->str = ecalloc(len+1, sizeof(char));
+  ext->str = emalloc(sizeof(char) * len);
+  memset(ext->str, 0, len);
   strncpy(ext->str, str, sizeof(char) * len);
 
   // Code inspired in Linux kernel (riscv_fill_hwcap):

src/riscv/soc.c

@@ -12,7 +12,7 @@ bool match_sifive(char* soc_name, struct system_on_chip* soc) {
   /*if((tmp = strstr(soc_name, "???")) == NULL)
     return false;*/
 
-  //soc->vendor = ???
+  //soc->soc_vendor = ???
 
   SOC_START
   SOC_EQ(tmp, "fu740", "Freedom U740",  SOC_SIFIVE_U740, soc, 40)
@@ -68,12 +68,12 @@ struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
 struct system_on_chip* get_soc(struct cpuInfo* cpu) {
   struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
   soc->raw_name = NULL;
-  soc->vendor = SOC_VENDOR_UNKNOWN;
+  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-  soc->model = SOC_MODEL_UNKNOWN;
+  soc->soc_model = SOC_MODEL_UNKNOWN;
   soc->process = UNKNOWN;
 
   soc = guess_soc_from_devtree(soc);
-  if(soc->vendor == SOC_VENDOR_UNKNOWN) {
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
     if(soc->raw_name != NULL) {
       printWarn("SoC detection failed using device tree: Found '%s' string", soc->raw_name);
     }
@@ -82,7 +82,7 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
     }
   }
 
-  if(soc->model == SOC_MODEL_UNKNOWN) {
+  if(soc->soc_model == SOC_MODEL_UNKNOWN) {
     // raw_name might not be NULL, but if we were unable to find
     // the exact SoC, just print "Unkwnown"
     soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));

src/riscv/udev.c

@@ -40,7 +40,8 @@ char* get_field_from_devtree(int DEVTREE_FIELD) {
 
   tmp1++;
   int strlen = filelen-(tmp1-buf);
-  char* hardware = ecalloc(strlen, sizeof(char));
+  char* hardware = emalloc(sizeof(char) * strlen);
+  memset(hardware, 0, sizeof(char) * strlen);
   strncpy(hardware, tmp1, strlen-1);
 
   return hardware;
@@ -69,8 +70,9 @@ char* parse_cpuinfo_field(char* field_str) {
   }
 
   int ret_strlen = (end-tmp);
-  char* ret = ecalloc(ret_strlen+1, sizeof(char));
+  char* ret = emalloc(sizeof(char) * (ret_strlen+1));
-  strncpy(ret, tmp, sizeof(char) * ret_strlen);
+  memset(ret, 0, sizeof(char) * (ret_strlen+1));
+  strncpy(ret, tmp, ret_strlen);
 
   return ret;
 }

src/x86/apic.c

@@ -234,11 +234,15 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
 
 bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
   uint32_t size = max_apic_id_size(cache_id_apic, topo);
-  uint32_t* sockets = ecalloc(size, sizeof(uint32_t));
+  uint32_t* sockets = emalloc(sizeof(uint32_t) * size);
-  uint32_t* smt = ecalloc(size, sizeof(uint32_t));
+  uint32_t* smt = emalloc(sizeof(uint32_t) * size);
-  uint32_t* apic_id = ecalloc(size, sizeof(uint32_t));
+  uint32_t* apic_id = emalloc(sizeof(uint32_t) * size);
   uint32_t num_caches = 0;
 
+  memset(sockets, 0, sizeof(uint32_t) * size);
+  memset(smt, 0, sizeof(uint32_t) * size);  
+  memset(apic_id, 0, sizeof(uint32_t) * size);
+
   // System topology
   for(int i=0; i < topo->total_cores_module; i++) {
     sockets[apic_pkg[i]] = 1;

src/x86/cpuid.c

@@ -5,9 +5,6 @@
   #include "../common/udev.h"
   #include <unistd.h>
 #endif
-#if defined (__FreeBSD__) || defined (__APPLE__)
-  #include "../common/sysctl.h"
-#endif
 
 #ifdef __linux__
   #include "../common/freq.h"
@@ -91,7 +88,8 @@ char* get_str_cpu_name_internal(void) {
   uint32_t edx = 0;
   uint32_t c = 0;
 
-  char * name = ecalloc(CPU_NAME_MAX_LENGTH, sizeof(char));
+  char * name = emalloc(sizeof(char) * CPU_NAME_MAX_LENGTH);
+  memset(name, 0, CPU_NAME_MAX_LENGTH);
 
   for(int i=0; i < 3; i++) {
     eax = 0x80000002 + i;
@@ -210,14 +208,18 @@ int64_t get_peak_performance(struct cpuInfo* cpu, bool accurate_pp) {
 
   for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
     struct topology* topo = ptr->topo;
-    int64_t freq = get_freq(ptr->freq);
+    int64_t max_freq = get_freq(ptr->freq);
 
+    int64_t freq;
   #ifdef __linux__
     if(accurate_pp)
-      freq = get_freq_pp(ptr->freq);
+      freq = measure_frequency(ptr);
+    else
+      freq = max_freq;
   #else
     // Silence compiler warning
     (void)(accurate_pp);
+    freq = max_freq;
   #endif
 
     //First, check we have consistent data
@@ -276,7 +278,7 @@ struct hypervisor* get_hp_info(bool hv_present) {
   }
   else {
     char name[13];
-    memset(name, 0, sizeof(char) * 13);
+    memset(name, 0, 13);
     get_name_cpuid(name, ebx, ecx, edx);
 
     bool found = false;
@@ -446,23 +448,6 @@ int32_t get_core_type(void) {
   }
 }
 
-#ifdef __linux__
-// Gets the max frequency for estimating the peak performance
-// and fills in the passed cpuInfo parameter.
-void fill_frequency_info_pp(struct cpuInfo* cpu) {
-  int32_t unused;
-  int32_t *max_freq_pp_vec = malloc(sizeof(int32_t) * cpu->num_cpus);
-  struct cpuInfo* ptr = cpu;
-
-  for (uint32_t i=0; i < cpu->num_cpus; i++) {
-    set_cpu_module(i, cpu->num_cpus, &unused);
-
-    ptr->freq->max_pp = measure_frequency(ptr, max_freq_pp_vec);
-    ptr = ptr->next_cpu;
-  }
-}
-#endif
-
 struct cpuInfo* get_cpu_info(void) {
   struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
   cpu->peak_performance = -1;
@@ -483,7 +468,7 @@ struct cpuInfo* get_cpu_info(void) {
 
   //Fill vendor
   char name[13];
-  memset(name, 0, sizeof(char) * 13);
+  memset(name,0,13);
   get_name_cpuid(name, ebx, edx, ecx);
 
   if(strcmp(CPU_VENDOR_INTEL_STRING,name) == 0)
@@ -559,7 +544,6 @@ struct cpuInfo* get_cpu_info(void) {
       ptr->core_type = get_core_type();
     }
     ptr->first_core_id = first_core;
-    ptr->module_id = i;
     ptr->feat = get_features_info(ptr);
 
     ptr->arch = get_cpu_uarch(ptr);
@@ -584,13 +568,6 @@ struct cpuInfo* get_cpu_info(void) {
     if(ptr->topo == NULL) return cpu;
   }
 
-#ifdef __linux__
-  // If accurate_pp is requested, we need to get the max frequency
-  // after fetching the topology for all CPU modules, since the topology
-  // is required by fill_frequency_info_pp
-  if (accurate_pp()) fill_frequency_info_pp(cpu);
-#endif
-
   cpu->peak_performance = get_peak_performance(cpu, accurate_pp());
 
   return cpu;
@@ -732,9 +709,9 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
     topo->total_cores_module = topo->total_cores;
   }
 
-  bool toporet = false;
   switch(cpu->cpu_vendor) {
     case CPU_VENDOR_INTEL:
+      bool toporet = false;
       if (cpu->maxLevels >= 0x00000004) {
         toporet = get_topology_from_apic(cpu, topo);
       }
@@ -773,15 +750,10 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
         }
       }
       else {
-        #ifdef __linux__
+        printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000008, cpu->maxExtendedLevels);
-          printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X), using udev...", 0x80000008, cpu->maxExtendedLevels);
+        topo->physical_cores = 1;
-          get_topology_from_udev(topo);
+        topo->logical_cores = 1;
-        #else
+        topo->smt_supported = 1;
-          printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000008, cpu->maxExtendedLevels);
-          topo->physical_cores = 1;
-          topo->logical_cores = 1;
-          topo->smt_supported = 1;
-        #endif
       }
 
       if (cpu->maxLevels >= 0x00000001) {
@@ -961,20 +933,10 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
   freq->measured = false;
 
   if(cpu->maxLevels < 0x00000016) {
-    #if defined (_WIN32)
+    #if defined (_WIN32) || defined (__APPLE__)
       printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
       freq->base = UNKNOWN_DATA;
       freq->max = UNKNOWN_DATA;
-    #elif defined (__FreeBSD__) || defined (__APPLE__)
-      printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X). Using sysctl", 0x00000016, cpu->maxLevels);
-      uint32_t freq_hz = get_sys_info_by_name(CPUFREQUENCY_SYSCTL);
-      if (freq_hz == 0) {
-        printWarn("Read max CPU frequency from sysctl and got 0 MHz");
-        freq->max = UNKNOWN_DATA;
-      }
-
-      freq->base = UNKNOWN_DATA;
-      freq->max = freq_hz;
     #else
       printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X). Using udev", 0x00000016, cpu->maxLevels);
       freq->base = UNKNOWN_DATA;
@@ -1026,7 +988,6 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
     }
   #endif
 
-  freq->max_pp = UNKNOWN_DATA;
   return freq;
 }
 
@@ -1135,14 +1096,8 @@ char* get_str_sse(struct cpuInfo* cpu) {
       last+=SSE4_2_sl;
   }
 
-  if (last == 0) {
+  //Purge last comma
-    snprintf(string, 2+1, "No");
+  string[last-1] = '\0';
-  }
-  else {
-    //Purge last comma
-    string[last-1] = '\0';
-  }
-
   return string;
 }
 

src/x86/freq/freq.c

@@ -21,12 +21,9 @@
 #define FREQ_VECTOR_SIZE         1<<16
 
 struct freq_thread {
-  // Inputs
-  struct cpuInfo* cpu;
   bool end;
   bool measure;
-  // Output
+  double freq;
-  int32_t *max_pp;
 };
 
 double vector_average_harmonic(double* v, int len) {
@@ -51,7 +48,6 @@ void* measure_freq(void *freq_ptr) {
   char* line = NULL;
   size_t len = 0;
   ssize_t read;
-  struct cpuInfo* cpu = freq->cpu;
 
   int v = 0;
   double* freq_vector = malloc(sizeof(double) * FREQ_VECTOR_SIZE);
@@ -80,43 +76,18 @@ void* measure_freq(void *freq_ptr) {
     sleep_ms(500);
   }
 
-  if (cpu->hybrid_flag) {
+  freq->freq = vector_average_harmonic(freq_vector, v);
-    // We have an heterogeneous architecture. After measuring the
+  printWarn("AVX2 measured freq=%f\n", freq->freq);
-    // frequency for all cores, we now need to compute the average
-    // independently for each CPU module.
-    struct cpuInfo* ptr = cpu;
-    double* freq_vector_ptr = freq_vector;
-
-    for (int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
-      freq->max_pp[i] = vector_average_harmonic(freq_vector_ptr, ptr->topo->total_cores_module);
-      printWarn("AVX2 measured freq=%d (module %d)", freq->max_pp[i], i);
-
-      freq_vector_ptr = freq_vector_ptr + ptr->topo->total_cores_module;
-    }
-  }
-  else {
-    freq->max_pp[0] = vector_average_harmonic(freq_vector, v);
-    printWarn("AVX2 measured freq=%d\n", freq->max_pp[0]);
-  }
 
   return NULL;
 }
 
-int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec) {
+int64_t measure_frequency(struct cpuInfo* cpu) {
-  if (cpu->hybrid_flag && cpu->module_id > 0) {
-    // We have a hybrid architecture and we have already
-    // measured the frequency for this module in a previous
-    // call to this function, so now just return it.
-    return max_freq_pp_vec[cpu->module_id];
-  }
-
   int ret;
   int num_spaces;
   struct freq_thread* freq_struct = malloc(sizeof(struct freq_thread));
   freq_struct->end = false;
   freq_struct->measure = false;
-  freq_struct->cpu = cpu;
-  freq_struct->max_pp = max_freq_pp_vec;
 
   void* (*compute_function)(void*);
 
@@ -145,25 +116,8 @@ int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec) {
   }
 
   pthread_t* compute_th = malloc(sizeof(pthread_t) * cpu->topo->total_cores);
-  cpu_set_t cpus;
-  pthread_attr_t attr;
-  if ((ret = pthread_attr_init(&attr)) != 0) {
-    printErr("pthread_attr_init: %s", strerror(ret));
-    return -1;
-  }
-
   for(int i=0; i < cpu->topo->total_cores; i++) {
-    // We might have called bind_to_cpu previously, binding the threads
+    ret = pthread_create(&compute_th[i], NULL, compute_function, NULL);
-    // to a specific core, so now we must make sure we run the new thread
-    // on the correct core.
-    CPU_ZERO(&cpus);
-    CPU_SET(i, &cpus);
-    if ((ret = pthread_attr_setaffinity_np(&attr, sizeof(cpu_set_t), &cpus)) != 0) {
-      printErr("pthread_attr_setaffinity_np: %s", strerror(ret));
-      return -1;
-    }
-
-    ret = pthread_create(&compute_th[i], &attr, compute_function, NULL);
 
     if(ret != 0) {
       fprintf(stderr, "Error creating thread\n");
@@ -188,5 +142,5 @@ int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec) {
   }
 
   printf("\r%*c", num_spaces, ' ');
-  return max_freq_pp_vec[0];
+  return freq_struct->freq;
 }

src/x86/freq/freq.h

@@ -8,6 +8,6 @@
 #define MEASURE_TIME_SECONDS         5
 #define LOOP_ITERS           100000000
 
-int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec);
+int64_t measure_frequency(struct cpuInfo* cpu);
 
 #endif

src/x86/uarch.c

@@ -47,10 +47,8 @@ typedef uint32_t MICROARCH;
 enum {
   UARCH_UNKNOWN,
   // INTEL //
-  UARCH_I486,
   UARCH_P5,
   UARCH_P5_MMX,
-  UARCH_P6_PRO,
   UARCH_P6_PENTIUM_II,
   UARCH_P6_PENTIUM_III,
   UARCH_DOTHAN,
@@ -99,8 +97,6 @@ enum {
   // AMD //
   UARCH_AM486,
   UARCH_AM5X86,
-  UARCH_SSA5,
-  UARCH_K5,
   UARCH_K6,
   UARCH_K7,
   UARCH_K8,
@@ -153,30 +149,16 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   // ------------------------------------------------------------------------------- //
   //                EF  F  EM   M   S                                                //
   UARCH_START
-  CHECK_UARCH(arch, 0,  4,  0,  0, NA, "i80486DX",          UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  1, NA, "i80486DX-50",       UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  2, NA, "i80486SX",          UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  3, NA, "i80486DX2",         UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  4, NA, "i80486SL",          UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  5, NA, "i80486SX2",         UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  7, NA, "i80486DX2WB",       UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  8, NA, "i80486DX4",         UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch, 0,  4,  0,  9, NA, "i80486DX4WB",       UARCH_I486,            UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
   CHECK_UARCH(arch, 0,  5,  0,  0, NA, "P5",                UARCH_P5,              800)
   CHECK_UARCH(arch, 0,  5,  0,  1, NA, "P5",                UARCH_P5,              800)
-  CHECK_UARCH(arch, 0,  5,  0,  2, NA, "P54C",              UARCH_P5,              UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch, 0,  5,  0,  2, NA, "P5",                UARCH_P5,              UNK)
-  CHECK_UARCH(arch, 0,  5,  0,  3, NA, "P24T (Overdrive)",  UARCH_P5,              600) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch, 0,  5,  0,  3, NA, "P5",                UARCH_P5,              600)
-  CHECK_UARCH(arch, 0,  5,  0,  4, NA, "P55C (MMX)",        UARCH_P5_MMX,          350) // https://www.cpu-world.com/CPUs/Pentium/TYPE-Pentium%20MMX.html
+  CHECK_UARCH(arch, 0,  5,  0,  4, NA, "P5 (MMX)",          UARCH_P5_MMX,          UNK)
-  CHECK_UARCH(arch, 0,  5,  0,  7, NA, "P54C",              UARCH_P5,              350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch, 0,  5,  0,  7, NA, "P5 (MMX)",          UARCH_P5_MMX,          UNK)
-  CHECK_UARCH(arch, 0,  5,  0,  8, NA, "Tillamook",         UARCH_P5_MMX,          250) // http://instlatx64.atw.hu./
+  CHECK_UARCH(arch, 0,  5,  0,  8, NA, "P5 (MMX)",          UARCH_P5_MMX,          250)
   CHECK_UARCH(arch, 0,  5,  0,  9,  0, "Lakemont",          UARCH_LAKEMONT,         32)
   CHECK_UARCH(arch, 0,  5,  0,  9, NA, "P5 (MMX)",          UARCH_P5_MMX,          UNK)
   CHECK_UARCH(arch, 0,  5,  0, 10,  0, "Lakemont",          UARCH_LAKEMONT,         32)
-  CHECK_UARCH(arch, 0,  6,  0,  1,  1, "P6",                UARCH_P6_PRO,          UNK)
-  CHECK_UARCH(arch, 0,  6,  0,  1,  2, "P6",                UARCH_P6_PRO,          UNK)
-  CHECK_UARCH(arch, 0,  6,  0,  1,  6, "P6",                UARCH_P6_PRO,          350)
-  CHECK_UARCH(arch, 0,  6,  0,  1,  7, "P6",                UARCH_P6_PRO,          350)
-  CHECK_UARCH(arch, 0,  6,  0,  1,  9, "P6",                UARCH_P6_PRO,          350)
   CHECK_UARCH(arch, 0,  6,  0,  0, NA, "P6 (Pentium II)",   UARCH_P6_PENTIUM_II,   UNK)
   CHECK_UARCH(arch, 0,  6,  0,  1, NA, "P6 (Pentium II)",   UARCH_P6_PENTIUM_II,   UNK) // process depends on core
   CHECK_UARCH(arch, 0,  6,  0,  2, NA, "P6 (Pentium II)",   UARCH_P6_PENTIUM_II,   UNK)
@@ -297,16 +279,11 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   // ----------------------------------------------------------------------------- //
   //                 EF  F  EM   M   S                                             //
   UARCH_START
-  CHECK_UARCH(arch,  0,  4,  0,  3, NA, "Am486DX2",    UARCH_AM486,      UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch,  0,  4,  0,  3, NA, "Am486",       UARCH_AM486,      UNK)
-  CHECK_UARCH(arch,  0,  4,  0,  7, NA, "Am486DX2WB",  UARCH_AM486,      UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch,  0,  4,  0,  7, NA, "Am486",       UARCH_AM486,      UNK)
-  CHECK_UARCH(arch,  0,  4,  0,  8, NA, "Am486DX4",    UARCH_AM486,      UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch,  0,  4,  0,  8, NA, "Am486",       UARCH_AM486,      UNK)
-  CHECK_UARCH(arch,  0,  4,  0,  9, NA, "Am486DX4WB",  UARCH_AM486,      UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch,  0,  4,  0,  9, NA, "Am486",       UARCH_AM486,      UNK)
-  CHECK_UARCH(arch,  0,  4,  0, 14, NA, "Am5x86",      UARCH_AM5X86,     350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
+  CHECK_UARCH(arch,  0,  4, NA, NA, NA, "Am5x86",      UARCH_AM5X86,     UNK)
-  CHECK_UARCH(arch,  0,  4,  0, 15, NA, "Am5x86WB",    UARCH_AM5X86,     350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch,  0,  5,  0,  0, NA, "SSA5 (K5)",   UARCH_SSA5,       350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch,  0,  5,  0,  1, NA, "K5",          UARCH_K5,         350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch,  0,  5,  0,  2, NA, "K5",          UARCH_K5,         350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
-  CHECK_UARCH(arch,  0,  5,  0,  3, NA, "K5",          UARCH_K5,         350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
   CHECK_UARCH(arch,  0,  5,  0,  6, NA, "K6",          UARCH_K6,         300)
   CHECK_UARCH(arch,  0,  5,  0,  7, NA, "K6",          UARCH_K6,         250) // *p from sandpile.org
   CHECK_UARCH(arch,  0,  5,  0, 10, NA, "K7",          UARCH_K7,         130) // Geode NX
@@ -502,42 +479,16 @@ char* infer_cpu_name_from_uarch(struct uarch* arch) {
 
   char *str = NULL;
 
-  switch (arch->uarch) {
+  if (arch->uarch == UARCH_P5)
-    // Intel
+    str = "Intel Pentium";
-    case UARCH_I486:
+  else if (arch->uarch == UARCH_P5_MMX)
-      str = "Intel 486";
+    str = "Intel Pentium MMX";
-      break;
+  else if (arch->uarch == UARCH_P6_PENTIUM_II)
-    case UARCH_P5:
+    str = "Intel Pentium II";
-      str = "Intel Pentium";
+  else if (arch->uarch == UARCH_P6_PENTIUM_III)
-      break;
+    str = "Intel Pentium III";
-    case UARCH_P5_MMX:
+  else
-      str = "Intel Pentium MMX";
+    printErr("Unable to find name from uarch: %d", arch->uarch);
-      break;
-    case UARCH_P6_PRO:
-      str = "Intel Pentium Pro";
-      break;
-    case UARCH_P6_PENTIUM_II:
-      str = "Intel Pentium II";
-      break;
-    case UARCH_P6_PENTIUM_III:
-      str = "Intel Pentium III";
-      break;
-
-    // AMD
-    case UARCH_AM486:
-      str = "AMD 486";
-      break;
-    case UARCH_AM5X86:
-      str = "AMD 5x86";
-      break;
-    case UARCH_SSA5:
-      str = "AMD 5k86";
-      break;
-
-    default:
-      printErr("Unable to find name from uarch: %d", arch->uarch);
-      break;
-  }
 
   if (str == NULL) {
     cpu_name = ecalloc(strlen(STRING_UNKNOWN) + 1, sizeof(char));