[v1.05][ARM] Add new Snapdragon SoCs (to match_qualcomm) (#253)

src/arm/soc.c

@@ -578,6 +578,14 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "SM8250-AB",      "865+",      SOC_SNAPD_SM8250_AB,      soc,  7)
   SOC_EQ(tmp, "SM8350",         "888",       SOC_SNAPD_SM8350,         soc,  5)
   SOC_EQ(tmp, "SM8350-AC",      "888+",      SOC_SNAPD_SM8350,         soc,  5)
+  // Snapdragon Gen //
+  SOC_EQ(tmp, "SM4450",         "4 Gen 2",   SOC_SNAPD_SM4450,         soc,  4)
+  SOC_EQ(tmp, "SM6450",         "6 Gen 1",   SOC_SNAPD_SM6450,         soc,  4)
+  SOC_EQ(tmp, "SM7435-AB",      "7s Gen 2",  SOC_SNAPD_SM7435_AB,      soc,  4)
+  SOC_EQ(tmp, "SM7450",         "7 Gen 1",   SOC_SNAPD_SM7450,         soc,  4)
+  SOC_EQ(tmp, "SM7475",         "7+ Gen 2",  SOC_SNAPD_SM7475,         soc,  4)
+  SOC_EQ(tmp, "SM8450",         "8 Gen 1",   SOC_SNAPD_SM8450,         soc,  4)
+  SOC_EQ(tmp, "SM8475",         "8+ Gen 1",  SOC_SNAPD_SM8475,         soc,  4)
   SOC_END
 }
 
@@ -624,12 +632,37 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
     return true;
   }
 
-  // Snapdragon 8 Gen 1 reported as "taro"
+  // New Snapdragon SoCs codenames
+  // https://github.com/sm8450-mainline/fdt?tab=readme-ov-file#chipsets
+  // https://github.com/Dr-Noob/cpufetch/issues/253
+  if (strcmp(soc_name, "cape") == 0) {
+    fill_soc(soc, "8+ Gen 1", SOC_SNAPD_SM8475, 4);
+    return true;
+  }
+
   if(strcmp(soc_name, "taro") == 0) {
     fill_soc(soc, "8 Gen 1", SOC_SNAPD_SM8450, 4);
     return true;
   }
 
+  if(strcmp(soc_name, "ukee") == 0) {
+    fill_soc(soc, "7+ Gen 2", SOC_SNAPD_SM7475, 4);
+    return true;
+  }
+
+  if(strcmp(soc_name, "diwali") == 0) {
+    fill_soc(soc, "7 Gen 1", SOC_SNAPD_SM7450, 4);
+    return true;
+  }
+
+  // parrot can be either SM7435 or SM6450, we need more data
+  // to distingish between those two
+
+  if(strcmp(soc_name, "ravelin") == 0) {
+    fill_soc(soc, "4 Gen 2", SOC_SNAPD_SM4450, 4);
+    return true;
+  }
+
   // Google Pixel 6
   // https://github.com/Dr-Noob/cpufetch/issues/134
   if(strcmp(soc_name, "oriole") == 0) {
@@ -702,6 +735,16 @@ struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
     else return soc;
   }
 
+  // https://github.com/Dr-Noob/cpufetch/issues/253
+  // ro.soc.model might be more reliable than ro.product.board or
+  // ro.board.platform, so try with it first
+  property_len = android_property_get("ro.soc.model", (char *) &tmp);
+  if(property_len > 0) {
+    try_parse_soc_from_string(soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.soc.model: %s", tmp);
+    else return soc;
+  }
+
   property_len = android_property_get("ro.product.board", (char *) &tmp);
   if(property_len > 0) {
     try_parse_soc_from_string(soc, property_len, tmp);

src/arm/socs.h

@@ -270,11 +270,13 @@ enum {
   SOC_SNAPD_SDM660,
   SOC_SNAPD_SM6115,
   SOC_SNAPD_SM6125,
+  SOC_SNAPD_SM6450,
   SOC_SNAPD_SDM670,
   SOC_SNAPD_SM6150,
   SOC_SNAPD_SM6350,
   SOC_SNAPD_SDM710,
   SOC_SNAPD_SDM712,
+  SOC_SNAPD_SM4450,
   SOC_SNAPD_SM7125,
   SOC_SNAPD_SM7150_AA,
   SOC_SNAPD_SM7150_AB,
@@ -283,6 +285,9 @@ enum {
   SOC_SNAPD_SM7250_AA,
   SOC_SNAPD_SM7250_AB,
   SOC_SNAPD_SM7250_AC,
+  SOC_SNAPD_SM7435_AB,
+  SOC_SNAPD_SM7450,
+  SOC_SNAPD_SM7475,
   SOC_SNAPD_MSM8974AA,
   SOC_SNAPD_MSM8974AB,
   SOC_SNAPD_MSM8974AC,
@@ -303,6 +308,7 @@ enum {
   SOC_SNAPD_SM8250_AB,
   SOC_SNAPD_SM8350,
   SOC_SNAPD_SM8450,
+  SOC_SNAPD_SM8475,
   // APPLE
   SOC_APPLE_M1,
   SOC_APPLE_M1_PRO,
@@ -375,7 +381,7 @@ inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
   else if(soc >= SOC_KUNPENG_920 && soc <= SOC_KUNPENG_930) return SOC_VENDOR_KUNPENG;
   else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
   else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
-  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8450) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8475) return SOC_VENDOR_SNAPDRAGON;
   else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M3_MAX) return SOC_VENDOR_APPLE;
   else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
   else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588) return SOC_VENDOR_ROCKCHIP;

src/x86/cpuid.c

@@ -656,15 +656,10 @@ bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
 void get_topology_from_udev(struct topology* topo) {
   topo->total_cores = get_ncores_from_cpuinfo();
   // TODO: To be improved in the future
-  if (topo->total_cores == 1) {
+  // Conservative setting as we only know the total
-    // We can assume it's a single core CPU
+  // number of cores.
-    topo->logical_cores = topo->total_cores;
+  topo->logical_cores = UNKNOWN_DATA;
-    topo->physical_cores = topo->total_cores;
+  topo->physical_cores = UNKNOWN_DATA;
-  }
-  else {
-    topo->logical_cores = UNKNOWN_DATA;
-    topo->physical_cores = UNKNOWN_DATA;
-  }
   topo->smt_available = 1;
   topo->smt_supported = 1;
   topo->sockets = 1;
@@ -711,25 +706,27 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
 
   switch(cpu->cpu_vendor) {
     case CPU_VENDOR_INTEL:
-      bool toporet = false;
       if (cpu->maxLevels >= 0x00000004) {
-        toporet = get_topology_from_apic(cpu, topo);
+        bool toporet = get_topology_from_apic(cpu, topo);
+        if(!toporet) {
+          #ifdef __linux__
+            printWarn("Failed to retrieve topology from APIC, using udev...\n");
+            get_topology_from_udev(topo);
+          #else
+            printErr("Failed to retrieve topology from APIC, assumming default values...\n");
+            topo->logical_cores = UNKNOWN_DATA;
+            topo->physical_cores = UNKNOWN_DATA;
+            topo->smt_available = 1;
+            topo->smt_supported = 1;
+          #endif
+        }
       }
       else {
-        printWarn("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000004, cpu->maxLevels);
+        printWarn("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000001, cpu->maxLevels);
-      }
+        topo->physical_cores = UNKNOWN_DATA;
-      if(!toporet) {
+        topo->logical_cores = UNKNOWN_DATA;
-        #ifdef __linux__
+        topo->smt_available = 1;
-          printWarn("Failed to retrieve topology from APIC, using udev...");
+        topo->smt_supported = 1;
-          get_topology_from_udev(topo);
-        #else
-          if (cpu->maxLevels >= 0x00000004)
-            printErr("Failed to retrieve topology from APIC, assumming default values...");
-          topo->logical_cores = UNKNOWN_DATA;
-          topo->physical_cores = UNKNOWN_DATA;
-          topo->smt_available = 1;
-          topo->smt_supported = 1;
-        #endif
       }
       break;
     case CPU_VENDOR_AMD:
@@ -1009,34 +1006,25 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
     string = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN) + 1));
     strcpy(string, STRING_UNKNOWN);
   }
-  else {
+  else if(topo->smt_supported > 1) {
-    char cores_str[6];
+    // 4 for digits, 21 for ' cores (SMT disabled)' which is the longest possible output
-    memset(cores_str, 0, sizeof(char) * 6);
+    uint32_t max_size = 4+21+1;
-    if (topo->physical_cores * topo_sockets > 1)
+    string = emalloc(sizeof(char) * max_size);
-      strcpy(cores_str, "cores");
-    else
-      strcpy(cores_str, "core");
 
-    if(topo->smt_supported > 1) {
+    if(topo->smt_available > 1)
-      // 4 for digits, 21 for ' cores (SMT disabled)' which is the longest possible output
+      snprintf(string, max_size, "%d cores (%d threads)", topo->physical_cores * topo_sockets, topo->logical_cores * topo_sockets);
-      uint32_t max_size = 4+21+1;
-      string = emalloc(sizeof(char) * max_size);
-
-      if(topo->smt_available > 1)
-        snprintf(string, max_size, "%d %s (%d threads)", topo->physical_cores * topo_sockets, cores_str, topo->logical_cores * topo_sockets);
-      else {
-        if(cpu->cpu_vendor == CPU_VENDOR_AMD)
-          snprintf(string, max_size, "%d %s (SMT disabled)", topo->physical_cores * topo_sockets, cores_str);
-        else
-          snprintf(string, max_size, "%d %s (HT disabled)", topo->physical_cores * topo_sockets, cores_str);
-      }
-    }
     else {
-      uint32_t max_size = 4+7+1;
+      if(cpu->cpu_vendor == CPU_VENDOR_AMD)
-      string = emalloc(sizeof(char) * max_size);
+        snprintf(string, max_size, "%d cores (SMT disabled)", topo->physical_cores * topo_sockets);
-      snprintf(string, max_size, "%d %s",topo->physical_cores * topo_sockets, cores_str);
+      else
+        snprintf(string, max_size, "%d cores (HT disabled)", topo->physical_cores * topo_sockets);
     }
   }
+  else {
+    uint32_t max_size = 4+7+1;
+    string = emalloc(sizeof(char) * max_size);
+    snprintf(string, max_size, "%d cores",topo->physical_cores * topo_sockets);
+  }
 
   return string;
 }