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4 Commits
i253 ... ascii

Author SHA1 Message Date
Dr-Noob
ae53d97a47 Add AMD txt 2021-03-31 09:25:52 +02:00
Dr-Noob
eeeaec3ba9 Small changes to art. Back to previous algorithm 2021-03-30 22:43:28 +02:00
Dr-Noob
7c5a0c3280 Testing white background for Intel art 2021-03-30 22:22:22 +02:00
Dr-Noob
d4ad5a58f0 Add new Intel ASCII art made with unicode characters 2021-03-30 21:41:59 +02:00
85 changed files with 2411 additions and 8492 deletions

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@@ -1,36 +0,0 @@
name: 'Disable PR in cpufetch'
on:
issues:
types: opened
pull_request_target:
types: opened
permissions:
issues: write
pull-requests: write
jobs:
action:
runs-on: ubuntu-latest
steps:
- uses: dessant/repo-lockdown@v2
with:
github-token: ${{ github.token }}
exclude-issue-created-before: ''
exclude-issue-labels: ''
issue-labels: ''
issue-comment: ''
skip-closed-issue-comment: false
close-issue: false
lock-issue: true
issue-lock-reason: ''
exclude-pr-created-before: ''
exclude-pr-labels: ''
pr-labels: ''
pr-comment: 'cpufetch does not accept pull requests, see [the contributing guidelines](https://github.com/Dr-Noob/cpufetch/blob/master/CONTRIBUTING.md) for details'
skip-closed-pr-comment: false
close-pr: true
lock-pr: false
pr-lock-reason: ''
process-only: 'prs'

1
.gitignore vendored
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@@ -1,2 +1 @@
cpufetch cpufetch
*.o

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@@ -1,52 +0,0 @@
# cpufetch contributing guidelines
<!-- START doctoc generated TOC please keep comment here to allow auto update -->
<!-- DON'T EDIT THIS SECTION, INSTEAD RE-RUN doctoc TO UPDATE -->
- [1. cpufetch does not accept pull requests](#1-cpufetch-does-not-accept-pull-requests)
- [2. Creating an issue](#2-creating-an-issue)
- [2.1: I found a bug in cpufetch (the program provides incorrect / invalid information)](#21-i-found-a-bug-in-cpufetch-the-program-provides-incorrect--invalid-information)
- [2.2: I found a bug in cpufetch (the program crashes / does not work properly)](#22-i-found-a-bug-in-cpufetch-the-program-crashes--does-not-work-properly)
- [Stacktrace option 1 (best)](#stacktrace-option-1-best)
- [Stacktrace option 2 (use this option if option 1 does not work)](#stacktrace-option-2-use-this-option-if-option-1-does-not-work)
- [2.3: I have an idea for a new feature in cpufetch / I want to suggest a change in cpufetch](#23-i-have-an-idea-for-a-new-feature-in-cpufetch--i-want-to-suggest-a-change-in-cpufetch)
<!-- END doctoc generated TOC please keep comment here to allow auto update -->
Thanks for your interest in contributing to cpufetch! Please, read this page carefully to understand how to contribute to cpufetch.
## 1. cpufetch does not accept pull requests
cpufetch is a small project, and I enjoy developing it. There are for sure some bugs and exciting features to add, but I prefer to make these
changes myself. For that reason, you should always use the issues page to report anything related to cpufetch. In the rare case that there is
a concise bug or feature that I am unable to implement myself, I will enable pull requests for this.
## 2. Creating an issue
### 2.1: I found a bug in cpufetch (the program provides incorrect / invalid information)
In the github issue **you must include**:
- Exact CPU model.
- Operating system.
- The output of `cpufetch`.
- The output of `cpufetch --debug`.
### 2.2: I found a bug in cpufetch (the program crashes / does not work properly)
- Exact CPU model.
- Operating system.
- The output of `cpufetch`.
- The output of `cpufetch --debug`.
- A stacktrace (if program crashes):
#### Stacktrace option 1 (best)
1. Build cpufetch with debug symbols (`make clean; make debug`).
2. Install valgrind (if it is not already installed)
3. Run cpufetch with valgrind (`valgrind ./cpufetch`)
4. Paste the complete output (preferably on a platform like pastebin)
#### Stacktrace option 2 (use this option if option 1 does not work)
1. Build cpufetch with debug symbols (`make clean; make debug`).
2. Install gdb (if it is not already installed)
3. Debug cpufetch with gdb (`gdb cpufetch`)
3. Run cpufetch (just r inside gdb console)
4. Paste the complete output (preferably on a platform like pastebin)
### 2.3: I have an idea for a new feature in cpufetch / I want to suggest a change in cpufetch
Just explain the feature in the issue and include references (links) to relevant sources if appropriate.

352
LICENSE
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@@ -1,339 +1,21 @@
GNU GENERAL PUBLIC LICENSE MIT License
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc., Copyright (c) 2018 Dr-Noob
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
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Preamble Permission is hereby granted, free of charge, to any person obtaining a copy
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The licenses for most software are designed to take away your The above copyright notice and this permission notice shall be included in all
freedom to share and change it. By contrast, the GNU General Public copies or substantial portions of the Software.
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software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
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When we speak of free software, we are referring to freedom, not THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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The precise terms and conditions for copying, distribution and
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GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
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Whether that is true depends on what the Program does.
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and give any other recipients of the Program a copy of this License
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You may charge a fee for the physical act of transferring a copy, and
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notice that there is no warranty (or else, saying that you provide
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In addition, mere aggregation of another work not based on the Program
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implemented by public license practices. Many people have made
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may add an explicit geographical distribution limitation excluding
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NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
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WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
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YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
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POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

View File

@@ -1,9 +1,7 @@
CC ?= gcc CXX=gcc
CFLAGS+=-Wall -Wextra -pedantic CXXFLAGS=-Wall -Wextra -Werror -pedantic -fstack-protector-all -pedantic -std=c99
SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith -Wstrict-prototypes SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith
PREFIX ?= /usr
SRC_COMMON=src/common/ SRC_COMMON=src/common/
@@ -11,105 +9,48 @@ COMMON_SRC = $(SRC_COMMON)main.c $(SRC_COMMON)cpu.c $(SRC_COMMON)udev.c $(SRC_CO
COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_COMMON)printer.h $(SRC_COMMON)args.h $(SRC_COMMON)global.h COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_COMMON)printer.h $(SRC_COMMON)args.h $(SRC_COMMON)global.h
ifneq ($(OS),Windows_NT) ifneq ($(OS),Windows_NT)
GIT_VERSION := "$(shell git describe --abbrev=4 --dirty --always --tags)"
arch := $(shell uname -m) arch := $(shell uname -m)
os := $(shell uname -s) ifeq ($(arch), x86_64)
ifeq ($(os), Linux)
COMMON_SRC += $(SRC_COMMON)freq.c
COMMON_HDR += $(SRC_COMMON)freq.h
endif
ifeq ($(arch), $(filter $(arch), x86_64 amd64 i386 i486 i586 i686))
SRC_DIR=src/x86/ SRC_DIR=src/x86/
SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h $(SRC_DIR)freq/freq.h HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
CXXFLAGS += -DARCH_X86
ifeq ($(os), Linux)
SOURCE += $(SRC_DIR)freq/freq.c freq_nov.o freq_avx.o freq_avx512.o
HEADERS += $(SRC_DIR)freq/freq.h
CFLAGS += -pthread
endif
CFLAGS += -DARCH_X86 -std=c99 -fstack-protector-all
else ifeq ($(arch), $(filter $(arch), ppc64le ppc64 ppcle ppc))
SRC_DIR=src/ppc/
SOURCE += $(COMMON_SRC) $(SRC_DIR)ppc.c $(SRC_DIR)uarch.c $(SRC_DIR)udev.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)ppc.h $(SRC_DIR)uarch.h $(SRC_DIR)udev.c
CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all -Wno-language-extension-token
else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
SRC_DIR=src/arm/
SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_COMMON)pci.c $(SRC_DIR)udev.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_COMMON)pci.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99 -fstack-protector-all
ifeq ($(os), Darwin)
SOURCE += $(SRC_COMMON)sysctl.c
HEADERS += $(SRC_COMMON)sysctl.h
endif
else ifeq ($(arch), $(filter $(arch), riscv64 riscv32))
SRC_DIR=src/riscv/
SOURCE += $(COMMON_SRC) $(SRC_DIR)riscv.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)riscv.h $(SRC_DIR)uarch.h $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_DIR)udev.h $(SRC_DIR)socs.h
CFLAGS += -DARCH_RISCV -Wno-unused-parameter -std=c99 -fstack-protector-all
else else
# Error lines should not be tabulated because Makefile complains about it SRC_DIR=src/arm/
$(warning Unsupported arch detected: $(arch). See https://github.com/Dr-Noob/cpufetch#1-support) SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
$(warning If your architecture is supported but the compilation fails, please open an issue in https://github.com/Dr-Noob/cpufetch/issues) HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
$(error Aborting compilation) CXXFLAGS += -DARCH_ARM -Wno-unused-parameter
endif endif
OUTPUT=cpufetch OUTPUT=cpufetch
else else
# Assume x86_64 # Assume x86_64
GIT_VERSION := ""
SRC_DIR=src/x86/ SRC_DIR=src/x86/
SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
CFLAGS += -DARCH_X86 -std=c99 CXXFLAGS += -DARCH_X86
SANITY_FLAGS += -Wno-pedantic-ms-format SANITY_FLAGS += -Wno-pedantic-ms-format
OUTPUT=cpufetch.exe OUTPUT=cpufetch.exe
endif endif
all: CFLAGS += -O2
all: $(OUTPUT) all: $(OUTPUT)
debug: CFLAGS += -g -O0 debug: CXXFLAGS += -g -O0
debug: $(OUTPUT) debug: $(OUTPUT)
static: CFLAGS += -static -O2 release: CXXFLAGS += -static -O3
static: $(OUTPUT) release: $(OUTPUT)
strict: CFLAGS += -O2 -Werror -fsanitize=undefined -D_FORTIFY_SOURCE=2
strict: $(OUTPUT)
freq_nov.o: Makefile $(SRC_DIR)freq/freq_nov.c $(SRC_DIR)freq/freq_nov.h $(SRC_DIR)freq/freq.h
$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -pthread $(SRC_DIR)freq/freq_nov.c -o $@
freq_avx.o: Makefile $(SRC_DIR)freq/freq_avx.c $(SRC_DIR)freq/freq_avx.h $(SRC_DIR)freq/freq.h
$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx -pthread $(SRC_DIR)freq/freq_avx.c -o $@
freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.h $(SRC_DIR)freq/freq.h
$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -pthread $(SRC_DIR)freq/freq_avx512.c -o $@
$(OUTPUT): Makefile $(SOURCE) $(HEADERS) $(OUTPUT): Makefile $(SOURCE) $(HEADERS)
ifeq ($(GIT_VERSION),"") $(CXX) $(CXXFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
else
$(CC) $(CFLAGS) $(SANITY_FLAGS) -DGIT_FULL_VERSION=\"$(GIT_VERSION)\" $(SOURCE) -o $(OUTPUT)
endif
run: $(OUTPUT) run: $(OUTPUT)
./$(OUTPUT) ./$(OUTPUT)
clean: clean:
@rm -f $(OUTPUT) *.o @rm $(OUTPUT)
install: $(OUTPUT) install: $(OUTPUT)
install -Dm755 "cpufetch" "$(DESTDIR)$(PREFIX)/bin/cpufetch" install -Dm755 "cpufetch" "/usr/bin/cpufetch"
install -Dm644 "LICENSE" "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE" install -Dm644 "LICENSE" "/usr/share/licenses/cpufetch-git/LICENSE"
install -Dm644 "cpufetch.1" "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz" install -Dm644 "cpufetch.8" "/usr/share/man/man8/cpufetch.8.gz"
uninstall:
rm -f "$(DESTDIR)$(PREFIX)/bin/cpufetch"
rm -f "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
rm -f "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"

191
README.md
View File

@@ -1,86 +1,36 @@
<p align="center"><img width=50% src="./pictures/cpufetch.png"></p> # cpufetch
<h4 align="center">Simple yet fancy CPU architecture fetching tool</h4> Simplistic yet fancy CPU architecture fetching tool
![cpu1](pictures/i9.png)
<p align="center"> </p> ### Platforms
cpufetch currently supports x86_64 CPUs (both Intel and AMD) and ARM.
<div align="center"> | Platform | x86_64 | ARM | Notes |
<img height="22px" src="https://img.shields.io/github/v/tag/Dr-Noob/cpufetch?label=cpufetch&style=flat-square"> |:---------:|:------------------------:|:-------------------:|:-----------------:|
<a href="https://github.com/Dr-Noob/cpufetch/stargazers"> | Linux | :heavy_check_mark: | :heavy_check_mark: | Prefered platform. <br> Experimental ARM support |
<img height="22px" src="https://img.shields.io/github/stars/Dr-Noob/cpufetch?color=4CC61F&style=flat-square"> | Windows | :heavy_check_mark: | :x: | Some information may be missing. <br> Colors will be used if supported |
</a> | Android | :heavy_exclamation_mark: | :heavy_check_mark: | Experimental ARM support |
<a href="https://github.com/Dr-Noob/cpufetch/issues"> | macOS | :heavy_check_mark: | :x: | Some information may be missing |
<img height="22px" src="https://img.shields.io/github/issues/Dr-Noob/cpufetch?style=flat-square">
</a>
<a href="https://github.com/Dr-Noob/cpufetch/blob/master/README.md#1-support">
<img height="22px" src="pictures/os-shield.jpg">
</a>
<a href="https://github.com/Dr-Noob/cpufetch/blob/master/LICENSE">
<img height="22px" src="https://img.shields.io/github/license/Dr-Noob/cpufetch?color=orange&style=flat-square">
</a>
</div>
<p align="center"> </p> | Emoji | Meaning |
|:-----------------------:|:-------------:|
<p align="center"> |:heavy_check_mark: | Supported |
cpufetch is a command-line tool written in C that displays the CPU information in a clean and beautiful way |:x: | Not supported |
</p> |:heavy_exclamation_mark: | Not tested |
<p align="center">
<img width=80% src="./pictures/examples.gif">
</p>
# Table of contents
<!-- UPDATE with: doctoc --notitle README.md -->
<!-- START doctoc generated TOC please keep comment here to allow auto update -->
<!-- DON'T EDIT THIS SECTION, INSTEAD RE-RUN doctoc TO UPDATE -->
- [1. Support](#1-support) ### Usage and installation
- [2. Installation](#2-installation) #### Linux
- [2.1 Installing from a package](#21-installing-from-a-package) There is a cpufetch package available in Arch Linux ([cpufetch-git](https://aur.archlinux.org/packages/cpufetch-git)).
- [2.2 Building from source](#22-building-from-source)
- [2.3 Android](#23-android)
- [3. Examples](#3-examples)
- [3.1 x86_64](#31-x86_64)
- [3.2 ARM](#32-arm)
- [3.3 PowerPC](#33-powerpc)
- [4. Colors](#4-colors)
- [4.1 Specifying a name](#41-specifying-a-name)
- [4.2 Specifying the colors in RGB format](#42-specifying-the-colors-in-rgb-format)
- [5. Implementation](#5-implementation)
- [6. Bugs or improvements](#6-bugs-or-improvements)
- [6.1 Unknown microarchitecture error](#61-unknown-microarchitecture-error)
- [6.2 Other situations](#62-other-situations)
- [7. Acknowledgements](#7-acknowledgements)
- [8. cpufetch for GPUs (gpufetch)](#8-cpufetch-for-gpus-gpufetch)
<!-- END doctoc generated TOC please keep comment here to allow auto update --> If you are in another distro, you can build `cpufetch` from source (see below)
## 1. Support #### Windows
In the [releases](https://github.com/Dr-Noob/cpufetch/releases) section you will find some cpufetch executables compiled for Windows. Just download and run it from Windows CMD.
| OS | x86_64 / x86 | ARM | RISC-V | PowerPC | #### Building from source
|:-----------:|:------------------:|:------------------:|:------------------:|:------------------:| Just clone the repo and use `make` to compile it
| GNU / Linux | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| Windows | :heavy_check_mark: | :x: | :x: | :x: |
| Android | :heavy_check_mark: | :heavy_check_mark: | :x: | :x: |
| macOS | :heavy_check_mark: | :heavy_check_mark: | :x: | :heavy_check_mark: |
| FreeBSD | :heavy_check_mark: | :x: | :x: | :x: |
**NOTES:**
- Colors will be used in Windows only if the terminal supports it.
- Support in macOS ARM is limited to Apple chips only
## 2. Installation
### 2.1 Installing from a package
Choose the right package for your operating system:
[![Packaging status](https://repology.org/badge/vertical-allrepos/cpufetch.svg)](https://repology.org/project/cpufetch/versions)
If there is no available package for your OS, you can download the cpufetch binary from [the releases page](https://github.com/Dr-Noob/cpufetch/releases), or [build cpufetch from source](#22-building-from-source-linuxwindowsmacos) (see below).
### 2.2 Building from source
You will need a C compiler (e.g, `gcc`) and `make` to compile `cpufetch`. Just clone the repo and run `make`:
``` ```
git clone https://github.com/Dr-Noob/cpufetch git clone https://github.com/Dr-Noob/cpufetch
@@ -89,92 +39,41 @@ make
./cpufetch ./cpufetch
``` ```
### 2.3 Android The Makefile is designed to work on both Linux and Windows.
1. Install `termux` app (terminal emulator)
2. Run `pkg install -y git make clang` inside termux.
3. Build from source normally:
- git clone https://github.com/Dr-Noob/cpufetch
- cd cpufetch
- make
- ./cpufetch
## 3. Examples ### Examples
### 3.1 x86_64 Here are more examples of how `cpufetch` looks on different CPUs.
<p align="center"><img width=90% src="pictures/epyc.png"></p> ##### x86_64 CPUs
<p align="center">AMD EPYC HPC server</p>
<p align="center"><img width=90% src="pictures/cascade_lake.jpg"></p>
<p align="center">Intel Xeon HPC server</p>
### 3.2 ARM ![cpu2](pictures/epyc.png)
<p align="center"> ![cpu3](pictures/cascade_lake.png)
<img width=45% src="pictures/exynos.jpg">
&nbsp;
<img width=45% src="pictures/snapd.png">
</p>
<p align="center">Samsung Galaxy S8 (left) Xiaomi Redmi Note 7 (right)</p>
### 3.3 PowerPC ##### ARM CPUs
<p align="center"><img width=90% src="pictures/ibm.png"></p> ![cpu4](pictures/exynos.png)
<p align="center">Talos II</p>
## 4. Colors ![cpu5](pictures/snapdragon.png)
By default, `cpufetch` will print the CPU logo with the system colorscheme. However, you can set a custom color scheme in two different ways:
### 4.1 Specifying a name ### Colors and style
By default, `cpufetch` will print the CPU art with the system colorscheme. However, you can always set a custom color scheme, either
By specifying a name, cpufetch will use the specific colors of each manufacture. Valid values are: specifying Intel or AMD, or specifying the colors in RGB format:
- intel
- intel-new
- amd
- ibm
- arm
``` ```
./cpufetch --color intel (default color for Intel) ./cpufetch --color intel (default color for Intel)
./cpufetch --color amd (default color for AND)
./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200 (example)
``` ```
### 4.2 Specifying the colors in RGB format In the case of setting the colors using RGB, 4 colors must be given in with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to CPU art color (2 colors) and for the text colors (following 2). Thus, you can customize all the colors.
5 colors must be given in RGB with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to the CPU logo color (first 3 colors) and for the text colors (following 2). ### Implementation
``` See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/blob/master/doc/README.md).
./cpufetch --color 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200
```
## 5. Implementation ### Bugs or improvements
See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/tree/master/doc). There are many open issues in github (see [issues](https://github.com/Dr-Noob/cpufetch/issues)). Feel free to open a new one report an issue or propose any improvement in `cpufetch`
## 6. Bugs or improvements ### Testing
### 6.1 Unknown microarchitecture error I would like to thank [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI) for their help, running `cpufetch` in many different CPUs they have access to, which makes it easier to debug and check the correctness of `cpufetch`.
If you get the `Unknown microarchitecture detected` error when running cpufetch, it might be caused by two possible reasons:
1. You are running an old release of cpufetch (most likely)
2. Your microarchitecture is not yet supported
Download and compile the latest version (see https://github.com/Dr-Noob/cpufetch#22-building-from-source for instructions)
and verify if the error persists.
* __If the error dissapears__: It means that this is the first situation. In this case, just use the
latest version of cpufetch which already has support for your hardware.
* __If the error does not dissapear__: It means that this is the
second situation. In this case, please create a new issue with the error message and the output of 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues
### 6.2 Other situations
See [cpufetch contributing guidelines](https://github.com/Dr-Noob/cpufetch/blob/master/CONTRIBUTING.md).
## 7. Acknowledgements
Thanks to the fellow contributors and interested people in the project. Special thanks to:
- [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI): Tested cpufetch in the earlier versions of the project in many different CPUs.
- [Kyngo](https://github.com/Kyngo): Tested cpufetch in the Apple M1 CPU.
- [avollmerhaus](https://github.com/avollmerhaus): Helped with PowerPC port giving ssh access to a PowerPC machine.
- [bbonev](https://github.com/bbonev) and [stephan-cr](https://github.com/stephan-cr): Reviewed the source code.
- [mdoksa76](https://github.com/mdoksa76) and [exkc](https://github.com/exkc): Excellent ideas and feedback for supporting Allwinner SoCs.
- [Sakura286](https://github.com/Sakura286), [exkc](https://github.com/exkc) and [Patola](https://github.com/Patola): Helped with RISC-V port with ssh access, ideas, testing, etc.
- [ThomasKaiser](https://github.com/ThomasKaiser): Very valuable feedback on improving ARM SoC detection (Apple, Allwinner, Rockchip).
## 8. cpufetch for GPUs (gpufetch)
See [gpufetch](https://github.com/Dr-Noob/gpufetch) project!

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@@ -1,91 +0,0 @@
.\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.48.3. It was also manually adapted to look correctly
.\" help2man -N -n "Simple yet fancy CPU architecture fetching tool" ./cpufetch > cpufetch.1
.TH CPUFETCH "1" "September 2021" "cpufetch v1.00 (Linux x86_64 build)" "User Commands"
.SH NAME
cpufetch \- Simple yet fancy CPU architecture fetching tool
.SH SYNOPSIS
.B cpufetch
[\fI\,OPTION\/\fR]...
.SH DESCRIPTION
cpufetch is a command-line tool written in C that displays the CPU information in a clean and beautiful way
.SH OPTIONS
.TP
\fB\-c\fR, \fB\-\-color\fR
Set the color scheme (by default, cpufetch uses the system color scheme)
.TP
\fB\-s\fR, \fB\-\-style\fR
Set the style of CPU logo
.TP
\fB\-d\fR, \fB\-\-debug\fR
Print CPU model and cpuid levels (debug purposes)
.TP
\fB\-\-logo\-short\fR
Show the short version of the logo
.TP
\fB\-\-logo\-long\fR
Show the long version of the logo
.TP
\fB\-v\fR, \fB\-\-verbose\fR
Print extra information (if available) about how cpufetch tried fetching information
.TP
\fB\-\-logo\-intel\-old\fR
Show the old Intel logo
.TP
\fB\-\-logo\-intel\-new\fR
Show the new Intel logo
.TP
\fB\-F\fR, \fB\-\-full\-cpu\-name\fR
Show the full CPU name (do not abbreviate it)
.TP
\fB\-r\fR, \fB\-\-raw\fR
Print raw cpuid data (debug purposes)
.TP
\fB\-h\fR, \fB\-\-help\fR
Print this help and exit
.TP
\fB\-V\fR, \fB\-\-version\fR
Print cpufetch version and exit
.SH COLORS
.TP
* "intel":
Use Intel default color scheme
.TP
* "amd":
Use AMD default color scheme
.TP
* "ibm",
Use IBM default color scheme
.TP
* "arm":
Use ARM default color scheme
.TP
* custom:
If the argument of \fB\-\-color\fR does not match any of the previous strings, a custom scheme can be specified. 5 colors must be given in RGB with the format: R,G,B:R,G,B:...The first 3 colors are the CPU art color and the next 2 colors are the text colors
.SH STYLES
.TP
* "fancy":
Default style
.TP
* "retro":
Old cpufetch style
.TP
* "legacy":
Fallback style for terminals that do not support colors
.SH LOGOS
.TP
cpufetch will try to adapt the logo size and the text to the terminal width. When the output (logo and text) is wider than the terminal width, cpufetch will print a smaller version of the logo (if it exists). This behavior can be overridden by \fB\-\-logo\-short\fR and \fB\-\-logo\-long\fR, which always sets the logo size as specified by the user, even if it is too big. After the logo selection (either automatically or set by the user), cpufetch will check again if the output fits in the terminal. If not, it will use a shorter name for the fields (the left part of the text). If, after all of this, the output still does not fit, cpufetch will cut the text and will only print the text until there is no space left in each line
.SH EXAMPLES
.TP
Run cpufetch with Intel color scheme:
.IP
\&./cpufetch \fB\-\-color\fR intel
.TP
Run cpufetch with a custom color scheme:
.IP
\&./cpufetch \fB\-\-color\fR 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200
.SH BUGS
.TP
Report bugs to https://github.com/Dr\-Noob/cpufetch/issues
.SH NOTE
.TP
Peak performance information is NOT accurate. cpufetch computes peak performance using the max frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the CPU running AVX code. This value is not be fetched by cpufetch since it depends on each specific CPU. To correctly measure peak performance, see: https://github.com/Dr\-Noob/peakperf

57
cpufetch.8 Normal file
View File

@@ -0,0 +1,57 @@
.TH man 8 "1 Sep 2020" "0.7" "cpufetch man page"
.SH NAME
cpufetch \- Simplistic yet fancy CPU architecture fetching tool
.SH SYNOPSIS
cpufetch [--version] [--help] [--levels] [--style fancy|retro|legacy] [--color intel|amd|'R,G,B:R,G,B:R,G,B:R,G,B']
.SH DESCRIPTION
cpufetch will print CPU information, for which will query CPUID instructions and udev directories on Linux as a fallback method. Some of this features are:
.IP \[bu] 2
Name
.IP \[bu]
Frequency
.IP \[bu]
Number of cores (Physical and Logical)
.IP \[bu]
Cache sizes
.IP \[bu]
Theoretical peak performance in floating point operations per second (FLOP/s)
.SH OPTIONS
.TP
\fB\-\-style\fR \f[I][intel|amd|R,G,B:R,G,B:R,G,B:R,G,B]\f[]
Set the color scheme. By default, cpufetch uses the system color scheme. This option lets the user use different colors to print the CPU art:
.IP \[bu]
\fB"intel"\fR: Use intel color scheme
.IP \[bu]
\fB"amd"\fR: Use amd color scheme
.IP \[bu]
\fBcustom\fR: If color do not match "intel" or "amd", a custom scheme can be specified: 4 colors must be given in RGB with the format: R,G,B:R,G,B:...
These colors correspond to CPU art color (2 colors) and for the text colors (following 2)
.TP
\fB\-\-style\fR \f[I]STYLE\f[]
Specify the style of ascii logo:
.IP \[bu]
\fB"fancy"\fR: Default style
.IP \[bu]
\fB"retro"\fR: Old cpufetch style
.IP \[bu]
\fB"legacy"\fR: Fallback style for terminals that does not support colors
.TP
\fB\-\-levels\fR
Prints CPUID levels and CPU name
.TP
\fB\-\-verbose\fR
Prints extra information (if available) about how cpufetch tried fetching information
.TP
\fB\-\-help\fR
Prints help
.TP
\fB\-\-version\fR
Prints cpufetch version
.SH BUGS
Bugs should be posted on: https://github.com/Dr-Noob/cpufetch/issues
.SH NOTES
Peak performance information is NOT accurate. cpufetch computes peak performance using the max
frequency. However, to properly compute peak performance, you need to know the frequency of the
CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU.
.SH AUTHOR
Dr-Noob (https://github.com/Dr-Noob)

View File

@@ -11,7 +11,7 @@ Microarchitecture information is acquired from the Main ID Register (MIDR) [[2](
- `CPU part` - `CPU part`
- `CPU revision` - `CPU revision`
The MIDR register can be built with this information. Another possible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1` The MIDR register can be built with this information. Another posible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1`
With the MIDR available, the approach is the same as the one used in x86_64 architectures. cpufetch has a file that acts like a database that tries to match the MIDR register with the specific CPU microarchitecture. With the MIDR available, the approach is the same as the one used in x86_64 architectures. cpufetch has a file that acts like a database that tries to match the MIDR register with the specific CPU microarchitecture.

View File

@@ -1,26 +0,0 @@
### 2. How to get CPU microarchitecture?
__Involved code: [get_uarch_from_pvr (uarch.c)](https://github.com/Dr-Noob/cpufetch/src/ppc/uarch.c)__
Microarchitecture is deduced from the PVR register, which is read using the `mfpvr` instruction. The correspondence between the PVR and the specific microarchitecture has been implemented using the values in `arch/powerpc/kernel/cputable.c` in the Linux kernel. Some of them have been removed. The manufacturing process has been queried by searching on the internet.
### 3. How to get CPU topology?
__Involved code: [get_topology_info (ppc.c)](https://github.com/Dr-Noob/cpufetch/src/ppc/ppc.c)__
The total number of cores is queried using `sysconf(_SC_NPROCESSORS_ONLN)`. Then, with the number of sockets and the number of physical cores, we can calculate the number of threads per core.
The number of sockets is queried using `/sys/devices/system/cpu/cpu*/topology/physical_package_id`. Once this file has been read for all of the cores, a simple custom algorithm is used to determine the number of sockets.
The number of physical cores is queried using `/sys/devices/system/cpu/cpu*/topology/core_id`. Again, a custom algorithm is used to determine the number of physical cores.
### 4. How to get the frequency?
Frequency is read directly from `/sys/devices/system/cpu/cpu*/cpufreq/cpuinfo_max_freq`
### 5. How to get cache size and topology?
Cache size is retrieved directly from Linux (using `/sys/devices/system/cpu/cpu0/cache/index*/size`).
To find the cache topology, the files `/sys/devices/system/cpu/cpu0/cache/index*/shared_cpu_map` are used, and a custom algorithm is used to determine how many caches are there at each level.
_NOTE_: To avoid Linux dependencies at this point, it looks like it is possible to derive the cache size and topology from the microarchitecture. For example, in the POWER9 architecture, wikichip assumes that all the POWER9 CPUs have the same cache size for each core and topology [[1](#references)].
#### References
- [1] [POWER9 - wikichip](https://en.wikichip.org/wiki/ibm/microarchitectures/power9)

View File

@@ -1,14 +1,13 @@
# cpufetch programming documentation (v0.98) # cpufetch programming documentation (v0.94)
This documentation explains how cpufetch works internally and all the design decisions I made. This document intends to be useful for me in the future, for everyone interested in the project, and for anyone who is trying to obtain any specific information from the CPU. In this way, this can be used as a manual or a page that collects interesting material in this area. This documentation explains how cpufetch works internally and all the design decisions I made. This document intends to be useful for me in the future, for everyone interested in the project, and for anyone who is trying to obtain any specific information from the CPU. In this way, this can be used as a manual or a page that collects interesting material in this area.
### 1. Basics ### 1. Basics
cpufetch works for __x86_64__ (Intel and AMD), __ARM__ and __PowerPC__ CPUs. However, cpufetch is expected to work better on x86_64, because the codebase is older and has been tested much more than the ARM and PowerPC versions. Depending on the architecture, cpufetch choose certain files to be compiled. A summarized tree of the source code of cpufetch is shown below. cpufetch works for __x86_64__ (Intel and AMD) and __ARM__ CPUs. However, cpufetch is expected to work better on x86_64, because the codebase is older and has been tested much more than the ARM version. Other kinds of x86_64 CPU are not supported (I don't think supporting other CPUs may pay off). Depending on the architecture, cpufetch choose certain files to be compiled. A summarized tree of the source code of cpufetch is shown below.
``` ```
cpufetch/ cpufetch/
├── doc ├── doc
│   ├── DOCUMENTATION_ARM.md │   ├── DOCUMENTATION_ARM.md
| ├── DOCUMENTATION_PPC.md
│   ├── DOCUMENTATION_X86.md │   ├── DOCUMENTATION_X86.md
│   └── README.md │   └── README.md
├── Makefile ├── Makefile
@@ -20,22 +19,17 @@ cpufetch/
│   └── other files ... │   └── other files ...
├── common/ ├── common/
│   └── common files ... │   └── common files ...
├── ppc/
| ├── ppc.c
| ├── ppc.h
| └── other files ...
└── x86/ └── x86/
├── cpuid.c ├── cpuid.c
├── cpuid.h ├── cpuid.h
└── other files ... └── other files ...
``` ```
Source code is divided into four directories: Source code is divided into three directories:
- `common/`: Source code shared between all architectures - `common/`: Source code shared between x86 and ARM
- `arm/`: ARM source code - `arm/`: ARM dependant source code
- `ppc/`: PowerPC source code - `x86/`: x86_64 dependant source code
- `x86/`: x86 source code
##### 1.1 Basics (x86_64) ##### 1.1 Basics (x86_64)
@@ -56,14 +50,10 @@ struct cpuInfo {
To use any CPUID leaf, cpufetch always needs to check that it is supported in the current CPU. To use any CPUID leaf, cpufetch always needs to check that it is supported in the current CPU.
##### 1.2 Basics (ARM) ##### 1.2 Basics (ARM)
In ARM, __cpufetch works using the MIDR register and Linux filesystem__. MIDR (Main ID Register) is read from `/proc/cpuinfo`. It allows the detection of the microarchitecture of the cores. Furthermore, Linux filesystem `/sys/devices/system/cpu/` is used to fetch the number of cores and other information. This is the main reason to explain __why `cpufetch` for ARM only works on Linux systems.__ In ARM, __cpufetch works using the MIDR register and Linux filesystem__. MIDR (Main ID Register) is read from `/proc/cpuinfo`. It allows the detection of the microarchitecture of the cores. Furthermore, Linux filesystem `/sys/devices/system/cpu/` is used to fetch the number of cores and other information. This is the main reason to explain __why `cpufetch` only works on Linux kernel based systems.__
##### 1.3 Basics (PowerPC) ##### 1.3 Documentation organization
In PowerPC, __cpufetch works using the PVR register and Linux filesystem__. PVR (Processor Version Register) is read using assembly and it is used to identify the microarchitecture of the CPU. Linux is also used to query the rest of the information, like the CPU topology, frequency, etc. This is the main reason to explain __why `cpufetch` for PowerPC only works on Linux systems.__ The rest of the documentation is divided into x86 and ARM architectures since each one needs different implementations:
##### 1.4 Documentation organization
The rest of the documentation is divided in specific files for each architecture, since each one needs different implementations:
- [DOCUMENTATION_ARM.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_ARM.md)
- [DOCUMENTATION_PPC.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_PPC.md)
- [DOCUMENTATION_X86.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_X86.md) - [DOCUMENTATION_X86.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_X86.md)
- [DOCUMENTATION_ARM.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_ARM.md)

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@@ -4,28 +4,38 @@
#include <assert.h> #include <assert.h>
#include <stdbool.h> #include <stdbool.h>
#include <errno.h> #include <errno.h>
#include <sys/auxv.h>
#ifdef __linux__ #include <asm/hwcap.h>
#include <sys/auxv.h>
#include <asm/hwcap.h>
#include "../common/freq.h"
#elif defined __APPLE__ || __MACH__
#include "../common/sysctl.h"
#endif
#include "../common/global.h" #include "../common/global.h"
#include "../common/soc.h"
#include "../common/args.h"
#include "udev.h" #include "udev.h"
#include "midr.h" #include "midr.h"
#include "uarch.h" #include "uarch.h"
#include "soc.h"
bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) { #define STRING_UNKNOWN "Unknown"
return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
void init_cache_struct(struct cache* cach) {
cach->L1i = malloc(sizeof(struct cach));
cach->L1d = malloc(sizeof(struct cach));
cach->L2 = malloc(sizeof(struct cach));
cach->L3 = malloc(sizeof(struct cach));
cach->cach_arr = malloc(sizeof(struct cach*) * 4);
cach->cach_arr[0] = cach->L1i;
cach->cach_arr[1] = cach->L1d;
cach->cach_arr[2] = cach->L2;
cach->cach_arr[3] = cach->L3;
cach->max_cache_level = 0;
cach->L1i->exists = false;
cach->L1d->exists = false;
cach->L2->exists = false;
cach->L3->exists = false;
} }
struct cache* get_cache_info(struct cpuInfo* cpu) { struct cache* get_cache_info(struct cpuInfo* cpu) {
struct cache* cach = emalloc(sizeof(struct cache)); struct cache* cach = malloc(sizeof(struct cache));
init_cache_struct(cach); init_cache_struct(cach);
cach->max_cache_level = 2; cach->max_cache_level = 2;
@@ -39,26 +49,19 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
} }
struct frequency* get_frequency_info(uint32_t core) { struct frequency* get_frequency_info(uint32_t core) {
struct frequency* freq = emalloc(sizeof(struct frequency)); struct frequency* freq = malloc(sizeof(struct frequency));
freq->measured = false; freq->base = UNKNOWN_FREQ;
freq->base = UNKNOWN_DATA; freq->max = get_max_freq_from_file(core, false);
freq->max = get_max_freq_from_file(core);
#ifdef __linux__
if (freq->max == UNKNOWN_DATA || measure_max_frequency_flag()) {
if (freq->max == UNKNOWN_DATA)
printWarn("Unable to find max frequency from udev, measuring CPU frequency");
freq->max = measure_max_frequency(core);
freq->measured = true;
}
#endif
return freq; return freq;
} }
struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint32_t* midr_array, int32_t* freq_array, int socket_idx, int ncores) { struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint32_t* midr_array, int socket_idx, int ncores) {
struct topology* topo = emalloc(sizeof(struct topology)); struct topology* topo = malloc(sizeof(struct topology));
init_topology_struct(topo, cach);
topo->cach = cach;
topo->total_cores = 0;
int sockets_seen = 0; int sockets_seen = 0;
int first_core_idx = 0; int first_core_idx = 0;
@@ -66,7 +69,7 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint
int cores_in_socket = 0; int cores_in_socket = 0;
while(socket_idx + 1 > sockets_seen) { while(socket_idx + 1 > sockets_seen) {
if(currrent_core_idx < ncores && cores_are_equal(first_core_idx, currrent_core_idx, midr_array, freq_array)) { if(midr_array[first_core_idx] == midr_array[currrent_core_idx] && currrent_core_idx < ncores) {
currrent_core_idx++; currrent_core_idx++;
cores_in_socket++; cores_in_socket++;
} }
@@ -81,31 +84,8 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint
return topo; return topo;
} }
int64_t get_peak_performance(struct cpuInfo* cpu) { bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
struct cpuInfo* ptr = cpu; return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
//First check we have consistent data
for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
if(get_freq(ptr->freq) == UNKNOWN_DATA) {
return -1;
}
}
int64_t total_flops = 0;
ptr = cpu;
for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
int vpus = get_number_of_vpus(ptr);
int vpus_width = get_vpus_width(ptr);
bool has_fma = has_fma_support(ptr);
int64_t flops = ptr->topo->total_cores * get_freq(ptr->freq) * 1000000 * vpus * (vpus_width/32);
if(has_fma) flops = flops * 2;
total_flops += flops;
}
return total_flops;
} }
uint32_t fill_ids_from_midr(uint32_t* midr_array, int32_t* freq_array, uint32_t* ids_array, int len) { uint32_t fill_ids_from_midr(uint32_t* midr_array, int32_t* freq_array, uint32_t* ids_array, int len) {
@@ -147,14 +127,13 @@ void init_cpu_info(struct cpuInfo* cpu) {
// true... // true...
// ARM32 https://elixir.bootlin.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h // ARM32 https://elixir.bootlin.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h
// ARM64 https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h // ARM64 https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h
struct features* get_features_info(void) { struct features* get_features_info() {
struct features* feat = emalloc(sizeof(struct features)); struct features* feat = malloc(sizeof(struct features));
bool *ptr = &(feat->AES); bool *ptr = &(feat->AES);
for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) { for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
*ptr = false; *ptr = false;
} }
#ifdef __linux__
errno = 0; errno = 0;
long hwcaps = getauxval(AT_HWCAP); long hwcaps = getauxval(AT_HWCAP);
@@ -184,27 +163,20 @@ struct features* get_features_info(void) {
feat->SHA1 = hwcaps & HWCAP2_SHA1; feat->SHA1 = hwcaps & HWCAP2_SHA1;
feat->SHA2 = hwcaps & HWCAP2_SHA2; feat->SHA2 = hwcaps & HWCAP2_SHA2;
} }
#endif // ifdef __aarch64__ #endif
#elif defined __APPLE__ || __MACH__
// Must be M1
feat->AES = true;
feat->CRC32 = true;
feat->SHA1 = true;
feat->SHA2 = true;
feat->NEON = true;
#endif // ifdef __linux__
return feat; return feat;
} }
#ifdef __linux__ struct cpuInfo* get_cpu_info() {
struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) { struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
init_cpu_info(cpu); init_cpu_info(cpu);
int ncores = get_ncores_from_cpuinfo(); int ncores = get_ncores_from_cpuinfo();
bool success = false; bool success = false;
int32_t* freq_array = emalloc(sizeof(uint32_t) * ncores); int32_t* freq_array = malloc(sizeof(uint32_t) * ncores);
uint32_t* midr_array = emalloc(sizeof(uint32_t) * ncores); uint32_t* midr_array = malloc(sizeof(uint32_t) * ncores);
uint32_t* ids_array = emalloc(sizeof(uint32_t) * ncores); uint32_t* ids_array = malloc(sizeof(uint32_t) * ncores);
for(int i=0; i < ncores; i++) { for(int i=0; i < ncores; i++) {
midr_array[i] = get_midr_from_cpuinfo(i, &success); midr_array[i] = get_midr_from_cpuinfo(i, &success);
@@ -214,8 +186,8 @@ struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) {
midr_array[i] = midr_array[0]; midr_array[i] = midr_array[0];
} }
freq_array[i] = get_max_freq_from_file(i); freq_array[i] = get_max_freq_from_file(i, false);
if(freq_array[i] == UNKNOWN_DATA) { if(freq_array[i] == UNKNOWN_FREQ) {
printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i); printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i);
freq_array[i] = freq_array[0]; freq_array[i] = freq_array[0];
} }
@@ -227,7 +199,7 @@ struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) {
int tmp_midr_idx = 0; int tmp_midr_idx = 0;
for(uint32_t i=0; i < sockets; i++) { for(uint32_t i=0; i < sockets; i++) {
if(i > 0) { if(i > 0) {
ptr->next_cpu = emalloc(sizeof(struct cpuInfo)); ptr->next_cpu = malloc(sizeof(struct cpuInfo));
ptr = ptr->next_cpu; ptr = ptr->next_cpu;
init_cpu_info(ptr); init_cpu_info(ptr);
@@ -242,197 +214,62 @@ struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) {
ptr->feat = get_features_info(); ptr->feat = get_features_info();
ptr->freq = get_frequency_info(midr_idx); ptr->freq = get_frequency_info(midr_idx);
ptr->cach = get_cache_info(ptr); ptr->cach = get_cache_info(ptr);
ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, freq_array, i, ncores); ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, i, ncores);
} }
cpu->num_cpus = sockets; cpu->num_cpus = sockets;
cpu->hv = emalloc(sizeof(struct hypervisor)); cpu->hv = malloc(sizeof(struct hypervisor));
cpu->hv->present = false; cpu->hv->present = false;
cpu->soc = get_soc(cpu); cpu->soc = get_soc();
cpu->peak_performance = get_peak_performance(cpu);
return cpu; return cpu;
} }
#elif defined __APPLE__ || __MACH__
void fill_cpu_info_firestorm_icestorm(struct cpuInfo* cpu, uint32_t pcores, uint32_t ecores) {
// 1. Fill ICESTORM
struct cpuInfo* ice = cpu;
ice->midr = MIDR_APPLE_M1_ICESTORM;
ice->arch = get_uarch_from_midr(ice->midr, ice);
ice->cach = get_cache_info(ice);
ice->feat = get_features_info();
ice->topo = malloc(sizeof(struct topology));
ice->topo->cach = ice->cach;
ice->topo->total_cores = ecores;
ice->freq = malloc(sizeof(struct frequency));
ice->freq->base = UNKNOWN_DATA;
ice->freq->max = 2064;
ice->hv = malloc(sizeof(struct hypervisor));
ice->hv->present = false;
ice->next_cpu = malloc(sizeof(struct cpuInfo));
// 2. Fill FIRESTORM
struct cpuInfo* fire = ice->next_cpu;
fire->midr = MIDR_APPLE_M1_FIRESTORM;
fire->arch = get_uarch_from_midr(fire->midr, fire);
fire->cach = get_cache_info(fire);
fire->feat = get_features_info();
fire->topo = malloc(sizeof(struct topology));
fire->topo->cach = fire->cach;
fire->topo->total_cores = pcores;
fire->freq = malloc(sizeof(struct frequency));
fire->freq->base = UNKNOWN_DATA;
fire->freq->max = 3200;
fire->hv = malloc(sizeof(struct hypervisor));
fire->hv->present = false;
fire->next_cpu = NULL;
}
void fill_cpu_info_avalanche_blizzard(struct cpuInfo* cpu, uint32_t pcores, uint32_t ecores) {
// 1. Fill BLIZZARD
struct cpuInfo* bli = cpu;
bli->midr = MIDR_APPLE_M2_BLIZZARD;
bli->arch = get_uarch_from_midr(bli->midr, bli);
bli->cach = get_cache_info(bli);
bli->feat = get_features_info();
bli->topo = malloc(sizeof(struct topology));
bli->topo->cach = bli->cach;
bli->topo->total_cores = ecores;
bli->freq = malloc(sizeof(struct frequency));
bli->freq->base = UNKNOWN_DATA;
bli->freq->max = 2800;
bli->hv = malloc(sizeof(struct hypervisor));
bli->hv->present = false;
bli->next_cpu = malloc(sizeof(struct cpuInfo));
// 2. Fill AVALANCHE
struct cpuInfo* ava = bli->next_cpu;
ava->midr = MIDR_APPLE_M2_AVALANCHE;
ava->arch = get_uarch_from_midr(ava->midr, ava);
ava->cach = get_cache_info(ava);
ava->feat = get_features_info();
ava->topo = malloc(sizeof(struct topology));
ava->topo->cach = ava->cach;
ava->topo->total_cores = pcores;
ava->freq = malloc(sizeof(struct frequency));
ava->freq->base = UNKNOWN_DATA;
ava->freq->max = 3500;
ava->hv = malloc(sizeof(struct hypervisor));
ava->hv->present = false;
ava->next_cpu = NULL;
}
void fill_cpu_info_everest_sawtooth(struct cpuInfo* cpu, uint32_t pcores, uint32_t ecores) {
// 1. Fill SAWTOOTH
struct cpuInfo* saw = cpu;
saw->midr = MIDR_APPLE_M3_SAWTOOTH;
saw->arch = get_uarch_from_midr(saw->midr, saw);
saw->cach = get_cache_info(saw);
saw->feat = get_features_info();
saw->topo = malloc(sizeof(struct topology));
saw->topo->cach = saw->cach;
saw->topo->total_cores = ecores;
saw->freq = malloc(sizeof(struct frequency));
saw->freq->base = UNKNOWN_DATA;
saw->freq->max = 2750;
saw->hv = malloc(sizeof(struct hypervisor));
saw->hv->present = false;
saw->next_cpu = malloc(sizeof(struct cpuInfo));
// 2. Fill EVEREST
struct cpuInfo* eve = saw->next_cpu;
eve->midr = MIDR_APPLE_M3_EVEREST;
eve->arch = get_uarch_from_midr(eve->midr, eve);
eve->cach = get_cache_info(eve);
eve->feat = get_features_info();
eve->topo = malloc(sizeof(struct topology));
eve->topo->cach = eve->cach;
eve->topo->total_cores = pcores;
eve->freq = malloc(sizeof(struct frequency));
eve->freq->base = UNKNOWN_DATA;
eve->freq->max = 4050;
eve->hv = malloc(sizeof(struct hypervisor));
eve->hv->present = false;
eve->next_cpu = NULL;
}
struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
// https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_system_capabilities
uint32_t nperflevels = get_sys_info_by_name("hw.nperflevels");
if((cpu->num_cpus = nperflevels) != 2) {
printBug("Expected to find SoC with 2 perf levels, found: %d", cpu->num_cpus);
return NULL;
}
uint32_t pcores = get_sys_info_by_name("hw.perflevel0.physicalcpu");
uint32_t ecores = get_sys_info_by_name("hw.perflevel1.physicalcpu");
if(ecores <= 0) {
printBug("Expected to find a numer of ecores > 0, found: %d", ecores);
return NULL;
}
if(pcores <= 0) {
printBug("Expected to find a numer of pcores > 0, found: %d", pcores);
return NULL;
}
uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");
// Manually fill the cpuInfo assuming that
// the CPU is an Apple SoC
if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
fill_cpu_info_firestorm_icestorm(cpu, pcores, ecores);
cpu->soc = get_soc(cpu);
cpu->peak_performance = get_peak_performance(cpu);
}
else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
fill_cpu_info_avalanche_blizzard(cpu, pcores, ecores);
cpu->soc = get_soc(cpu);
cpu->peak_performance = get_peak_performance(cpu);
}
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
fill_cpu_info_everest_sawtooth(cpu, pcores, ecores);
cpu->soc = get_soc(cpu);
cpu->peak_performance = get_peak_performance(cpu);
}
else {
printBugCheckRelease("Found invalid cpu_family: 0x%.8X", cpu_family);
return NULL;
}
return cpu;
}
#endif
struct cpuInfo* get_cpu_info(void) {
struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
init_cpu_info(cpu);
#ifdef __linux__
return get_cpu_info_linux(cpu);
#elif defined __APPLE__ || __MACH__
return get_cpu_info_mach(cpu);
#endif
}
char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket) { char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket) {
uint32_t size = 3+7+1; uint32_t size = 3+7+1;
char* string = emalloc(sizeof(char)*size); char* string = malloc(sizeof(char)*size);
snprintf(string, size, "%d cores", topo->total_cores); snprintf(string, size, "%d cores", topo->total_cores);
return string; return string;
} }
char* get_str_peak_performance(struct cpuInfo* cpu) {
//7 for GFLOP/s and 6 for digits,eg 412.14
uint32_t size = 7+6+1+1;
assert(strlen(STRING_UNKNOWN)+1 <= size);
char* string = malloc(sizeof(char)*size);
struct cpuInfo* ptr = cpu;
//First check we have consistent data
for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
if(get_freq(ptr->freq) == UNKNOWN_FREQ) {
snprintf(string, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
return string;
}
}
double flops = 0.0;
ptr = cpu;
for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000);
}
if(cpu->feat->NEON) flops = flops * 4;
if(flops >= (double)1000000000000.0)
snprintf(string,size,"%.2f TFLOP/s",flops/1000000000000);
else if(flops >= 1000000000.0)
snprintf(string,size,"%.2f GFLOP/s",flops/1000000000);
else
snprintf(string,size,"%.2f MFLOP/s",flops/1000000);
return string;
}
char* get_str_features(struct cpuInfo* cpu) { char* get_str_features(struct cpuInfo* cpu) {
struct features* feat = cpu->feat; struct features* feat = cpu->feat;
uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,") + 1; char* string = malloc(sizeof(char) * 25);
uint32_t len = 0; uint32_t len = 0;
char* string = ecalloc(max_len, sizeof(char));
if(feat->NEON) { if(feat->NEON) {
strcat(string, "NEON,"); strcat(string, "NEON,");
@@ -469,7 +306,7 @@ void print_debug(struct cpuInfo* cpu) {
for(int i=0; i < ncores; i++) { for(int i=0; i < ncores; i++) {
printf("[Core %d] ", i); printf("[Core %d] ", i);
long freq = get_max_freq_from_file(i); long freq = get_max_freq_from_file(i, false);
uint32_t midr = get_midr_from_cpuinfo(i, &success); uint32_t midr = get_midr_from_cpuinfo(i, &success);
if(!success) { if(!success) {
printWarn("Unable to fetch MIDR for core %d. This is probably because the core is offline", i); printWarn("Unable to fetch MIDR for core %d. This is probably because the core is offline", i);
@@ -478,23 +315,14 @@ void print_debug(struct cpuInfo* cpu) {
else { else {
printf("0x%.8X ", midr); printf("0x%.8X ", midr);
} }
if(freq == UNKNOWN_DATA) { if(freq == UNKNOWN_FREQ) {
printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i); printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i);
printf("%ld MHz\n", get_max_freq_from_file(0)); printf("%ld MHz\n", get_max_freq_from_file(0, false));
} }
else { else {
printf("%ld MHz\n", freq); printf("%ld MHz\n", freq);
} }
} }
#if defined(__APPLE__) || defined(__MACH__)
printf("hw.cpufamily: 0x%.8X\n", get_sys_info_by_name("hw.cpufamily"));
printf("hw.cpusubfamily: 0x%.8X\n", get_sys_info_by_name("hw.cpusubfamily"));
printf("hw.nperflevels: %d\n", get_sys_info_by_name("hw.nperflevels"));
printf("hw.physicalcpu: %d\n", get_sys_info_by_name("hw.physicalcpu"));
printf("hw.perflevel0.physicalcpu: %d\n", get_sys_info_by_name("hw.perflevel0.physicalcpu"));
printf("hw.perflevel1.physicalcpu: %d\n", get_sys_info_by_name("hw.perflevel1.physicalcpu"));
#endif
} }
void free_topo_struct(struct topology* topo) { void free_topo_struct(struct topology* topo) {

View File

@@ -3,10 +3,11 @@
#include "../common/cpu.h" #include "../common/cpu.h"
struct cpuInfo* get_cpu_info(void); struct cpuInfo* get_cpu_info();
uint32_t get_nsockets(struct topology* topo); uint32_t get_nsockets(struct topology* topo);
char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket); char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket);
char* get_str_peak_performance(struct cpuInfo* cpu);
char* get_str_features(struct cpuInfo* cpu); char* get_str_features(struct cpuInfo* cpu);
void print_debug(struct cpuInfo* cpu); void print_debug(struct cpuInfo* cpu);

File diff suppressed because it is too large Load Diff

View File

@@ -1,10 +1,31 @@
#ifndef __SOC_ARM__ #ifndef __SOC__
#define __SOC_ARM__ #define __SOC__
#include "../common/cpu.h" #include "../common/cpu.h"
#include "../common/soc.h"
#include <stdint.h> #include <stdint.h>
struct system_on_chip* get_soc(struct cpuInfo* cpu); typedef int32_t SOC;
enum {
SOC_VENDOR_UNKNOWN,
SOC_VENDOR_SNAPDRAGON,
SOC_VENDOR_MEDIATEK,
SOC_VENDOR_EXYNOS,
SOC_VENDOR_KIRIN,
SOC_VENDOR_BROADCOM
};
struct system_on_chip {
SOC soc_model;
VENDOR soc_vendor;
int32_t process;
char* soc_name;
char* raw_name;
};
struct system_on_chip* get_soc();
char* get_soc_name(struct system_on_chip* soc);
VENDOR get_soc_vendor(struct system_on_chip* soc);
char* get_str_process(struct system_on_chip* soc);
#endif #endif

View File

@@ -10,6 +10,7 @@ enum {
SOC_BCM_2836, SOC_BCM_2836,
SOC_BCM_2837, SOC_BCM_2837,
SOC_BCM_2837B0, SOC_BCM_2837B0,
SOC_BCM_2711,
SOC_BCM_21553, SOC_BCM_21553,
SOC_BCM_21553T, SOC_BCM_21553T,
SOC_BCM_21663, SOC_BCM_21663,
@@ -19,8 +20,6 @@ enum {
SOC_BCM_28145, SOC_BCM_28145,
SOC_BCM_2157, SOC_BCM_2157,
SOC_BCM_21654, SOC_BCM_21654,
SOC_BCM_2711,
SOC_BCM_2712,
// Hisilicon // // Hisilicon //
SOC_HISILICON_3620, SOC_HISILICON_3620,
SOC_HISILICON_3630, SOC_HISILICON_3630,
@@ -29,9 +28,6 @@ enum {
SOC_HISILICON_3670, SOC_HISILICON_3670,
SOC_HISILICON_3680, SOC_HISILICON_3680,
SOC_HISILICON_3690, SOC_HISILICON_3690,
// Kunpeng //
SOC_KUNPENG_920,
SOC_KUNPENG_930,
// Exynos // // Exynos //
SOC_EXYNOS_3475, SOC_EXYNOS_3475,
SOC_EXYNOS_4210, SOC_EXYNOS_4210,
@@ -67,23 +63,37 @@ enum {
SOC_EXYNOS_980, SOC_EXYNOS_980,
SOC_EXYNOS_880, SOC_EXYNOS_880,
// Mediatek // // Mediatek //
SOC_MTK_MT5327, SOC_MTK_MT6889,
SOC_MTK_MT5329, SOC_MTK_MT6885Z,
SOC_MTK_MT5366, SOC_MTK_MT6853,
SOC_MTK_MT5389, SOC_MTK_MT6873,
SOC_MTK_MT5395, SOC_MTK_MT6875,
SOC_MTK_MT5396, SOC_MTK_MT6761D,
SOC_MTK_MT5398, SOC_MTK_MT6761,
SOC_MTK_MT5505, SOC_MTK_MT6762D,
SOC_MTK_MT5561, SOC_MTK_MT6755,
SOC_MTK_MT5580, SOC_MTK_MT6755M,
SOC_MTK_MT5582, SOC_MTK_MT6755T,
SOC_MTK_MT5592, SOC_MTK_MT6757,
SOC_MTK_MT5595, SOC_MTK_MT6762,
SOC_MTK_MT5596, SOC_MTK_MT6763V,
SOC_MTK_MT5597, SOC_MTK_MT6763T,
SOC_MTK_MT5889, SOC_MTK_MT6757CD,
SOC_MTK_MT5895, SOC_MTK_MT6758,
SOC_MTK_MT6765,
SOC_MTK_MT6771,
SOC_MTK_MT6768,
SOC_MTK_MT6771T,
SOC_MTK_MT6771V,
SOC_MTK_MT6779,
SOC_MTK_MT6795,
SOC_MTK_MT6795T,
SOC_MTK_MT6797,
SOC_MTK_MT6797M,
SOC_MTK_MT6797D,
SOC_MTK_MT6797T,
SOC_MTK_MT6797X,
SOC_MTK_MT6799,
SOC_MTK_MT6515, SOC_MTK_MT6515,
SOC_MTK_MT6516, SOC_MTK_MT6516,
SOC_MTK_MT6517, SOC_MTK_MT6517,
@@ -113,51 +123,7 @@ enum {
SOC_MTK_MT6750T, SOC_MTK_MT6750T,
SOC_MTK_MT6752, SOC_MTK_MT6752,
SOC_MTK_MT6753, SOC_MTK_MT6753,
SOC_MTK_MT6755M,
SOC_MTK_MT6755T,
SOC_MTK_MT6757,
SOC_MTK_MT6757CD,
SOC_MTK_MT6758,
SOC_MTK_MT6761,
SOC_MTK_MT6761D,
SOC_MTK_MT6762,
SOC_MTK_MT6762D,
SOC_MTK_MT6762G,
SOC_MTK_MT6763T,
SOC_MTK_MT6763V,
SOC_MTK_MT6765,
SOC_MTK_MT6765G,
SOC_MTK_MT6765H,
SOC_MTK_MT6768,
SOC_MTK_MT6769H,
SOC_MTK_MT6769T,
SOC_MTK_MT6769V,
SOC_MTK_MT6769Z,
SOC_MTK_MT6771,
SOC_MTK_MT6779V_CU,
SOC_MTK_MT6779V_CV,
SOC_MTK_MT6785V_CC,
SOC_MTK_MT6785V_CD,
SOC_MTK_MT6789,
SOC_MTK_MT6795,
SOC_MTK_MT6797,
SOC_MTK_MT6797T,
SOC_MTK_MT6797X,
SOC_MTK_MT6799,
SOC_MTK_MT6833,
SOC_MTK_MT6850, SOC_MTK_MT6850,
SOC_MTK_MT6853,
SOC_MTK_MT6853V,
SOC_MTK_MT6873,
SOC_MTK_MT6875,
SOC_MTK_MT6879,
SOC_MTK_MT6883Z,
SOC_MTK_MT6885Z,
SOC_MTK_MT6889,
SOC_MTK_MT6889Z,
SOC_MTK_MT6891,
SOC_MTK_MT6893,
SOC_MTK_MT6893Z,
SOC_MTK_MT8121, SOC_MTK_MT8121,
SOC_MTK_MT8125, SOC_MTK_MT8125,
SOC_MTK_MT8127, SOC_MTK_MT8127,
@@ -172,25 +138,7 @@ enum {
SOC_MTK_MT8581, SOC_MTK_MT8581,
SOC_MTK_MT8735, SOC_MTK_MT8735,
SOC_MTK_MT8765B, SOC_MTK_MT8765B,
SOC_MTK_MT8781V,
SOC_MTK_MT8783, SOC_MTK_MT8783,
SOC_MTK_MT9602,
SOC_MTK_MT9612,
SOC_MTK_MT9613,
SOC_MTK_MT9615,
SOC_MTK_MT9618,
SOC_MTK_MT9632,
SOC_MTK_MT9638,
SOC_MTK_MT9652,
SOC_MTK_MT9653,
SOC_MTK_MT9675,
SOC_MTK_MT9685,
SOC_MTK_MT9686,
SOC_MTK_MT9689,
SOC_MTK_MT9902,
SOC_MTK_MT9950,
SOC_MTK_MT9972,
SOC_MTK_MT9982,
// Snapdragon // // Snapdragon //
SOC_SNAPD_QSD8650, SOC_SNAPD_QSD8650,
SOC_SNAPD_QSD8250, SOC_SNAPD_QSD8250,
@@ -270,13 +218,11 @@ enum {
SOC_SNAPD_SDM660, SOC_SNAPD_SDM660,
SOC_SNAPD_SM6115, SOC_SNAPD_SM6115,
SOC_SNAPD_SM6125, SOC_SNAPD_SM6125,
SOC_SNAPD_SM6450,
SOC_SNAPD_SDM670, SOC_SNAPD_SDM670,
SOC_SNAPD_SM6150, SOC_SNAPD_SM6150,
SOC_SNAPD_SM6350, SOC_SNAPD_SM6350,
SOC_SNAPD_SDM710, SOC_SNAPD_SDM710,
SOC_SNAPD_SDM712, SOC_SNAPD_SDM712,
SOC_SNAPD_SM4450,
SOC_SNAPD_SM7125, SOC_SNAPD_SM7125,
SOC_SNAPD_SM7150_AA, SOC_SNAPD_SM7150_AA,
SOC_SNAPD_SM7150_AB, SOC_SNAPD_SM7150_AB,
@@ -285,9 +231,6 @@ enum {
SOC_SNAPD_SM7250_AA, SOC_SNAPD_SM7250_AA,
SOC_SNAPD_SM7250_AB, SOC_SNAPD_SM7250_AB,
SOC_SNAPD_SM7250_AC, SOC_SNAPD_SM7250_AC,
SOC_SNAPD_SM7435_AB,
SOC_SNAPD_SM7450,
SOC_SNAPD_SM7475,
SOC_SNAPD_MSM8974AA, SOC_SNAPD_MSM8974AA,
SOC_SNAPD_MSM8974AB, SOC_SNAPD_MSM8974AB,
SOC_SNAPD_MSM8974AC, SOC_SNAPD_MSM8974AC,
@@ -307,86 +250,14 @@ enum {
SOC_SNAPD_SM8250, SOC_SNAPD_SM8250,
SOC_SNAPD_SM8250_AB, SOC_SNAPD_SM8250_AB,
SOC_SNAPD_SM8350, SOC_SNAPD_SM8350,
SOC_SNAPD_SM8450,
SOC_SNAPD_SM8475,
// APPLE
SOC_APPLE_M1,
SOC_APPLE_M1_PRO,
SOC_APPLE_M1_MAX,
SOC_APPLE_M1_ULTRA,
SOC_APPLE_M2,
SOC_APPLE_M2_PRO,
SOC_APPLE_M2_MAX,
SOC_APPLE_M2_ULTRA,
SOC_APPLE_M3,
SOC_APPLE_M3_PRO,
SOC_APPLE_M3_MAX,
// ALLWINNER
SOC_ALLWINNER_A10,
SOC_ALLWINNER_A13,
SOC_ALLWINNER_A10S,
SOC_ALLWINNER_A20,
SOC_ALLWINNER_A23,
SOC_ALLWINNER_A31,
SOC_ALLWINNER_A31S,
SOC_ALLWINNER_A33,
SOC_ALLWINNER_A40,
SOC_ALLWINNER_A50,
SOC_ALLWINNER_A64,
SOC_ALLWINNER_A80,
SOC_ALLWINNER_A83T,
SOC_ALLWINNER_V3S,
SOC_ALLWINNER_HZP,
SOC_ALLWINNER_H2PLUS,
SOC_ALLWINNER_S3,
SOC_ALLWINNER_H3,
SOC_ALLWINNER_H8,
SOC_ALLWINNER_H5,
SOC_ALLWINNER_H6,
SOC_ALLWINNER_H64,
SOC_ALLWINNER_H616,
SOC_ALLWINNER_H618,
SOC_ALLWINNER_R8,
SOC_ALLWINNER_R16,
SOC_ALLWINNER_R40,
SOC_ALLWINNER_R58,
SOC_ALLWINNER_R328,
// ROCKCHIP
SOC_ROCKCHIP_3288,
SOC_ROCKCHIP_3229,
SOC_ROCKCHIP_3308,
SOC_ROCKCHIP_3318,
SOC_ROCKCHIP_3326,
SOC_ROCKCHIP_3328,
SOC_ROCKCHIP_3368,
SOC_ROCKCHIP_3399,
SOC_ROCKCHIP_3528,
SOC_ROCKCHIP_3562,
SOC_ROCKCHIP_3566,
SOC_ROCKCHIP_3568,
SOC_ROCKCHIP_3588,
// GOOGLE
SOC_GOOGLE_TENSOR,
SOC_GOOGLE_TENSOR_G2,
SOC_GOOGLE_TENSOR_G3,
// NVIDIA,
SOC_TEGRA_X1,
// UNKNOWN
SOC_MODEL_UNKNOWN
}; };
inline static VENDOR get_soc_vendor_from_soc(SOC soc) { inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
if(soc >= SOC_BCM_2835 && soc <= SOC_BCM_2712) return SOC_VENDOR_BROADCOM; if(soc >= SOC_BCM_2835 && soc <= SOC_BCM_21654) return SOC_VENDOR_BROADCOM;
else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN; else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
else if(soc >= SOC_KUNPENG_920 && soc <= SOC_KUNPENG_930) return SOC_VENDOR_KUNPENG;
else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS; else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK; else if(soc >= SOC_MTK_MT6889 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8475) return SOC_VENDOR_SNAPDRAGON; else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8350) return SOC_VENDOR_SNAPDRAGON;
else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M3_MAX) return SOC_VENDOR_APPLE;
else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588) return SOC_VENDOR_ROCKCHIP;
else if(soc >= SOC_GOOGLE_TENSOR && soc <= SOC_GOOGLE_TENSOR_G3) return SOC_VENDOR_GOOGLE;
else if(soc >= SOC_TEGRA_X1 && soc <= SOC_TEGRA_X1) return SOC_VENDOR_NVIDIA;
return SOC_VENDOR_UNKNOWN; return SOC_VENDOR_UNKNOWN;
} }

View File

@@ -7,9 +7,12 @@
#include "uarch.h" #include "uarch.h"
#include "../common/global.h" #include "../common/global.h"
#define STRING_UNKNOWN "Unknown"
// Data not available // Data not available
#define NA -1 #define NA -1
typedef uint32_t MICROARCH;
typedef uint32_t ISA; typedef uint32_t ISA;
struct uarch { struct uarch {
@@ -21,26 +24,80 @@ struct uarch {
}; };
enum { enum {
ISA_ARMv6,
ISA_ARMv6_T2,
ISA_ARMv6_KZ,
ISA_ARMv6_K,
ISA_ARMv7_A, ISA_ARMv7_A,
ISA_ARMv8_A, ISA_ARMv8_A,
ISA_ARMv8_A_AArch32, ISA_ARMv8_A_AArch32,
ISA_ARMv8_1_A, ISA_ARMv8_1_A,
ISA_ARMv8_2_A, ISA_ARMv8_2_A,
ISA_ARMv8_3_A, ISA_ARMv8_3_A,
ISA_ARMv8_4_A, };
ISA_ARMv8_5_A,
ISA_ARMv9_A enum {
UARCH_UNKNOWN,
// ARM
UARCH_ARM7,
UARCH_ARM9,
UARCH_ARM11, // ARM 1136, ARM 1156, ARM 1176, or ARM 11MPCore.
UARCH_CORTEX_A5,
UARCH_CORTEX_A7,
UARCH_CORTEX_A8,
UARCH_CORTEX_A9,
UARCH_CORTEX_A12,
UARCH_CORTEX_A15,
UARCH_CORTEX_A17,
UARCH_CORTEX_A32,
UARCH_CORTEX_A35,
UARCH_CORTEX_A53,
UARCH_CORTEX_A55r0, // ARM Cortex-A55 revision 0 (restricted dual-issue capabilities compared to revision 1+).
UARCH_CORTEX_A55,
UARCH_CORTEX_A57,
UARCH_CORTEX_A65,
UARCH_CORTEX_A72,
UARCH_CORTEX_A73,
UARCH_CORTEX_A75,
UARCH_CORTEX_A76,
UARCH_CORTEX_A77,
UARCH_CORTEX_A78,
UARCH_NEOVERSE_N1,
UARCH_NEOVERSE_E1,
UARCH_SCORPION,
UARCH_KRAIT,
UARCH_KYRO,
UARCH_FALKOR,
UARCH_SAPHIRA,
UARCH_DENVER,
UARCH_DENVER2,
UARCH_CARMEL,
// SAMSUNG
UARCH_EXYNOS_M1, // Samsung Exynos M1 (Exynos 8890 big cores)
UARCH_EXYNOS_M2, // Samsung Exynos M2 (Exynos 8895 big cores)
UARCH_EXYNOS_M3, // Samsung Exynos M3 (Exynos 9810 big cores)
UARCH_EXYNOS_M4, // Samsung Exynos M4 (Exynos 9820 big cores)
UARCH_EXYNOS_M5, // Samsung Exynos M5 (Exynos 9830 big cores)
// APPLE
UARCH_SWIFT, // Apple A6 and A6X processors.
UARCH_CYCLONE, // Apple A7 processor.
UARCH_TYPHOON, // Apple A8 and A8X processor
UARCH_TWISTER, // Apple A9 and A9X processor.
UARCH_HURRICANE, // Apple A10 and A10X processor.
UARCH_MONSOON, // Apple A11 processor (big cores).
UARCH_MISTRAL, // Apple A11 processor (little cores).
UARCH_VORTEX, // Apple A12 processor (big cores).
UARCH_TEMPEST, // Apple A12 processor (big cores).
UARCH_LIGHTNING, // Apple A13 processor (big cores).
UARCH_THUNDER, // Apple A13 processor (little cores).
// CAVIUM
UARCH_THUNDERX, // Cavium ThunderX
UARCH_THUNDERX2, // Cavium ThunderX2 (originally Broadcom Vulkan).
// MARVELL
UARCH_PJ4,
UARCH_BRAHMA_B15,
UARCH_BRAHMA_B53,
UARCH_XGENE, // Applied Micro X-Gene.
UARCH_TAISHAN_V110 // HiSilicon TaiShan v110 (Huawei Kunpeng 920 series processors).
}; };
static const ISA isas_uarch[] = { static const ISA isas_uarch[] = {
[UARCH_ARM1136] = ISA_ARMv6,
[UARCH_ARM1156] = ISA_ARMv6_T2,
[UARCH_ARM1176] = ISA_ARMv6_KZ,
[UARCH_ARM11MPCORE] = ISA_ARMv6_K,
[UARCH_CORTEX_A5] = ISA_ARMv7_A, [UARCH_CORTEX_A5] = ISA_ARMv7_A,
[UARCH_CORTEX_A7] = ISA_ARMv7_A, [UARCH_CORTEX_A7] = ISA_ARMv7_A,
[UARCH_CORTEX_A8] = ISA_ARMv7_A, [UARCH_CORTEX_A8] = ISA_ARMv7_A,
@@ -61,21 +118,13 @@ static const ISA isas_uarch[] = {
[UARCH_CORTEX_A76] = ISA_ARMv8_2_A, [UARCH_CORTEX_A76] = ISA_ARMv8_2_A,
[UARCH_CORTEX_A77] = ISA_ARMv8_2_A, [UARCH_CORTEX_A77] = ISA_ARMv8_2_A,
[UARCH_CORTEX_A78] = ISA_ARMv8_2_A, [UARCH_CORTEX_A78] = ISA_ARMv8_2_A,
[UARCH_CORTEX_A510] = ISA_ARMv9_A,
[UARCH_CORTEX_A710] = ISA_ARMv9_A,
[UARCH_CORTEX_A715] = ISA_ARMv9_A,
[UARCH_CORTEX_X1] = ISA_ARMv8_2_A,
[UARCH_CORTEX_X2] = ISA_ARMv9_A,
[UARCH_CORTEX_X3] = ISA_ARMv9_A,
[UARCH_NEOVERSE_N1] = ISA_ARMv8_2_A, [UARCH_NEOVERSE_N1] = ISA_ARMv8_2_A,
[UARCH_NEOVERSE_E1] = ISA_ARMv8_2_A, [UARCH_NEOVERSE_E1] = ISA_ARMv8_2_A,
[UARCH_NEOVERSE_V1] = ISA_ARMv8_4_A,
[UARCH_BRAHMA_B15] = ISA_ARMv7_A, // Same as Cortex-A15 [UARCH_BRAHMA_B15] = ISA_ARMv7_A, // Same as Cortex-A15
[UARCH_BRAHMA_B53] = ISA_ARMv8_A, // Same as Cortex-A53 [UARCH_BRAHMA_B53] = ISA_ARMv8_A, // Same as Cortex-A53
[UARCH_THUNDERX] = ISA_ARMv8_A, [UARCH_THUNDERX] = ISA_ARMv8_A,
[UARCH_THUNDERX2] = ISA_ARMv8_1_A, [UARCH_THUNDERX2] = ISA_ARMv8_1_A,
[UARCH_TAISHAN_V110] = ISA_ARMv8_2_A, [UARCH_TAISHAN_V110] = ISA_ARMv8_2_A,
[UARCH_TAISHAN_V200] = ISA_ARMv8_2_A, // Not confirmed
[UARCH_DENVER] = ISA_ARMv8_A, [UARCH_DENVER] = ISA_ARMv8_A,
[UARCH_DENVER2] = ISA_ARMv8_A, [UARCH_DENVER2] = ISA_ARMv8_A,
[UARCH_CARMEL] = ISA_ARMv8_A, [UARCH_CARMEL] = ISA_ARMv8_A,
@@ -90,58 +139,44 @@ static const ISA isas_uarch[] = {
[UARCH_EXYNOS_M3] = ISA_ARMv8_A, [UARCH_EXYNOS_M3] = ISA_ARMv8_A,
[UARCH_EXYNOS_M4] = ISA_ARMv8_2_A, [UARCH_EXYNOS_M4] = ISA_ARMv8_2_A,
[UARCH_EXYNOS_M5] = ISA_ARMv8_2_A, [UARCH_EXYNOS_M5] = ISA_ARMv8_2_A,
[UARCH_ICESTORM] = ISA_ARMv8_5_A, // https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/AArch64TargetParser.def
[UARCH_FIRESTORM] = ISA_ARMv8_5_A,
[UARCH_BLIZZARD] = ISA_ARMv8_5_A, // Not confirmed
[UARCH_AVALANCHE] = ISA_ARMv8_5_A,
[UARCH_PJ4] = ISA_ARMv7_A, [UARCH_PJ4] = ISA_ARMv7_A,
[UARCH_XIAOMI] = ISA_ARMv8_A,
}; };
static char* isas_string[] = { static char* isas_string[] = {
[ISA_ARMv6] = "ARMv6",
[ISA_ARMv6_T2] = "ARMv6T2",
[ISA_ARMv6_KZ] = "ARMv6KZ",
[ISA_ARMv6_K] = "ARMv6K",
[ISA_ARMv7_A] = "ARMv7", [ISA_ARMv7_A] = "ARMv7",
[ISA_ARMv8_A] = "ARMv8", [ISA_ARMv8_A] = "ARMv8",
[ISA_ARMv8_A_AArch32] = "ARMv8 AArch32", [ISA_ARMv8_A_AArch32] = "ARMv8 AArch32",
[ISA_ARMv8_1_A] = "ARMv8.1", [ISA_ARMv8_1_A] = "ARMv8.1",
[ISA_ARMv8_2_A] = "ARMv8.2", [ISA_ARMv8_2_A] = "ARMv8.2",
[ISA_ARMv8_3_A] = "ARMv8.3", [ISA_ARMv8_3_A] = "ARMv8.3",
[ISA_ARMv8_4_A] = "ARMv8.4",
[ISA_ARMv8_5_A] = "ARMv8.5",
[ISA_ARMv9_A] = "ARMv9"
}; };
#define UARCH_START if (false) {} #define UARCH_START if (false) {}
#define CHECK_UARCH(arch, cpu, im_, p_, v_, r_, str, uarch, vendor) \ #define CHECK_UARCH(arch, cpu, im_, p_, v_, r_, str, uarch, vendor) \
else if (im_ == im && p_ == p && (v_ == NA || v_ == v) && (r_ == NA || r_ == r)) fill_uarch(arch, cpu, str, uarch, vendor); else if (im_ == im && p_ == p && (v_ == NA || v_ == v) && (r_ == NA || r_ == r)) fill_uarch(arch, cpu, str, uarch, vendor);
#define UARCH_END else { printBugCheckRelease("Unknown microarchitecture detected: IM=0x%X P=0x%X V=0x%X R=0x%X", im, p, v, r); \ #define UARCH_END else { printBug("Unknown microarchitecture detected: IM=0x%.8X P=0x%.8X V=0x%.8X R=0x%.8X", im, p, v, r); fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN); }
fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN); }
void fill_uarch(struct uarch* arch, struct cpuInfo* cpu, char* str, MICROARCH u, VENDOR vendor) { void fill_uarch(struct uarch* arch, struct cpuInfo* cpu, char* str, MICROARCH u, VENDOR vendor) {
arch->uarch = u; arch->uarch = u;
arch->isa = isas_uarch[arch->uarch]; arch->isa = isas_uarch[arch->uarch];
cpu->cpu_vendor = vendor; cpu->cpu_vendor = vendor;
arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1)); arch->uarch_str = malloc(sizeof(char) * (strlen(str)+1));
strcpy(arch->uarch_str, str); strcpy(arch->uarch_str, str);
arch->isa_str = emalloc(sizeof(char) * (strlen(isas_string[arch->isa])+1)); arch->isa_str = malloc(sizeof(char) * (strlen(isas_string[arch->isa])+1));
strcpy(arch->isa_str, isas_string[arch->isa]); strcpy(arch->isa_str, isas_string[arch->isa]);
} }
/* /*
* Codes are based on pytorch/cpuinfo, more precisely: * Codes are based on pytorch/cpuinfo, more precisely:
* - https://github.com/pytorch/cpuinfo/blob/main/src/arm/uarch.c * - https://github.com/pytorch/cpuinfo/blob/master/src/arm/uarch.c
* Other sources: * Other sources:
* - https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/asm/cputype.h * - https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/asm/cputype.h
* - https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/cputype.h * - https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/cputype.h
* - https://github.com/AsahiLinux/m1n1/blob/main/src/chickens.c
*/ */
struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) { struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
struct uarch* arch = emalloc(sizeof(struct uarch)); struct uarch* arch = malloc(sizeof(struct uarch));
uint32_t im = midr_get_implementer(midr); uint32_t im = midr_get_implementer(midr);
uint32_t p = midr_get_part(midr); uint32_t p = midr_get_part(midr);
uint32_t v = midr_get_variant(midr); uint32_t v = midr_get_variant(midr);
@@ -155,10 +190,6 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
// ----------------------------------------------------------------------- // // ----------------------------------------------------------------------- //
// IM P V R // // IM P V R //
UARCH_START UARCH_START
CHECK_UARCH(arch, cpu, 'A', 0xB36, NA, NA, "ARM1136", UARCH_ARM1136, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xB56, NA, NA, "ARM1156", UARCH_ARM1156, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xB76, NA, NA, "ARM1176", UARCH_ARM1176, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xB02, NA, NA, "ARM11 MPCore", UARCH_ARM11MPCORE, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xC05, NA, NA, "Cortex-A5", UARCH_CORTEX_A5, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xC05, NA, NA, "Cortex-A5", UARCH_CORTEX_A5, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xC07, NA, NA, "Cortex-A7", UARCH_CORTEX_A7, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xC07, NA, NA, "Cortex-A7", UARCH_CORTEX_A7, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xC08, NA, NA, "Cortex-A8", UARCH_CORTEX_A8, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xC08, NA, NA, "Cortex-A8", UARCH_CORTEX_A8, CPU_VENDOR_ARM)
@@ -181,15 +212,8 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
CHECK_UARCH(arch, cpu, 'A', 0xD0C, NA, NA, "Neoverse N1", UARCH_NEOVERSE_N1, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xD0C, NA, NA, "Neoverse N1", UARCH_NEOVERSE_N1, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD0D, NA, NA, "Cortex-A77", UARCH_CORTEX_A77, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xD0D, NA, NA, "Cortex-A77", UARCH_CORTEX_A77, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76", UARCH_CORTEX_A76, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76", UARCH_CORTEX_A76, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD40, NA, NA, "Neoverse V1", UARCH_NEOVERSE_V1, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78", UARCH_CORTEX_A78, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78", UARCH_CORTEX_A78, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1", UARCH_CORTEX_X1, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD46, NA, NA, "CortexA510", UARCH_CORTEX_A510, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD47, NA, NA, "CortexA710", UARCH_CORTEX_A710, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD48, NA, NA, "Cortex-X2", UARCH_CORTEX_X2, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1", UARCH_NEOVERSE_E1, CPU_VENDOR_ARM) CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1", UARCH_NEOVERSE_E1, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD4D, NA, NA, "Cortex-A715", UARCH_CORTEX_A715, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'A', 0xD4E, NA, NA, "Cortex-X3", UARCH_CORTEX_X3, CPU_VENDOR_ARM)
CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15", UARCH_BRAHMA_B15, CPU_VENDOR_BROADCOM) CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15", UARCH_BRAHMA_B15, CPU_VENDOR_BROADCOM)
CHECK_UARCH(arch, cpu, 'B', 0x100, NA, NA, "Brahma B53", UARCH_BRAHMA_B53, CPU_VENDOR_BROADCOM) CHECK_UARCH(arch, cpu, 'B', 0x100, NA, NA, "Brahma B53", UARCH_BRAHMA_B53, CPU_VENDOR_BROADCOM)
@@ -201,8 +225,7 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
CHECK_UARCH(arch, cpu, 'C', 0x0A3, NA, NA, "ThunderX 81XX", UARCH_THUNDERX, CPU_VENDOR_CAVIUM) CHECK_UARCH(arch, cpu, 'C', 0x0A3, NA, NA, "ThunderX 81XX", UARCH_THUNDERX, CPU_VENDOR_CAVIUM)
CHECK_UARCH(arch, cpu, 'C', 0x0AF, NA, NA, "ThunderX2 99XX", UARCH_THUNDERX2, CPU_VENDOR_CAVIUM) CHECK_UARCH(arch, cpu, 'C', 0x0AF, NA, NA, "ThunderX2 99XX", UARCH_THUNDERX2, CPU_VENDOR_CAVIUM)
CHECK_UARCH(arch, cpu, 'H', 0xD01, NA, NA, "TaiShan v110", UARCH_TAISHAN_V110, CPU_VENDOR_HUAWEI) // Kunpeng 920 series CHECK_UARCH(arch, cpu, 'H', 0xD01, NA, NA, "TaiShan v110", UARCH_TAISHAN_V110, CPU_VENDOR_HUAWUEI) // Kunpeng 920 series
CHECK_UARCH(arch, cpu, 'H', 0xD02, NA, NA, "TaiShan v200", UARCH_TAISHAN_V200, CPU_VENDOR_HUAWEI) // Kunpeng 930 series (found in openeuler: https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/XQCV7NX2UKRIUWUFKRF4PO3QENCOUFR3)
CHECK_UARCH(arch, cpu, 'H', 0xD40, NA, NA, "Cortex-A76", UARCH_CORTEX_A76, CPU_VENDOR_ARM) // Kirin 980 Big/Medium cores -> Cortex-A76 CHECK_UARCH(arch, cpu, 'H', 0xD40, NA, NA, "Cortex-A76", UARCH_CORTEX_A76, CPU_VENDOR_ARM) // Kirin 980 Big/Medium cores -> Cortex-A76
CHECK_UARCH(arch, cpu, 'N', 0x000, NA, NA, "Denver", UARCH_DENVER, CPU_VENDOR_NVIDIA) CHECK_UARCH(arch, cpu, 'N', 0x000, NA, NA, "Denver", UARCH_DENVER, CPU_VENDOR_NVIDIA)
@@ -240,16 +263,6 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
CHECK_UARCH(arch, cpu, 'S', 0x003, 1, NA, "Exynos M4", UARCH_EXYNOS_M4, CPU_VENDOR_SAMSUNG) // Exynos 9820 CHECK_UARCH(arch, cpu, 'S', 0x003, 1, NA, "Exynos M4", UARCH_EXYNOS_M4, CPU_VENDOR_SAMSUNG) // Exynos 9820
CHECK_UARCH(arch, cpu, 'S', 0x004, 1, NA, "Exynos M5", UARCH_EXYNOS_M5, CPU_VENDOR_SAMSUNG) // Exynos 9820 (this one looks wrong at uarch.c ...) CHECK_UARCH(arch, cpu, 'S', 0x004, 1, NA, "Exynos M5", UARCH_EXYNOS_M5, CPU_VENDOR_SAMSUNG) // Exynos 9820 (this one looks wrong at uarch.c ...)
CHECK_UARCH(arch, cpu, 'p', 0x663, 1, NA, "Xiaomi", UARCH_XIAOMI, CPU_VENDOR_PHYTIUM) // From a fellow contributor (https://github.com/Dr-Noob/cpufetch/issues/125)
// Also interesting: https://en.wikipedia.org/wiki/FeiTeng_(processor)
CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm", UARCH_ICESTORM, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm", UARCH_FIRESTORM, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'a', 0x030, NA, NA, "Blizzard", UARCH_BLIZZARD, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'a', 0x031, NA, NA, "Avalanche", UARCH_AVALANCHE, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'a', 0x048, NA, NA, "Sawtooth", UARCH_SAWTOOTH, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'a', 0x049, NA, NA, "Everest", UARCH_EVEREST, CPU_VENDOR_APPLE)
CHECK_UARCH(arch, cpu, 'V', 0x581, NA, NA, "PJ4", UARCH_PJ4, CPU_VENDOR_MARVELL) CHECK_UARCH(arch, cpu, 'V', 0x581, NA, NA, "PJ4", UARCH_PJ4, CPU_VENDOR_MARVELL)
CHECK_UARCH(arch, cpu, 'V', 0x584, NA, NA, "PJ4B-MP", UARCH_PJ4, CPU_VENDOR_MARVELL) CHECK_UARCH(arch, cpu, 'V', 0x584, NA, NA, "PJ4B-MP", UARCH_PJ4, CPU_VENDOR_MARVELL)
@@ -258,110 +271,12 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
return arch; return arch;
} }
bool is_ARMv8_or_newer(struct cpuInfo* cpu) {
return cpu->arch->isa == ISA_ARMv8_A ||
cpu->arch->isa == ISA_ARMv8_A_AArch32 ||
cpu->arch->isa == ISA_ARMv8_1_A ||
cpu->arch->isa == ISA_ARMv8_2_A ||
cpu->arch->isa == ISA_ARMv8_3_A ||
cpu->arch->isa == ISA_ARMv8_4_A ||
cpu->arch->isa == ISA_ARMv8_5_A ||
cpu->arch->isa == ISA_ARMv9_A;
}
bool has_fma_support(struct cpuInfo* cpu) {
// Arm A64 Instruction Set Architecture
// https://developer.arm.com/documentation/ddi0596/2021-12/SIMD-FP-Instructions
return is_ARMv8_or_newer(cpu);
}
int get_vpus_width(struct cpuInfo* cpu) {
// If the CPU has NEON, width can be 64 or 128 [1].
// In >= ARMv8, NEON are 128 bits width [2]
// If the CPU has SVE/SVE2, width can be between 128-2048 [3],
// so we must check the exact width depending on
// the exact chip (Neoverse V1 uses 256b implementations.)
//
// [1] https://en.wikipedia.org/wiki/ARM_architecture_family#Advanced_SIMD_(Neon)
// [2] https://developer.arm.com/documentation/102474/0100/Fundamentals-of-Armv8-Neon-technology
// [3] https://www.anandtech.com/show/16640/arm-announces-neoverse-v1-n2-platforms-cpus-cmn700-mesh/5
MICROARCH ua = cpu->arch->uarch;
switch(ua) {
case UARCH_NEOVERSE_V1:
return 256;
default:
if(cpu->feat->NEON) {
if(is_ARMv8_or_newer(cpu)) {
return 128;
}
else {
return 64;
}
}
else {
return 32;
}
}
}
int get_number_of_vpus(struct cpuInfo* cpu) {
MICROARCH ua = cpu->arch->uarch;
switch(ua) {
case UARCH_EVEREST: // Just a guess, needs confirmation.
case UARCH_FIRESTORM: // [https://dougallj.github.io/applecpu/firestorm-simd.html]
case UARCH_AVALANCHE: // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
case UARCH_CORTEX_X1: // [https://www.anandtech.com/show/15813/arm-cortex-a78-cortex-x1-cpu-ip-diverging/3]
case UARCH_CORTEX_X2: // [https://www.anandtech.com/show/16693/arm-announces-mobile-armv9-cpu-microarchitectures-cortexx2-cortexa710-cortexa510/2]
case UARCH_CORTEX_X3: // [https://www.hwcooling.net/en/cortex-x3-the-new-fastest-arm-core-architecture-analysis: "The FPU and SIMD unit of the core still has four pipelines"]
case UARCH_NEOVERSE_V1: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_v1]
return 4;
case UARCH_SAWTOOTH: // Needs confirmation, rn this is the best we know: https://mastodon.social/@dougall/111118317031041336
case UARCH_EXYNOS_M3: // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
case UARCH_EXYNOS_M4: // [https://en.wikichip.org/wiki/samsung/microarchitectures/m4#Block_Diagram]
case UARCH_EXYNOS_M5: // [https://en.wikichip.org/wiki/samsung/microarchitectures/m5]
return 3;
case UARCH_ICESTORM: // [https://dougallj.github.io/applecpu/icestorm-simd.html]
case UARCH_BLIZZARD: // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
case UARCH_TAISHAN_V110:// [https://www-file.huawei.com/-/media/corp2020/pdf/publications/huawei-research/2022/huawei-research-issue1-en.pdf]: "128-bit x 2 for single precision"
case UARCH_TAISHAN_V200:// Not confirmed, asssuming same as v110
case UARCH_CORTEX_A57: // [https://www.anandtech.com/show/8718/the-samsung-galaxy-note-4-exynos-review/5]
case UARCH_CORTEX_A72: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
case UARCH_CORTEX_A73: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
case UARCH_CORTEX_A75: // [https://www.anandtech.com/show/11441/dynamiq-and-arms-new-cpus-cortex-a75-a55/3]
case UARCH_CORTEX_A76: // [https://www.anandtech.com/show/12785/arm-cortex-a76-cpu-unveiled-7nm-powerhouse/3]
case UARCH_CORTEX_A77: // [https://fuse.wikichip.org/news/2339/arm-unveils-cortex-a77-emphasizes-single-thread-performance]
case UARCH_CORTEX_A78: // [https://fuse.wikichip.org/news/3536/arm-unveils-the-cortex-a78-when-less-is-more]
case UARCH_EXYNOS_M1: // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
case UARCH_EXYNOS_M2: // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
case UARCH_NEOVERSE_N1: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_n1#Individual_Core]
case UARCH_CORTEX_A710: // [https://chipsandcheese.com/2023/08/11/arms-cortex-a710-winning-by-default/]: Fig in Core Overview. Table in Instruction Scheduling and Execution
case UARCH_CORTEX_A715: // [https://www.hwcooling.net/en/arm-introduces-new-cortex-a715-core-architecture-analysis/]: "the numbers of ALU and FPU execution units themselves >
return 2;
case UARCH_NEOVERSE_E1: // [https://www.anandtech.com/show/13959/arm-announces-neoverse-n1-platform/5]
// A510 is integrated as part of a Complex. Normally, each complex would incorporate two Cortex-A510 cores.
// Each complex incorporates a single VPU with 2 ports, so for each A510 there is theoretically 1 port.
case UARCH_CORTEX_A510: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/cortex-a510#Vector_Processing_Unit_.28VPU.29]
return 1;
default:
// ARMv6
// ARMv7
// Remaining UARCH_CORTEX_AXX
// Old Snapdragon (e.g., Scorpion, Krait, etc)
return 1;
}
}
char* get_str_uarch(struct cpuInfo* cpu) { char* get_str_uarch(struct cpuInfo* cpu) {
return cpu->arch->uarch_str; return cpu->arch->uarch_str;
} }
MICROARCH get_uarch(struct uarch* arch) {
return arch->uarch;
}
void free_uarch_struct(struct uarch* arch) { void free_uarch_struct(struct uarch* arch) {
free(arch->uarch_str); free(arch->uarch_str);
free(arch); free(arch);
} }

View File

@@ -5,98 +5,8 @@
#include "midr.h" #include "midr.h"
enum {
UARCH_UNKNOWN,
// ARM
UARCH_ARM7,
UARCH_ARM9,
UARCH_ARM1136,
UARCH_ARM1156,
UARCH_ARM1176,
UARCH_ARM11MPCORE,
UARCH_CORTEX_A5,
UARCH_CORTEX_A7,
UARCH_CORTEX_A8,
UARCH_CORTEX_A9,
UARCH_CORTEX_A12,
UARCH_CORTEX_A15,
UARCH_CORTEX_A17,
UARCH_CORTEX_A32,
UARCH_CORTEX_A35,
UARCH_CORTEX_A53,
UARCH_CORTEX_A55r0, // ARM Cortex-A55 revision 0 (restricted dual-issue capabilities compared to revision 1+).
UARCH_CORTEX_A55,
UARCH_CORTEX_A57,
UARCH_CORTEX_A65,
UARCH_CORTEX_A72,
UARCH_CORTEX_A73,
UARCH_CORTEX_A75,
UARCH_CORTEX_A76,
UARCH_CORTEX_A77,
UARCH_CORTEX_A78,
UARCH_CORTEX_A510,
UARCH_CORTEX_A710,
UARCH_CORTEX_A715,
UARCH_CORTEX_X1,
UARCH_CORTEX_X2,
UARCH_CORTEX_X3,
UARCH_NEOVERSE_N1,
UARCH_NEOVERSE_E1,
UARCH_NEOVERSE_V1,
UARCH_SCORPION,
UARCH_KRAIT,
UARCH_KYRO,
UARCH_FALKOR,
UARCH_SAPHIRA,
UARCH_DENVER,
UARCH_DENVER2,
UARCH_CARMEL,
// SAMSUNG
UARCH_EXYNOS_M1, // Samsung Exynos M1 (Exynos 8890 big cores)
UARCH_EXYNOS_M2, // Samsung Exynos M2 (Exynos 8895 big cores)
UARCH_EXYNOS_M3, // Samsung Exynos M3 (Exynos 9810 big cores)
UARCH_EXYNOS_M4, // Samsung Exynos M4 (Exynos 9820 big cores)
UARCH_EXYNOS_M5, // Samsung Exynos M5 (Exynos 9830 big cores)
// APPLE
UARCH_SWIFT, // Apple A6 and A6X processors.
UARCH_CYCLONE, // Apple A7 processor.
UARCH_TYPHOON, // Apple A8 and A8X processor
UARCH_TWISTER, // Apple A9 and A9X processor.
UARCH_HURRICANE, // Apple A10 and A10X processor.
UARCH_MONSOON, // Apple A11 processor (big cores).
UARCH_MISTRAL, // Apple A11 processor (little cores).
UARCH_VORTEX, // Apple A12 processor (big cores).
UARCH_TEMPEST, // Apple A12 processor (big cores).
UARCH_LIGHTNING, // Apple A13 processor (big cores).
UARCH_THUNDER, // Apple A13 processor (little cores).
UARCH_ICESTORM, // Apple M1 processor (little cores).
UARCH_FIRESTORM, // Apple M1 processor (big cores).
UARCH_BLIZZARD, // Apple M2 processor (little cores).
UARCH_AVALANCHE, // Apple M2 processor (big cores).
UARCH_SAWTOOTH, // Apple M3 processor (little cores).
UARCH_EVEREST, // Apple M3 processor (big cores).
// CAVIUM
UARCH_THUNDERX, // Cavium ThunderX
UARCH_THUNDERX2, // Cavium ThunderX2 (originally Broadcom Vulkan).
// MARVELL
UARCH_PJ4,
UARCH_BRAHMA_B15,
UARCH_BRAHMA_B53,
UARCH_XGENE, // Applied Micro X-Gene.
UARCH_TAISHAN_V110, // HiSilicon TaiShan v110
UARCH_TAISHAN_V200, // HiSilicon TaiShan v200
// PHYTIUM
UARCH_XIAOMI, // Not to be confused with Xiaomi Inc
};
typedef uint32_t MICROARCH;
struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu); struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu);
int get_number_of_vpus(struct cpuInfo* cpu);
int get_vpus_width(struct cpuInfo* cpu);
bool has_fma_support(struct cpuInfo* cpu);
char* get_str_uarch(struct cpuInfo* cpu); char* get_str_uarch(struct cpuInfo* cpu);
void free_uarch_struct(struct uarch* arch); void free_uarch_struct(struct uarch* arch);
MICROARCH get_uarch(struct uarch* arch);
#endif #endif

View File

@@ -1,8 +1,9 @@
#include "../common/global.h"
#include "udev.h" #include "udev.h"
#include "midr.h" #include "midr.h"
#define _PATH_DEVICETREE_MODEL "/sys/firmware/devicetree/base/model" #define _PATH_CPUS_PRESENT _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
#define _PATH_CPUINFO "/proc/cpuinfo"
//#define _PATH_CPUINFO "cpuinfo_debug"
#define CPUINFO_CPU_IMPLEMENTER_STR "CPU implementer\t: " #define CPUINFO_CPU_IMPLEMENTER_STR "CPU implementer\t: "
#define CPUINFO_CPU_ARCHITECTURE_STR "CPU architecture: " #define CPUINFO_CPU_ARCHITECTURE_STR "CPU architecture: "
@@ -10,10 +11,42 @@
#define CPUINFO_CPU_PART_STR "CPU part\t: " #define CPUINFO_CPU_PART_STR "CPU part\t: "
#define CPUINFO_CPU_REVISION_STR "CPU revision\t: " #define CPUINFO_CPU_REVISION_STR "CPU revision\t: "
#define CPUINFO_HARDWARE_STR "Hardware\t: " #define CPUINFO_HARDWARE_STR "Hardware\t: "
#define CPUINFO_REVISION_STR "Revision\t: "
#define CPUINFO_CPU_STRING "processor" #define CPUINFO_CPU_STRING "processor"
// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
int get_ncores_from_cpuinfo() {
// Examples:
// 0-271
// 0-5
// 0-7
int filelen;
char* buf;
if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
perror("open");
return UNKNOWN;
}
int ncores = 0;
char* tmp1 = strstr(buf, "-") + 1;
char* tmp2 = strstr(buf, "\n");
char ncores_str[filelen];
memset(ncores_str, 0, sizeof(char) * filelen);
memcpy(ncores_str, tmp1, tmp2-tmp1);
char* end;
errno = 0;
ncores = strtol(ncores_str, &end, 10) + 1;
if(errno != 0) {
perror("strtol");
return UNKNOWN;
}
free(buf);
return ncores;
}
long parse_cpuinfo_field(char* buf, char* field_str, int field_base) { long parse_cpuinfo_field(char* buf, char* field_str, int field_base) {
char* tmp = strstr(buf, field_str); char* tmp = strstr(buf, field_str);
if(tmp == NULL) return -1; if(tmp == NULL) return -1;
@@ -23,7 +56,7 @@ long parse_cpuinfo_field(char* buf, char* field_str, int field_base) {
errno = 0; errno = 0;
long ret = strtol(tmp, &end, field_base); long ret = strtol(tmp, &end, field_base);
if(errno != 0) { if(errno != 0) {
printWarn("strtol: %s:\n", strerror(errno)); perror("strtol");
return -1; return -1;
} }
@@ -36,7 +69,7 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
char* buf; char* buf;
*success = true; *success = true;
if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) { if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
printWarn("read_file: %s: %s\n", _PATH_CPUINFO, strerror(errno)); perror("open");
*success = false; *success = false;
return 0; return 0;
} }
@@ -63,35 +96,35 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
long ret; long ret;
if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_IMPLEMENTER_STR, 16)) < 0) { if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_IMPLEMENTER_STR, 16)) < 0) {
printBug("get_midr_from_cpuinfo: Failed parsing cpu_implementer\n"); printf("Failed parsing cpu_implementer\n");
*success = false; *success = false;
return 0; return 0;
} }
cpu_implementer = (uint32_t) ret; cpu_implementer = (uint32_t) ret;
if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_ARCHITECTURE_STR, 10)) < 0) { if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_ARCHITECTURE_STR, 10)) < 0) {
printBug("get_midr_from_cpuinfo: Failed parsing cpu_architecture\n"); printf("Failed parsing cpu_architecture\n");
*success = false; *success = false;
return 0; return 0;
} }
cpu_architecture = (uint32_t) 0xF; // Why? cpu_architecture = (uint32_t) 0xF; // Why?
if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_VARIANT_STR, 16)) < 0) { if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_VARIANT_STR, 16)) < 0) {
printBug("get_midr_from_cpuinfo: Failed parsing cpu_variant\n"); printf("Failed parsing cpu_variant\n");
*success = false; *success = false;
return 0; return 0;
} }
cpu_variant = (uint32_t) ret; cpu_variant = (uint32_t) ret;
if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_PART_STR, 16)) < 0) { if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_PART_STR, 16)) < 0) {
printBug("get_midr_from_cpuinfo: Failed parsing cpu_part\n"); printf("Failed parsing cpu_part\n");
*success = false; *success = false;
return 0; return 0;
} }
cpu_part = (uint32_t) ret; cpu_part = (uint32_t) ret;
if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_REVISION_STR, 10)) < 0) { if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_REVISION_STR, 10)) < 0) {
printBug("get_midr_from_cpuinfo: Failed parsing cpu_revision\n"); printf("Failed parsing cpu_revision\n");
*success = false; *success = false;
return 0; return 0;
} }
@@ -106,24 +139,24 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
return midr; return midr;
} }
char* get_hardware_from_cpuinfo(void) { char* get_hardware_from_cpuinfo() {
return get_field_from_cpuinfo(CPUINFO_HARDWARE_STR);
}
char* get_revision_from_cpuinfo(void) {
return get_field_from_cpuinfo(CPUINFO_REVISION_STR);
}
bool is_raspberry_pi(void) {
int filelen; int filelen;
char* buf; char* buf;
if((buf = read_file(_PATH_DEVICETREE_MODEL, &filelen)) == NULL) { if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
return false; perror("open");
return NULL;
} }
char* tmp; char* tmp1 = strstr(buf, CPUINFO_HARDWARE_STR);
if((tmp = strstr(buf, "Raspberry Pi")) == NULL) { if(tmp1 == NULL) return NULL;
return false; tmp1 = tmp1 + strlen(CPUINFO_HARDWARE_STR);
} char* tmp2 = strstr(tmp1, "\n");
return true;
int strlen = (1 + (tmp2-tmp1));
char* hardware = malloc(sizeof(char) * strlen);
memset(hardware, 0, sizeof(char) * strlen);
strncpy(hardware, tmp1, tmp2-tmp1);
return hardware;
} }

View File

@@ -3,16 +3,10 @@
#include "../common/udev.h" #include "../common/udev.h"
#define _PATH_SUNXI_NVMEM "/sys/bus/nvmem/devices/sunxi-sid0/nvmem"
#define _PATH_RK_EFUSE0 "/sys/bus/nvmem/devices/rockchip-efuse0/nvmem"
#define _PATH_RK_OTP0 "/sys/bus/nvmem/devices/rockchip-otp0/nvmem"
#define UNKNOWN -1 #define UNKNOWN -1
int get_ncores_from_cpuinfo(void); int get_ncores_from_cpuinfo();
uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success); uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success);
char* get_hardware_from_cpuinfo(void); char* get_hardware_from_cpuinfo();
char* get_revision_from_cpuinfo(void);
bool is_raspberry_pi(void);
#endif #endif

View File

@@ -5,15 +5,9 @@
#include "args.h" #include "args.h"
#include "global.h" #include "global.h"
#define NUM_COLORS 5
#define COLOR_STR_INTEL "intel" #define COLOR_STR_INTEL "intel"
#define COLOR_STR_INTEL_NEW "intel-new"
#define COLOR_STR_AMD "amd" #define COLOR_STR_AMD "amd"
#define COLOR_STR_IBM "ibm"
#define COLOR_STR_ARM "arm" #define COLOR_STR_ARM "arm"
#define COLOR_STR_ROCKCHIP "rockchip"
#define COLOR_STR_SIFIVE "sifive"
static const char *SYTLES_STR_LIST[] = { static const char *SYTLES_STR_LIST[] = {
[STYLE_EMPTY] = NULL, [STYLE_EMPTY] = NULL,
@@ -23,124 +17,50 @@ static const char *SYTLES_STR_LIST[] = {
[STYLE_INVALID] = NULL [STYLE_INVALID] = NULL
}; };
enum {
ARG_CHAR_STYLE,
ARG_CHAR_COLOR,
ARG_CHAR_HELP,
ARG_CHAR_DEBUG,
ARG_CHAR_VERBOSE,
ARG_CHAR_VERSION
};
struct args_struct { struct args_struct {
bool debug_flag; bool debug_flag;
bool help_flag; bool help_flag;
bool raw_flag;
bool accurate_pp;
bool measure_max_frequency_flag;
bool full_cpu_name_flag;
bool logo_long;
bool logo_short;
bool logo_intel_new;
bool logo_intel_old;
bool verbose_flag; bool verbose_flag;
bool version_flag; bool version_flag;
STYLE style; STYLE style;
struct color** colors; struct colors* colors;
};
const char args_chr[] = {
/* [ARG_STYLE] = */ 's',
/* [ARG_COLOR] = */ 'c',
/* [ARG_HELP] = */ 'h',
/* [ARG_RAW] = */ 'r',
/* [ARG_FULLCPUNAME] = */ 'F',
/* [ARG_LOGO_LONG] = */ 1,
/* [ARG_LOGO_SHORT] = */ 2,
/* [ARG_LOGO_INTEL_NEW] = */ 3,
/* [ARG_LOGO_INTEL_OLD] = */ 4,
/* [ARG_ACCURATE_PP] = */ 5,
/* [ARG_MEASURE_MAX_FREQ] = */ 6,
/* [ARG_DEBUG] = */ 'd',
/* [ARG_VERBOSE] = */ 'v',
/* [ARG_VERSION] = */ 'V',
};
const char *args_str[] = {
/* [ARG_STYLE] = */ "style",
/* [ARG_COLOR] = */ "color",
/* [ARG_HELP] = */ "help",
/* [ARG_RAW] = */ "raw",
/* [ARG_FULLCPUNAME] = */ "full-cpu-name",
/* [ARG_LOGO_LONG] = */ "logo-long",
/* [ARG_LOGO_SHORT] = */ "logo-short",
/* [ARG_LOGO_INTEL_NEW] = */ "logo-intel-new",
/* [ARG_LOGO_INTEL_OLD] = */ "logo-intel-old",
/* [ARG_ACCURATE_PP] = */ "accurate-pp",
/* [ARG_MEASURE_MAX_FREQ] = */ "measure-max-freq",
/* [ARG_DEBUG] = */ "debug",
/* [ARG_VERBOSE] = */ "verbose",
/* [ARG_VERSION] = */ "version",
}; };
static struct args_struct args; static struct args_struct args;
STYLE get_style(void) { STYLE get_style() {
return args.style; return args.style;
} }
struct color** get_colors(void) { struct colors* get_colors() {
return args.colors; return args.colors;
} }
bool show_help(void) { bool show_help() {
return args.help_flag; return args.help_flag;
} }
bool show_version(void) { bool show_version() {
return args.version_flag; return args.version_flag;
} }
bool show_debug(void) { bool show_debug() {
return args.debug_flag; return args.debug_flag;
} }
bool show_raw(void) { bool verbose_enabled() {
return args.raw_flag;
}
bool accurate_pp(void) {
return args.accurate_pp;
}
bool measure_max_frequency_flag(void) {
return args.measure_max_frequency_flag;
}
bool show_full_cpu_name(void) {
return args.full_cpu_name_flag;
}
bool show_logo_long(void) {
return args.logo_long;
}
bool show_logo_short(void) {
return args.logo_short;
}
bool show_logo_intel_new(void) {
return args.logo_intel_new;
}
bool show_logo_intel_old(void) {
return args.logo_intel_old;
}
bool verbose_enabled(void) {
return args.verbose_flag; return args.verbose_flag;
} }
int max_arg_str_length(void) {
int max_len = -1;
int len = sizeof(args_str) / sizeof(args_str[0]);
for(int i=0; i < len; i++) {
max_len = max(max_len, (int) strlen(args_str[i]));
}
return max_len;
}
STYLE parse_style(char* style) { STYLE parse_style(char* style) {
uint8_t i = 0; uint8_t i = 0;
uint8_t styles_count = sizeof(SYTLES_STR_LIST) / sizeof(SYTLES_STR_LIST[0]); uint8_t styles_count = sizeof(SYTLES_STR_LIST) / sizeof(SYTLES_STR_LIST[0]);
@@ -154,67 +74,83 @@ STYLE parse_style(char* style) {
return i; return i;
} }
void free_colors_struct(struct color** cs) { void free_colors_struct(struct colors* cs) {
for(int i=0; i < NUM_COLORS; i++) { free(cs->c1);
free(cs[i]); free(cs->c2);
} free(cs->c3);
free(cs->c4);
free(cs); free(cs);
} }
bool parse_color(char* optarg_str, struct color*** cs) { bool parse_color(char* optarg_str, struct colors** cs) {
for(int i=0; i < NUM_COLORS; i++) { *cs = malloc(sizeof(struct colors));
(*cs)[i] = emalloc(sizeof(struct color)); (*cs)->c1 = malloc(sizeof(struct color));
} (*cs)->c2 = malloc(sizeof(struct color));
(*cs)->c3 = malloc(sizeof(struct color));
struct color** c = *cs; (*cs)->c4 = malloc(sizeof(struct color));
struct color** c1 = &((*cs)->c1);
struct color** c2 = &((*cs)->c2);
struct color** c3 = &((*cs)->c3);
struct color** c4 = &((*cs)->c4);
int32_t ret; int32_t ret;
char* str_to_parse = NULL; char* str_to_parse = NULL;
char* color_to_copy = NULL; bool free_ptr;
bool free_ptr = true;
if(strcmp(optarg_str, COLOR_STR_INTEL) == 0) color_to_copy = COLOR_DEFAULT_INTEL; if(strcmp(optarg_str, COLOR_STR_INTEL) == 0) {
else if(strcmp(optarg_str, COLOR_STR_INTEL_NEW) == 0) color_to_copy = COLOR_DEFAULT_INTEL_NEW; str_to_parse = malloc(sizeof(char) * 46);
else if(strcmp(optarg_str, COLOR_STR_AMD) == 0) color_to_copy = COLOR_DEFAULT_AMD; strcpy(str_to_parse, COLOR_DEFAULT_INTEL);
else if(strcmp(optarg_str, COLOR_STR_IBM) == 0) color_to_copy = COLOR_DEFAULT_IBM; free_ptr = true;
else if(strcmp(optarg_str, COLOR_STR_ARM) == 0) color_to_copy = COLOR_DEFAULT_ARM; }
else if(strcmp(optarg_str, COLOR_STR_ROCKCHIP) == 0) color_to_copy = COLOR_DEFAULT_ROCKCHIP; else if(strcmp(optarg_str, COLOR_STR_AMD) == 0) {
else if(strcmp(optarg_str, COLOR_STR_SIFIVE) == 0) color_to_copy = COLOR_DEFAULT_SIFIVE; str_to_parse = malloc(sizeof(char) * 44);
strcpy(str_to_parse, COLOR_DEFAULT_AMD);
free_ptr = true;
}
else if(strcmp(optarg_str, COLOR_STR_ARM) == 0) {
str_to_parse = malloc(sizeof(char) * 46);
strcpy(str_to_parse, COLOR_DEFAULT_ARM);
free_ptr = true;
}
else { else {
str_to_parse = optarg_str; str_to_parse = optarg_str;
free_ptr = false; free_ptr = false;
} }
if(str_to_parse == NULL) { ret = sscanf(str_to_parse, "%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d",
str_to_parse = emalloc(sizeof(char) * (strlen(color_to_copy) + 1)); &(*c1)->R, &(*c1)->G, &(*c1)->B,
strcpy(str_to_parse, color_to_copy); &(*c2)->R, &(*c2)->G, &(*c2)->B,
} &(*c3)->R, &(*c3)->G, &(*c3)->B,
&(*c4)->R, &(*c4)->G, &(*c4)->B);
ret = sscanf(str_to_parse, "%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d", if(ret != 12) {
&c[0]->R, &c[0]->G, &c[0]->B, printErr("Expected to read 12 values for color but read %d", ret);
&c[1]->R, &c[1]->G, &c[1]->B,
&c[2]->R, &c[2]->G, &c[2]->B,
&c[3]->R, &c[3]->G, &c[3]->B,
&c[4]->R, &c[4]->G, &c[4]->B);
int expected_colors = 3 * NUM_COLORS;
if(ret != expected_colors) {
printErr("Expected to read %d values for color but read %d", expected_colors, ret);
return false; return false;
} }
for(int i=0; i < NUM_COLORS; i++) { //TODO: Refactor c1->R c2->R ... to c[i]->R
if(c[i]->R < 0 || c[i]->R > 255) { if((*c1)->R < 0 || (*c1)->R > 255) {
printErr("Red in color %d is invalid: %d; must be in range (0, 255)", i+1, c[i]->R); printErr("Red in color 1 is invalid. Must be in range (0, 255)");
return false; return false;
} }
if(c[i]->G < 0 || c[i]->G > 255) { if((*c1)->G < 0 || (*c1)->G > 255) {
printErr("Green in color %d is invalid: %d; must be in range (0, 255)", i+1, c[i]->G); printErr("Green in color 1 is invalid. Must be in range (0, 255)");
return false; return false;
} }
if(c[i]->B < 0 || c[i]->B > 255) { if((*c1)->B < 0 || (*c1)->B > 255) {
printErr("Blue in color %d is invalid: %d; must be in range (0, 255)", i+1, c[i]->B); printErr("Blue in color 1 is invalid. Must be in range (0, 255)");
return false; return false;
} }
if((*c2)->R < 0 || (*c2)->R > 255) {
printErr("Red in color 2 is invalid. Must be in range (0, 255)");
return false;
}
if((*c2)->G < 0 || (*c2)->G > 255) {
printErr("Green in color 2 is invalid. Must be in range (0, 255)");
return false;
}
if((*c2)->B < 0 || (*c2)->B > 255) {
printErr("Blue in color 2 is invalid. Must be in range (0, 255)");
return false;
} }
if(free_ptr) free (str_to_parse); if(free_ptr) free (str_to_parse);
@@ -222,99 +158,43 @@ bool parse_color(char* optarg_str, struct color*** cs) {
return true; return true;
} }
char* build_short_options(void) {
const char *c = args_chr;
int len = sizeof(args_chr) / sizeof(args_chr[0]);
char* str = (char *) emalloc(sizeof(char) * (len*2 + 1));
memset(str, 0, sizeof(char) * (len*2 + 1));
#ifdef ARCH_X86
sprintf(str, "%c:%c:%c%c%c%c%c%c%c%c%c%c%c%c",
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
c[ARG_RAW], c[ARG_FULLCPUNAME],
c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
c[ARG_LOGO_INTEL_NEW], c[ARG_LOGO_INTEL_OLD],
c[ARG_ACCURATE_PP], c[ARG_MEASURE_MAX_FREQ],
c[ARG_DEBUG], c[ARG_VERBOSE],
c[ARG_VERSION]);
#elif ARCH_ARM
sprintf(str, "%c:%c:%c%c%c%c%c%c%c",
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
c[ARG_MEASURE_MAX_FREQ],
c[ARG_DEBUG], c[ARG_VERBOSE],
c[ARG_VERSION]);
#else
sprintf(str, "%c:%c:%c%c%c%c%c%c",
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
c[ARG_DEBUG], c[ARG_VERBOSE],
c[ARG_VERSION]);
#endif
return str;
}
bool parse_args(int argc, char* argv[]) { bool parse_args(int argc, char* argv[]) {
int opt; int c;
int option_index = 0; int option_index = 0;
opterr = 0; opterr = 0;
bool color_flag = false; bool color_flag = false;
args.debug_flag = false; args.debug_flag = false;
args.accurate_pp = false;
args.full_cpu_name_flag = false;
args.raw_flag = false;
args.verbose_flag = false; args.verbose_flag = false;
args.logo_long = false;
args.logo_short = false;
args.logo_intel_new = false;
args.logo_intel_old = false;
args.help_flag = false; args.help_flag = false;
args.style = STYLE_EMPTY; args.style = STYLE_EMPTY;
args.colors = NULL; args.colors = NULL;
// Temporary enable verbose level to allow printing warnings inside parse_args static struct option long_options[] = {
set_log_level(true); {"style", required_argument, 0, ARG_CHAR_STYLE },
{"color", required_argument, 0, ARG_CHAR_COLOR },
const struct option long_options[] = { {"help", no_argument, 0, ARG_CHAR_HELP },
{args_str[ARG_STYLE], required_argument, 0, args_chr[ARG_STYLE] }, {"debug", no_argument, 0, ARG_CHAR_DEBUG },
{args_str[ARG_COLOR], required_argument, 0, args_chr[ARG_COLOR] }, {"verbose", no_argument, 0, ARG_CHAR_VERBOSE },
{args_str[ARG_HELP], no_argument, 0, args_chr[ARG_HELP] }, {"version", no_argument, 0, ARG_CHAR_VERSION },
#ifdef ARCH_X86
{args_str[ARG_LOGO_INTEL_NEW], no_argument, 0, args_chr[ARG_LOGO_INTEL_NEW] },
{args_str[ARG_LOGO_INTEL_OLD], no_argument, 0, args_chr[ARG_LOGO_INTEL_OLD] },
{args_str[ARG_ACCURATE_PP], no_argument, 0, args_chr[ARG_ACCURATE_PP] },
{args_str[ARG_MEASURE_MAX_FREQ], no_argument, 0, args_chr[ARG_MEASURE_MAX_FREQ] },
{args_str[ARG_FULLCPUNAME], no_argument, 0, args_chr[ARG_FULLCPUNAME] },
{args_str[ARG_RAW], no_argument, 0, args_chr[ARG_RAW] },
#elif ARCH_ARM
{args_str[ARG_MEASURE_MAX_FREQ], no_argument, 0, args_chr[ARG_MEASURE_MAX_FREQ] },
#endif
{args_str[ARG_LOGO_SHORT], no_argument, 0, args_chr[ARG_LOGO_SHORT] },
{args_str[ARG_LOGO_LONG], no_argument, 0, args_chr[ARG_LOGO_LONG] },
{args_str[ARG_DEBUG], no_argument, 0, args_chr[ARG_DEBUG] },
{args_str[ARG_VERBOSE], no_argument, 0, args_chr[ARG_VERBOSE] },
{args_str[ARG_VERSION], no_argument, 0, args_chr[ARG_VERSION] },
{0, 0, 0, 0} {0, 0, 0, 0}
}; };
char* short_options = build_short_options(); c = getopt_long(argc, argv, "", long_options, &option_index);
opt = getopt_long(argc, argv, short_options, long_options, &option_index);
while (!args.help_flag && !args.debug_flag && !args.version_flag && opt != -1) { while (c != -1) {
if(opt == args_chr[ARG_COLOR]) { if(c == ARG_CHAR_COLOR) {
if(color_flag) { if(color_flag) {
printErr("Color option specified more than once"); printErr("Color option specified more than once");
return false; return false;
} }
color_flag = true; color_flag = true;
args.colors = emalloc(sizeof(struct color *) * NUM_COLORS);
if(!parse_color(optarg, &args.colors)) { if(!parse_color(optarg, &args.colors)) {
printErr("Color parsing failed");
return false; return false;
} }
} }
else if(opt == args_chr[ARG_STYLE]) { else if(c == ARG_CHAR_STYLE) {
if(args.style != STYLE_EMPTY) { if(args.style != STYLE_EMPTY) {
printErr("Style option specified more than once"); printErr("Style option specified more than once");
return false; return false;
@@ -325,77 +205,55 @@ bool parse_args(int argc, char* argv[]) {
return false; return false;
} }
} }
else if(opt == args_chr[ARG_HELP]) { else if(c == ARG_CHAR_HELP) {
if(args.help_flag) {
printErr("Help option specified more than once");
return false;
}
args.help_flag = true; args.help_flag = true;
} }
else if(opt == args_chr[ARG_ACCURATE_PP]) { else if(c == ARG_CHAR_VERBOSE) {
args.accurate_pp = true; if(args.verbose_flag) {
printErr("Verbose option specified more than once");
return false;
} }
else if(opt == args_chr[ARG_MEASURE_MAX_FREQ]) {
args.measure_max_frequency_flag = true;
}
else if(opt == args_chr[ARG_FULLCPUNAME]) {
args.full_cpu_name_flag = true;
}
else if(opt == args_chr[ARG_LOGO_SHORT]) {
args.logo_short = true;
}
else if(opt == args_chr[ARG_LOGO_LONG]) {
args.logo_long = true;
}
else if(opt == args_chr[ARG_LOGO_INTEL_NEW]) {
args.logo_intel_new = true;
}
else if(opt == args_chr[ARG_LOGO_INTEL_OLD]) {
args.logo_intel_old = true;
}
else if(opt == args_chr[ARG_RAW]) {
args.raw_flag = true;
}
else if(opt == args_chr[ARG_VERBOSE]) {
args.verbose_flag = true; args.verbose_flag = true;
} }
else if(opt == args_chr[ARG_DEBUG]) { else if(c == ARG_CHAR_DEBUG) {
if(args.debug_flag) {
printErr("Debug option specified more than once");
return false;
}
args.debug_flag = true; args.debug_flag = true;
} }
else if(opt == args_chr[ARG_VERSION]) { else if (c == ARG_CHAR_VERSION) {
if(args.version_flag) {
printErr("Version option specified more than once");
return false;
}
args.version_flag = true; args.version_flag = true;
} }
else { else if(c == '?') {
printWarn("Invalid options"); printWarn("Invalid options");
args.help_flag = true; args.help_flag = true;
break;
} }
else
printBug("Bug at line number %d in file %s", __LINE__, __FILE__);
option_index = 0; option_index = 0;
opt = getopt_long(argc, argv, short_options, long_options, &option_index); c = getopt_long(argc, argv,"",long_options, &option_index);
} }
if(optind < argc) { if (optind < argc) {
printWarn("Invalid options"); printWarn("Invalid options");
args.help_flag = true; args.help_flag = true;
} }
if(args.logo_intel_new && args.logo_intel_old) { if((args.help_flag + args.version_flag + color_flag) > 1) {
printWarn("%s and %s cannot be specified together", args_str[ARG_LOGO_INTEL_NEW], args_str[ARG_LOGO_INTEL_OLD]); printWarn("You should specify just one option");
args.logo_intel_new = false;
args.logo_intel_old = false;
}
if(args.logo_short && args.logo_long) {
printWarn("%s and %s cannot be specified together", args_str[ARG_LOGO_SHORT], args_str[ARG_LOGO_LONG]);
args.logo_short = false;
args.logo_long = false;
}
#if defined(ARCH_X86) && ! defined(__linux__)
if(args.accurate_pp) {
printWarn("%s option is valid only in Linux x86_64", args_str[ARG_ACCURATE_PP]);
args.help_flag = true; args.help_flag = true;
} }
#endif
// Leave log level untouched after returning
set_log_level(false);
return true; return true;
} }

View File

@@ -10,52 +10,31 @@ struct color {
int32_t B; int32_t B;
}; };
struct colors {
struct color* c1;
struct color* c2;
struct color* c3;
struct color* c4;
};
enum { enum {
STYLE_EMPTY, STYLE_EMPTY,
STYLE_FANCY, STYLE_FANCY,
STYLE_WILD,
STYLE_RETRO, STYLE_RETRO,
STYLE_LEGACY, STYLE_LEGACY,
STYLE_INVALID STYLE_INVALID
}; };
enum {
ARG_STYLE,
ARG_COLOR,
ARG_HELP,
ARG_RAW,
ARG_FULLCPUNAME,
ARG_LOGO_LONG,
ARG_LOGO_SHORT,
ARG_LOGO_INTEL_NEW,
ARG_LOGO_INTEL_OLD,
ARG_ACCURATE_PP,
ARG_MEASURE_MAX_FREQ,
ARG_DEBUG,
ARG_VERBOSE,
ARG_VERSION
};
extern const char args_chr[];
extern const char *args_str[];
#include "printer.h" #include "printer.h"
int max_arg_str_length(void);
bool parse_args(int argc, char* argv[]); bool parse_args(int argc, char* argv[]);
bool show_help(void); bool show_help();
bool accurate_pp(void); bool show_debug();
bool measure_max_frequency_flag(void); bool show_version();
bool show_full_cpu_name(void); bool verbose_enabled();
bool show_logo_long(void); void free_colors_struct(struct colors* cs);
bool show_logo_short(void); struct colors* get_colors();
bool show_logo_intel_new(void); STYLE get_style();
bool show_logo_intel_old(void);
bool show_raw(void);
bool show_debug(void);
bool show_version(void);
bool verbose_enabled(void);
void free_colors_struct(struct color** cs);
struct color** get_colors(void);
STYLE get_style(void);
#endif #endif

File diff suppressed because one or more lines are too long

19
src/common/ascii/amd.txt Normal file
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@@ -0,0 +1,19 @@
████ ███ ███ ████████ ▜███████████
██████ █████ █████ ███ ███ ▗▀▀▀▀▀▀▜███
███ ███ █████████████ ███ ██ ▐█ ▐███
███ ███ ███ ███ ███ ███ ██ ▟██ ▐███
████████████ ███ ███ ███ ███ ████▄▄▄▄▄▄▝▜██
███ ███ ███ ███ █████████ ████████▛ ██

3
src/common/ascii/convert.sh Executable file
View File

@@ -0,0 +1,3 @@
#!/bin/bash
cat intel.txt | hexdump -vC | head -n-1 | cut -d' ' -f2- | cut -d'|' -f1 | tr '\n' ' ' | tr -s ' ' | tr ' ' ',' | sed "s/,/,0x/g"

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@@ -0,0 +1,19 @@
▁▂▃▄▅▆▆▇▇███████▇▇▆▅▅▄▂▁
▁▃▄▆▇▛▀▀▀▀▔▔▔ ▔▔▔▀▀▀██▇▅▃
▂▄▆█▀▀▔ ▝▜██▅▁
▀▀▔ ▔▜██▖
▅▅▅ ▆▆▆ ▜██▖
▁▅ ▀▀▀ ▐██▌ ███ ██▉
▄▛▘ ▄▄▄ ▗▄▄▄▄▄▄▃▁ ▐██▙▄▖ ▁▃▄▅▄▃ ███ ███
▗▟▛ ███ ▐██▀▀▀▜██▖ ▐██▛▀▘ ▟██▀▀▀██▖ ███ ▗██▊
█▛ ███ ▐██ ▕██▌ ▐██▌ ▐██▂▂▂▂▂██ ███ ▗███▘
▐█▍ ███ ▐██ ▕██▌ ▐██▌ ▐██▛▀▀▀▀▀▀ ███ ▄██▛▘
██▏ ███ ▐██ ▕██▌ ▐██▌ ▝██▙▁ ▁▂▃ ███ ▅███▀
██▍ ▝██ ▐██ ▕██▌ ▀███▋ ▝▀█████▛ ▝▜█ █▀▔
▐█▙ ▔▔▔
▜█▙▖ ▁▂▄▖
▜██▆▃▁ ▁▂▄▅▇███▌
▝▜███▇▅▄▃▂▁ ▁▁▂▃▄▅▆▇███████▀▀
▔▀▀████████▇▇▇▇▇▇▇▇▇▇███████████▛▀▀▔▔
▔▔▀▀▀▀█████████████▀▀▀▀▀▔▔▔

150
src/common/cpu.c Normal file → Executable file
View File

@@ -9,15 +9,11 @@
#ifdef ARCH_X86 #ifdef ARCH_X86
#include "../x86/uarch.h" #include "../x86/uarch.h"
#include "../x86/apic.h"
#elif ARCH_PPC
#include "../ppc/uarch.h"
#elif ARCH_ARM #elif ARCH_ARM
#include "../arm/uarch.h" #include "../arm/uarch.h"
#elif ARCH_RISCV
#include "../riscv/uarch.h"
#endif #endif
#define STRING_UNKNOWN "Unknown"
#define STRING_YES "Yes" #define STRING_YES "Yes"
#define STRING_NO "No" #define STRING_NO "No"
#define STRING_NONE "None" #define STRING_NONE "None"
@@ -34,20 +30,13 @@ int64_t get_freq(struct frequency* freq) {
return freq->max; return freq->max;
} }
#if defined(ARCH_X86) || defined(ARCH_PPC) #ifdef ARCH_X86
char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname) { char* get_str_cpu_name(struct cpuInfo* cpu) {
#ifdef ARCH_X86
if(!fcpuname) {
return get_str_cpu_name_abbreviated(cpu);
}
#elif ARCH_PPC
UNUSED(fcpuname);
#endif
return cpu->cpu_name; return cpu->cpu_name;
} }
char* get_str_sockets(struct topology* topo) { char* get_str_sockets(struct topology* topo) {
char* string = emalloc(sizeof(char) * 2); char* string = malloc(sizeof(char) * 2);
int32_t sanity_ret = snprintf(string, 2, "%d", topo->sockets); int32_t sanity_ret = snprintf(string, 2, "%d", topo->sockets);
if(sanity_ret < 0) { if(sanity_ret < 0) {
printBug("get_str_sockets: snprintf returned a negative value for input: '%d'", topo->sockets); printBug("get_str_sockets: snprintf returned a negative value for input: '%d'", topo->sockets);
@@ -62,58 +51,71 @@ uint32_t get_nsockets(struct topology* topo) {
#endif #endif
int32_t get_value_as_smallest_unit(char ** str, uint32_t value) { int32_t get_value_as_smallest_unit(char ** str, uint32_t value) {
int32_t ret; int32_t sanity_ret;
int max_len = 10; // Max is 8 for digits, 2 for units *str = malloc(sizeof(char)* 11); //8 for digits, 2 for units
*str = emalloc(sizeof(char)* (max_len + 1));
if(value/1024 >= 1024) if(value/1024 >= 1024)
ret = snprintf(*str, max_len, "%.4g"STRING_MEGABYTES, (double)value/(1<<20)); sanity_ret = snprintf(*str, 10,"%.4g"STRING_MEGABYTES, (double)value/(1<<20));
else else
ret = snprintf(*str, max_len, "%.4g"STRING_KILOBYTES, (double)value/(1<<10)); sanity_ret = snprintf(*str, 10,"%.4g"STRING_KILOBYTES, (double)value/(1<<10));
return ret; return sanity_ret;
} }
// String functions // String functions
char* get_str_cache_two(int32_t cache_size, uint32_t physical_cores) { char* get_str_cache_two(int32_t cache_size, uint32_t physical_cores) {
// 4 for digits, 2 for units, 2 for ' (', 3 digits, 2 for units and 7 for ' Total)'
uint32_t max_size = 4+2 + 2 + 4+2 + 7 + 1;
int32_t sanity_ret;
char* string = malloc(sizeof(char) * max_size);
char* tmp1; char* tmp1;
char* tmp2; char* tmp2;
int32_t tmp1_len = get_value_as_smallest_unit(&tmp1, cache_size); int32_t tmp1_len = get_value_as_smallest_unit(&tmp1, cache_size);
int32_t tmp2_len = get_value_as_smallest_unit(&tmp2, cache_size * physical_cores); int32_t tmp2_len = get_value_as_smallest_unit(&tmp2, cache_size * physical_cores);
// tmp1_len for first output, 2 for ' (', tmp2_len for second output and 7 for ' Total)'
uint32_t size = tmp1_len + 2 + tmp2_len + 7 + 1;
char* string = emalloc(sizeof(char) * size);
if(tmp1_len < 0) { if(tmp1_len < 0) {
printBug("get_value_as_smallest_unit: snprintf failed for input: %d\n", cache_size); printBug("get_value_as_smallest_unit: snprintf returned a negative value for input: %d\n", cache_size);
return NULL; return NULL;
} }
if(tmp2_len < 0) { if(tmp2_len < 0) {
printBug("get_value_as_smallest_unit: snprintf failed for input: %d\n", cache_size * physical_cores); printBug("get_value_as_smallest_unit: snprintf returned a negative value for input: %d\n", cache_size * physical_cores);
return NULL; return NULL;
} }
if(snprintf(string, size, "%s (%s Total)", tmp1, tmp2) < 0) { uint32_t size = tmp1_len + 2 + tmp2_len + 7 + 1;
printBug("get_str_cache_two: snprintf failed for input: '%s' and '%s'\n", tmp1, tmp2); sanity_ret = snprintf(string, size, "%s (%s Total)", tmp1, tmp2);
if(sanity_ret < 0) {
printBug("get_str_cache_two: snprintf returned a negative value for input: '%s' and '%s'\n", tmp1, tmp2);
return NULL; return NULL;
} }
free(tmp1); free(tmp1);
free(tmp2); free(tmp2);
return string; return string;
} }
char* get_str_cache_one(int32_t cache_size) { char* get_str_cache_one(int32_t cache_size) {
char* string; // 4 for digits, 2 for units, 2 for ' (', 3 digits, 2 for units and 7 for ' Total)'
int32_t str_len = get_value_as_smallest_unit(&string, cache_size); uint32_t max_size = 4+2 + 1;
int32_t sanity_ret;
char* string = malloc(sizeof(char) * max_size);
char* tmp;
int32_t tmp_len = get_value_as_smallest_unit(&tmp, cache_size);
if(str_len < 0) { if(tmp_len < 0) {
printBug("get_value_as_smallest_unit: snprintf failed for input: %d", cache_size); printBug("get_value_as_smallest_unit: snprintf returned a negative value for input: %d", cache_size);
return NULL; return NULL;
} }
uint32_t size = tmp_len + 1;
sanity_ret = snprintf(string, size, "%s", tmp);
if(sanity_ret < 0) {
printBug("get_str_cache_one: snprintf returned a negative value for input: '%s'", tmp);
return NULL;
}
free(tmp);
return string; return string;
} }
@@ -145,87 +147,21 @@ char* get_str_l3(struct cache* cach) {
char* get_str_freq(struct frequency* freq) { char* get_str_freq(struct frequency* freq) {
//Max 3 digits and 3 for '(M/G)Hz' plus 1 for '\0' //Max 3 digits and 3 for '(M/G)Hz' plus 1 for '\0'
uint32_t size = (1+5+1+3+1); uint32_t size = (4+3+1);
assert(strlen(STRING_UNKNOWN)+1 <= size); assert(strlen(STRING_UNKNOWN)+1 <= size);
char* string = ecalloc(size, sizeof(char)); char* string = malloc(sizeof(char)*size);
memset(string, 0, sizeof(char)*size);
if(freq->max == UNKNOWN_DATA || freq->max < 0) { if(freq->max == UNKNOWN_FREQ || freq->max < 0)
snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN); snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN);
} else if(freq->max >= 1000)
else if(freq->max >= 1000) { snprintf(string,size,"%.2f"STRING_GIGAHERZ,(float)(freq->max)/1000);
if (freq->measured)
snprintf(string,size,"~%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000);
else else
snprintf(string,size,"%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000); snprintf(string,size,"%d"STRING_MEGAHERZ,freq->max);
}
else {
if (freq->measured)
snprintf(string,size,"~%d "STRING_MEGAHERZ,freq->max);
else
snprintf(string,size,"%d "STRING_MEGAHERZ,freq->max);
}
return string; return string;
} }
char* get_str_peak_performance(int64_t flops) {
char* str;
if(flops == -1) {
str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN) + 1));
strncpy(str, STRING_UNKNOWN, strlen(STRING_UNKNOWN) + 1);
return str;
}
// 7 for digits (e.g, XXXX.XX), 7 for XFLOP/s
double flopsd = (double) flops;
uint32_t max_size = 7+1+7+1;
str = ecalloc(max_size, sizeof(char));
if(flopsd >= (double)1000000000000.0)
snprintf(str, max_size, "%.2f TFLOP/s", flopsd/1000000000000);
else if(flopsd >= 1000000000.0)
snprintf(str, max_size, "%.2f GFLOP/s", flopsd/1000000000);
else
snprintf(str, max_size, "%.2f MFLOP/s", flopsd/1000000);
return str;
}
void init_topology_struct(struct topology* topo, struct cache* cach) {
topo->total_cores = 0;
topo->cach = cach;
#if defined(ARCH_X86) || defined(ARCH_PPC)
topo->physical_cores = 0;
topo->logical_cores = 0;
topo->smt_supported = 0;
topo->sockets = 0;
#ifdef ARCH_X86
topo->smt_available = 0;
topo->apic = ecalloc(1, sizeof(struct apic));
#endif
#endif
}
void init_cache_struct(struct cache* cach) {
cach->L1i = emalloc(sizeof(struct cach));
cach->L1d = emalloc(sizeof(struct cach));
cach->L2 = emalloc(sizeof(struct cach));
cach->L3 = emalloc(sizeof(struct cach));
cach->cach_arr = emalloc(sizeof(struct cach*) * 4);
cach->cach_arr[0] = cach->L1i;
cach->cach_arr[1] = cach->L1d;
cach->cach_arr[2] = cach->L2;
cach->cach_arr[3] = cach->L3;
cach->max_cache_level = 0;
cach->L1i->exists = false;
cach->L1d->exists = false;
cach->L2->exists = false;
cach->L3->exists = false;
}
void free_cache_struct(struct cache* cach) { void free_cache_struct(struct cache* cach) {
for(int i=0; i < 4; i++) free(cach->cach_arr[i]); for(int i=0; i < 4; i++) free(cach->cach_arr[i]);
free(cach->cach_arr); free(cach->cach_arr);

View File

@@ -8,23 +8,16 @@ enum {
// ARCH_X86 // ARCH_X86
CPU_VENDOR_INTEL, CPU_VENDOR_INTEL,
CPU_VENDOR_AMD, CPU_VENDOR_AMD,
CPU_VENDOR_HYGON,
// ARCH_ARM // ARCH_ARM
CPU_VENDOR_ARM, CPU_VENDOR_ARM,
CPU_VENDOR_APPLE,
CPU_VENDOR_BROADCOM, CPU_VENDOR_BROADCOM,
CPU_VENDOR_CAVIUM, CPU_VENDOR_CAVIUM,
CPU_VENDOR_NVIDIA, CPU_VENDOR_NVIDIA,
CPU_VENDOR_APM, CPU_VENDOR_APM,
CPU_VENDOR_QUALCOMM, CPU_VENDOR_QUALCOMM,
CPU_VENDOR_HUAWEI, CPU_VENDOR_HUAWUEI,
CPU_VENDOR_SAMSUNG, CPU_VENDOR_SAMSUNG,
CPU_VENDOR_MARVELL, CPU_VENDOR_MARVELL,
CPU_VENDOR_PHYTIUM,
// ARCH_RISCV
CPU_VENDOR_RISCV,
CPU_VENDOR_SIFIVE,
CPU_VENDOR_THEAD,
// OTHERS // OTHERS
CPU_VENDOR_UNKNOWN, CPU_VENDOR_UNKNOWN,
CPU_VENDOR_INVALID CPU_VENDOR_INVALID
@@ -33,24 +26,14 @@ enum {
enum { enum {
HV_VENDOR_KVM, HV_VENDOR_KVM,
HV_VENDOR_QEMU, HV_VENDOR_QEMU,
HV_VENDOR_VBOX,
HV_VENDOR_HYPERV, HV_VENDOR_HYPERV,
HV_VENDOR_VMWARE, HV_VENDOR_VMWARE,
HV_VENDOR_XEN, HV_VENDOR_XEN,
HV_VENDOR_PARALLELS, HV_VENDOR_PARALLELS,
HV_VENDOR_PHYP,
HV_VENDOR_BHYVE,
HV_VENDOR_APPLEVZ,
HV_VENDOR_INVALID HV_VENDOR_INVALID
}; };
enum { #define UNKNOWN_FREQ -1
CORE_TYPE_EFFICIENCY,
CORE_TYPE_PERFORMANCE,
CORE_TYPE_UNKNOWN
};
#define UNKNOWN_DATA -1
#define CPU_NAME_MAX_LENGTH 64 #define CPU_NAME_MAX_LENGTH 64
typedef int32_t VENDOR; typedef int32_t VENDOR;
@@ -58,8 +41,6 @@ typedef int32_t VENDOR;
struct frequency { struct frequency {
int32_t base; int32_t base;
int32_t max; int32_t max;
// Indicates if max frequency was measured
bool measured;
}; };
struct hypervisor { struct hypervisor {
@@ -88,17 +69,14 @@ struct cache {
struct topology { struct topology {
int32_t total_cores; int32_t total_cores;
struct cache* cach; struct cache* cach;
#if defined(ARCH_X86) || defined(ARCH_PPC)
int32_t physical_cores;
int32_t logical_cores;
uint32_t sockets;
uint32_t smt_supported; // Number of SMT that CPU supports (equal to smt_available if SMT is enabled)
#ifdef ARCH_X86 #ifdef ARCH_X86
uint32_t physical_cores;
uint32_t logical_cores;
uint32_t smt_available; // Number of SMT that is currently enabled uint32_t smt_available; // Number of SMT that is currently enabled
int32_t total_cores_module; // Total cores in the current module (only makes sense in hybrid archs, like ADL) uint32_t smt_supported; // Number of SMT that CPU supports (equal to smt_available if SMT is enabled)
uint32_t sockets;
struct apic* apic; struct apic* apic;
#endif #endif
#endif
}; };
struct features { struct features {
@@ -117,8 +95,6 @@ struct features {
bool FMA3; bool FMA3;
bool FMA4; bool FMA4;
bool SHA; bool SHA;
#elif ARCH_PPC
bool altivec;
#elif ARCH_ARM #elif ARCH_ARM
bool NEON; bool NEON;
bool SHA1; bool SHA1;
@@ -127,11 +103,6 @@ struct features {
#endif #endif
}; };
struct extensions {
char* str;
uint64_t mask;
};
struct cpuInfo { struct cpuInfo {
VENDOR cpu_vendor; VENDOR cpu_vendor;
struct uarch* arch; struct uarch* arch;
@@ -139,58 +110,32 @@ struct cpuInfo {
struct frequency* freq; struct frequency* freq;
struct cache* cach; struct cache* cach;
struct topology* topo; struct topology* topo;
int64_t peak_performance;
// Similar but not exactly equal
// to struct features
#ifdef ARCH_RISCV
struct extensions* ext;
#else
struct features* feat; struct features* feat;
#endif
#if defined(ARCH_X86) || defined(ARCH_PPC)
// CPU name from model
char* cpu_name;
#endif
#ifdef ARCH_X86 #ifdef ARCH_X86
// CPU name from model
char* cpu_name;
// Max cpuids levels // Max cpuids levels
uint32_t maxLevels; uint32_t maxLevels;
// Max cpuids extended levels // Max cpuids extended levels
uint32_t maxExtendedLevels; uint32_t maxExtendedLevels;
// Topology Extensions (AMD only)
bool topology_extensions;
// Hybrid Flag (Intel only)
bool hybrid_flag;
// Core Type (P/E)
uint32_t core_type;
#elif ARCH_PPC
uint32_t pvr;
#elif ARCH_ARM #elif ARCH_ARM
// Main ID register // Main ID register
uint32_t midr; uint32_t midr;
#endif #endif
#if defined(ARCH_ARM) || defined(ARCH_RISCV) #ifdef ARCH_ARM
struct system_on_chip* soc; struct system_on_chip* soc;
#endif
#if defined(ARCH_X86) || defined(ARCH_ARM)
// If SoC contains more than one CPU and they // If SoC contains more than one CPU and they
// are different, the others will be stored in // are different, the others will be stored in
// the next_cpu field // the next_cpu field
struct cpuInfo* next_cpu; struct cpuInfo* next_cpu;
uint8_t num_cpus; uint8_t num_cpus;
#ifdef ARCH_X86
// The index of the first core in the module
uint32_t first_core_id;
#endif
#endif #endif
}; };
#if defined(ARCH_X86) || defined(ARCH_PPC) #ifdef ARCH_X86
char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname); char* get_str_cpu_name(struct cpuInfo* cpu);
char* get_str_sockets(struct topology* topo); char* get_str_sockets(struct topology* topo);
uint32_t get_nsockets(struct topology* topo); uint32_t get_nsockets(struct topology* topo);
#endif #endif
@@ -205,10 +150,6 @@ char* get_str_l1d(struct cache* cach);
char* get_str_l2(struct cache* cach); char* get_str_l2(struct cache* cach);
char* get_str_l3(struct cache* cach); char* get_str_l3(struct cache* cach);
char* get_str_freq(struct frequency* freq); char* get_str_freq(struct frequency* freq);
char* get_str_peak_performance(int64_t flops);
void init_topology_struct(struct topology* topo, struct cache* cach);
void init_cache_struct(struct cache* cach);
void free_cache_struct(struct cache* cach); void free_cache_struct(struct cache* cach);
void free_freq_struct(struct frequency* freq); void free_freq_struct(struct frequency* freq);

View File

@@ -1,195 +0,0 @@
#ifdef __linux__
#define _GNU_SOURCE
#include <time.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <errno.h>
#include <unistd.h>
#include <asm/unistd.h>
#include <sys/ioctl.h>
#include <linux/perf_event.h>
#include "global.h"
#include "cpu.h"
static long
perf_event_open(struct perf_event_attr *hw_event, pid_t pid,
int cpu, int group_fd, unsigned long flags) {
int ret;
ret = syscall(__NR_perf_event_open, hw_event, pid, cpu,
group_fd, flags);
return ret;
}
#define INSERT_ASM_ONCE __asm volatile("nop");
#define INSERT_ASM_10_TIMES \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
INSERT_ASM_ONCE \
#define INSERT_ASM_100_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES \
INSERT_ASM_10_TIMES
#define INSERT_ASM_1000_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
INSERT_ASM_100_TIMES \
void nop_function(uint64_t iters) {
for (uint64_t i = 0; i < iters; i++) {
INSERT_ASM_1000_TIMES
INSERT_ASM_1000_TIMES
INSERT_ASM_1000_TIMES
INSERT_ASM_1000_TIMES
}
}
// Run the nop_function with the number of iterations specified and
// measure both the time and number of cycles
int measure_freq_iters(uint64_t iters, uint32_t core, double* freq) {
clockid_t clock = CLOCK_PROCESS_CPUTIME_ID;
struct timespec start, end;
struct perf_event_attr pe;
uint64_t cycles;
int fd;
int pid = 0;
memset(&pe, 0, sizeof(struct perf_event_attr));
pe.type = PERF_TYPE_HARDWARE;
pe.size = sizeof(struct perf_event_attr);
pe.config = PERF_COUNT_HW_CPU_CYCLES;
pe.disabled = 1;
pe.exclude_kernel = 1;
pe.exclude_hv = 1;
fd = perf_event_open(&pe, pid, core, -1, 0);
if (fd == -1) {
perror("perf_event_open");
if (errno == EPERM || errno == EACCES) {
printErr("You may not have permission to collect stats.\n"\
"Consider tweaking /proc/sys/kernel/perf_event_paranoid or running as root");
}
return -1;
}
if (clock_gettime(clock, &start) == -1) {
perror("clock_gettime");
return -1;
}
if(ioctl(fd, PERF_EVENT_IOC_RESET, 0) == -1) {
perror("ioctl");
return -1;
}
if(ioctl(fd, PERF_EVENT_IOC_ENABLE, 0) == -1) {
perror("ioctl");
return -1;
}
nop_function(iters);
ssize_t ret = read(fd, &cycles, sizeof(uint64_t));
if (ret == -1) {
perror("read");
return -1;
}
if (ret != sizeof(uint64_t)) {
printErr("Read returned %d, expected %d", ret, sizeof(uint64_t));
return -1;
}
if(ioctl(fd, PERF_EVENT_IOC_DISABLE, 0) == -1) {
perror("ioctl");
return -1;
}
if (clock_gettime(clock, &end) == -1) {
perror("clock_gettime");
return -1;
}
uint64_t nsecs = (end.tv_sec*1e9 + end.tv_nsec) - (start.tv_sec*1e9 + start.tv_nsec);
uint64_t usecs = nsecs/1000;
*freq = cycles/((double)usecs);
return 0;
}
// Return a good number of iterations to run the nop_function in
// order to get a precise measurement of the frequency without taking
// too much time.
uint64_t get_num_iters_from_freq(double frequency) {
// Truncate to reduce variability
uint64_t freq_trunc = ((uint64_t) frequency / 100) * 100;
uint64_t osp_per_iter = 4 * 1000;
return freq_trunc * 1e7 * 1/osp_per_iter;
}
// Differences between x86 measure_frequency and this measure_max_frequency:
// - measure_frequency employs all cores simultaneously whereas
// measure_max_frequency only employs 1.
// - measure_frequency runs the computation and checks /proc/cpuinfo whereas
// measure_max_frequency does not rely on /proc/cpuinfo and simply
// counts cpu cycles to measure frequency.
// - measure_frequency uses actual computation while measuring the frequency
// whereas measure_max_frequency uses nop instructions. This makes the former
// x86 dependant whereas the latter is architecture independant.
int64_t measure_max_frequency(uint32_t core) {
if (!bind_to_cpu(core)) {
printErr("Failed binding the process to CPU %d", core);
return UNKNOWN_DATA;
}
// First, get very rough estimation of clock cycle to
// compute a reasonable value for the iterations
double estimation_freq, frequency;
uint64_t iters = 100000;
if (measure_freq_iters(iters, core, &estimation_freq) == -1)
return UNKNOWN_DATA;
if (estimation_freq <= 0.0) {
printErr("First frequency measurement yielded an invalid value: %f", estimation_freq);
return UNKNOWN_DATA;
}
iters = get_num_iters_from_freq(estimation_freq);
printWarn("Running frequency measurement with %ld iterations on core %d...", iters, core);
// Now perform actual measurement
const char* frequency_banner = "cpufetch is measuring the max frequency...";
printf("%s", frequency_banner);
fflush(stdout);
if (measure_freq_iters(iters, core, &frequency) == -1)
return UNKNOWN_DATA;
// Clean screen once measurement is finished
printf("\r%*c\r", (int) strlen(frequency_banner), ' ');
// Discard last digit in the frequency, which should help providing
// more reliable and predictable values.
return (((int) frequency + 5)/10) * 10;
}
#endif // #ifdef __linux__

View File

@@ -1,6 +0,0 @@
#ifndef __COMMON_FREQ__
#define __COMMON_FREQ__
int64_t measure_max_frequency(uint32_t core);
#endif

View File

@@ -1,20 +1,5 @@
#ifdef _WIN32
#define NOMINMAX
#include <windows.h>
#elif defined __linux__
#define _GNU_SOURCE
#include <sched.h>
#elif defined __FreeBSD__
#include <sys/param.h>
#include <sys/cpuset.h>
#endif
#include <stdarg.h> #include <stdarg.h>
#include <stdio.h> #include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include "global.h" #include "global.h"
#ifdef _WIN32 #ifdef _WIN32
@@ -31,40 +16,6 @@
#endif #endif
#ifdef ARCH_X86
static const char* ARCH_STR = "x86 / x86_64 build";
#include "../x86/cpuid.h"
#elif ARCH_PPC
static const char* ARCH_STR = "PowerPC build";
#include "../ppc/ppc.h"
#elif ARCH_ARM
static const char* ARCH_STR = "ARM build";
#include "../arm/midr.h"
#elif ARCH_RISCV
static const char* ARCH_STR = "RISC-V build";
#include "../riscv/riscv.h"
#endif
#ifdef __linux__
#ifdef __ANDROID__
static const char* OS_STR = "Android";
#else
static const char* OS_STR = "Linux";
#endif
#elif __FreeBSD__
static const char* OS_STR = "FreeBSD";
#elif _WIN32
static const char* OS_STR = "Windows";
#elif defined __APPLE__ || __MACH__
static const char* OS_STR = "macOS";
#else
static const char* OS_STR = "Unknown OS";
#endif
#ifndef GIT_FULL_VERSION
static const char* VERSION = "1.05";
#endif
enum { enum {
LOG_LEVEL_NORMAL, LOG_LEVEL_NORMAL,
LOG_LEVEL_VERBOSE LOG_LEVEL_VERBOSE
@@ -72,14 +23,6 @@ enum {
int LOG_LEVEL; int LOG_LEVEL;
void printBugMessage(FILE *restrict stream) {
#if defined(ARCH_X86) || defined(ARCH_PPC)
fprintf(stream, "Please, create a new issue with this error message, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
#elif ARCH_ARM
fprintf(stream, "Please, create a new issue with this error message, your smartphone/computer model, the output of 'cpufetch --verbose' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
#endif
}
void printWarn(const char *fmt, ...) { void printWarn(const char *fmt, ...) {
if(LOG_LEVEL == LOG_LEVEL_VERBOSE) { if(LOG_LEVEL == LOG_LEVEL_VERBOSE) {
int buffer_size = 4096; int buffer_size = 4096;
@@ -100,8 +43,6 @@ void printErr(const char *fmt, ...) {
vsnprintf(buffer,buffer_size, fmt, args); vsnprintf(buffer,buffer_size, fmt, args);
va_end(args); va_end(args);
fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer); fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
fprintf(stderr,"[VERSION]: ");
print_version(stderr);
} }
void printBug(const char *fmt, ...) { void printBug(const char *fmt, ...) {
@@ -112,42 +53,10 @@ void printBug(const char *fmt, ...) {
vsnprintf(buffer,buffer_size, fmt, args); vsnprintf(buffer,buffer_size, fmt, args);
va_end(args); va_end(args);
fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer); fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
fprintf(stderr,"[VERSION]: "); #ifdef ARCH_X86
print_version(stderr); fprintf(stderr,"Please, create a new issue with this error message and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
printBugMessage(stderr); #elif ARCH_ARM
} fprintf(stderr,"Please, create a new issue with this error message, your smartphone/computer model and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
bool isReleaseVersion(char *git_full_version) {
return strstr(git_full_version, "-") == NULL;
}
/// The unknown uarch errors are by far the most common error a user will encounter.
/// Rather than using the generic printBug function, which asks the user to report
/// the problem on the issues webpage, this function will check if the program is
/// the release version. In such case, support for this feature is most likely already
/// in the last version, so just tell the user to compile that one and not report this
/// in github.
void printBugCheckRelease(const char *fmt, ...) {
int buffer_size = 4096;
char buffer[buffer_size];
va_list args;
va_start(args, fmt);
vsnprintf(buffer,buffer_size, fmt, args);
va_end(args);
fprintf(stderr, RED "[ERROR]: "RESET "%s\n", buffer);
fprintf(stderr, "[VERSION]: ");
print_version(stderr);
#ifdef GIT_FULL_VERSION
if (isReleaseVersion(GIT_FULL_VERSION)) {
fprintf(stderr, RED "[ERROR]: "RESET "You are using an outdated version of cpufetch. Please compile cpufetch from source (see https://github.com/Dr-Noob/cpufetch?tab=readme-ov-file#22-building-from-source)");
}
else {
printBugMessage(stderr);
}
#else
printBugMessage(stderr);
#endif #endif
} }
@@ -155,93 +64,3 @@ void set_log_level(bool verbose) {
if(verbose) LOG_LEVEL = LOG_LEVEL_VERBOSE; if(verbose) LOG_LEVEL = LOG_LEVEL_VERBOSE;
else LOG_LEVEL = LOG_LEVEL_NORMAL; else LOG_LEVEL = LOG_LEVEL_NORMAL;
} }
int max(int a, int b) {
return a > b ? a : b;
}
int min(int a, int b) {
return a < b ? a : b;
}
char *strremove(char *str, const char *sub) {
char *p, *q, *r;
if (*sub && (q = r = strstr(str, sub)) != NULL) {
size_t len = strlen(sub);
while ((r = strstr(p = r + len, sub)) != NULL) {
memmove(q, p, r - p);
q += r - p;
}
memmove(q, p, strlen(p) + 1);
}
return str;
}
void* emalloc(size_t size) {
void* ptr = malloc(size);
if(ptr == NULL) {
printErr("malloc failed: %s", strerror(errno));
exit(1);
}
return ptr;
}
void* ecalloc(size_t nmemb, size_t size) {
void* ptr = calloc(nmemb, size);
if(ptr == NULL) {
printErr("calloc failed: %s", strerror(errno));
exit(1);
}
return ptr;
}
void* erealloc(void *ptr, size_t size) {
void* newptr = realloc(ptr, size);
if(newptr == NULL) {
printErr("realloc failed: %s", strerror(errno));
exit(1);
}
return newptr;
}
#ifndef __APPLE__
bool bind_to_cpu(int cpu_id) {
#ifdef _WIN32
HANDLE process = GetCurrentProcess();
DWORD_PTR processAffinityMask = 1 << cpu_id;
return SetProcessAffinityMask(process, processAffinityMask);
#elif defined __linux__
cpu_set_t currentCPU;
CPU_ZERO(&currentCPU);
CPU_SET(cpu_id, &currentCPU);
if (sched_setaffinity (0, sizeof(currentCPU), &currentCPU) == -1) {
printWarn("sched_setaffinity: %s", strerror(errno));
return false;
}
return true;
#elif defined __FreeBSD__
cpuset_t currentCPU;
CPU_ZERO(&currentCPU);
CPU_SET(cpu_id, &currentCPU);
if(cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset_t), &currentCPU) == -1) {
printWarn("cpuset_setaffinity: %s", strerror(errno));
return false;
}
return true;
#endif
}
#endif
void print_version(FILE *restrict stream) {
#ifdef GIT_FULL_VERSION
fprintf(stream, "cpufetch %s (%s %s)\n", GIT_FULL_VERSION, OS_STR, ARCH_STR);
#else
fprintf(stream, "cpufetch v%s (%s %s)\n", VERSION, OS_STR, ARCH_STR);
#endif
}

View File

@@ -1,27 +1,11 @@
#ifndef __GLOBAL__ #ifndef __GLOBAL__
#define __GLOBAL__ #define __GLOBAL__
#include <stdio.h>
#include <stdbool.h> #include <stdbool.h>
#include <stddef.h>
#define STRING_UNKNOWN "Unknown"
#define UNUSED(x) (void)(x)
void set_log_level(bool verbose); void set_log_level(bool verbose);
void printWarn(const char *fmt, ...); void printWarn(const char *fmt, ...);
void printErr(const char *fmt, ...); void printErr(const char *fmt, ...);
void printBug(const char *fmt, ...); void printBug(const char *fmt, ...);
void printBugCheckRelease(const char *fmt, ...);
int min(int a, int b);
int max(int a, int b);
char *strremove(char *str, const char *sub);
void* emalloc(size_t size);
void* ecalloc(size_t nmemb, size_t size);
void* erealloc(void *ptr, size_t size);
#ifndef __APPLE__
bool bind_to_cpu(int cpu_id);
#endif
void print_version(FILE *restrict stream);
#endif #endif

View File

@@ -1,96 +1,57 @@
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h>
#include "args.h" #include "args.h"
#include "printer.h" #include "printer.h"
#include "global.h" #include "global.h"
void print_help(char *argv[]) {
const char **t = args_str;
const char *c = args_chr;
int max_len = max_arg_str_length();
printf("Usage: %s [OPTION]...\n", argv[0]);
printf("Simple yet fancy CPU architecture fetching tool\n\n");
printf("OPTIONS: \n");
printf(" -%c, --%s %*s Set the color scheme (by default, cpufetch uses the system color scheme)\n", c[ARG_COLOR], t[ARG_COLOR], (int) (max_len-strlen(t[ARG_COLOR])), "");
printf(" -%c, --%s %*s Set the style of CPU logo\n", c[ARG_STYLE], t[ARG_STYLE], (int) (max_len-strlen(t[ARG_STYLE])), "");
#ifdef ARCH_X86 #ifdef ARCH_X86
printf(" -%c, --%s %*s Print CPU model and cpuid levels (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), ""); static const char* ARCH_STR = "x86_64 build";
#elif ARCH_PPC #include "../x86/cpuid.h"
printf(" -%c, --%s %*s Print PVR register (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
#elif ARCH_ARM #elif ARCH_ARM
printf(" -%c, --%s %*s Print main ID register values (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), ""); static const char* ARCH_STR = "ARM build";
#include "../arm/midr.h"
#endif #endif
printf(" --%s %*s Show the short version of the logo\n", t[ARG_LOGO_SHORT], (int) (max_len-strlen(t[ARG_LOGO_SHORT])), "");
printf(" --%s %*s Show the long version of the logo\n", t[ARG_LOGO_LONG], (int) (max_len-strlen(t[ARG_LOGO_LONG])), ""); static const char* VERSION = "0.95";
printf(" -%c, --%s %*s Print extra information (if available) about how cpufetch tried fetching information\n", c[ARG_VERBOSE], t[ARG_VERBOSE], (int) (max_len-strlen(t[ARG_VERBOSE])), "");
void print_help(char *argv[]) {
printf("Usage: %s [--version] [--help] [--debug] [--style \"fancy\"|\"retro\"|\"legacy\"] [--color \"intel\"|\"amd\"|'R,G,B:R,G,B:R,G,B:R,G,B']\n\n", argv[0]);
printf("Options: \n\
--color Set the color scheme. By default, cpufetch uses the system color scheme. This option \n\
lets the user use different colors to print the CPU art: \n\
* \"intel\": Use Intel default color scheme \n\
* \"amd\": Use AMD default color scheme \n\
* \"arm\": Use ARM default color scheme \n\
* custom: If color argument do not match \"Intel\", \"AMD\" or \"ARM\", a custom scheme can be specified: \n\
4 colors must be given in RGB with the format: R,G,B:R,G,B:... \n\
These colors correspond to CPU art color (2 colors) and for the text colors (following 2) \n\
For example: --color 239,90,45:210,200,200:100,200,45:0,200,200 \n\n\
--style Set the style of CPU art: \n\
* \"fancy\": Default style \n\
* \"retro\": Old cpufetch style \n\
* \"legacy\": Fallback style for terminals that does not support colors \n\n");
#ifdef ARCH_X86 #ifdef ARCH_X86
#ifdef __linux__ printf(" --debug Prints CPU model and cpuid levels (debug purposes)\n\n");
printf(" --%s %*s Compute the peak performance accurately (measure the CPU frequency instead of using the maximum)\n", t[ARG_ACCURATE_PP], (int) (max_len-strlen(t[ARG_ACCURATE_PP])), ""); #elif ARCH_ARM
printf(" --%s %*s Measure the max CPU frequency instead of reading it\n", t[ARG_MEASURE_MAX_FREQ], (int) (max_len-strlen(t[ARG_MEASURE_MAX_FREQ])), ""); printf(" --debug Prints main ID register values for all cores (debug purposes)\n\n");
#endif // __linux__
printf(" --%s %*s Show the old Intel logo\n", t[ARG_LOGO_INTEL_OLD], (int) (max_len-strlen(t[ARG_LOGO_INTEL_OLD])), "");
printf(" --%s %*s Show the new Intel logo\n", t[ARG_LOGO_INTEL_NEW], (int) (max_len-strlen(t[ARG_LOGO_INTEL_NEW])), "");
printf(" -%c, --%s %*s Show the full CPU name (do not abbreviate it)\n", c[ARG_FULLCPUNAME], t[ARG_FULLCPUNAME], (int) (max_len-strlen(t[ARG_FULLCPUNAME])), "");
printf(" -%c, --%s %*s Print raw cpuid data (debug purposes)\n", c[ARG_RAW], t[ARG_RAW], (int) (max_len-strlen(t[ARG_RAW])), "");
#endif // ARCH_X86
#ifdef ARCH_ARM
#ifdef __linux__
printf(" --%s %*s Measure the max CPU frequency instead of reading it\n", t[ARG_MEASURE_MAX_FREQ], (int) (max_len-strlen(t[ARG_MEASURE_MAX_FREQ])), "");
#endif #endif
#endif
printf(" -%c, --%s %*s Print this help and exit\n", c[ARG_HELP], t[ARG_HELP], (int) (max_len-strlen(t[ARG_HELP])), "");
printf(" -%c, --%s %*s Print cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");
printf("\nCOLORS: \n"); printf(" --verbose Prints extra information (if available) about how cpufetch tried fetching information\n\n\
printf(" * \"intel\": Use Intel color scheme \n"); --help Prints this help and exit\n\n\
printf(" * \"intel-new\": Use Intel (new logo) color scheme \n"); --version Prints cpufetch version and exit\n\n\
printf(" * \"amd\": Use AMD color scheme \n"); \n\
printf(" * \"ibm\", Use IBM color scheme \n"); NOTES: \n\
printf(" * \"arm\": Use ARM color scheme \n"); - Bugs or improvements should be submitted to: github.com/Dr-Noob/cpufetch/issues \n\
printf(" * \"rockchip\": Use Rockchip color scheme \n"); - Peak performance information is NOT accurate. cpufetch computes peak performance using the max \n\
printf(" * \"sifive\": Use SiFive color scheme \n"); frequency. However, to properly compute peak performance, you need to know the frequency of the \n\
printf(" * custom: If the argument of --color does not match any of the previous strings, a custom scheme can be specified.\n"); CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU. \n");
printf(" 5 colors must be given in RGB with the format: R,G,B:R,G,B:...\n"); }
printf(" The first 3 colors are the CPU art color and the next 2 colors are the text colors\n");
printf("\nSTYLES: \n"); void print_version() {
printf(" * \"fancy\": Default style\n"); printf("cpufetch v%s (%s)\n",VERSION, ARCH_STR);
printf(" * \"retro\": Old cpufetch style\n");
printf(" * \"legacy\": Fallback style for terminals that do not support colors\n");
printf("\nLOGOS: \n");
printf(" cpufetch will try to adapt the logo size and the text to the terminal width. When the output (logo and text) is wider than\n");
printf(" the terminal width, cpufetch will print a smaller version of the logo (if it exists). This behavior can be overridden by\n");
printf(" --logo-short and --logo-long, which always sets the logo size as specified by the user, even if it is too big. After the\n");
printf(" logo selection (either automatically or set by the user), cpufetch will check again if the output fits in the terminal.\n");
printf(" If not, it will use a shorter name for the fields (the left part of the text). If, after all of this, the output still does\n");
printf(" not fit, cpufetch will cut the text and will only print the text until there is no space left in each line\n");
printf("\nEXAMPLES: \n");
printf(" Run cpufetch with Intel color scheme:\n");
printf(" ./cpufetch --color intel\n");
printf(" Run cpufetch with a custom color scheme:\n");
printf(" ./cpufetch --color 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200\n");
printf("\nBUGS: \n");
printf(" Report bugs to https://github.com/Dr-Noob/cpufetch/issues\n");
printf("\nNOTE: \n");
printf(" Peak performance information is NOT accurate. cpufetch computes peak performance using the max\n");
printf(" frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the\n");
printf(" CPU running AVX code. By default, this value is not fetched by cpufetch, but you can use the\n");
printf(" --accurate-pp option, which will measure the AVX frequency and show a more precise estimation\n");
printf(" (this option is only available in x86 architectures).\n");
printf(" To precisely measure peak performance, see: https://github.com/Dr-Noob/peakperf\n");
printf("\n");
printf(" Both --accurate-pp and --measure-max-freq measure the actual frequency of the CPU. However,\n");
printf(" they differ slightly. The former measures the max frequency while running vectorized SSE/AVX\n");
printf(" instructions and it is thus x86 only, whereas the latter simply measures the max clock cycle\n");
printf(" and is architecture independent.\n");
} }
int main(int argc, char* argv[]) { int main(int argc, char* argv[]) {
@@ -98,12 +59,13 @@ int main(int argc, char* argv[]) {
return EXIT_FAILURE; return EXIT_FAILURE;
if(show_help()) { if(show_help()) {
print_version();
print_help(argv); print_help(argv);
return EXIT_SUCCESS; return EXIT_SUCCESS;
} }
if(show_version()) { if(show_version()) {
print_version(stdout); print_version();
return EXIT_SUCCESS; return EXIT_SUCCESS;
} }
@@ -114,27 +76,13 @@ int main(int argc, char* argv[]) {
return EXIT_FAILURE; return EXIT_FAILURE;
if(show_debug()) { if(show_debug()) {
print_version(stdout); print_version();
print_debug(cpu); print_debug(cpu);
return EXIT_SUCCESS; return EXIT_SUCCESS;
} }
// TODO: This should be moved to the end of args.c if(print_cpufetch(cpu, get_style(), get_colors()))
if(show_raw()) {
#ifdef ARCH_X86
print_version(stdout);
print_raw(cpu);
return EXIT_SUCCESS; return EXIT_SUCCESS;
#else else
printErr("raw option is valid only in x86_64");
return EXIT_FAILURE; return EXIT_FAILURE;
#endif
}
if(print_cpufetch(cpu, get_style(), get_colors(), show_full_cpu_name())) {
return EXIT_SUCCESS;
}
else {
return EXIT_FAILURE;
}
} }

View File

@@ -1,178 +0,0 @@
#define _GNU_SOURCE
#include <sys/stat.h>
#include <dirent.h>
#include "udev.h"
#include "global.h"
#include "pci.h"
#ifndef PATH_MAX
#define PATH_MAX 1024
#endif
#define PCI_PATH "/sys/bus/pci/devices/"
#define MAX_LENGTH_PCI_DIR_NAME 1024
/*
* doc: https://wiki.osdev.org/PCI#Class_Codes
* https://pci-ids.ucw.cz/read/PC
*/
#define PCI_VENDOR_ID_AMD 0x1002
#define CLASS_VGA_CONTROLLER 0x0300
#define CLASS_3D_CONTROLLER 0x0302
// Return a list of PCI devices containing only
// the sysfs path
struct pci_devices * get_pci_paths(void) {
DIR *dirp;
if ((dirp = opendir(PCI_PATH)) == NULL) {
perror("opendir");
return NULL;
}
struct dirent *dp;
int numDirs = 0;
errno = 0;
while ((dp = readdir(dirp)) != NULL) {
if (strcmp(dp->d_name, ".") != 0 && strcmp(dp->d_name, "..") != 0)
numDirs++;
}
if (errno != 0) {
perror("readdir");
return NULL;
}
rewinddir(dirp);
struct pci_devices * pci = emalloc(sizeof(struct pci_devices));
pci->num_devices = numDirs;
pci->devices = emalloc(sizeof(struct pci_device) * pci->num_devices);
char * full_path = emalloc(PATH_MAX * sizeof(char));
struct stat stbuf;
int i = 0;
while ((dp = readdir(dirp)) != NULL) {
if (strcmp(dp->d_name, ".") == 0 || strcmp(dp->d_name, "..") == 0)
continue;
if (strlen(dp->d_name) > MAX_LENGTH_PCI_DIR_NAME) {
printErr("Directory name is too long: %s", dp->d_name);
return NULL;
}
memset(full_path, 0, PATH_MAX * sizeof(char));
snprintf(full_path, min(strlen(PCI_PATH) + strlen(dp->d_name) + 1, PATH_MAX), "%s%s", PCI_PATH, dp->d_name);
if (stat(full_path, &stbuf) == -1) {
perror("stat");
return NULL;
}
if ((stbuf.st_mode & S_IFMT) == S_IFDIR) {
int strLen = min(MAX_LENGTH_PCI_DIR_NAME, strlen(dp->d_name)) + 1;
pci->devices[i] = emalloc(sizeof(struct pci_device));
pci->devices[i]->path = ecalloc(sizeof(char), strLen);
strncpy(pci->devices[i]->path, dp->d_name, strLen);
i++;
}
}
if (errno != 0) {
perror("readdir");
return NULL;
}
return pci;
}
// For each PCI device in the list pci, fetch its vendor and
// device id using sysfs (e.g., /sys/bus/pci/devices/XXX/{vendor/device})
void populate_pci_devices(struct pci_devices * pci) {
int filelen;
char* buf;
for (int i=0; i < pci->num_devices; i++) {
struct pci_device* dev = pci->devices[i];
int path_size = strlen(PCI_PATH) + strlen(dev->path) + 2;
// Read vendor_id
char *vendor_id_path = emalloc(sizeof(char) * (path_size + strlen("vendor")));
sprintf(vendor_id_path, "%s/%s/%s", PCI_PATH, dev->path, "vendor");
if ((buf = read_file(vendor_id_path, &filelen)) == NULL) {
printWarn("read_file: %s: %s\n", vendor_id_path, strerror(errno));
dev->vendor_id = 0;
}
else {
dev->vendor_id = strtol(buf, NULL, 16);
}
// Read device_id
char *device_id_path = emalloc(sizeof(char) * (path_size + strlen("device")));
sprintf(device_id_path, "%s/%s/%s", PCI_PATH, dev->path, "device");
if ((buf = read_file(device_id_path, &filelen)) == NULL) {
printWarn("read_file: %s: %s\n", device_id_path, strerror(errno));
dev->device_id = 0;
}
else {
dev->device_id = strtol(buf, NULL, 16);
}
free(vendor_id_path);
free(device_id_path);
}
}
// Right now, we are interested in PCI devices which
// vendor is NVIDIA (to be extended in the future).
// Should we also restrict to VGA controllers only?
bool pci_device_is_useful(struct pci_device* dev) {
return dev->vendor_id == PCI_VENDOR_NVIDIA;
}
// Filter the input list in order to get only those PCI devices which
// we are interested in (decided by pci_device_is_useful)
// and return the filtered result.
struct pci_devices * filter_pci_devices(struct pci_devices * pci) {
int * devices_to_get = emalloc(sizeof(int) * pci->num_devices);
int dev_ptr = 0;
for (int i=0; i < pci->num_devices; i++) {
if (pci_device_is_useful(pci->devices[i])) {
devices_to_get[dev_ptr] = i;
dev_ptr++;
}
}
struct pci_devices * pci_filtered = emalloc(sizeof(struct pci_devices));
pci_filtered->num_devices = dev_ptr;
if (pci_filtered->num_devices == 0) {
pci_filtered->devices = NULL;
}
else {
pci_filtered->devices = emalloc(sizeof(struct pci_device) * pci_filtered->num_devices);
for (int i=0; i < pci_filtered->num_devices; i++)
pci_filtered->devices[i] = pci->devices[devices_to_get[i]];
}
return pci_filtered;
}
// Return a list of PCI devices that could be used to infer the SoC.
// The criteria to determine which devices are suitable for this task
// is decided in filter_pci_devices.
struct pci_devices * get_pci_devices(void) {
struct pci_devices * pci = get_pci_paths();
if (pci == NULL)
return NULL;
populate_pci_devices(pci);
return filter_pci_devices(pci);
}

View File

@@ -1,20 +0,0 @@
#ifndef __PCI__
#define __PCI__
#define PCI_VENDOR_NVIDIA 0x10de
#define PCI_DEVICE_TEGRA_X1 0x0faf
struct pci_device {
char * path;
uint16_t vendor_id;
uint16_t device_id;
};
struct pci_devices {
struct pci_device ** devices;
int num_devices;
};
struct pci_devices * get_pci_devices(void);
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -7,29 +7,18 @@ typedef int STYLE;
#ifdef ARCH_X86 #ifdef ARCH_X86
#include "../x86/cpuid.h" #include "../x86/cpuid.h"
#elif ARCH_PPC #else
#include "../ppc/ppc.h"
#elif ARCH_ARM
#include "../arm/midr.h" #include "../arm/midr.h"
#elif ARCH_RISCV
#include "../riscv/riscv.h"
#endif #endif
// +-----------------------------------+-----------------------+ #define COLOR_DEFAULT_INTEL "15,125,194:230,230,230:40,150,220:230,230,230"
// | Color logo | Color text | #define COLOR_DEFAULT_AMD "250,250,250:0,154,102:250,250,250:0,154,102"
// | Color 1 | Color 2 | Color 3 | Color 1 | Color 2 | #define COLOR_DEFAULT_ARM "0,145,189:0,145,189:240,240,240:0,145,189"
#define COLOR_DEFAULT_INTEL "015,125,194:230,230,230:000,000,000:040,150,220:230,230,230"
#define COLOR_DEFAULT_INTEL_NEW "030,204,251:250,250,250:000,104,181:230,230,230:030,204,251"
#define COLOR_DEFAULT_AMD "250,250,250:000,154,102:000,000,000:250,250,250:000,154,102"
#define COLOR_DEFAULT_IBM "092,119,172:092,119,172:000,000,000:240,240,240:092,119,172"
#define COLOR_DEFAULT_ARM "000,145,189:000,145,189:000,000,000:240,240,240:000,145,189"
#define COLOR_DEFAULT_ROCKCHIP "114,159,207:229,195,000:000,000,000:240,240,240:114,159,207"
#define COLOR_DEFAULT_SIFIVE "255,255,255:000,000,000:000,000,000:255,255,255:000,000,000"
#ifdef ARCH_X86 #ifdef ARCH_X86
void print_levels(struct cpuInfo* cpu); void print_levels(struct cpuInfo* cpu);
#endif #endif
bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct color** cs, bool fcpuname); bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct colors* cs);
#endif #endif

View File

@@ -1,92 +0,0 @@
#include "soc.h"
#ifdef ARCH_ARM
#include "../arm/socs.h"
#elif ARCH_RISCV
#include "../riscv/socs.h"
#endif
#include "udev.h"
#include "../common/global.h"
#include <string.h>
static char* soc_trademark_string[] = {
// ARM
[SOC_VENDOR_SNAPDRAGON] = "Snapdragon ",
[SOC_VENDOR_MEDIATEK] = "MediaTek ",
[SOC_VENDOR_EXYNOS] = "Exynos ",
[SOC_VENDOR_KIRIN] = "Kirin ",
[SOC_VENDOR_KUNPENG] = "Kunpeng ",
[SOC_VENDOR_BROADCOM] = "Broadcom BCM",
[SOC_VENDOR_APPLE] = "Apple ",
[SOC_VENDOR_ROCKCHIP] = "Rockchip ",
[SOC_VENDOR_GOOGLE] = "Google ",
[SOC_VENDOR_NVIDIA] = "NVIDIA ",
// RISC-V
[SOC_VENDOR_SIFIVE] = "SiFive ",
[SOC_VENDOR_STARFIVE] = "StarFive ",
[SOC_VENDOR_SIPEED] = "Sipeed ",
// ARM & RISC-V
[SOC_VENDOR_ALLWINNER] = "Allwinner "
};
VENDOR get_soc_vendor(struct system_on_chip* soc) {
return soc->soc_vendor;
}
char* get_str_process(struct system_on_chip* soc) {
char* str;
if(soc->process == UNKNOWN) {
str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
}
else {
str = emalloc(sizeof(char) * 5);
memset(str, 0, sizeof(char) * 5);
snprintf(str, 5, "%dnm", soc->process);
}
return str;
}
char* get_soc_name(struct system_on_chip* soc) {
if(soc->soc_model == SOC_MODEL_UNKNOWN)
return soc->raw_name;
return soc->soc_name;
}
void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process) {
soc->soc_model = soc_model;
soc->soc_vendor = get_soc_vendor_from_soc(soc_model);
soc->process = process;
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
printBug("fill_soc: soc->soc_vendor == SOC_VENDOR_UNKOWN");
// If we fall here there is a bug in socs.h
// Reset everything to avoid segfault
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
soc->soc_model = SOC_MODEL_UNKNOWN;
soc->process = UNKNOWN;
soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
}
else {
soc->process = process;
int len = strlen(soc_name) + strlen(soc_trademark_string[soc->soc_vendor]) + 1;
soc->soc_name = emalloc(sizeof(char) * len);
memset(soc->soc_name, 0, sizeof(char) * len);
sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);
}
}
bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
int len1 = strlen(raw_name);
int len2 = strlen(expected_name);
int len = min(len1, len2);
if(strncmp(raw_name, expected_name, len) != 0) {
return false;
}
else {
fill_soc(soc, soc_name, soc_model, process);
return true;
}
}

View File

@@ -1,56 +0,0 @@
#ifndef __SOC__
#define __SOC__
// NOTE:
// soc.c/soc.h are used by
// ARM and RISC-V backends
#include "../common/cpu.h"
#include <stdint.h>
#define UNKNOWN -1
typedef int32_t SOC;
enum {
SOC_VENDOR_UNKNOWN,
// ARM
SOC_VENDOR_SNAPDRAGON,
SOC_VENDOR_MEDIATEK,
SOC_VENDOR_EXYNOS,
SOC_VENDOR_KIRIN,
SOC_VENDOR_KUNPENG,
SOC_VENDOR_BROADCOM,
SOC_VENDOR_APPLE,
SOC_VENDOR_ROCKCHIP,
SOC_VENDOR_GOOGLE,
SOC_VENDOR_NVIDIA,
// RISC-V
SOC_VENDOR_SIFIVE,
SOC_VENDOR_STARFIVE,
SOC_VENDOR_SIPEED,
// ARM & RISC-V
SOC_VENDOR_ALLWINNER
};
struct system_on_chip {
SOC soc_model;
VENDOR soc_vendor;
int32_t process;
char* soc_name;
char* raw_name;
};
struct system_on_chip* get_soc(struct cpuInfo* cpu);
char* get_soc_name(struct system_on_chip* soc);
VENDOR get_soc_vendor(struct system_on_chip* soc);
bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process);
char* get_str_process(struct system_on_chip* soc);
void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process);
#define SOC_START if (false) {}
#define SOC_EQ(raw_name, expected_name, soc_name, soc_model, soc, process) \
else if (match_soc(soc, raw_name, expected_name, soc_name, soc_model, process)) return true;
#define SOC_END else { return false; }
#endif

View File

@@ -1,25 +0,0 @@
#include <sys/types.h>
#include <sys/sysctl.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include "global.h"
#include "cpu.h"
uint32_t get_sys_info_by_name(char* name) {
size_t size = 0;
uint32_t ret = 0;
if (sysctlbyname(name, NULL, &size, NULL, 0) != 0) {
printWarn("sysctlbyname(%s) failed: %s", name, strerror(errno));
}
else if (size == sizeof(uint32_t)) {
sysctlbyname(name, &ret, &size, NULL, 0);
}
else {
printWarn("sysctl does not support non-integer lookup for '%s'", name);
}
return ret;
}

View File

@@ -1,45 +0,0 @@
#ifndef __SYSCTL__
#define __SYSCTL__
// From Linux kernel: arch/arm64/include/asm/cputype.h
#define MIDR_APPLE_M1_ICESTORM 0x610F0220
#define MIDR_APPLE_M1_FIRESTORM 0x610F0230
// Kernel does not include those, so I just assume that
// APPLE_CPU_PART_M2_BLIZZARD=0x30,M2_AVALANCHE=0x31
#define MIDR_APPLE_M2_BLIZZARD 0x610F0300
#define MIDR_APPLE_M2_AVALANCHE 0x610F0310
// https://github.com/AsahiLinux/m1n1/blob/main/src/chickens.c
#define MIDR_APPLE_M3_SAWTOOTH 0x610F0480
#define MIDR_APPLE_M3_EVEREST 0x610F0490
// M1 / A14
#ifndef CPUFAMILY_ARM_FIRESTORM_ICESTORM
#define CPUFAMILY_ARM_FIRESTORM_ICESTORM 0x1B588BB3
#endif
// M2 / A15
#ifndef CPUFAMILY_ARM_AVALANCHE_BLIZZARD
#define CPUFAMILY_ARM_AVALANCHE_BLIZZARD 0xDA33D83D
#endif
// M3 / A16 / A17
// https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
// https://github.com/Dr-Noob/cpufetch/issues/210
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH 0x8765EDEA
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO 0x5F4DEA93
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX 0x72015832
// For detecting different M1 types
// NOTE: Could also be achieved detecting different
// MIDR values (e.g., APPLE_CPU_PART_M1_ICESTORM_PRO)
#ifndef CPUSUBFAMILY_ARM_HG
#define CPUSUBFAMILY_ARM_HG 2
#endif
#ifndef CPUSUBFAMILY_ARM_HS
#define CPUSUBFAMILY_ARM_HS 4
#endif
#ifndef CPUSUBFAMILY_ARM_HC_HD
#define CPUSUBFAMILY_ARM_HC_HD 5
#endif
uint32_t get_sys_info_by_name(char* name);
#endif

View File

@@ -2,48 +2,6 @@
#include "global.h" #include "global.h"
#include "cpu.h" #include "cpu.h"
// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
int get_ncores_from_cpuinfo(void) {
// Examples:
// 0-271
// 0-7
// 0
int filelen;
char* buf;
if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
printWarn("read_file: %s: %s\n", _PATH_CPUS_PRESENT, strerror(errno));
return -1;
}
int ncores;
char* tmp1;
if((tmp1 = strstr(buf, "-")) == NULL) {
// file contains no - character, we assume that it contains 0,
// which means that the CPU contains only one core
return 1;
}
else {
tmp1++;
}
char* tmp2 = strstr(buf, "\n");
char ncores_str[filelen];
memset(ncores_str, 0, sizeof(char) * filelen);
memcpy(ncores_str, tmp1, tmp2-tmp1);
char* end;
errno = 0;
ncores = strtol(ncores_str, &end, 10) + 1;
if(errno != 0) {
printWarn("strtol: %s:\n", strerror(errno));
return -1;
}
free(buf);
return ncores;
}
char* read_file(char* path, int* len) { char* read_file(char* path, int* len) {
int fd = open(path, O_RDONLY); int fd = open(path, O_RDONLY);
@@ -54,18 +12,13 @@ char* read_file(char* path, int* len) {
//File exists, read it //File exists, read it
int bytes_read = 0; int bytes_read = 0;
int offset = 0; int offset = 0;
int block = 1024; int block = 128;
int buf_size = block * 4; char* buf = malloc(sizeof(char)*DEFAULT_FILE_SIZE);
char* buf = emalloc(sizeof(char) * buf_size); memset(buf, 0, sizeof(char)*DEFAULT_FILE_SIZE);
while ((bytes_read = read(fd, buf+offset, block)) > 0) { while ( (bytes_read = read(fd, buf+offset, block)) > 0 ) {
offset += bytes_read; offset += bytes_read;
if(offset + block > buf_size) {
buf = erealloc(buf, sizeof(char) * (buf_size + block));
buf_size += block;
} }
}
buf[offset] = '\0';
if (close(fd) == -1) { if (close(fd) == -1) {
return NULL; return NULL;
@@ -75,21 +28,32 @@ char* read_file(char* path, int* len) {
return buf; return buf;
} }
long get_freq_from_file(char* path) { long get_freq_from_file(char* path, bool hv_present) {
int filelen; int filelen;
char* buf; char* buf;
if((buf = read_file(path, &filelen)) == NULL) { if((buf = read_file(path, &filelen)) == NULL) {
#ifdef ARCH_X86
if(hv_present) {
printWarn("Could not open '%s'", path); printWarn("Could not open '%s'", path);
return UNKNOWN_DATA; }
else {
perror("open");
printBug("Could not open '%s'", path);
}
#elif ARCH_ARM
printWarn("Could not open '%s'", path);
#endif
return UNKNOWN_FREQ;
} }
char* end; char* end;
errno = 0; errno = 0;
long ret = strtol(buf, &end, 10); long ret = strtol(buf, &end, 10);
if(errno != 0) { if(errno != 0) {
printBug("strtol: %s", strerror(errno)); perror("strtol");
printBug("Failed parsing '%s' file. Read data was: '%s'", path, buf);
free(buf); free(buf);
return UNKNOWN_DATA; return UNKNOWN_FREQ;
} }
// We will be getting the frequency in KHz // We will be getting the frequency in KHz
@@ -97,7 +61,7 @@ long get_freq_from_file(char* path) {
// greater than 10 GHz or less than 100 MHz // greater than 10 GHz or less than 100 MHz
if(ret > 10000 * 1000 || ret < 100 * 1000) { if(ret > 10000 * 1000 || ret < 100 * 1000) {
printBug("Invalid data was read from file '%s': %ld\n", path, ret); printBug("Invalid data was read from file '%s': %ld\n", path, ret);
return UNKNOWN_DATA; return UNKNOWN_FREQ;
} }
free(buf); free(buf);
@@ -105,247 +69,14 @@ long get_freq_from_file(char* path) {
return ret/1000; return ret/1000;
} }
long get_cache_size_from_file(char* path) { long get_max_freq_from_file(uint32_t core, bool hv_present) {
int filelen;
char* buf;
if((buf = read_file(path, &filelen)) == NULL) {
printWarn("Could not open '%s'", path);
return -1;
}
buf[filelen] = '\0'; // remove the K at the end
char* end;
errno = 0;
long ret = strtol(buf, &end, 10);
if(errno != 0) {
printBug("strtol: %s", strerror(errno));
free(buf);
return -1;
}
free(buf);
return ret * 1024;
}
char* get_field_from_cpuinfo(char* CPUINFO_FIELD) {
int filelen;
char* buf;
if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
printWarn("read_file: %s: %s:\n", _PATH_CPUINFO, strerror(errno));
return NULL;
}
char* tmp1 = strstr(buf, CPUINFO_FIELD);
if(tmp1 == NULL) return NULL;
tmp1 = tmp1 + strlen(CPUINFO_FIELD);
char* tmp2 = strstr(tmp1, "\n");
int strlen = (1 + (tmp2-tmp1));
char* hardware = emalloc(sizeof(char) * strlen);
memset(hardware, 0, sizeof(char) * strlen);
strncpy(hardware, tmp1, tmp2-tmp1);
return hardware;
}
long get_max_freq_from_file(uint32_t core) {
char path[_PATH_FREQUENCY_MAX_LEN]; char path[_PATH_FREQUENCY_MAX_LEN];
sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MAX); sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MAX);
return get_freq_from_file(path); return get_freq_from_file(path, hv_present);
} }
long get_min_freq_from_file(uint32_t core) { long get_min_freq_from_file(uint32_t core, bool hv_present) {
char path[_PATH_FREQUENCY_MAX_LEN]; char path[_PATH_FREQUENCY_MAX_LEN];
sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MIN); sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MIN);
return get_freq_from_file(path); return get_freq_from_file(path, hv_present);
}
long get_l1i_cache_size(uint32_t core) {
char path[_PATH_CACHE_MAX_LEN];
sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L1I, _PATH_CACHE_SIZE);
return get_cache_size_from_file(path);
}
long get_l1d_cache_size(uint32_t core) {
char path[_PATH_CACHE_MAX_LEN];
sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L1D, _PATH_CACHE_SIZE);
return get_cache_size_from_file(path);
}
long get_l2_cache_size(uint32_t core) {
char path[_PATH_CACHE_MAX_LEN];
sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L2, _PATH_CACHE_SIZE);
return get_cache_size_from_file(path);
}
long get_l3_cache_size(uint32_t core) {
char path[_PATH_CACHE_MAX_LEN];
sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L3, _PATH_CACHE_SIZE);
return get_cache_size_from_file(path);
}
void add_shared_map(uint32_t** src, int src_idx, uint32_t** dst, int dst_idx, int n) {
for(int j=0; j < n; j++) {
dst[dst_idx][j] = src[src_idx][j];
}
}
bool maps_equal(uint32_t* map1, uint32_t* map2, int n) {
for(int i=0; i < n; i++) {
if(map1[i] != map2[i]) return false;
}
return true;
}
// Generic function to count the number of distinct
// elements in the list of files passed in char** paths.
// An element can be potentially anything.
// We use this function to count:
// - The number of caches
// - The number of sockets
int get_num_elements_from_files(char** paths, int num_paths) {
int filelen;
char* buf;
char* tmpbuf;
// 1. Count the number of bitmasks per file
if((buf = read_file(paths[0], &filelen)) == NULL) {
printWarn("Could not open '%s'", paths[0]);
return -1;
}
int num_bitmasks = 1;
for(int i=0; buf[i]; i++) {
num_bitmasks += (buf[i] == ',');
}
// 2. Read map from every core
uint32_t** maps = emalloc(sizeof(uint32_t *) * num_paths);
for(int i=0; i < num_paths; i++) {
maps[i] = emalloc(sizeof(uint32_t) * num_bitmasks);
if((buf = read_file(paths[i], &filelen)) == NULL) {
printWarn("Could not open '%s'", paths[i]);
return -1;
}
for(int j=0; j < num_bitmasks; j++) {
char* end;
tmpbuf = emalloc(sizeof(char) * (strlen(buf) + 1));
memset(tmpbuf, 0, sizeof(char) * (strlen(buf) + 1));
char* commaend = strstr(buf, ",");
if(commaend == NULL) {
strcpy(tmpbuf, buf);
}
else {
strncpy(tmpbuf, buf, commaend-buf);
}
errno = 0;
long ret = strtol(tmpbuf, &end, 16);
if(errno != 0) {
printf("strtol: %s", strerror(errno));
free(buf);
return -1;
}
maps[i][j] = (uint32_t) ret;
buf = commaend + 1;
free(tmpbuf);
}
}
// 2. Count number of different masks; this is the number of elements
int num_elements = 0;
bool found = false;
uint32_t** unique_maps = emalloc(sizeof(uint32_t *) * num_paths);
for(int i=0; i < num_paths; i++) {
unique_maps[i] = emalloc(sizeof(uint32_t) * num_bitmasks);
for(int j=0; j < num_bitmasks; j++) {
unique_maps[i][j] = 0;
}
}
for(int i=0; i < num_paths; i++) {
for(int j=0; j < num_paths && !found; j++) {
if(maps_equal(maps[i], unique_maps[j], num_bitmasks)) found = true;
}
if(!found) {
add_shared_map(maps, i, unique_maps, num_elements, num_bitmasks);
num_elements++;
}
found = false;
}
return num_elements;
}
int get_num_caches_from_files(char** paths, int num_paths) {
return get_num_elements_from_files(paths, num_paths);
}
int get_num_sockets_from_files(char** paths, int num_paths) {
return get_num_elements_from_files(paths, num_paths);
}
int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level) {
char** paths = emalloc(sizeof(char *) * cpu->topo->total_cores);
char* cache_path = NULL;
if(level == 0) cache_path = _PATH_CACHE_L1I;
else if(level == 1) cache_path = _PATH_CACHE_L1D;
else if(level == 2) cache_path = _PATH_CACHE_L2;
else if(level == 3) cache_path = _PATH_CACHE_L3;
else {
printBug("Found invalid cache level to inspect: %d\n", level);
return -1;
}
for(int i=0; i < cpu->topo->total_cores; i++) {
paths[i] = emalloc(sizeof(char) * _PATH_CACHE_MAX_LEN);
sprintf(paths[i], "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, cache_path, _PATH_CACHE_SHARED_MAP);
}
int ret = get_num_caches_from_files(paths, cpu->topo->total_cores);
for(int i=0; i < cpu->topo->total_cores; i++)
free(paths[i]);
free(paths);
return ret;
}
int get_num_sockets_package_cpus(struct topology* topo) {
// Get number of sockets using
// /sys/devices/system/cpu/cpu*/topology/package_cpus
char** paths = emalloc(sizeof(char *) * topo->total_cores);
for(int i=0; i < topo->total_cores; i++) {
paths[i] = emalloc(sizeof(char) * _PATH_PACKAGE_MAX_LEN);
sprintf(paths[i], "%s%s/cpu%d%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, _PATH_TOPO_PACKAGE_CPUS);
}
int ret = get_num_sockets_from_files(paths, topo->total_cores);
for(int i=0; i < topo->total_cores; i++)
free(paths[i]);
free(paths);
return ret;
}
// Inspired in is_devtree_compatible from lscpu
bool is_devtree_compatible(char* str) {
int filelen;
char* buf;
if((buf = read_file("/proc/device-tree/compatible", &filelen)) == NULL) {
return false;
}
char* tmp;
if((tmp = strstr(buf, str)) == NULL) {
return false;
}
return true;
} }

View File

@@ -12,36 +12,17 @@
#include "cpu.h" #include "cpu.h"
#define _PATH_CPUINFO "/proc/cpuinfo"
#define _PATH_SYS_SYSTEM "/sys/devices/system" #define _PATH_SYS_SYSTEM "/sys/devices/system"
#define _PATH_SYS_CPU "/cpu" #define _PATH_SYS_CPU "/cpu"
#define _PATH_FREQUENCY "/cpufreq" #define _PATH_FREQUENCY "/cpufreq"
#define _PATH_FREQUENCY_MAX "/cpuinfo_max_freq" #define _PATH_FREQUENCY_MAX "/cpuinfo_max_freq"
#define _PATH_FREQUENCY_MIN "/cpuinfo_min_freq" #define _PATH_FREQUENCY_MIN "/cpuinfo_min_freq"
#define _PATH_CACHE_L1D "/cache/index0"
#define _PATH_CACHE_L1I "/cache/index1"
#define _PATH_CACHE_L2 "/cache/index2"
#define _PATH_CACHE_L3 "/cache/index3"
#define _PATH_CACHE_SIZE "/size"
#define _PATH_CACHE_SHARED_MAP "/shared_cpu_map"
#define _PATH_CPUS_PRESENT _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
#define _PATH_TOPO_PACKAGE_CPUS "/topology/package_cpus"
#define _PATH_FREQUENCY_MAX_LEN 100 #define _PATH_FREQUENCY_MAX_LEN 100
#define _PATH_CACHE_MAX_LEN 200 #define DEFAULT_FILE_SIZE 4096
#define _PATH_PACKAGE_MAX_LEN 200
char* read_file(char* path, int* len); char* read_file(char* path, int* len);
long get_max_freq_from_file(uint32_t core); long get_max_freq_from_file(uint32_t core, bool hv_present);
long get_min_freq_from_file(uint32_t core); long get_min_freq_from_file(uint32_t core, bool hv_present);
long get_l1i_cache_size(uint32_t core);
long get_l1d_cache_size(uint32_t core);
long get_l2_cache_size(uint32_t core);
long get_l3_cache_size(uint32_t core);
int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level);
int get_num_sockets_package_cpus(struct topology* topo);
int get_ncores_from_cpuinfo(void);
char* get_field_from_cpuinfo(char* CPUINFO_FIELD);
bool is_devtree_compatible(char* str);
#endif #endif

View File

@@ -1,272 +0,0 @@
#include <stdio.h>
#include <stdlib.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <assert.h>
#include "ppc.h"
#include "uarch.h"
#include "udev.h"
#include "../common/udev.h"
#include "../common/global.h"
static char *hv_vendors_name[] = {
[HV_VENDOR_KVM] = "KVM",
[HV_VENDOR_QEMU] = "QEMU",
[HV_VENDOR_VBOX] = "VirtualBox",
[HV_VENDOR_HYPERV] = "Microsoft Hyper-V",
[HV_VENDOR_VMWARE] = "VMware",
[HV_VENDOR_XEN] = "Xen",
[HV_VENDOR_PARALLELS] = "Parallels",
[HV_VENDOR_PHYP] = "pHyp",
[HV_VENDOR_BHYVE] = "bhyve",
[HV_VENDOR_APPLEVZ] = "Apple VZ",
[HV_VENDOR_INVALID] = STRING_UNKNOWN
};
struct cache* get_cache_info(struct cpuInfo* cpu) {
struct cache* cach = emalloc(sizeof(struct cache));
init_cache_struct(cach);
cach->L1i->size = get_l1i_cache_size(0);
cach->L1d->size = get_l1d_cache_size(0);
cach->L2->size = get_l2_cache_size(0);
cach->L3->size = get_l3_cache_size(0);
if(cach->L1i->size > 0) {
cach->L1i->exists = true;
cach->L1i->num_caches = get_num_caches_by_level(cpu, 0);
cach->max_cache_level = 1;
}
if(cach->L1d->size > 0) {
cach->L1d->exists = true;
cach->L1d->num_caches = get_num_caches_by_level(cpu, 1);
cach->max_cache_level = 2;
}
if(cach->L2->size > 0) {
cach->L2->exists = true;
cach->L2->num_caches = get_num_caches_by_level(cpu, 2);
cach->max_cache_level = 3;
}
if(cach->L3->size > 0) {
cach->L3->exists = true;
cach->L3->num_caches = get_num_caches_by_level(cpu, 3);
cach->max_cache_level = 4;
}
return cach;
}
struct topology* get_topology_info(struct cache* cach) {
struct topology* topo = emalloc(sizeof(struct topology));
init_topology_struct(topo, cach);
// 1. Total cores detection
if((topo->total_cores = sysconf(_SC_NPROCESSORS_ONLN)) == -1) {
printWarn("sysconf(_SC_NPROCESSORS_ONLN): %s", strerror(errno));
topo->total_cores = 1; // fallback
}
// To find physical cores, we use topo->total_cores and core_ids
// To find number of sockets, we use package_ids
int* core_ids = emalloc(sizeof(int) * topo->total_cores);
int* package_ids = emalloc(sizeof(int) * topo->total_cores);
if(!fill_core_ids_from_sys(core_ids, topo->total_cores)) {
printWarn("fill_core_ids_from_sys failed, output may be incomplete/invalid");
for(int i=0; i < topo->total_cores; i++) core_ids[i] = 0;
}
if(!fill_package_ids_from_sys(package_ids, topo->total_cores)) {
printWarn("fill_package_ids_from_sys failed, output may be incomplete/invalid");
for(int i=0; i < topo->total_cores; i++) package_ids[i] = 0;
// fill_package_ids_from_sys failed, use a
// more sophisticated wat to find the number of sockets
topo->sockets = get_num_sockets_package_cpus(topo);
}
else {
// fill_package_ids_from_sys succeeded, use the
// traditional socket detection algorithm
int *package_ids_count = emalloc(sizeof(int) * topo->total_cores);
for(int i=0; i < topo->total_cores; i++) {
package_ids_count[i] = 0;
}
for(int i=0; i < topo->total_cores; i++) {
package_ids_count[package_ids[i]]++;
}
for(int i=0; i < topo->total_cores; i++) {
if(package_ids_count[i] != 0) {
topo->sockets++;
}
}
free(package_ids_count);
}
// 3. Physical cores detection
int *core_ids_unified = emalloc(sizeof(int) * topo->total_cores);
for(int i=0; i < topo->total_cores; i++) {
core_ids_unified[i] = -1;
}
bool found = false;
for(int i=0; i < topo->total_cores; i++) {
for(int j=0; j < topo->total_cores && !found; j++) {
if(core_ids_unified[j] == core_ids[i]) found = true;
}
if(!found) {
core_ids_unified[topo->physical_cores] = core_ids[i];
topo->physical_cores++;
}
found = false;
}
topo->physical_cores = topo->physical_cores / topo->sockets; // only count cores on one socket
topo->logical_cores = topo->total_cores / topo->sockets; // only count threads on one socket
topo->smt_supported = topo->logical_cores / topo->physical_cores;
free(core_ids);
free(package_ids);
free(core_ids_unified);
return topo;
}
static inline uint32_t mfpvr(void) {
uint32_t pvr;
asm ("mfpvr %0"
: "=r"(pvr));
return pvr;
}
struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
return get_uarch_from_pvr(cpu->pvr);
}
struct frequency* get_frequency_info(void) {
struct frequency* freq = emalloc(sizeof(struct frequency));
freq->measured = false;
freq->max = get_max_freq_from_file(0);
freq->base = get_min_freq_from_file(0);
if(freq->max == UNKNOWN_DATA) {
// If we are unable to find it in the
// standard path, try /proc/cpuinfo
freq->max = get_frequency_from_cpuinfo();
}
return freq;
}
int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq) {
/*
* Not sure about this
* PP(SP) = N_CORES * FREQUENCY * 4(If altivec)
*/
//First check we have consistent data
if(freq == UNKNOWN_DATA) {
return -1;
}
struct features* feat = cpu->feat;
int64_t flops = topo->physical_cores * topo->sockets * (freq * 1000000);
if(feat->altivec) flops = flops * 4;
// POWER9 has the concept called "slices". Each SMT4 core has two super-slices,
// and each super-slice is capable of doing two FLOPS per cycle. In the case of
// SMT8, it has 4 super-slices, thus four FLOPS per cycle.
if(is_power9(cpu->arch)) {
int threads_per_core = topo->logical_cores / topo->physical_cores;
flops = flops * (threads_per_core / 2);
}
return flops;
}
struct hypervisor* get_hp_info(void) {
struct hypervisor* hv = emalloc(sizeof(struct hypervisor));
hv->present = false;
// Weird heuristic found in lscpu:
// https://github.com/util-linux/util-linux/blob/master/sys-utils/lscpu-virt.c
if(access("/proc" _PATH_DT_IBM_PARTIT_NAME, F_OK) == 0 &&
access("/proc" _PATH_DT_HMC_MANAGED, F_OK) == 0 &&
access("/proc" _PATH_DT_QEMU_WIDTH, F_OK) != 0) {
hv->present = true;
hv->hv_vendor = HV_VENDOR_PHYP;
}
else if(is_devtree_compatible("qemu,pseries")) {
hv->present = true;
hv->hv_vendor = HV_VENDOR_QEMU;
}
hv->hv_name = hv_vendors_name[hv->hv_vendor];
return hv;
}
struct cpuInfo* get_cpu_info(void) {
struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
struct features* feat = emalloc(sizeof(struct features));
cpu->feat = feat;
bool *ptr = &(feat->AES);
for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
*ptr = false;
}
int len;
char* path = emalloc(sizeof(char) * (strlen(_PATH_DT) + strlen(_PATH_DT_PART) + 1));
sprintf(path, "%s%s", _PATH_DT, _PATH_DT_PART);
if((cpu->cpu_name = read_file(path, &len)) == NULL) {
printWarn("Could not open '%s'", path);
}
cpu->pvr = mfpvr();
cpu->hv = get_hp_info();
cpu->arch = get_cpu_uarch(cpu);
cpu->freq = get_frequency_info();
cpu->topo = get_topology_info(cpu->cach);
cpu->cach = get_cache_info(cpu);
feat->altivec = has_altivec(cpu->arch);
cpu->peak_performance = get_peak_performance(cpu, cpu->topo, get_freq(cpu->freq));
return cpu;
}
char* get_str_altivec(struct cpuInfo* cpu) {
char* string = ecalloc(4, sizeof(char));
if(cpu->feat->altivec) strcpy(string, "Yes");
else strcpy(string, "No");
return string;
}
char* get_str_topology(struct topology* topo, bool dual_socket) {
char* string;
if(topo->smt_supported > 1) {
uint32_t size = 3+3+17+1;
string = emalloc(sizeof(char)*size);
if(dual_socket)
snprintf(string, size, "%d cores (%d threads)", topo->physical_cores * topo->sockets, topo->logical_cores * topo->sockets);
else
snprintf(string, size, "%d cores (%d threads)",topo->physical_cores,topo->logical_cores);
}
else {
uint32_t size = 3+7+1;
string = emalloc(sizeof(char)*size);
if(dual_socket)
snprintf(string, size, "%d cores",topo->physical_cores * topo->sockets);
else
snprintf(string, size, "%d cores",topo->physical_cores);
}
return string;
}
void print_debug(struct cpuInfo* cpu) {
printf("PVR: 0x%.8X\n", cpu->pvr);
}

View File

@@ -1,11 +0,0 @@
#ifndef __CPUFETCH_POWERPC__
#define __CPUFETCH_POWERPC__
#include "../common/cpu.h"
struct cpuInfo* get_cpu_info(void);
char* get_str_altivec(struct cpuInfo* cpu);
char* get_str_topology(struct topology* topo, bool dual_socket);
void print_debug(struct cpuInfo* cpu);
#endif

View File

@@ -1,28 +0,0 @@
#!/bin/bash
# This script takes as input cputable.c from linux kernel
# and generates a valid output for cpufetch in src/ppc/uarch.c
CPUTABLE_PATH="linux-5.13.7/arch/powerpc/kernel/cputable.c"
raw_values=$(grep '\.pvr_value' "$CPUTABLE_PATH" | grep -oP "= .*," | cut -d' ' -f2 | tr -d ',')
raw_masks=$(grep '\.pvr_mask' "$CPUTABLE_PATH" | grep -oE "0x........")
raw_v_len=$(echo "$raw_values" | wc -l)
raw_m_len=$(echo "$raw_masks" | wc -l)
if [ $raw_v_len -ne $raw_m_len ]
then
echo "Lengths do not match!"
echo "values length: $raw_v_len"
echo "masks length: $raw_m_len"
exit 1
fi
IFS=$'\n' read -r -d ' ' -a values <<< "$raw_values"
IFS=$'\n' read -r -d ' ' -a masks <<< "$raw_masks"
for i in "${!values[@]}"
do
echo ' CHECK_UARCH(arch, pvr, '"${masks[i]}"', '"${values[i]}"', "POWERX", UARCH_POWERX, -1)'
done

View File

@@ -1,297 +0,0 @@
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include "uarch.h"
#include "../common/global.h"
typedef uint32_t MICROARCH;
// Data not available
#define NA -1
// Unknown manufacturing process
#define UNK -1
enum {
UARCH_UNKNOWN,
UARCH_PPC604,
UARCH_PPCG3,
UARCH_PPCG4,
UARCH_PPC405,
UARCH_PPC603,
UARCH_PPC440,
UARCH_PPC470,
UARCH_PPC970,
UARCH_PPC970FX,
UARCH_PPC970MP,
UARCH_CELLBE,
UARCH_POWER5,
UARCH_POWER5PLUS,
UARCH_POWER6,
UARCH_POWER7,
UARCH_POWER7PLUS,
UARCH_POWER8,
UARCH_POWER8_DD21,
UARCH_POWER9,
UARCH_POWER9_DD20,
UARCH_POWER9_DD21,
UARCH_POWER9_DD22,
UARCH_POWER9_DD23,
UARCH_POWER10,
};
struct uarch {
MICROARCH uarch;
char* uarch_str;
int32_t process; // measured in nanometers
};
#define UARCH_START if (false) {}
#define CHECK_UARCH(arch, cpu_pvr, pvr_mask, pvr_value, uarch) \
else if ((cpu_pvr & pvr_mask) == pvr_value) fill_uarch(arch, uarch);
#define UARCH_END else { printBug("Unknown microarchitecture detected: 0x%.8X", pvr); fill_uarch(arch, UARCH_UNKNOWN); }
#define FILL_START if (false) {}
#define FILL_UARCH(u, uarch, uarch_str, uarch_process) \
else if(u == uarch) { fill = true; str = uarch_str; process = uarch_process; }
#define FILL_END else { printBug("Found invalid microarchitecture: %d", u); }
void fill_uarch(struct uarch* arch, MICROARCH u) {
arch->uarch = u;
char* str = NULL;
int32_t process = UNK;
bool fill = false;
FILL_START
FILL_UARCH(arch->uarch, UARCH_UNKNOWN, STRING_UNKNOWN, UNK)
FILL_UARCH(arch->uarch, UARCH_PPC604, "PowerPC 604", 500)
FILL_UARCH(arch->uarch, UARCH_PPCG3, "PowerPC G3", UNK) // varies
FILL_UARCH(arch->uarch, UARCH_PPCG4, "PowerPC G4", UNK) // varies
FILL_UARCH(arch->uarch, UARCH_PPC405, "PowerPC 405", UNK)
FILL_UARCH(arch->uarch, UARCH_PPC603, "PowerPC 603", UNK) // varies
FILL_UARCH(arch->uarch, UARCH_PPC440, "PowerPC 440", UNK)
FILL_UARCH(arch->uarch, UARCH_PPC470, "PowerPC 470", 45) // strange...
FILL_UARCH(arch->uarch, UARCH_PPC970, "PowerPC 970", 130)
FILL_UARCH(arch->uarch, UARCH_PPC970FX, "PowerPC 970FX", 90)
FILL_UARCH(arch->uarch, UARCH_PPC970MP, "PowerPC 970MP", 90)
FILL_UARCH(arch->uarch, UARCH_CELLBE, "Cell BE", UNK) // varies depending on manufacturer
FILL_UARCH(arch->uarch, UARCH_POWER5, "POWER5", 130)
FILL_UARCH(arch->uarch, UARCH_POWER5PLUS, "POWER5+", 90)
FILL_UARCH(arch->uarch, UARCH_POWER6, "POWER6", 65)
FILL_UARCH(arch->uarch, UARCH_POWER7, "POWER7", 45)
FILL_UARCH(arch->uarch, UARCH_POWER7PLUS, "POWER7+", 32)
FILL_UARCH(arch->uarch, UARCH_POWER8, "POWER8", 22)
FILL_UARCH(arch->uarch, UARCH_POWER8_DD21, "POWER8 (DD2.1)", 22)
FILL_UARCH(arch->uarch, UARCH_POWER9, "POWER9", 14)
FILL_UARCH(arch->uarch, UARCH_POWER9_DD20, "POWER9 (DD2.0)", 14)
FILL_UARCH(arch->uarch, UARCH_POWER9_DD21, "POWER9 (DD2.1)", 14)
FILL_UARCH(arch->uarch, UARCH_POWER9_DD22, "POWER9 (DD2.2)", 14)
FILL_UARCH(arch->uarch, UARCH_POWER9_DD23, "POWER9 (DD2.3)", 14)
FILL_UARCH(arch->uarch, UARCH_POWER10, "POWER10", 7)
FILL_END
if(fill) {
arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1));
strcpy(arch->uarch_str, str);
arch->process= process;
}
}
/*
* PVR masks/values from Linux kernel:
* - arch/powerpc/kernel/cputable.c (kernel <= 6.0)
* - arch/powerpc/kernel/cpu_specs_book3s_64.h (kernel >= 6.1)
*
* In the kernel, there is a POWER8E identifier. In
* https://wiki.raptorcs.com/wiki/POWER8E it says it is
* actually DD2.1, while other POWER8 should be DD2.0.
* The last assumption does not seem to be correct according
* to https://openbenchmarking.org/s/POWER8NVL, which shows a
* POWER8NVL where kernel says it is DD1.0. We implement this
* to show only the uarch, not the revision, since it seems a bit
* redundant?
*
* This list may be incorrect, incomplete or overly simplified,
* specially in the case of 32 bit entries
*/
struct uarch* get_uarch_from_pvr(uint32_t pvr) {
struct uarch* arch = emalloc(sizeof(struct uarch));
UARCH_START
// 64 bit
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00390000, UARCH_PPC970)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x003c0000, UARCH_PPC970FX)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x00440100, UARCH_PPC970MP)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00440000, UARCH_PPC970MP)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x003a0000, UARCH_POWER5)
CHECK_UARCH(arch, pvr, 0xffffff00, 0x003b0300, UARCH_POWER5PLUS)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x003b0000, UARCH_POWER5)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000001, UARCH_POWER5)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x003e0000, UARCH_POWER6)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000002, UARCH_POWER6)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000003, UARCH_POWER7)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000004, UARCH_POWER8)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000005, UARCH_POWER9)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000006, UARCH_POWER10)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x003f0000, UARCH_POWER7)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x004A0000, UARCH_POWER7PLUS)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x004b0000, UARCH_POWER8_DD21)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x004c0000, UARCH_POWER8)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x004d0000, UARCH_POWER8)
CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0200, UARCH_POWER9_DD20)
CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0201, UARCH_POWER9_DD21)
CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0202, UARCH_POWER9_DD22)
CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0203, UARCH_POWER9_DD23)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00800000, UARCH_POWER10)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00700000, UARCH_CELLBE)
// 32 bit
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00040000, UARCH_PPC604)
CHECK_UARCH(arch, pvr, 0xfffff000, 0x00090000, UARCH_PPC604)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00090000, UARCH_PPC604)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x000a0000, UARCH_PPC604)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x00084202, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xfffffff0, 0x00080100, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xfffffff0, 0x00082200, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xfffffff0, 0x00082210, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x00083214, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xfffff0e0, 0x00087000, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xfffff000, 0x00083000, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffffff00, 0x70000100, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x70000200, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x70000000, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x70020000, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00080000, UARCH_PPCG3)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x000c1101, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x000c0000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x800c0000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x80000200, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x80000201, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x80000000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffffff00, 0x80010100, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x80010200, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x80010000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x80020100, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x80020101, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x80020000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x80030000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x80040000, UARCH_PPCG4)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00030000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00060000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00070000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00810000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00820000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00830000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00840000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00850000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00860000, UARCH_PPC603)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x41810000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x41610000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x40B10000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x41410000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x50910000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x51510000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x41F10000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x51210000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910007, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x1291000d, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x1291000f, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910003, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910005, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910001, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910009, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x1291000b, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910002, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x41510000, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff11432, UARCH_PPC405)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000850, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000858, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x400008d3, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000ff7, 0x400008d4, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x400008db, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000ffb, 0x200008D0, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000ffb, 0x200008D8, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000440, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000481, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000850, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000851, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000892, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000894, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xfff00fff, 0x53200891, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xfff00fff, 0x53400890, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xfff00fff, 0x53400891, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xffff0006, 0x13020002, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xffff0007, 0x13020004, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xffff0006, 0x13020000, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xffff0007, 0x13020005, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xffffff00, 0x13541800, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xfffffff0, 0x12C41C80, UARCH_PPC440)
CHECK_UARCH(arch, pvr, 0xffffffff, 0x11a52080, UARCH_PPC470)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff50000, UARCH_PPC470)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x00050000, UARCH_PPC470)
CHECK_UARCH(arch, pvr, 0xffff0000, 0x11a50000, UARCH_PPC470)
UARCH_END
return arch;
}
bool has_altivec(struct uarch* arch) {
switch(arch->uarch) {
case UARCH_PPC970FX:
case UARCH_PPC970MP:
case UARCH_CELLBE:
case UARCH_POWER6:
case UARCH_POWER7:
case UARCH_POWER7PLUS:
case UARCH_POWER8:
case UARCH_POWER8_DD21:
case UARCH_POWER9:
case UARCH_POWER9_DD20:
case UARCH_POWER9_DD21:
case UARCH_POWER9_DD22:
case UARCH_POWER9_DD23:
case UARCH_POWER10:
return true;
default:
return false;
}
}
bool is_power9(struct uarch* arch) {
return arch->uarch == UARCH_POWER9 ||
arch->uarch == UARCH_POWER9_DD20 ||
arch->uarch == UARCH_POWER9_DD21 ||
arch->uarch == UARCH_POWER9_DD22 ||
arch->uarch == UARCH_POWER9_DD23;
}
char* get_str_uarch(struct cpuInfo* cpu) {
return cpu->arch->uarch_str;
}
char* get_str_process(struct cpuInfo* cpu) {
char* str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
int32_t process = cpu->arch->process;
if(process == UNK) {
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
}
else if(process > 0){
sprintf(str, "%dnm", process);
}
else {
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
printBug("Found invalid process: '%d'", process);
}
return str;
}
void free_uarch_struct(struct uarch* arch) {
free(arch->uarch_str);
free(arch);
}

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@@ -1,16 +0,0 @@
#ifndef __UARCH__
#define __UARCH__
#include <stdint.h>
#include "ppc.h"
struct uarch;
struct uarch* get_uarch_from_pvr(uint32_t pvr);
bool has_altivec(struct uarch* arch);
bool is_power9(struct uarch* arch);
char* get_str_uarch(struct cpuInfo* cpu);
char* get_str_process(struct cpuInfo* cpu);
void free_uarch_struct(struct uarch* arch);
#endif

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@@ -1,90 +0,0 @@
#include <errno.h>
#include "../common/udev.h"
#include "../common/global.h"
#include "udev.h"
#define _PATH_TOPO_CORE_ID "topology/core_id"
#define _PATH_TOPO_PACKAGE_ID "topology/physical_package_id"
#define CPUINFO_FREQUENCY_STR "clock\t\t: "
bool fill_array_from_sys(int *core_ids, int total_cores, char* SYS_PATH) {
int filelen;
char* buf;
char* end;
char path[128];
memset(path, 0, 128);
for(int i=0; i < total_cores; i++) {
sprintf(path, "%s%s/cpu%d/%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, SYS_PATH);
if((buf = read_file(path, &filelen)) == NULL) {
printWarn("fill_array_from_sys: %s: %s", path, strerror(errno));
return false;
}
errno = 0;
core_ids[i] = strtol(buf, &end, 10);
if(errno != 0) {
printWarn("fill_array_from_sys: %s:", strerror(errno));
return false;
}
free(buf);
}
return true;
}
bool fill_core_ids_from_sys(int *core_ids, int total_cores) {
return fill_array_from_sys(core_ids, total_cores, _PATH_TOPO_CORE_ID);
}
bool fill_package_ids_from_sys(int* package_ids, int total_cores) {
bool status = fill_array_from_sys(package_ids, total_cores, _PATH_TOPO_PACKAGE_ID);
if(status) {
// fill_array_from_sys completed successfully, but we
// must to check the integrity of the package_ids array
for(int i=0; i < total_cores; i++) {
if(package_ids[i] == -1) {
printWarn("fill_package_ids_from_sys: package_ids[%d] = -1", i);
return false;
}
else if(package_ids[i] >= total_cores || package_ids[i] < 0) {
printBug("fill_package_ids_from_sys: package_ids[%d] = %d", i, package_ids[i]);
return false;
}
}
return true;
}
return false;
}
long get_frequency_from_cpuinfo(void) {
char* freq_str = get_field_from_cpuinfo(CPUINFO_FREQUENCY_STR);
if(freq_str == NULL) {
return UNKNOWN_DATA;
}
else {
// freq_str should be in the form XXXX.YYYYYYMHz
char* dot = strstr(freq_str, ".");
freq_str[dot-freq_str] = '\0';
char* end;
errno = 0;
long ret = strtol(freq_str, &end, 10);
if(errno != 0) {
printBug("strtol: %s", strerror(errno));
free(freq_str);
return UNKNOWN_DATA;
}
// We consider it an error if frequency is
// greater than 10 GHz or less than 100 MHz
if(ret > 10000 || ret < 100) {
printBug("Invalid data was read from file '%s': %ld\n", CPUINFO_FREQUENCY_STR, ret);
return UNKNOWN_DATA;
}
return ret;
}
}

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@@ -1,16 +0,0 @@
#ifndef __UDEV_PPC__
#define __UDEV_PPC__
#include "../common/udev.h"
#define _PATH_DT "/proc/device-tree/vpd/root-node-vpd@a000/enclosure@1e00/backplane@800/processor@1000"
#define _PATH_DT_PART "/part-number"
#define _PATH_DT_IBM_PARTIT_NAME "/device-tree/ibm,partition-name"
#define _PATH_DT_HMC_MANAGED "/device-tree/hmc-managed?"
#define _PATH_DT_QEMU_WIDTH "/device-tree/chosen/qemu,graphic-width"
bool fill_core_ids_from_sys(int *core_ids, int total_cores);
bool fill_package_ids_from_sys(int* package_ids, int total_cores);
int get_num_sockets_package_cpus(struct topology* topo);
long get_frequency_from_cpuinfo(void);
#endif

View File

@@ -1,207 +0,0 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include "../common/global.h"
#include "../common/udev.h"
#include "udev.h"
#include "uarch.h"
#include "soc.h"
#define SET_ISA_EXT_MAP(name, bit) \
if(strncmp(multi_letter_extension, name, \
multi_letter_extension_len) == 0) { \
ext->mask |= 1UL << bit; \
maskset = true; \
} \
struct frequency* get_frequency_info(uint32_t core) {
struct frequency* freq = emalloc(sizeof(struct frequency));
freq->measured = false;
freq->base = UNKNOWN_DATA;
freq->max = get_max_freq_from_file(core);
return freq;
}
int64_t get_peak_performance(struct cpuInfo* cpu) {
//First check we have consistent data
if(get_freq(cpu->freq) == UNKNOWN_DATA) {
return -1;
}
int64_t flops = cpu->topo->total_cores * (get_freq(cpu->freq) * 1000000);
return flops;
}
// Returns the length of the multi-letter
// extension, or -1 if an error occurs
int parse_multi_letter_extension(struct extensions* ext, char* e) {
if(*e != '_') return -1;
char* multi_letter_extension_end = strstr(e+1, "_");
if(multi_letter_extension_end == NULL) {
// This is the last extension, find the end
// of the string
multi_letter_extension_end = e + strlen(e);
}
int multi_letter_extension_len = multi_letter_extension_end-(e+1);
bool maskset = false;
char* multi_letter_extension = emalloc(multi_letter_extension_len);
strncpy(multi_letter_extension, e+1, multi_letter_extension_len);
// This should be up-to-date with
// https://elixir.bootlin.com/linux/latest/source/arch/riscv/kernel/cpufeature.c
// which should represent the list of extensions available in real chips
SET_ISA_EXT_MAP("sscofpmf", RISCV_ISA_EXT_SSCOFPMF)
SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC)
SET_ISA_EXT_MAP("svinval", RISCV_ISA_EXT_SVINVAL)
SET_ISA_EXT_MAP("svpbmt", RISCV_ISA_EXT_SVPBMT)
SET_ISA_EXT_MAP("zbb", RISCV_ISA_EXT_ZBB)
SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM)
SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE)
SET_ISA_EXT_MAP("svnapot", RISCV_ISA_EXT_SVNAPOT)
SET_ISA_EXT_MAP("zicboz", RISCV_ISA_EXT_ZICBOZ)
SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA)
SET_ISA_EXT_MAP("ssaia", RISCV_ISA_EXT_SSAIA)
SET_ISA_EXT_MAP("zba", RISCV_ISA_EXT_ZBA)
SET_ISA_EXT_MAP("zbs", RISCV_ISA_EXT_ZBS)
SET_ISA_EXT_MAP("zicntr", RISCV_ISA_EXT_ZICNTR)
SET_ISA_EXT_MAP("zicsr", RISCV_ISA_EXT_ZICSR)
SET_ISA_EXT_MAP("zifencei", RISCV_ISA_EXT_ZIFENCEI)
SET_ISA_EXT_MAP("zihpm", RISCV_ISA_EXT_ZIHPM)
if(!maskset) {
printBug("parse_multi_letter_extension: Unknown multi-letter extension: %s", multi_letter_extension);
return -1;
}
return multi_letter_extension_len;
}
bool valid_extension(char ext) {
bool found = false;
uint64_t idx = 0;
while(idx < sizeof(extension_list)/sizeof(extension_list[0]) && !found) {
found = (extension_list[idx].id == (ext - 'a'));
if(!found) idx++;
}
return found;
}
struct extensions* get_extensions_from_str(char* str) {
struct extensions* ext = emalloc(sizeof(struct extensions));
ext->mask = 0;
ext->str = NULL;
if(str == NULL) {
return ext;
}
int len = sizeof(char) * (strlen(str)+1);
ext->str = emalloc(sizeof(char) * len);
memset(ext->str, 0, len);
strncpy(ext->str, str, sizeof(char) * len);
// Code inspired in Linux kernel (riscv_fill_hwcap):
// https://elixir.bootlin.com/linux/v6.2.10/source/arch/riscv/kernel/cpufeature.c
char* isa = str;
if (!strncmp(isa, "rv32", 4))
isa += 4;
else if (!strncmp(isa, "rv64", 4))
isa += 4;
else {
printBug("get_extensions_from_str: ISA string must start with rv64 or rv32");
return ext;
}
for(char* e = isa; *e != '\0'; e++) {
if(*e == '_') {
// Multi-letter extension
int multi_letter_extension_len = parse_multi_letter_extension(ext, e);
if(multi_letter_extension_len == -1) {
return ext;
}
e += multi_letter_extension_len;
}
else {
// Single-letter extensions 's' and 'u' are invalid
// according to Linux kernel (arch/riscv/kernel/cpufeature.c:
// riscv_fill_hwcap). Optionally, we could opt for using
// hwcap instead of cpuinfo to avoid this
if (*e == 's' || *e == 'u') {
continue;
}
// Make sure that the extension is valid before
// adding it to the mask
if(valid_extension(*e)) {
int n = *e - 'a';
ext->mask |= 1UL << n;
}
else {
printBug("get_extensions_from_str: Invalid extension: '%c'", *e);
}
}
}
return ext;
}
struct cpuInfo* get_cpu_info(void) {
struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
//init_cpu_info(cpu);
struct topology* topo = emalloc(sizeof(struct topology));
topo->total_cores = get_ncores_from_cpuinfo();
topo->cach = NULL;
cpu->topo = topo;
char* cpuinfo_str = get_uarch_from_cpuinfo();
char* ext_str = get_extensions_from_cpuinfo();
cpu->hv = emalloc(sizeof(struct hypervisor));
cpu->hv->present = false;
cpu->ext = get_extensions_from_str(ext_str);
if(cpu->ext->str != NULL && cpu->ext->mask == 0) return NULL;
cpu->arch = get_uarch_from_cpuinfo_str(cpuinfo_str, cpu);
cpu->soc = get_soc(cpu);
cpu->freq = get_frequency_info(0);
cpu->peak_performance = get_peak_performance(cpu);
return cpu;
}
//TODO: Might be worth refactoring with other archs
char* get_str_topology(struct cpuInfo* cpu, struct topology* topo) {
uint32_t size = 3+7+1;
char* string = emalloc(sizeof(char)*size);
snprintf(string, size, "%d cores", topo->total_cores);
return string;
}
char* get_str_extensions(struct cpuInfo* cpu) {
if(cpu->ext != NULL) {
return cpu->ext->str;
}
return NULL;
}
void print_debug(struct cpuInfo* cpu) {
printf("- soc: ");
if(cpu->soc->raw_name == NULL) {
printf("NULL\n");
}
else {
printf("'%s'\n", cpu->soc->raw_name);
}
printf("- uarch: ");
char* arch_cpuinfo_str = get_arch_cpuinfo_str(cpu);
if(arch_cpuinfo_str == NULL) {
printf("NULL\n");
}
else {
printf("'%s'\n", arch_cpuinfo_str);
}
}

View File

@@ -1,82 +0,0 @@
#ifndef __RISCV__
#define __RISCV__
#include "../common/cpu.h"
struct extension {
int id;
char* str;
};
#define RISCV_ISA_EXT_NAME_LEN_MAX 32
#define RISCV_ISA_EXT_BASE 26
// https://elixir.bootlin.com/linux/latest/source/arch/riscv/include/asm/hwcap.h
// This enum represent the logical ID for multi-letter RISC-V ISA extensions.
// The logical ID should start from RISCV_ISA_EXT_BASE
enum riscv_isa_ext_id {
RISCV_ISA_EXT_SSCOFPMF = RISCV_ISA_EXT_BASE,
RISCV_ISA_EXT_SSTC,
RISCV_ISA_EXT_SVINVAL,
RISCV_ISA_EXT_SVPBMT,
RISCV_ISA_EXT_ZBB,
RISCV_ISA_EXT_ZICBOM,
RISCV_ISA_EXT_ZIHINTPAUSE,
RISCV_ISA_EXT_SVNAPOT,
RISCV_ISA_EXT_ZICBOZ,
RISCV_ISA_EXT_SMAIA,
RISCV_ISA_EXT_SSAIA,
RISCV_ISA_EXT_ZBA,
RISCV_ISA_EXT_ZBS,
RISCV_ISA_EXT_ZICNTR,
RISCV_ISA_EXT_ZICSR,
RISCV_ISA_EXT_ZIFENCEI,
RISCV_ISA_EXT_ZIHPM,
RISCV_ISA_EXT_ID_MAX
};
// https://five-embeddev.com/riscv-isa-manual/latest/preface.html#preface
// https://en.wikichip.org/wiki/risc-v/standard_extensions
// Included all except for G
static const struct extension extension_list[] = {
{ 'i' - 'a', "(I) Integer Instruction Set" },
{ 'm' - 'a', "(M) Integer Multiplication and Division" },
{ 'a' - 'a', "(A) Atomic Instructions" },
{ 'f' - 'a', "(F) Single-Precision Floating-Point" },
{ 'd' - 'a', "(D) Double-Precision Floating-Point" },
{ 'q' - 'a', "(Q) Quad-Precision Floating-Point" },
{ 'l' - 'a', "(L) Decimal Floating-Point" },
{ 'c' - 'a', "(C) Compressed Instructions" },
{ 'b' - 'a', "(B) Double-Precision Floating-Point" },
{ 'j' - 'a', "(J) Dynamically Translated Languages" },
{ 't' - 'a', "(T) Transactional Memory" },
{ 'p' - 'a', "(P) Packed-SIMD Instructions" },
{ 'v' - 'a', "(V) Vector Operations" },
{ 'n' - 'a', "(N) User-Level Interrupts" },
{ 'h' - 'a', "(H) Hypervisor" },
// multi-letter extensions
{ RISCV_ISA_EXT_SSCOFPMF, "(Sscofpmf) Count OverFlow and Privilege Mode Filtering" },
{ RISCV_ISA_EXT_SSTC, "(Sstc) S and VS level Time Compare" },
{ RISCV_ISA_EXT_SVINVAL, "(Svinval) Fast TLB Invalidation" },
{ RISCV_ISA_EXT_SVPBMT, "(Svpbmt) Page-based Memory Types" },
{ RISCV_ISA_EXT_ZBB, "(Zbb) Basic bit-manipulation" },
{ RISCV_ISA_EXT_ZICBOM, "(Zicbom) Cache Block Management Operations" },
{ RISCV_ISA_EXT_ZIHINTPAUSE, "(Zihintpause) Pause Hint" },
{ RISCV_ISA_EXT_SVNAPOT, "(Svnapot) Naturally Aligned Power of Two Pages" },
{ RISCV_ISA_EXT_ZICBOZ, "(Zicboz) Cache Block Zero Operations" },
{ RISCV_ISA_EXT_SMAIA, "(Smaia) Advanced Interrupt Architecture" },
{ RISCV_ISA_EXT_SSAIA, "(Ssaia) Advanced Interrupt Architecture" },
{ RISCV_ISA_EXT_ZBA, "(Zba) Address Generation" },
{ RISCV_ISA_EXT_ZBS, "(Zbs) Single-bit Instructions" },
{ RISCV_ISA_EXT_ZICNTR, "(Zicntr) Base Counters and Timers" },
{ RISCV_ISA_EXT_ZICSR, "(Zicsr) Control and Status Register" },
{ RISCV_ISA_EXT_ZIFENCEI, "(Zifencei) Instruction-Fetch Fence" },
{ RISCV_ISA_EXT_ZIHPM, "(Zihpm) Hardware Performance Counters" }
};
struct cpuInfo* get_cpu_info(void);
char* get_str_topology(struct cpuInfo* cpu, struct topology* topo);
char* get_str_extensions(struct cpuInfo* cpu);
void print_debug(struct cpuInfo* cpu);
#endif

View File

@@ -1,93 +0,0 @@
#include "soc.h"
#include "socs.h"
#include "udev.h"
#include "../common/global.h"
#include <string.h>
bool match_sifive(char* soc_name, struct system_on_chip* soc) {
char* tmp = soc_name;
// Dont know if it makes sense in RISC-V
/*if((tmp = strstr(soc_name, "???")) == NULL)
return false;*/
//soc->soc_vendor = ???
SOC_START
SOC_EQ(tmp, "fu740", "Freedom U740", SOC_SIFIVE_U740, soc, 40)
SOC_END
}
bool match_starfive(char* soc_name, struct system_on_chip* soc) {
SOC_START
SOC_EQ(soc_name, "jh7110#", "VisionFive 2", SOC_STARFIVE_VF2, soc, 28) // https://blog.bitsofnetworks.org/benchmarking-risc-v-visionfive-2-vs-the-world.html
SOC_EQ(soc_name, "jh7110", "VisionFive 2", SOC_STARFIVE_VF2, soc, 28)
SOC_END
}
bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
SOC_START
SOC_EQ(soc_name, "sun20i-d1", "D1-H", SOC_ALLWINNER_D1H, soc, 22)
SOC_END
}
bool match_sipeed(char* soc_name, struct system_on_chip* soc) {
SOC_START
SOC_EQ(soc_name, "light", "Lichee Pi 4A", SOC_SIPEED_LICHEEPI4A, soc, 12) // https://github.com/Dr-Noob/cpufetch/issues/200, https://sipeed.com/licheepi4a
SOC_END
}
struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
char* raw_name = soc->raw_name;
if(match_starfive(raw_name, soc))
return soc;
if(match_allwinner(raw_name, soc))
return soc;
if(match_sifive(raw_name, soc))
return soc;
match_sipeed(raw_name, soc);
return soc;
}
struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
char* tmp = get_hardware_from_devtree();
if(tmp != NULL) {
soc->raw_name = tmp;
return parse_soc_from_string(soc);
}
return soc;
}
struct system_on_chip* get_soc(struct cpuInfo* cpu) {
struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
soc->raw_name = NULL;
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
soc->soc_model = SOC_MODEL_UNKNOWN;
soc->process = UNKNOWN;
soc = guess_soc_from_devtree(soc);
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
if(soc->raw_name != NULL) {
printWarn("SoC detection failed using device tree: Found '%s' string", soc->raw_name);
}
else {
printWarn("SoC detection failed using device tree");
}
}
if(soc->soc_model == SOC_MODEL_UNKNOWN) {
// raw_name might not be NULL, but if we were unable to find
// the exact SoC, just print "Unkwnown"
soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
}
return soc;
}

View File

@@ -1,10 +0,0 @@
#ifndef __SOC_RISCV__
#define __SOC_RISCV__
#include "../common/soc.h"
#include "../common/cpu.h"
#include <stdint.h>
struct system_on_chip* get_soc(struct cpuInfo* cpu);
#endif

View File

@@ -1,28 +0,0 @@
#ifndef __SOCS__
#define __SOCS__
#include "soc.h"
// List of supported SOCs
enum {
// SIFIVE
SOC_SIFIVE_U740,
// STARFIVE
SOC_STARFIVE_VF2,
// ALLWINNER
SOC_ALLWINNER_D1H,
// SIPEED
SOC_SIPEED_LICHEEPI4A,
// UNKNOWN
SOC_MODEL_UNKNOWN
};
inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
if(soc >= SOC_SIFIVE_U740 && soc <= SOC_SIFIVE_U740) return SOC_VENDOR_SIFIVE;
if(soc >= SOC_STARFIVE_VF2 && soc <= SOC_STARFIVE_VF2) return SOC_VENDOR_STARFIVE;
if(soc >= SOC_ALLWINNER_D1H && soc <= SOC_ALLWINNER_D1H) return SOC_VENDOR_ALLWINNER;
if(soc >= SOC_SIPEED_LICHEEPI4A && soc <= SOC_SIPEED_LICHEEPI4A) return SOC_VENDOR_SIPEED;
return SOC_VENDOR_UNKNOWN;
}
#endif

View File

@@ -1,84 +0,0 @@
#include <stdbool.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "uarch.h"
#include "../common/global.h"
typedef uint32_t MICROARCH;
struct uarch {
MICROARCH uarch;
char* uarch_str;
char* cpuinfo_str;
};
enum {
UARCH_UNKNOWN,
// SIFIVE
UARCH_U54,
UARCH_U74,
// THEAD
UARCH_C906,
UARCH_C910
};
#define UARCH_START if (false) {}
#define CHECK_UARCH(arch, cpu, cpuinfo_str, uarch_str, str, uarch, vendor) \
else if (strcmp(cpuinfo_str, uarch_str) == 0) fill_uarch(arch, cpu, str, uarch, vendor);
#define UARCH_END else { printBug("Unknown microarchitecture detected: uarch='%s'", cpuinfo_str); fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN); }
void fill_uarch(struct uarch* arch, struct cpuInfo* cpu, char* str, MICROARCH u, VENDOR vendor) {
arch->uarch = u;
cpu->cpu_vendor = vendor;
arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1));
strcpy(arch->uarch_str, str);
}
// https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/riscv/cpus.yaml
// SiFive: https://www.sifive.com/risc-v-core-ip
// T-Head: https://www.t-head.cn/product/c906
struct uarch* get_uarch_from_cpuinfo_str(char* cpuinfo_str, struct cpuInfo* cpu) {
struct uarch* arch = emalloc(sizeof(struct uarch));
arch->cpuinfo_str = cpuinfo_str;
if(cpuinfo_str == NULL) {
printWarn("get_uarch_from_cpuinfo: Unable to detect microarchitecture, cpuinfo_str is NULL");
fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN);
return arch;
}
// U74/U74-MC:
// SiFive says that U74-MC is "Multicore: four U74 cores and one S76 core" while
// U74 is "High performance Linux-capable processor". It's like U74-MC is somehow a small SoC containing
// the U74 and the S76? Then U74-MC is not a microarchitecture per se...
UARCH_START
CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,bullet0", "U74", UARCH_U74, CPU_VENDOR_SIFIVE) // bullet0 is present in U740, which has U74
// CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,e5", "XXXXXX", UARCH_U74, CPU_VENDOR_SIFIVE)
// CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,e7", "XXXXXX", UARCH_U74, CPU_VENDOR_SIFIVE)
// CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,e71", "XXXXXX", UARCH_U74, CPU_VENDOR_SIFIVE)
// CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,rocket0", "XXXXXX", UARCH_U74, CPU_VENDOR_SIFIVE)
// CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u5", "XXXXXX", UARCH_U74, CPU_VENDOR_SIFIVE)
CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u54", "U54", UARCH_U54, CPU_VENDOR_SIFIVE)
// CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u7", "XXXXXX", UARCH_U74, CPU_VENDOR_SIFIVE)
CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u74", "U74", UARCH_U74, CPU_VENDOR_SIFIVE)
CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u74-mc", "U74", UARCH_U74, CPU_VENDOR_SIFIVE)
CHECK_UARCH(arch, cpu, cpuinfo_str, "thead,c906", "T-Head C906", UARCH_C906, CPU_VENDOR_THEAD)
CHECK_UARCH(arch, cpu, cpuinfo_str, "thead,c910", "T-Head C910", UARCH_C910, CPU_VENDOR_THEAD)
UARCH_END
return arch;
}
char* get_str_uarch(struct cpuInfo* cpu) {
return cpu->arch->uarch_str;
}
char* get_arch_cpuinfo_str(struct cpuInfo* cpu) {
return cpu->arch->cpuinfo_str;
}
void free_uarch_struct(struct uarch* arch) {
free(arch->uarch_str);
free(arch);
}

View File

@@ -1,14 +0,0 @@
#ifndef __UARCH__
#define __UARCH__
#include <stdint.h>
#include "riscv.h"
struct uarch;
char* get_arch_cpuinfo_str(struct cpuInfo* cpu);
char* get_str_uarch(struct cpuInfo* cpu);
void free_uarch_struct(struct uarch* arch);
struct uarch* get_uarch_from_cpuinfo_str(char* cpuinfo_str, struct cpuInfo* cpu);
#endif

View File

@@ -1,91 +0,0 @@
#include <errno.h>
#include <string.h>
#include "../common/global.h"
#include "udev.h"
#define _PATH_DEVTREE "/proc/device-tree/compatible"
#define CPUINFO_UARCH_STR "uarch\t\t: "
#define CPUINFO_EXTENSIONS_STR "isa\t\t: "
#define DEVTREE_HARDWARE_FIELD 0
char* get_field_from_devtree(int DEVTREE_FIELD) {
int filelen;
char* buf;
if((buf = read_file(_PATH_DEVTREE, &filelen)) == NULL) {
printWarn("read_file: %s: %s", _PATH_DEVTREE, strerror(errno));
return NULL;
}
// Here we would use strstr to find the comma.
// However, the device-tree file may contain NULL
// bytes in the middle of the string, which would
// cause strstr to return NULL even when there might
// be an occurence after the NULL byte
//
// We iterate the string backwards to find the field
// in position n-DEVTREE_HARDWARE_FIELD where n
// is the number of fields.
int i=0;
char* tmp1 = buf+filelen-1;
do {
tmp1--;
if(*tmp1 == ',') i++;
} while(tmp1 != buf && i <= DEVTREE_FIELD);
if(tmp1 == buf) {
printWarn("get_field_from_devtree: Unable to find field %d", DEVTREE_FIELD);
return NULL;
}
tmp1++;
int strlen = filelen-(tmp1-buf);
char* hardware = emalloc(sizeof(char) * strlen);
memset(hardware, 0, sizeof(char) * strlen);
strncpy(hardware, tmp1, strlen-1);
return hardware;
}
char* parse_cpuinfo_field(char* field_str) {
int filelen;
char* buf;
if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
printWarn("read_file: %s: %s", _PATH_CPUINFO, strerror(errno));
return NULL;
}
char* tmp = strstr(buf, field_str);
if(tmp == NULL) {
printWarn("parse_cpuinfo_field: Unable to find field %s", field_str);
return NULL;
}
tmp += strlen(field_str);
char* end = strstr(tmp, "\n");
if(end == NULL) {
printWarn("parse_cpuinfo_field: Unable to find newline after field %s", field_str);
return NULL;
}
int ret_strlen = (end-tmp);
char* ret = emalloc(sizeof(char) * (ret_strlen+1));
memset(ret, 0, sizeof(char) * (ret_strlen+1));
strncpy(ret, tmp, ret_strlen);
return ret;
}
char* get_hardware_from_devtree(void) {
return get_field_from_devtree(DEVTREE_HARDWARE_FIELD);
}
char* get_uarch_from_cpuinfo(void) {
return parse_cpuinfo_field(CPUINFO_UARCH_STR);
}
char* get_extensions_from_cpuinfo(void) {
return parse_cpuinfo_field(CPUINFO_EXTENSIONS_STR);
}

View File

@@ -1,12 +0,0 @@
#ifndef __UDEV_RISCV__
#define __UDEV_RISCV__
#include "../common/udev.h"
#define UNKNOWN -1
char* get_hardware_from_devtree(void);
char* get_uarch_from_cpuinfo(void);
char* get_extensions_from_cpuinfo(void);
#endif

View File

@@ -1,12 +1,10 @@
#ifdef _WIN32 #ifdef _WIN32
#define NOMINMAX #include <windows.h>
#include <windows.h>
#elif defined __linux__ #elif defined __linux__
#define _GNU_SOURCE #define _GNU_SOURCE
#include <sched.h> #include <sched.h>
#elif defined __FreeBSD__ #elif defined __APPLE__
#include <sys/param.h> #define UNUSED(x) (void)(x)
#include <sys/cpuset.h>
#endif #endif
#include <stdlib.h> #include <stdlib.h>
@@ -14,7 +12,6 @@
#include <string.h> #include <string.h>
#include <stdio.h> #include <stdio.h>
#include <unistd.h> #include <unistd.h>
#include <errno.h>
#include "apic.h" #include "apic.h"
#include "cpuid_asm.h" #include "cpuid_asm.h"
@@ -26,7 +23,7 @@
*/ */
unsigned char bit_scan_reverse(uint32_t* index, uint64_t mask) { unsigned char bit_scan_reverse(uint32_t* index, uint64_t mask) {
for(uint64_t i = (8 * sizeof(uint64_t)); i > 0; i--) { for(uint64_t i = (8 * sizeof(uint64_t)); i > 0; i--) {
if((mask & (1ULL << (i-1))) != 0) { if((mask & (1LL << (i-1))) != 0) {
*index = (uint64_t) (i-1); *index = (uint64_t) (i-1);
break; break;
} }
@@ -72,58 +69,22 @@ uint32_t get_apic_id(bool x2apic_id) {
} }
} }
#ifdef __linux__ #ifndef __APPLE__
int get_total_cores_module(int total_cores, int module) { bool bind_to_cpu(int cpu_id) {
int total_modules = 2; #ifdef _WIN32
int32_t current_module_idx = -1; HANDLE process = GetCurrentProcess();
bool end = false; DWORD_PTR processAffinityMask = 1 << cpu_id;
int32_t* core_types = emalloc(sizeof(uint32_t) * total_modules); return SetProcessAffinityMask(process, processAffinityMask);
for(int i=0; i < total_modules; i++) core_types[i] = -1; #else
int cores_in_module = 0; cpu_set_t currentCPU;
int i = 0; CPU_ZERO(&currentCPU);
CPU_SET(cpu_id, &currentCPU);
// Get the original mask to restore it later if (sched_setaffinity (0, sizeof(currentCPU), &currentCPU) == -1) {
cpu_set_t original_mask; perror("sched_setaffinity");
if(sched_getaffinity(0, sizeof(original_mask), &original_mask) == -1) {
printWarn("sched_getaffinity: %s", strerror(errno));
return false; return false;
} }
return true;
while(!end) { #endif
if(!bind_to_cpu(i)) {
return -1;
}
uint32_t eax = 0x0000001A;
uint32_t ebx = 0;
uint32_t ecx = 0;
uint32_t edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
int32_t core_type = eax >> 24 & 0xFF;
bool found = false;
for(int j=0; j < total_modules && !found; j++) {
if(core_types[j] == core_type) found = true;
}
if(!found) {
current_module_idx++;
core_types[current_module_idx] = core_type;
}
if(current_module_idx == module) {
cores_in_module++;
if(i+1 == total_cores) end = true;
}
else if(cores_in_module > 0) end = true;
i++;
}
// Reset the original affinity
if (sched_setaffinity (0, sizeof(original_mask), &original_mask) == -1) {
printWarn("sched_setaffinity: %s", strerror(errno));
return false;
}
//printf("Module %d has %d cores\n", module, cores_in_module);
return cores_in_module;
} }
#endif #endif
@@ -222,21 +183,21 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
uint32_t max = 0; uint32_t max = 0;
for(int i=0; i < topo->cach->max_cache_level; i++) { for(int i=0; i < topo->cach->max_cache_level; i++) {
for(int j=0; j < topo->total_cores_module; j++) { for(int j=0; j < topo->total_cores; j++) {
if(cache_id_apic[j][i] > max) max = cache_id_apic[j][i]; if(cache_id_apic[j][i] > max) max = cache_id_apic[j][i];
} }
} }
max++; max++;
if(max > (uint32_t) topo->total_cores_module) return max; if(max > (uint32_t) topo->total_cores) return max;
return topo->total_cores_module; return topo->total_cores;
} }
bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) { bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
uint32_t size = max_apic_id_size(cache_id_apic, topo); uint32_t size = max_apic_id_size(cache_id_apic, topo);
uint32_t* sockets = emalloc(sizeof(uint32_t) * size); uint32_t* sockets = malloc(sizeof(uint32_t) * size);
uint32_t* smt = emalloc(sizeof(uint32_t) * size); uint32_t* smt = malloc(sizeof(uint32_t) * size);
uint32_t* apic_id = emalloc(sizeof(uint32_t) * size); uint32_t* apic_id = malloc(sizeof(uint32_t) * size);
uint32_t num_caches = 0; uint32_t num_caches = 0;
memset(sockets, 0, sizeof(uint32_t) * size); memset(sockets, 0, sizeof(uint32_t) * size);
@@ -244,18 +205,18 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
memset(apic_id, 0, sizeof(uint32_t) * size); memset(apic_id, 0, sizeof(uint32_t) * size);
// System topology // System topology
for(int i=0; i < topo->total_cores_module; i++) { for(int i=0; i < topo->total_cores; i++) {
sockets[apic_pkg[i]] = 1; sockets[apic_pkg[i]] = 1;
smt[apic_smt[i]] = 1; smt[apic_smt[i]] = 1;
} }
for(int i=0; i < topo->total_cores_module; i++) { for(int i=0; i < topo->total_cores; i++) {
if(sockets[i] != 0) if(sockets[i] != 0)
topo->sockets++; topo->sockets++;
if(smt[i] != 0) if(smt[i] != 0)
topo->smt_available++; topo->smt_available++;
} }
topo->logical_cores = topo->total_cores_module / topo->sockets; topo->logical_cores = topo->total_cores / topo->sockets;
topo->physical_cores = topo->logical_cores / topo->smt_available; topo->physical_cores = topo->logical_cores / topo->smt_available;
// Cache topology // Cache topology
@@ -263,7 +224,7 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
num_caches = 0; num_caches = 0;
memset(apic_id, 0, sizeof(uint32_t) * size); memset(apic_id, 0, sizeof(uint32_t) * size);
for(int c=0; c < topo->total_cores_module; c++) { for(int c=0; c < topo->total_cores; c++) {
apic_id[cache_id_apic[c][i]]++; apic_id[cache_id_apic[c][i]]++;
} }
for(uint32_t c=0; c < size; c++) { for(uint32_t c=0; c < size; c++) {
@@ -322,10 +283,9 @@ void add_apic_to_array(uint32_t apic, uint32_t* apic_ids, int n) {
} }
} }
bool fill_apic_ids(uint32_t* apic_ids, int first_core, int n, bool x2apic_id) { bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
#ifdef __APPLE__ #ifdef __APPLE__
// macOS extremely dirty approach... // macOS extremely dirty approach...
UNUSED(first_core);
printf("cpufetch is computing APIC IDs, please wait...\n"); printf("cpufetch is computing APIC IDs, please wait...\n");
bool end = false; bool end = false;
uint32_t apic; uint32_t apic;
@@ -339,71 +299,33 @@ bool fill_apic_ids(uint32_t* apic_ids, int first_core, int n, bool x2apic_id) {
usleep(1000); usleep(1000);
} }
#else #else
#ifdef __linux__ for(int i=0; i < n; i++) {
// In Linux we reset the affinity; first we get the original mask
cpu_set_t original_mask;
if(sched_getaffinity(0, sizeof(original_mask), &original_mask) == -1) {
printWarn("sched_getaffinity: %s", strerror(errno));
return false;
}
#endif
for(int i=first_core; i < first_core+n; i++) {
if(!bind_to_cpu(i)) { if(!bind_to_cpu(i)) {
printErr("Failed binding the process to CPU %d", i); printErr("Failed binding to CPU %d", i);
return false; return false;
} }
apic_ids[i-first_core] = get_apic_id(x2apic_id); apic_ids[i] = get_apic_id(x2apic_id);
} }
#ifdef __linux__
// With the original mask previosly retrieved, we reset the affinity
if (sched_setaffinity (0, sizeof(original_mask), &original_mask) == -1) {
printWarn("sched_setaffinity: %s", strerror(errno));
return false;
}
#endif
#endif #endif
return true; return true;
} }
bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) { bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
if (topo->cach == NULL) {
printWarn("get_topology_from_apic: cach is NULL");
return false;
}
uint32_t apic_id; uint32_t apic_id;
uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores_module); uint32_t* apic_ids = malloc(sizeof(uint32_t) * topo->total_cores);
uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores_module); uint32_t* apic_pkg = malloc(sizeof(uint32_t) * topo->total_cores);
uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores_module); uint32_t* apic_core = malloc(sizeof(uint32_t) * topo->total_cores);
uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores_module); uint32_t* apic_smt = malloc(sizeof(uint32_t) * topo->total_cores);
uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores_module); uint32_t** cache_smt_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores_module); uint32_t** cache_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
bool x2apic_id; bool x2apic_id = cpu->maxLevels >= 0x0000000B;
if(cpu->maxLevels >= 0x0000000B) { for(int i=0; i < topo->total_cores; i++) {
uint32_t eax = 0x0000000B; cache_smt_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
uint32_t ebx = 0; cache_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
uint32_t ecx = 0;
uint32_t edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
if(ebx == 0) x2apic_id = false;
else x2apic_id = true;
} }
else { topo->apic->cache_select_mask = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
x2apic_id = false; topo->apic->cache_id_apic = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
}
for(int i=0; i < topo->total_cores_module; i++) {
cache_smt_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
cache_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
}
topo->apic->cache_select_mask = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
topo->apic->cache_id_apic = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
if(x2apic_id) { if(x2apic_id) {
if(!fill_topo_masks_x2apic(topo)) if(!fill_topo_masks_x2apic(topo))
@@ -416,10 +338,10 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
get_cache_topology_from_apic(topo); get_cache_topology_from_apic(topo);
if(!fill_apic_ids(apic_ids, cpu->first_core_id, topo->total_cores_module, x2apic_id)) if(!fill_apic_ids(apic_ids, topo->total_cores, x2apic_id))
return false; return false;
for(int i=0; i < topo->total_cores_module; i++) { for(int i=0; i < topo->total_cores; i++) {
apic_id = apic_ids[i]; apic_id = apic_ids[i];
apic_pkg[i] = (apic_id & topo->apic->pkg_mask) >> topo->apic->pkg_mask_shift; apic_pkg[i] = (apic_id & topo->apic->pkg_mask) >> topo->apic->pkg_mask_shift;
@@ -435,19 +357,20 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
/* DEBUG /* DEBUG
for(int i=0; i < topo->cach->max_cache_level; i++) { for(int i=0; i < topo->cach->max_cache_level; i++) {
printf("[CACH %1d]", i); printf("[CACH %1d]", i);
for(int j=0; j < topo->total_cores_module; j++) for(int j=0; j < topo->total_cores; j++)
printf("[%03d]", cache_id_apic[j][i]); printf("[%03d]", cache_id_apic[j][i]);
printf("\n"); printf("\n");
} }
for(int i=0; i < topo->total_cores_module; i++) for(int i=0; i < topo->total_cores; i++)
printf("[%2d] 0x%.8X\n", i, apic_pkg[i]); printf("[%2d] 0x%.8X\n", i, apic_pkg[i]);
printf("\n"); printf("\n");
for(int i=0; i < topo->total_cores_module; i++) for(int i=0; i < topo->total_cores; i++)
printf("[%2d] 0x%.8X\n", i, apic_core[i]); printf("[%2d] 0x%.8X\n", i, apic_core[i]);
printf("\n"); printf("\n");
for(int i=0; i < topo->total_cores_module; i++) for(int i=0; i < topo->total_cores; i++)
printf("[%2d] 0x%.8X\n", i, apic_smt[i]);*/ printf("[%2d] 0x%.8X\n", i, apic_smt[i]);*/
bool ret = build_topo_from_apic(apic_pkg, apic_smt, cache_id_apic, topo); bool ret = build_topo_from_apic(apic_pkg, apic_smt, cache_id_apic, topo);
// Assumption: If we cant get smt_available, we assume it is equal to smt_supported... // Assumption: If we cant get smt_available, we assume it is equal to smt_supported...
@@ -459,7 +382,7 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
free(apic_pkg); free(apic_pkg);
free(apic_core); free(apic_core);
free(apic_smt); free(apic_smt);
for(int i=0; i < topo->total_cores_module; i++) { for(int i=0; i < topo->total_cores; i++) {
free(cache_smt_id_apic[i]); free(cache_smt_id_apic[i]);
free(cache_id_apic[i]); free(cache_id_apic[i]);
} }

View File

@@ -17,8 +17,4 @@ struct apic {
bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo); bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo);
uint32_t is_smt_enabled_amd(struct topology* topo); uint32_t is_smt_enabled_amd(struct topology* topo);
#ifdef __linux__
int get_total_cores_module(int total_cores, int module);
#endif
#endif #endif

855
src/x86/cpuid.c Normal file → Executable file

File diff suppressed because it is too large Load Diff

View File

@@ -3,19 +3,18 @@
#include "../common/cpu.h" #include "../common/cpu.h"
struct cpuInfo* get_cpu_info(void); struct cpuInfo* get_cpu_info();
struct cache* get_cache_info(struct cpuInfo* cpu); struct cache* get_cache_info(struct cpuInfo* cpu);
struct frequency* get_frequency_info(struct cpuInfo* cpu); struct frequency* get_frequency_info(struct cpuInfo* cpu);
struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int module); struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach);
char* get_str_avx(struct cpuInfo* cpu); char* get_str_avx(struct cpuInfo* cpu);
char* get_str_sse(struct cpuInfo* cpu); char* get_str_sse(struct cpuInfo* cpu);
char* get_str_fma(struct cpuInfo* cpu); char* get_str_fma(struct cpuInfo* cpu);
char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket); char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket);
char* get_str_cpu_name_abbreviated(struct cpuInfo* cpu); char* get_str_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq);
void print_debug(struct cpuInfo* cpu); void print_debug(struct cpuInfo* cpu);
void print_raw(struct cpuInfo* cpu);
void free_topo_struct(struct topology* topo); void free_topo_struct(struct topology* topo);

View File

@@ -1,146 +0,0 @@
#define _GNU_SOURCE
#include <stdio.h>
#include "../../common/global.h"
#include "../uarch.h"
#include "freq.h"
#include "freq_nov.h"
#include "freq_avx.h"
#include "freq_avx512.h"
#include <immintrin.h>
#include <stdlib.h>
#include <stdbool.h>
#include <sys/time.h>
#include <time.h>
#include <errno.h>
#include <string.h>
#include <pthread.h>
#define MAX_NUMBER_THREADS 512
#define FREQ_VECTOR_SIZE 1<<16
struct freq_thread {
bool end;
bool measure;
double freq;
};
double vector_average_harmonic(double* v, int len) {
double acc = 0.0;
for(int i=0; i < len; i++) {
acc += 1 / v[i];
}
return len / acc;
}
void sleep_ms(int64_t ms) {
struct timespec ts;
ts.tv_sec = ms / 1000;
ts.tv_nsec = (ms % 1000) * 1000000;
nanosleep(&ts, &ts);
}
void* measure_freq(void *freq_ptr) {
struct freq_thread* freq = (struct freq_thread*) freq_ptr;
char* end = NULL;
char* line = NULL;
size_t len = 0;
ssize_t read;
int v = 0;
double* freq_vector = malloc(sizeof(double) * FREQ_VECTOR_SIZE);
while(!freq->end) {
if(!freq->measure) continue;
FILE* fp = fopen("/proc/cpuinfo", "r");
if(fp == NULL) return NULL;
while ((read = getline(&line, &len, fp)) != -1) {
if((line = strstr(line, "cpu MHz")) != NULL) {
line = strstr(line, "\t: ");
if(line == NULL) return NULL;
line += sizeof("\t: ") - 1;
double f = strtold(line, &end);
if(errno != 0) {
printf("strtol: %s", strerror(errno));
return NULL;
}
freq_vector[v] = f;
v++;
}
}
fclose(fp);
sleep_ms(500);
}
freq->freq = vector_average_harmonic(freq_vector, v);
printWarn("AVX2 measured freq=%f\n", freq->freq);
return NULL;
}
int64_t measure_frequency(struct cpuInfo* cpu) {
int ret;
int num_spaces;
struct freq_thread* freq_struct = malloc(sizeof(struct freq_thread));
freq_struct->end = false;
freq_struct->measure = false;
void* (*compute_function)(void*);
if(cpu->feat->AVX512 && vpus_are_AVX512(cpu)) {
printf("cpufetch is measuring the AVX512 frequency...");
compute_function = compute_avx512;
num_spaces = 45;
}
else if(cpu->feat->AVX || cpu->feat->AVX2) {
printf("cpufetch is measuring the AVX frequency...");
compute_function = compute_avx;
num_spaces = 42;
}
else {
printf("cpufetch is measuring the frequency (no vector instructions)...");
compute_function = compute_nov;
num_spaces = 63;
}
fflush(stdout);
pthread_t freq_t;
if(pthread_create(&freq_t, NULL, measure_freq, freq_struct)) {
fprintf(stderr, "Error creating thread\n");
return -1;
}
pthread_t* compute_th = malloc(sizeof(pthread_t) * cpu->topo->total_cores);
for(int i=0; i < cpu->topo->total_cores; i++) {
ret = pthread_create(&compute_th[i], NULL, compute_function, NULL);
if(ret != 0) {
fprintf(stderr, "Error creating thread\n");
return -1;
}
}
sleep_ms(500);
freq_struct->measure = true;
for(int i=0; i < cpu->topo->total_cores; i++) {
if(pthread_join(compute_th[i], NULL)) {
fprintf(stderr, "Error joining thread\n");
return -1;
}
freq_struct->end = true;
}
if(pthread_join(freq_t, NULL)) {
fprintf(stderr, "Error joining thread\n");
return -1;
}
printf("\r%*c", num_spaces, ' ');
return freq_struct->freq;
}

View File

@@ -1,13 +0,0 @@
#ifndef __FREQ__
#define __FREQ__
#include <stdint.h>
#include "../../common/cpu.h"
#include "../../common/global.h"
#define MEASURE_TIME_SECONDS 5
#define LOOP_ITERS 100000000
int64_t measure_frequency(struct cpuInfo* cpu);
#endif

View File

@@ -1,57 +0,0 @@
#include <stdio.h>
#include <immintrin.h>
#include <stdlib.h>
#include <stdbool.h>
#include <sys/time.h>
#include <time.h>
#include <errno.h>
#include <string.h>
#include <pthread.h>
#include <stdint.h>
#include "freq.h"
void* compute_avx(void * pthread_arg) {
UNUSED(pthread_arg);
bool end = false;
struct timeval begin, now;
__m256 a[8];
__m256 b[8];
for(int i=0; i < 8; i++) {
a[i] = _mm256_set1_ps(1.5);
b[i] = _mm256_set1_ps(1.2);
}
gettimeofday(&begin, NULL);
while(!end) {
for(uint64_t i=0; i < LOOP_ITERS; i++) {
a[0] = _mm256_add_ps(a[0], b[0]);
a[1] = _mm256_add_ps(a[1], b[1]);
a[2] = _mm256_add_ps(a[2], b[2]);
a[3] = _mm256_add_ps(a[3], b[3]);
a[4] = _mm256_add_ps(a[4], b[4]);
a[5] = _mm256_add_ps(a[5], b[5]);
a[6] = _mm256_add_ps(a[6], b[6]);
a[7] = _mm256_add_ps(a[7], b[7]);
}
gettimeofday(&now, NULL);
double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
end = elapsed >= (double) MEASURE_TIME_SECONDS;
}
FILE* fp = fopen("/dev/null", "w");
if(fp == NULL) {
printf("fopen: %s", strerror(errno));
}
else {
for(int i=0; i < 8; i++)
fprintf(fp, "%f", a[i][0]);
fclose(fp);
}
return NULL;
}

View File

@@ -1,6 +0,0 @@
#ifndef __FREQ_AVX__
#define __FREQ_AVX__
void* compute_avx(void * pthread_arg);
#endif

View File

@@ -1,57 +0,0 @@
#include <stdio.h>
#include <immintrin.h>
#include <stdlib.h>
#include <stdbool.h>
#include <sys/time.h>
#include <time.h>
#include <errno.h>
#include <string.h>
#include <pthread.h>
#include <stdint.h>
#include "freq.h"
void* compute_avx512(void * pthread_arg) {
UNUSED(pthread_arg);
bool end = false;
struct timeval begin, now;
__m512 a[8];
__m512 b[8];
for(int i=0; i < 8; i++) {
a[i] = _mm512_set1_ps(1.5);
b[i] = _mm512_set1_ps(1.2);
}
gettimeofday(&begin, NULL);
while(!end) {
for(uint64_t i=0; i < LOOP_ITERS; i++) {
a[0] = _mm512_add_ps(a[0], b[0]);
a[1] = _mm512_add_ps(a[1], b[1]);
a[2] = _mm512_add_ps(a[2], b[2]);
a[3] = _mm512_add_ps(a[3], b[3]);
a[4] = _mm512_add_ps(a[4], b[4]);
a[5] = _mm512_add_ps(a[5], b[5]);
a[6] = _mm512_add_ps(a[6], b[6]);
a[7] = _mm512_add_ps(a[7], b[7]);
}
gettimeofday(&now, NULL);
double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
end = elapsed >= (double) MEASURE_TIME_SECONDS;
}
FILE* fp = fopen("/dev/null", "w");
if(fp == NULL) {
printf("fopen: %s", strerror(errno));
}
else {
for(int i=0; i < 8; i++)
fprintf(fp, "%f", a[i][0]);
fclose(fp);
}
return NULL;
}

View File

@@ -1,6 +0,0 @@
#ifndef __FREQ_AVX512__
#define __FREQ_AVX512__
void* compute_avx512(void * pthread_arg);
#endif

View File

@@ -1,45 +0,0 @@
#include <stdio.h>
#include <immintrin.h>
#include <stdlib.h>
#include <stdbool.h>
#include <sys/time.h>
#include <time.h>
#include <errno.h>
#include <string.h>
#include <pthread.h>
#include <stdint.h>
#include "freq.h"
void* compute_nov(void * pthread_arg) {
UNUSED(pthread_arg);
bool end = false;
struct timeval begin, now;
float a = 1.5;
float b = 1.2;
float c = 0.0;
gettimeofday(&begin, NULL);
while(!end) {
for(uint64_t i=0; i < LOOP_ITERS; i++) {
c = a * b;
}
gettimeofday(&now, NULL);
double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
end = elapsed >= (double) MEASURE_TIME_SECONDS;
}
FILE* fp = fopen("/dev/null", "w");
if(fp == NULL) {
printf("fopen: %s", strerror(errno));
}
else {
fprintf(fp, "%f", c);
fclose(fp);
}
return NULL;
}

View File

@@ -1,6 +0,0 @@
#ifndef __FREQ_NO_VECTOR__
#define __FREQ_NO_VECTOR__
void* compute_nov(void * pthread_arg);
#endif

View File

@@ -48,9 +48,7 @@ enum {
UARCH_UNKNOWN, UARCH_UNKNOWN,
// INTEL // // INTEL //
UARCH_P5, UARCH_P5,
UARCH_P5_MMX, UARCH_P6,
UARCH_P6_PENTIUM_II,
UARCH_P6_PENTIUM_III,
UARCH_DOTHAN, UARCH_DOTHAN,
UARCH_YONAH, UARCH_YONAH,
UARCH_MEROM, UARCH_MEROM,
@@ -67,7 +65,6 @@ enum {
UARCH_AIRMONT, UARCH_AIRMONT,
UARCH_KABY_LAKE, UARCH_KABY_LAKE,
UARCH_COMET_LAKE, UARCH_COMET_LAKE,
UARCH_ROCKET_LAKE,
UARCH_AMBER_LAKE, UARCH_AMBER_LAKE,
UARCH_WHISKEY_LAKE, UARCH_WHISKEY_LAKE,
UARCH_SKYLAKE, UARCH_SKYLAKE,
@@ -80,8 +77,8 @@ enum {
UARCH_SUNNY_COVE, UARCH_SUNNY_COVE,
UARCH_GOLDMONT_PLUS, UARCH_GOLDMONT_PLUS,
UARCH_TREMONT, UARCH_TREMONT,
UARCH_LAKEMONT, UARCH_WILLOW_COVE,
UARCH_COFFEE_LAKE, UARCH_COFFE_LAKE,
UARCH_ITANIUM, UARCH_ITANIUM,
UARCH_KNIGHTS_FERRY, UARCH_KNIGHTS_FERRY,
UARCH_KNIGHTS_CORNER, UARCH_KNIGHTS_CORNER,
@@ -91,9 +88,6 @@ enum {
UARCH_CEDAR_MILL, UARCH_CEDAR_MILL,
UARCH_ITANIUM2, UARCH_ITANIUM2,
UARCH_ICE_LAKE, UARCH_ICE_LAKE,
UARCH_TIGER_LAKE,
UARCH_ALDER_LAKE,
UARCH_RAPTOR_LAKE,
// AMD // // AMD //
UARCH_AM486, UARCH_AM486,
UARCH_AM5X86, UARCH_AM5X86,
@@ -112,10 +106,7 @@ enum {
UARCH_ZEN, UARCH_ZEN,
UARCH_ZEN_PLUS, UARCH_ZEN_PLUS,
UARCH_ZEN2, UARCH_ZEN2,
UARCH_ZEN3, UARCH_ZEN3
UARCH_ZEN3_PLUS,
UARCH_ZEN4,
UARCH_ZEN4C
}; };
struct uarch { struct uarch {
@@ -127,11 +118,10 @@ struct uarch {
#define UARCH_START if (false) {} #define UARCH_START if (false) {}
#define CHECK_UARCH(arch, ef_, f_, em_, m_, s_, str, uarch, process) \ #define CHECK_UARCH(arch, ef_, f_, em_, m_, s_, str, uarch, process) \
else if (ef_ == ef && f_ == f && (em_ == NA || em_ == em) && (m_ == NA || m_ == m) && (s_ == NA || s_ == s)) fill_uarch(arch, str, uarch, process); else if (ef_ == ef && f_ == f && (em_ == NA || em_ == em) && (m_ == NA || m_ == m) && (s_ == NA || s_ == s)) fill_uarch(arch, str, uarch, process);
#define UARCH_END else { printBugCheckRelease("Unknown microarchitecture detected: M=0x%X EM=0x%X F=0x%X EF=0x%X S=0x%X", m, em, f, ef, s); \ #define UARCH_END else { printBug("Unknown microarchitecture detected: M=0x%.8X EM=0x%.8X F=0x%.8X EF=0x%.8X S=0x%.8X", m, em, f, ef, s); fill_uarch(arch, "Unknown", UARCH_UNKNOWN, 0); }
fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK); }
void fill_uarch(struct uarch* arch, char* str, MICROARCH u, uint32_t process) { void fill_uarch(struct uarch* arch, char* str, MICROARCH u, uint32_t process) {
arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1)); arch->uarch_str = malloc(sizeof(char) * (strlen(str)+1));
strcpy(arch->uarch_str, str); strcpy(arch->uarch_str, str);
arch->uarch = u; arch->uarch = u;
arch->process= process; arch->process= process;
@@ -139,38 +129,36 @@ void fill_uarch(struct uarch* arch, char* str, MICROARCH u, uint32_t process) {
// Inspired in Todd Allen's decode_uarch_intel // Inspired in Todd Allen's decode_uarch_intel
struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) { struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
struct uarch* arch = emalloc(sizeof(struct uarch)); struct uarch* arch = malloc(sizeof(struct uarch));
// EF: Extended Family // // EF: Extended Family //
// F: Family // // F: Family //
// EM: Extended Model // // EM: Extended Model //
// M: Model // // M: Model //
// S: Stepping // // S: Stepping //
// ------------------------------------------------------------------------------- // // ----------------------------------------------------------------------------- //
// EF F EM M S // // EF F EM M S //
UARCH_START UARCH_START
CHECK_UARCH(arch, 0, 5, 0, 0, NA, "P5", UARCH_P5, 800) CHECK_UARCH(arch, 0, 5, 0, 0, NA, "P5", UARCH_P5, 800)
CHECK_UARCH(arch, 0, 5, 0, 1, NA, "P5", UARCH_P5, 800) CHECK_UARCH(arch, 0, 5, 0, 1, NA, "P5", UARCH_P5, 800)
CHECK_UARCH(arch, 0, 5, 0, 2, NA, "P5", UARCH_P5, UNK) CHECK_UARCH(arch, 0, 5, 0, 2, NA, "P5", UARCH_P5, UNK)
CHECK_UARCH(arch, 0, 5, 0, 3, NA, "P5", UARCH_P5, 600) CHECK_UARCH(arch, 0, 5, 0, 3, NA, "P5", UARCH_P5, 600)
CHECK_UARCH(arch, 0, 5, 0, 4, NA, "P5 (MMX)", UARCH_P5_MMX, UNK) CHECK_UARCH(arch, 0, 5, 0, 4, NA, "P5 MMX", UARCH_P5, UNK)
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "P5 (MMX)", UARCH_P5_MMX, UNK) CHECK_UARCH(arch, 0, 5, 0, 7, NA, "P5 MMX", UARCH_P5, UNK)
CHECK_UARCH(arch, 0, 5, 0, 8, NA, "P5 (MMX)", UARCH_P5_MMX, 250) CHECK_UARCH(arch, 0, 5, 0, 8, NA, "P5 MMX", UARCH_P5, 250)
CHECK_UARCH(arch, 0, 5, 0, 9, 0, "Lakemont", UARCH_LAKEMONT, 32) CHECK_UARCH(arch, 0, 5, 0, 9, NA, "P5 MMX", UARCH_P5, UNK)
CHECK_UARCH(arch, 0, 5, 0, 9, NA, "P5 (MMX)", UARCH_P5_MMX, UNK) CHECK_UARCH(arch, 0, 6, 0, 0, NA, "P6 Pentium II", UARCH_P6, UNK)
CHECK_UARCH(arch, 0, 5, 0, 10, 0, "Lakemont", UARCH_LAKEMONT, 32) CHECK_UARCH(arch, 0, 6, 0, 1, NA, "P6 Pentium II", UARCH_P6, UNK) // process depends on core
CHECK_UARCH(arch, 0, 6, 0, 0, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK) CHECK_UARCH(arch, 0, 6, 0, 2, NA, "P6 Pentium II", UARCH_P6, UNK)
CHECK_UARCH(arch, 0, 6, 0, 1, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK) // process depends on core CHECK_UARCH(arch, 0, 6, 0, 3, NA, "P6 Pentium II", UARCH_P6, 350)
CHECK_UARCH(arch, 0, 6, 0, 2, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK) CHECK_UARCH(arch, 0, 6, 0, 4, NA, "P6 Pentium II", UARCH_P6, UNK)
CHECK_UARCH(arch, 0, 6, 0, 3, NA, "P6 (Klamath)", UARCH_P6_PENTIUM_II, 350) // http://instlatx64.atw.hu. CHECK_UARCH(arch, 0, 6, 0, 5, NA, "P6 Pentium II", UARCH_P6, 250)
CHECK_UARCH(arch, 0, 6, 0, 4, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK) CHECK_UARCH(arch, 0, 6, 0, 6, NA, "P6 Pentium II", UARCH_P6, UNK)
CHECK_UARCH(arch, 0, 6, 0, 5, NA, "P6 (Deschutes)", UARCH_P6_PENTIUM_II, 250) // http://instlatx64.atw.hu. CHECK_UARCH(arch, 0, 6, 0, 7, NA, "P6 Pentium III", UARCH_P6, 250)
CHECK_UARCH(arch, 0, 6, 0, 6, NA, "P6 (Dixon)", UARCH_P6_PENTIUM_II, UNK) // http://instlatx64.atw.hu. CHECK_UARCH(arch, 0, 6, 0, 8, NA, "P6 Pentium III", UARCH_P6, 180)
CHECK_UARCH(arch, 0, 6, 0, 7, NA, "P6 (Katmai)", UARCH_P6_PENTIUM_III, 250) // Core names from: https://en.wikichip.org/wiki/intel/cpuid. NOTE: Xeon core names are different! https://www.techpowerup.com/cpu-specs/?generation=Intel+Pentium+III+Xeon CHECK_UARCH(arch, 0, 6, 0, 9, NA, "P6 Pentium M", UARCH_P6, 130)
CHECK_UARCH(arch, 0, 6, 0, 8, NA, "P6 (Coppermine)", UARCH_P6_PENTIUM_III, 180) // Also: https://en.wikipedia.org/wiki/Pentium_III CHECK_UARCH(arch, 0, 6, 0, 10, NA, "P6 Pentium III", UARCH_P6, 180)
CHECK_UARCH(arch, 0, 6, 0, 9, NA, "P6 (Pentium M)", UARCH_P6_PENTIUM_III, 130) CHECK_UARCH(arch, 0, 6, 0, 11, NA, "P6 Pentium III", UARCH_P6, 130)
CHECK_UARCH(arch, 0, 6, 0, 10, NA, "P6 (Coppermine T)", UARCH_P6_PENTIUM_III, 180)
CHECK_UARCH(arch, 0, 6, 0, 11, NA, "P6 (Tualatin)", UARCH_P6_PENTIUM_III, 130)
CHECK_UARCH(arch, 0, 6, 0, 13, NA, "Dothan", UARCH_DOTHAN, UNK) // process depends on core CHECK_UARCH(arch, 0, 6, 0, 13, NA, "Dothan", UARCH_DOTHAN, UNK) // process depends on core
CHECK_UARCH(arch, 0, 6, 0, 14, NA, "Yonah", UARCH_YONAH, 65) CHECK_UARCH(arch, 0, 6, 0, 14, NA, "Yonah", UARCH_YONAH, 65)
CHECK_UARCH(arch, 0, 6, 0, 15, NA, "Merom", UARCH_MEROM, 65) CHECK_UARCH(arch, 0, 6, 0, 15, NA, "Merom", UARCH_MEROM, 65)
@@ -229,29 +217,22 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
CHECK_UARCH(arch, 0, 6, 8, 5, NA, "Knights Mill", UARCH_KNIGHTS_MILL, 14) // no spec update; only MSR_CPUID_table* so far CHECK_UARCH(arch, 0, 6, 8, 5, NA, "Knights Mill", UARCH_KNIGHTS_MILL, 14) // no spec update; only MSR_CPUID_table* so far
CHECK_UARCH(arch, 0, 6, 8, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX* CHECK_UARCH(arch, 0, 6, 8, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
CHECK_UARCH(arch, 0, 6, 8, 10, NA, "Tremont", UARCH_TREMONT, 10) // no spec update; only geekbench.com example CHECK_UARCH(arch, 0, 6, 8, 10, NA, "Tremont", UARCH_TREMONT, 10) // no spec update; only geekbench.com example
CHECK_UARCH(arch, 0, 6, 8, 12, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64 CHECK_UARCH(arch, 0, 6, 8, 12, NA, "Willow Cove", UARCH_WILLOW_COVE, 10) // found only on en.wikichip.org
CHECK_UARCH(arch, 0, 6, 8, 13, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64 CHECK_UARCH(arch, 0, 6, 8, 13, NA, "Willow Cove", UARCH_WILLOW_COVE, 10) // LX*
// CHECK_UARCH(arch, 0, 6, 8, 14, 9, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake) CHECK_UARCH(arch, 0, 6, 8, 14, 9, "Amber Lake", UARCH_AMBER_LAKE, 14) // wikichip
// CHECK_UARCH(arch, 0, 6, 8, 14, 10, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U) CHECK_UARCH(arch, 0, 6, 8, 14, 10, "Kaby Lake", UARCH_KABY_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 8, 14, 11, "Whiskey Lake", UARCH_WHISKEY_LAKE, 14) // wikichip CHECK_UARCH(arch, 0, 6, 8, 14, 11, "Whiskey Lake", UARCH_WHISKEY_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 8, 14, 12, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip CHECK_UARCH(arch, 0, 6, 8, 14, 12, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 9, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX* CHECK_UARCH(arch, 0, 6, 9, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
CHECK_UARCH(arch, 0, 6, 9, 7, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-S)
CHECK_UARCH(arch, 0, 6, 9, 10, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-P)
CHECK_UARCH(arch, 0, 6, 9, 12, NA, "Tremont", UARCH_TREMONT, 10) // LX* CHECK_UARCH(arch, 0, 6, 9, 12, NA, "Tremont", UARCH_TREMONT, 10) // LX*
CHECK_UARCH(arch, 0, 6, 9, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // LX* CHECK_UARCH(arch, 0, 6, 9, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // LX*
CHECK_UARCH(arch, 0, 6, 9, 14, 9, "Kaby Lake", UARCH_KABY_LAKE, 14) CHECK_UARCH(arch, 0, 6, 9, 14, 9, "Kaby Lake", UARCH_KABY_LAKE, 14)
CHECK_UARCH(arch, 0, 6, 9, 14, 10, "Coffee Lake", UARCH_COFFEE_LAKE, 14) CHECK_UARCH(arch, 0, 6, 9, 14, 10, "Coffee Lake", UARCH_COFFE_LAKE, 14)
CHECK_UARCH(arch, 0, 6, 9, 14, 11, "Coffee Lake", UARCH_COFFEE_LAKE, 14) CHECK_UARCH(arch, 0, 6, 9, 14, 11, "Coffee Lake", UARCH_COFFE_LAKE, 14)
CHECK_UARCH(arch, 0, 6, 9, 14, 12, "Coffee Lake", UARCH_COFFEE_LAKE, 14) CHECK_UARCH(arch, 0, 6, 9, 14, 12, "Coffee Lake", UARCH_COFFE_LAKE, 14)
CHECK_UARCH(arch, 0, 6, 9, 14, 13, "Coffee Lake", UARCH_COFFEE_LAKE, 14) CHECK_UARCH(arch, 0, 6, 9, 14, 13, "Coffee Lake", UARCH_COFFE_LAKE, 14)
CHECK_UARCH(arch, 0, 6, 10, 5, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip CHECK_UARCH(arch, 0, 6, 10, 5, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 10, 6, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // instlatx64.atw.hu (i7-10710U) CHECK_UARCH(arch, 0, 6, 10, 6, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // instlatx64.atw.hu (i7-10710U)
CHECK_UARCH(arch, 0, 6, 10, 7, NA, "Rocket Lake", UARCH_ROCKET_LAKE, 14) // instlatx64.atw.hu (i7-11700K)
CHECK_UARCH(arch, 0, 6, 11, 7, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i5-13600K)
CHECK_UARCH(arch, 0, 6, 11, 10, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i7-1370P)
CHECK_UARCH(arch, 0, 6, 11, 14, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64.atw.hu (Alder Lake-N)
CHECK_UARCH(arch, 0, 6, 11, 15, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i5-13500)
CHECK_UARCH(arch, 0, 11, 0, 0, NA, "Knights Ferry", UARCH_KNIGHTS_FERRY, 45) // found only on en.wikichip.org CHECK_UARCH(arch, 0, 11, 0, 0, NA, "Knights Ferry", UARCH_KNIGHTS_FERRY, 45) // found only on en.wikichip.org
CHECK_UARCH(arch, 0, 11, 0, 1, NA, "Knights Corner", UARCH_KNIGHTS_CORNER, 22) CHECK_UARCH(arch, 0, 11, 0, 1, NA, "Knights Corner", UARCH_KNIGHTS_CORNER, 22)
CHECK_UARCH(arch, 0, 15, 0, 0, NA, "Willamette", UARCH_WILLAMETTE, 180) CHECK_UARCH(arch, 0, 15, 0, 0, NA, "Willamette", UARCH_WILLAMETTE, 180)
@@ -264,12 +245,13 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
CHECK_UARCH(arch, 1, 15, 0, 1, NA, "Itanium2", UARCH_ITANIUM2, 130) CHECK_UARCH(arch, 1, 15, 0, 1, NA, "Itanium2", UARCH_ITANIUM2, 130)
CHECK_UARCH(arch, 1, 15, 0, 2, NA, "Itanium2", UARCH_ITANIUM2, 130) CHECK_UARCH(arch, 1, 15, 0, 2, NA, "Itanium2", UARCH_ITANIUM2, 130)
UARCH_END UARCH_END
return arch; return arch;
} }
// Inspired in Todd Allen's decode_uarch_amd // iNApired in Todd Allen's decode_uarch_amd
struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) { struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
struct uarch* arch = emalloc(sizeof(struct uarch)); struct uarch* arch = malloc(sizeof(struct uarch));
// EF: Extended Family // // EF: Extended Family //
// F: Family // // F: Family //
@@ -286,7 +268,6 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
CHECK_UARCH(arch, 0, 4, NA, NA, NA, "Am5x86", UARCH_AM5X86, UNK) CHECK_UARCH(arch, 0, 4, NA, NA, NA, "Am5x86", UARCH_AM5X86, UNK)
CHECK_UARCH(arch, 0, 5, 0, 6, NA, "K6", UARCH_K6, 300) CHECK_UARCH(arch, 0, 5, 0, 6, NA, "K6", UARCH_K6, 300)
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "K6", UARCH_K6, 250) // *p from sandpile.org CHECK_UARCH(arch, 0, 5, 0, 7, NA, "K6", UARCH_K6, 250) // *p from sandpile.org
CHECK_UARCH(arch, 0, 5, 0, 10, NA, "K7", UARCH_K7, 130) // Geode NX
CHECK_UARCH(arch, 0, 5, 0, 13, NA, "K6", UARCH_K6, 80) // *p from sandpile.org CHECK_UARCH(arch, 0, 5, 0, 13, NA, "K6", UARCH_K6, 80) // *p from sandpile.org
CHECK_UARCH(arch, 0, 5, NA, NA, NA, "K6", UARCH_K6, UNK) CHECK_UARCH(arch, 0, 5, NA, NA, NA, "K6", UARCH_K6, UNK)
CHECK_UARCH(arch, 0, 6, 0, 1, NA, "K7", UARCH_K7, 250) CHECK_UARCH(arch, 0, 6, 0, 1, NA, "K7", UARCH_K7, 250)
@@ -342,7 +323,7 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
CHECK_UARCH(arch, 2, 15, NA, NA, NA, "Puma 2008", UARCH_PUMA_2008, 65) CHECK_UARCH(arch, 2, 15, NA, NA, NA, "Puma 2008", UARCH_PUMA_2008, 65)
CHECK_UARCH(arch, 3, 15, NA, NA, NA, "K10", UARCH_K10, 32) CHECK_UARCH(arch, 3, 15, NA, NA, NA, "K10", UARCH_K10, 32)
CHECK_UARCH(arch, 5, 15, NA, NA, NA, "Bobcat", UARCH_BOBCAT, 40) CHECK_UARCH(arch, 5, 15, NA, NA, NA, "Bobcat", UARCH_BOBCAT, 40)
CHECK_UARCH(arch, 6, 15, 0, 0, NA, "Bulldozer", UARCH_BULLDOZER, 32) // instlatx64 engr sample CHECK_UARCH(arch, 6, 15, 0, 0, NA, "Bulldozer", UARCH_BULLDOZER, 32) // iNAtlatx64 engr sample
CHECK_UARCH(arch, 6, 15, 0, 1, NA, "Bulldozer", UARCH_BULLDOZER, 32) CHECK_UARCH(arch, 6, 15, 0, 1, NA, "Bulldozer", UARCH_BULLDOZER, 32)
CHECK_UARCH(arch, 6, 15, 0, 2, NA, "Piledriver", UARCH_PILEDRIVER, 32) CHECK_UARCH(arch, 6, 15, 0, 2, NA, "Piledriver", UARCH_PILEDRIVER, 32)
CHECK_UARCH(arch, 6, 15, 1, 0, NA, "Piledriver", UARCH_PILEDRIVER, 32) CHECK_UARCH(arch, 6, 15, 1, 0, NA, "Piledriver", UARCH_PILEDRIVER, 32)
@@ -350,163 +331,34 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
CHECK_UARCH(arch, 6, 15, 3, 0, NA, "Steamroller", UARCH_STEAMROLLER, 28) CHECK_UARCH(arch, 6, 15, 3, 0, NA, "Steamroller", UARCH_STEAMROLLER, 28)
CHECK_UARCH(arch, 6, 15, 3, 8, NA, "Steamroller", UARCH_STEAMROLLER, 28) CHECK_UARCH(arch, 6, 15, 3, 8, NA, "Steamroller", UARCH_STEAMROLLER, 28)
CHECK_UARCH(arch, 6, 15, 4, 0, NA, "Steamroller", UARCH_STEAMROLLER, 28) // Software Optimization Guide (15h) says it has the same iNAt latencies as (6,15),(3,x). CHECK_UARCH(arch, 6, 15, 4, 0, NA, "Steamroller", UARCH_STEAMROLLER, 28) // Software Optimization Guide (15h) says it has the same iNAt latencies as (6,15),(3,x).
CHECK_UARCH(arch, 6, 15, 6, 0, NA, "Excavator", UARCH_EXCAVATOR, 28) // undocumented, but instlatx64 samples CHECK_UARCH(arch, 6, 15, 6, 0, NA, "Excavator", UARCH_EXCAVATOR, 28) // undocumented, but iNAtlatx64 samples
CHECK_UARCH(arch, 6, 15, 6, 5, NA, "Excavator", UARCH_EXCAVATOR, 28) // undocumented, but sample from Alexandros Couloumbis CHECK_UARCH(arch, 6, 15, 6, 5, NA, "Excavator", UARCH_EXCAVATOR, 28) // undocumented, but sample from Alexandros Couloumbis
CHECK_UARCH(arch, 6, 15, 7, 0, NA, "Excavator", UARCH_EXCAVATOR, 28) CHECK_UARCH(arch, 6, 15, 7, 0, NA, "Excavator", UARCH_EXCAVATOR, 28)
CHECK_UARCH(arch, 7, 15, 0, 0, NA, "Jaguar", UARCH_JAGUAR, 28) CHECK_UARCH(arch, 7, 15, 0, 0, NA, "Jaguar", UARCH_JAGUAR, 28)
CHECK_UARCH(arch, 7, 15, 1, NA, NA, "Jaguar", UARCH_JAGUAR, 14) // instlatx64 (PS4) Normal PS4 is 28nm, Slim and Pro are 16nm
CHECK_UARCH(arch, 7, 15, 2, 6, NA, "Jaguar", UARCH_JAGUAR, 28) // AMD Cato (Xbox One?)
CHECK_UARCH(arch, 7, 15, 3, 0, NA, "Puma 2014", UARCH_PUMA_2014, 28) CHECK_UARCH(arch, 7, 15, 3, 0, NA, "Puma 2014", UARCH_PUMA_2014, 28)
CHECK_UARCH(arch, 8, 15, 0, 0, NA, "Zen", UARCH_ZEN, 14) // instlatx64 engr sample CHECK_UARCH(arch, 8, 15, 0, 0, NA, "Zen", UARCH_ZEN, 14) // iNAtlatx64 engr sample
CHECK_UARCH(arch, 8, 15, 0, 1, NA, "Zen", UARCH_ZEN, 14) CHECK_UARCH(arch, 8, 15, 0, 1, NA, "Zen", UARCH_ZEN, 14)
CHECK_UARCH(arch, 8, 15, 0, 8, NA, "Zen+", UARCH_ZEN_PLUS, 12) CHECK_UARCH(arch, 8, 15, 0, 8, NA, "Zen+", UARCH_ZEN_PLUS, 12)
CHECK_UARCH(arch, 8, 15, 1, 1, NA, "Zen", UARCH_ZEN, 14) // found only on en.wikichip.org & instlatx64 examples CHECK_UARCH(arch, 8, 15, 1, 1, NA, "Zen", UARCH_ZEN, 14) // found only on en.wikichip.org & iNAtlatx64 examples
CHECK_UARCH(arch, 8, 15, 1, 8, NA, "Zen+", UARCH_ZEN_PLUS, 12) // found only on en.wikichip.org CHECK_UARCH(arch, 8, 15, 1, 8, NA, "Zen+", UARCH_ZEN_PLUS, 12) // found only on en.wikichip.org
CHECK_UARCH(arch, 8, 15, 2, 0, NA, "Zen", UARCH_ZEN, 14) // Dali, found on instlatx64 and en.wikichip.org
CHECK_UARCH(arch, 8, 15, 3, 1, NA, "Zen 2", UARCH_ZEN2, 7) // found only on en.wikichip.org CHECK_UARCH(arch, 8, 15, 3, 1, NA, "Zen 2", UARCH_ZEN2, 7) // found only on en.wikichip.org
CHECK_UARCH(arch, 8, 15, 4, 7, NA, "Zen 2", UARCH_ZEN2, 7) // instlatx64 example (AMD 4700S)
CHECK_UARCH(arch, 8, 15, 5, 0, NA, "Zen", UARCH_ZEN, 14) // instlatx64 example (Subor Z+)
CHECK_UARCH(arch, 8, 15, 6, 0, NA, "Zen 2", UARCH_ZEN2, 7) // undocumented, geekbench.com example CHECK_UARCH(arch, 8, 15, 6, 0, NA, "Zen 2", UARCH_ZEN2, 7) // undocumented, geekbench.com example
CHECK_UARCH(arch, 8, 15, 6, 8, NA, "Zen 2", UARCH_ZEN2, 7) // found on instlatx64 CHECK_UARCH(arch, 8, 15, 7, 1, NA, "Zen 2", UARCH_ZEN2, 7) // undocumented, but samples from Steven Noonan
CHECK_UARCH(arch, 8, 15, 7, 1, NA, "Zen 2", UARCH_ZEN2, 7) // samples from Steven Noonan and instlatx64 CHECK_UARCH(arch, 10, 15, NA, NA, NA, "Zen 3", UARCH_ZEN3, 7) // undocumented, LX*
CHECK_UARCH(arch, 8, 15, 8, 4, NA, "Zen 2", UARCH_ZEN2, 7) // instlatx64 (Xbox Series X?)
CHECK_UARCH(arch, 8, 15, 9, 0, 2, "Zen 2", UARCH_ZEN2, 7) // Steam Deck (instlatx64)
CHECK_UARCH(arch, 8, 15, 10, 0, NA, "Zen 2", UARCH_ZEN2, 6) // instlatx64
CHECK_UARCH(arch, 10, 15, 0, 1, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
CHECK_UARCH(arch, 10, 15, 0, 8, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
CHECK_UARCH(arch, 10, 15, 1, 1, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64
CHECK_UARCH(arch, 10, 15, 1, 8, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64
CHECK_UARCH(arch, 10, 15, 2, 1, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
CHECK_UARCH(arch, 10, 15, 3, NA, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
CHECK_UARCH(arch, 10, 15, 4, 4, NA, "Zen 3+", UARCH_ZEN3_PLUS, 6) // instlatx64 (they say it is Zen3...)
CHECK_UARCH(arch, 10, 15, 5, 0, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
CHECK_UARCH(arch, 10, 15, 6, 1, 2, "Zen 4", UARCH_ZEN4, 5) // instlatx64
CHECK_UARCH(arch, 10, 15, 7, 4, 1, "Zen 4", UARCH_ZEN4, 4) // instlatx64
CHECK_UARCH(arch, 10, 15, 7, 5, 2, "Zen 4", UARCH_ZEN4, 4) // instlatx64
CHECK_UARCH(arch, 10, 15, 7, 8, 0, "Zen 4", UARCH_ZEN4, 4) // instlatx64
CHECK_UARCH(arch, 10, 15, 8, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300C)
CHECK_UARCH(arch, 10, 15, 9, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300A)
CHECK_UARCH(arch, 10, 15, 10, NA, NA, "Zen 4c", UARCH_ZEN4C, 5) // instlatx64
UARCH_END UARCH_END
return arch; return arch;
} }
struct uarch* get_uarch_from_cpuid_hygon(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) { struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
struct uarch* arch = emalloc(sizeof(struct uarch)); if(cpu->cpu_vendor == CPU_VENDOR_INTEL)
// EF: Extended Family //
// F: Family //
// EM: Extended Model //
// M: Model //
// S: Stepping //
// ----------------------------------------------------------------------------- //
// EF F EM M S //
UARCH_START
// https://www.phoronix.com/news/Hygon-Dhyana-AMD-China-CPUs
CHECK_UARCH(arch, 9, 15, 0, 1, NA, "Zen", UARCH_ZEN, UNK) // https://github.com/Dr-Noob/cpufetch/issues/244
// CHECK_UARCH(arch, 9, 15, 0, 2, NA, "???", ?????????, UNK) // http://instlatx64.atw.hu/
UARCH_END
return arch;
}
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
struct uarch* arch = emalloc(sizeof(struct uarch));
if(dump == 0x000806E9) {
if (cpu->cpu_name == NULL) {
printErr("Unable to find uarch without CPU name");
fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK);
return arch;
}
// It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
// See issue https://github.com/Dr-Noob/cpufetch/issues/122
if(strstr(cpu->cpu_name, "Y") != NULL) {
fill_uarch(arch, "Amber Lake", UARCH_AMBER_LAKE, 14);
}
else {
fill_uarch(arch, "Kaby Lake", UARCH_KABY_LAKE, 14);
}
return arch;
}
else if (dump == 0x000806EA) {
if (cpu->cpu_name == NULL) {
printErr("Unable to find uarch without CPU name");
fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK);
return arch;
}
// It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
// See issue https://github.com/Dr-Noob/cpufetch/issues/149
if(strstr(cpu->cpu_name, "i5-8250U") != NULL ||
strstr(cpu->cpu_name, "i5-8350U") != NULL ||
strstr(cpu->cpu_name, "i7-8550U") != NULL ||
strstr(cpu->cpu_name, "i7-8650U") != NULL) {
fill_uarch(arch, "Kaby Lake", UARCH_KABY_LAKE, 14);
}
else {
fill_uarch(arch, "Coffee Lake", UARCH_COFFEE_LAKE, 14);
}
return arch;
}
return get_uarch_from_cpuid_intel(ef, f, em, m, s); return get_uarch_from_cpuid_intel(ef, f, em, m, s);
}
else if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
return get_uarch_from_cpuid_amd(ef, f, em, m, s);
}
else if(cpu->cpu_vendor == CPU_VENDOR_HYGON) {
return get_uarch_from_cpuid_hygon(ef, f, em, m, s);
}
else {
printBug("Invalid CPU vendor: %d", cpu->cpu_vendor);
return NULL;
}
}
// If we cannot get the CPU name from CPUID, try to infer it from uarch
char* infer_cpu_name_from_uarch(struct uarch* arch) {
char* cpu_name = NULL;
if (arch == NULL) {
printErr("infer_cpu_name_from_uarch: Unable to find CPU name");
cpu_name = ecalloc(strlen(STRING_UNKNOWN) + 1, sizeof(char));
strcpy(cpu_name, STRING_UNKNOWN);
return cpu_name;
}
char *str = NULL;
if (arch->uarch == UARCH_P5)
str = "Intel Pentium";
else if (arch->uarch == UARCH_P5_MMX)
str = "Intel Pentium MMX";
else if (arch->uarch == UARCH_P6_PENTIUM_II)
str = "Intel Pentium II";
else if (arch->uarch == UARCH_P6_PENTIUM_III)
str = "Intel Pentium III";
else else
printErr("Unable to find name from uarch: %d", arch->uarch); return get_uarch_from_cpuid_amd(ef, f, em, m, s);
if (str == NULL) {
cpu_name = ecalloc(strlen(STRING_UNKNOWN) + 1, sizeof(char));
strcpy(cpu_name, STRING_UNKNOWN);
}
else {
cpu_name = ecalloc(strlen(str) + 1, sizeof(char));
strcpy(cpu_name, str);
}
return cpu_name;
} }
bool vpus_are_AVX512(struct cpuInfo* cpu) { bool vpus_are_AVX512(struct cpuInfo* cpu) {
return cpu->arch->uarch != UARCH_ICE_LAKE && return cpu->arch->uarch != UARCH_ICE_LAKE;
cpu->arch->uarch != UARCH_TIGER_LAKE &&
cpu->arch->uarch != UARCH_ZEN4 &&
cpu->arch->uarch != UARCH_ZEN4C;
} }
bool is_knights_landing(struct cpuInfo* cpu) { bool is_knights_landing(struct cpuInfo* cpu) {
@@ -515,7 +367,6 @@ bool is_knights_landing(struct cpuInfo* cpu) {
int get_number_of_vpus(struct cpuInfo* cpu) { int get_number_of_vpus(struct cpuInfo* cpu) {
switch(cpu->arch->uarch) { switch(cpu->arch->uarch) {
// Intel
case UARCH_HASWELL: case UARCH_HASWELL:
case UARCH_BROADWELL: case UARCH_BROADWELL:
@@ -523,62 +374,37 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
case UARCH_CASCADE_LAKE: case UARCH_CASCADE_LAKE:
case UARCH_KABY_LAKE: case UARCH_KABY_LAKE:
case UARCH_COMET_LAKE: case UARCH_COMET_LAKE:
case UARCH_ROCKET_LAKE:
case UARCH_AMBER_LAKE: case UARCH_AMBER_LAKE:
case UARCH_WHISKEY_LAKE: case UARCH_WHISKEY_LAKE:
case UARCH_COFFEE_LAKE: case UARCH_COFFE_LAKE:
case UARCH_PALM_COVE: case UARCH_PALM_COVE:
case UARCH_KNIGHTS_LANDING: case UARCH_KNIGHTS_LANDING:
case UARCH_KNIGHTS_MILL: case UARCH_KNIGHTS_MILL:
case UARCH_ICE_LAKE: case UARCH_ICE_LAKE:
case UARCH_TIGER_LAKE:
case UARCH_ALDER_LAKE:
case UARCH_RAPTOR_LAKE:
// AMD // Right now is just a guess!
case UARCH_ZEN2: case UARCH_ZEN2:
case UARCH_ZEN3: case UARCH_ZEN3:
case UARCH_ZEN3_PLUS:
case UARCH_ZEN4:
case UARCH_ZEN4C:
return 2; return 2;
default: default:
return 1; return 1;
} }
} }
bool choose_new_intel_logo_uarch(struct cpuInfo* cpu) {
switch(cpu->arch->uarch) {
case UARCH_ALDER_LAKE:
case UARCH_ROCKET_LAKE:
case UARCH_TIGER_LAKE:
case UARCH_RAPTOR_LAKE:
return true;
default:
return false;
}
}
char* get_str_uarch(struct cpuInfo* cpu) { char* get_str_uarch(struct cpuInfo* cpu) {
return cpu->arch->uarch_str; return cpu->arch->uarch_str;
} }
char* get_str_process(struct cpuInfo* cpu) { char* get_str_process(struct cpuInfo* cpu) {
char* str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1)); char* str = malloc(sizeof(char) * (4+2+1));
int32_t process = cpu->arch->process; uint32_t process = cpu->arch->process;
if(process == UNK) { if(process > 100)
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN); sprintf(str, "%.2fum", (double)process/100);
} else
else if(process > 0){
sprintf(str, "%dnm", process); sprintf(str, "%dnm", process);
}
else {
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
printBug("Found invalid process: '%d'", process);
}
return str; return str;
} }

View File

@@ -7,12 +7,10 @@
struct uarch; struct uarch;
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s); struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
char* infer_cpu_name_from_uarch(struct uarch* arch);
bool vpus_are_AVX512(struct cpuInfo* cpu); bool vpus_are_AVX512(struct cpuInfo* cpu);
bool is_knights_landing(struct cpuInfo* cpu); bool is_knights_landing(struct cpuInfo* cpu);
int get_number_of_vpus(struct cpuInfo* cpu); int get_number_of_vpus(struct cpuInfo* cpu);
bool choose_new_intel_logo_uarch(struct cpuInfo* cpu);
char* get_str_uarch(struct cpuInfo* cpu); char* get_str_uarch(struct cpuInfo* cpu);
char* get_str_process(struct cpuInfo* cpu); char* get_str_process(struct cpuInfo* cpu);
void free_uarch_struct(struct uarch* arch); void free_uarch_struct(struct uarch* arch);

View File

@@ -1,23 +0,0 @@
#!/bin/bash -u
CPUID=0x00A50F00
efamily=$(((${CPUID}>>20)&0xFF))
family=$(((${CPUID}>>8)&0xF))
emodel=$(((${CPUID}>>16)&0xF))
model=$(((${CPUID}>>4)&0xF))
stepping=$((${CPUID}&0xF))
printf 'CPUID: 0x%.8X\n' $CPUID
printf -- '- EF = 0x%X (%d)\n' $efamily $efamily
printf -- '- F = 0x%X (%d)\n' $family $family
printf -- '- EM = 0x%X (%d)\n' $emodel $emodel
printf -- '- M = 0x%X (%d)\n' $model $model
printf -- '- S = 0x%X (%d)\n' $stepping $stepping
#EF=$efamily
#F=$family
#EM=$emodel
#M=$model
#S=$stepping
#grep -E "\s*CHECK_UARCH\(arch,\s*${EF},\s*${F},\s*(${EM}|NA),\s*(${M}|NA),\s*(${S}|NA)" uarch.c