[v1.05][X86] Hygon logo and uarch detection (#244)

src/common/ascii.h

@@ -105,6 +105,19 @@ $C1  MMM  :MMM      NMM  dMMK   dMMX            MMN   \
 $C1  MMM  :MMM      NMM  dMMMoo  OMM0....:Nx.   MMN   \
 $C1  MMM  :WWW      XWW   lONMM   'xXMMMMNOc    MMN   "
 
+#define ASCII_HYGON \
+"$C1                                                   \
+$C1                                                   \
+$C1                                                   \
+$C1 ##    ##  ##    ##  ######     ######    ##    #  \
+$C1 ##....##   ##  ##  ##        ##      ##  ####  #  \
+$C1 ########     ##    ##    ##. ##      ##  #  ####  \
+$C1 ##    ##     ##    *######.    ######    #    ##  \
+$C1                                                   \
+$C1                                                   \
+$C1                                                   \
+$C1                                                   "
+
 #define ASCII_SNAPD \
 "              $C1@@$C2########               \
            $C1@@@@@$C2###########            \
@@ -538,6 +551,7 @@ typedef struct ascii_logo asciiL;
 asciiL logo_amd         = { ASCII_AMD,         39, 15, false, {C_FG_WHITE, C_FG_GREEN},                       {C_FG_WHITE,   C_FG_GREEN}   };
 asciiL logo_intel       = { ASCII_INTEL,       48, 14, false, {C_FG_CYAN},                                    {C_FG_CYAN,    C_FG_WHITE}   };
 asciiL logo_intel_new   = { ASCII_INTEL_NEW,   51,  9, false, {C_FG_CYAN},                                    {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_hygon       = { ASCII_HYGON,       51, 11, false, {C_FG_RED},                                     {C_FG_RED,     C_FG_WHITE}   };
 asciiL logo_snapd       = { ASCII_SNAPD,       39, 16, false, {C_FG_RED, C_FG_WHITE},                         {C_FG_RED,     C_FG_WHITE}   };
 asciiL logo_mtk         = { ASCII_MTK,         59,  5, false, {C_FG_BLUE, C_FG_YELLOW},                       {C_FG_BLUE,    C_FG_YELLOW}  };
 asciiL logo_exynos      = { ASCII_EXYNOS,      22, 13, true,  {C_BG_BLUE, C_FG_WHITE},                        {C_FG_BLUE,    C_FG_WHITE}   };

src/common/cpu.h

@@ -8,6 +8,7 @@ enum {
 // ARCH_X86
   CPU_VENDOR_INTEL,
   CPU_VENDOR_AMD,
+  CPU_VENDOR_HYGON,
 // ARCH_ARM
   CPU_VENDOR_ARM,
   CPU_VENDOR_APPLE,

src/common/printer.c

@@ -357,6 +357,9 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
   else if(art->vendor == CPU_VENDOR_AMD) {
     art->art = choose_ascii_art_aux(&logo_amd_l, &logo_amd, term, lf);
   }
+  else if(art->vendor == CPU_VENDOR_HYGON) {
+    art->art = &logo_hygon;
+  }
   else {
     art->art = &logo_unknown;
   }

src/x86/cpuid.c

@@ -22,6 +22,7 @@
 
 #define CPU_VENDOR_INTEL_STRING "GenuineIntel"
 #define CPU_VENDOR_AMD_STRING   "AuthenticAMD"
+#define CPU_VENDOR_HYGON_STRING "HygonGenuine"
 
 static const char *hv_vendors_string[] = {
   [HV_VENDOR_KVM]       = "KVMKVMKVM",
@@ -470,6 +471,8 @@ struct cpuInfo* get_cpu_info(void) {
     cpu->cpu_vendor = CPU_VENDOR_INTEL;
   else if (strcmp(CPU_VENDOR_AMD_STRING,name) == 0)
     cpu->cpu_vendor = CPU_VENDOR_AMD;
+  else if (strcmp(CPU_VENDOR_HYGON_STRING,name) == 0)
+    cpu->cpu_vendor = CPU_VENDOR_HYGON;
   else {
     cpu->cpu_vendor = CPU_VENDOR_INVALID;
     printErr("Unknown CPU vendor: %s", name);
@@ -718,6 +721,7 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
       }
       break;
     case CPU_VENDOR_AMD:
+    case CPU_VENDOR_HYGON:
       if (cpu->maxExtendedLevels >= 0x80000008) {
         eax = 0x80000008;
         cpuid(&eax, &ebx, &ecx, &edx);

src/x86/uarch.c

@@ -392,6 +392,25 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   return arch;
 }
 
+struct uarch* get_uarch_from_cpuid_hygon(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
+  struct uarch* arch = emalloc(sizeof(struct uarch));
+
+  // EF: Extended Family                                                           //
+  // F:  Family                                                                    //
+  // EM: Extended Model                                                            //
+  // M: Model                                                                      //
+  // S: Stepping                                                                   //
+  // ----------------------------------------------------------------------------- //
+  //                 EF  F  EM   M   S                                             //
+  UARCH_START
+  // https://www.phoronix.com/news/Hygon-Dhyana-AMD-China-CPUs
+  CHECK_UARCH(arch,  9,  15,  0,  1, NA, "Zen",       UARCH_ZEN,      UNK) // https://github.com/Dr-Noob/cpufetch/issues/244
+  // CHECK_UARCH(arch,  9,  15,  0,  2, NA, "???",       ?????????,      UNK) // http://instlatx64.atw.hu/
+  UARCH_END
+
+  return arch;
+}
+
 struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
   if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
     struct uarch* arch = emalloc(sizeof(struct uarch));
@@ -436,8 +455,16 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
     }
     return get_uarch_from_cpuid_intel(ef, f, em, m, s);
   }
-  else
+  else if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
     return get_uarch_from_cpuid_amd(ef, f, em, m, s);
+  }
+  else if(cpu->cpu_vendor == CPU_VENDOR_HYGON) {
+    return get_uarch_from_cpuid_hygon(ef, f, em, m, s);
+  }
+  else {
+    printBug("Invalid CPU vendor: %d", cpu->cpu_vendor);
+    return NULL;
+  }
 }
 
 // If we cannot get the CPU name from CPUID, try to infer it from uarch