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...

31 Commits

Author SHA1 Message Date
Dr-Noob
8f2f3d3a16 [v0.97] Merge bugfix3 branch to support Rocket Lake processors 2021-04-09 20:06:05 +02:00
Dr-Noob
6dd041bf9f [v0.97] Fix macOS compilation issue as noted by #73 2021-04-09 18:32:34 +02:00
Dr-Noob
b45c09efff [v0.97] Add raw option to help. Disable raw option in ARM 2021-04-09 15:58:33 +02:00
Dr-Noob
ec5f80adc1 [v0.97] Fix compilation in macOS 2021-04-09 15:49:21 +02:00
Dr-Noob
ecca042d86 [v0.97] Manually merge bugfix branch with latest fixes 2021-04-09 15:37:17 +02:00
Dr-Noob
c718d83868 [v0.96] Add Rocket Lake uarch detection as suggested by #68 2021-04-09 11:26:34 +02:00
Dr-Noob
32b035f1a2 [v0.96] Fix typo as noticed by #70 2021-04-09 10:50:10 +02:00
Dr-Noob
8bb65e0cc0 [v0.96] Fix compilation issue in Windows 2021-04-09 09:25:48 +02:00
Dr-Noob
e8d2898ae3 [v0.96] Remove cache sizes check 2021-04-08 13:18:35 +02:00
Dr-Noob
b699fdc3f2 [v0.96] Update README and fix typo 2021-04-08 11:13:21 +02:00
Dr-Noob
812ee0acc6 [v0.96] Add PREFIX to Makefile and uninstall target, as requested by many users 2021-04-08 09:36:21 +02:00
Dr-Noob
7916e8cbb4 [v0.96] Replace "Simplistic" by "Simple" in description 2021-04-07 20:06:24 +02:00
Dr-Noob
41dbb22a20 [v0.96] Merge branch bugfix3 to include an ARM SoC fix 2021-04-07 19:55:58 +02:00
Dr-Noob
bb9fb17ec8 [v0.96] Tracking issue #54 2021-04-07 16:25:31 +02:00
Dr-Noob
b3ed3e9240 [v0.96] Add 32bit support in Makefile 2021-04-07 14:52:52 +02:00
Dr-Noob
044608f31f [v0.95] Add 0x8000001D sublevel query to --raw option 2021-04-07 14:35:45 +02:00
Dr-Noob
2879876500 [v0.96] Dont treat unknown unified cache as a bug, since there are some processors with eDRAM which supports this level, like #41 2021-04-07 11:17:43 +02:00
Dr-Noob
c7cc8be712 [v0.96] Use lower verbosity for some errors found in cpuid 2021-04-07 10:37:17 +02:00
Dr-Noob
654d2e27e1 [v0.96] Replace Makefile var names (use C names instead of C++) 2021-04-07 10:14:20 +02:00
Dr-Noob
09cbb8874b [v0.96] Fix previous mistake: use level 0xB to check if the level is supported or not, according to Intel docs 2021-04-06 20:37:49 +02:00
Dr-Noob
fe95ca3e10 [v0.96] Fix bug where ebx returned 0 in apic.c when CPU max level >= 0xB but CPU does not support x2apic 2021-04-06 16:56:26 +02:00
Dr-Noob
ec2ad4fef6 [v0.96] Do not consider missing frequency file as a bug 2021-04-06 16:35:12 +02:00
Dr-Noob
d56f7ffd14 [v0.96] Fix segfault when invalid cache size is found 2021-04-06 12:56:44 +02:00
Dr-Noob
4900c10eb3 [v0.96] Remove space between badges in README 2021-03-31 15:33:15 +02:00
Dr-Noob
9f0dc85bd8 [v0.96] Small modifications to README 2021-03-31 15:31:46 +02:00
Dr-Noob
36aeba0e73 [v0.96] Improve README with badges and ToC 2021-03-31 15:15:01 +02:00
Dr-Noob
ca7091bc5e [v0.96] Add short options. Improve --help flag. Update man page 2021-03-31 12:40:19 +02:00
Dr-Noob
8abbd8f69f [v0.96] Fix AMD ASCII art. Add third digit in frequency output 2021-03-31 11:03:54 +02:00
Dr-Noob
7420792ef5 [v0.95] Fetch topology extensions field in AMD processors 2021-03-30 10:39:27 +02:00
Dr-Noob
db32cccd91 [v0.95] Add --raw option 2021-03-15 21:49:47 +01:00
Dr-Noob
a8d8ac2e91 [v0.95] Temporarily disable cache sanity checks 2021-03-06 22:13:32 +01:00
19 changed files with 516 additions and 295 deletions

View File

@@ -1,8 +1,10 @@
CXX=gcc CC=gcc
CXXFLAGS=-Wall -Wextra -Werror -pedantic -fstack-protector-all -pedantic -std=c99 CFLAGS=-Wall -Wextra -Werror -pedantic -fstack-protector-all -pedantic -std=c99
SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith
PREFIX ?= /usr
SRC_COMMON=src/common/ SRC_COMMON=src/common/
COMMON_SRC = $(SRC_COMMON)main.c $(SRC_COMMON)cpu.c $(SRC_COMMON)udev.c $(SRC_COMMON)printer.c $(SRC_COMMON)args.c $(SRC_COMMON)global.c COMMON_SRC = $(SRC_COMMON)main.c $(SRC_COMMON)cpu.c $(SRC_COMMON)udev.c $(SRC_COMMON)printer.c $(SRC_COMMON)args.c $(SRC_COMMON)global.c
@@ -10,16 +12,16 @@ COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_C
ifneq ($(OS),Windows_NT) ifneq ($(OS),Windows_NT)
arch := $(shell uname -m) arch := $(shell uname -m)
ifeq ($(arch), x86_64) ifeq ($(arch), $(filter $(arch), x86_64 i686))
SRC_DIR=src/x86/ SRC_DIR=src/x86/
SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
CXXFLAGS += -DARCH_X86 CFLAGS += -DARCH_X86
else else
SRC_DIR=src/arm/ SRC_DIR=src/arm/
SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
CXXFLAGS += -DARCH_ARM -Wno-unused-parameter CFLAGS += -DARCH_ARM -Wno-unused-parameter
endif endif
OUTPUT=cpufetch OUTPUT=cpufetch
@@ -28,21 +30,21 @@ else
SRC_DIR=src/x86/ SRC_DIR=src/x86/
SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
CXXFLAGS += -DARCH_X86 CFLAGS += -DARCH_X86
SANITY_FLAGS += -Wno-pedantic-ms-format SANITY_FLAGS += -Wno-pedantic-ms-format
OUTPUT=cpufetch.exe OUTPUT=cpufetch.exe
endif endif
all: $(OUTPUT) all: $(OUTPUT)
debug: CXXFLAGS += -g -O0 debug: CFLAGS += -g -O0
debug: $(OUTPUT) debug: $(OUTPUT)
release: CXXFLAGS += -static -O3 release: CFLAGS += -static -O3
release: $(OUTPUT) release: $(OUTPUT)
$(OUTPUT): Makefile $(SOURCE) $(HEADERS) $(OUTPUT): Makefile $(SOURCE) $(HEADERS)
$(CXX) $(CXXFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT) $(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
run: $(OUTPUT) run: $(OUTPUT)
./$(OUTPUT) ./$(OUTPUT)
@@ -51,6 +53,11 @@ clean:
@rm $(OUTPUT) @rm $(OUTPUT)
install: $(OUTPUT) install: $(OUTPUT)
install -Dm755 "cpufetch" "/usr/bin/cpufetch" install -Dm755 "cpufetch" "$(PREFIX)/bin/cpufetch"
install -Dm644 "LICENSE" "/usr/share/licenses/cpufetch-git/LICENSE" install -Dm644 "LICENSE" "$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
install -Dm644 "cpufetch.8" "/usr/share/man/man8/cpufetch.8.gz" install -Dm644 "cpufetch.8" "$(PREFIX)/share/man/man8/cpufetch.8.gz"
uninstall:
rm -f "$(PREFIX)/bin/cpufetch"
rm -f "$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
rm -f "$(PREFIX)/share/man/man8/cpufetch.8.gz"

102
README.md
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@@ -1,35 +1,54 @@
# cpufetch <p align="center"><img width=50% src="./pictures/cpufetch.png"></p>
<div align="center">
![GitHub tag (latest by date)](https://img.shields.io/github/v/tag/Dr-Noob/cpufetch?label=cpufetch)
![GitHub Repo stars](https://img.shields.io/github/stars/Dr-Noob/cpufetch?color=4CC61F)
![GitHub issues](https://img.shields.io/github/issues/Dr-Noob/cpufetch)
![Contributions welcome](https://img.shields.io/badge/contributions-welcome-orange.svg)
[![License](https://img.shields.io/badge/license-MIT-blue.svg)](https://opensource.org/licenses/MIT)
<h4 align="center">Simple yet fancy CPU architecture fetching tool</h4>
&nbsp;
Simplistic yet fancy CPU architecture fetching tool
![cpu1](pictures/i9.png) ![cpu1](pictures/i9.png)
### Platforms </div>
cpufetch currently supports x86_64 CPUs (both Intel and AMD) and ARM.
# Table of contents
<!-- UPDATE with: doctoc --notitle README.md -->
<!-- START doctoc generated TOC please keep comment here to allow auto update -->
<!-- DON'T EDIT THIS SECTION, INSTEAD RE-RUN doctoc TO UPDATE -->
- [1. Support](#1-support)
- [2. Installation](#2-installation)
- [2.1 Building from source](#21-building-from-source)
- [2.2 Linux](#22-linux)
- [2.2 Windows](#22-windows)
- [2.3 macOS](#23-macos)
- [2.4 Android](#24-android)
- [3. Examples](#3-examples)
- [3.1 x86_64 CPUs](#31-x86_64-cpus)
- [3.2 ARM CPUs](#32-arm-cpus)
- [4. Colors and style](#4-colors-and-style)
- [5. Implementation](#5-implementation)
- [6. Bugs or improvements](#6-bugs-or-improvements)
<!-- END doctoc generated TOC please keep comment here to allow auto update -->
# 1. Support
cpufetch supports x86, x86_64 (Intel and AMD) and ARM.
| Platform | x86_64 | ARM | Notes | | Platform | x86_64 | ARM | Notes |
|:---------:|:------------------------:|:-------------------:|:-----------------:| |:---------:|:------------------------:|:-------------------:|:-----------------:|
| Linux | :heavy_check_mark: | :heavy_check_mark: | Prefered platform. <br> Experimental ARM support | | GNU/Linux | :heavy_check_mark: | :heavy_check_mark: | Best support |
| Windows | :heavy_check_mark: | :x: | Some information may be missing. <br> Colors will be used if supported | | Windows | :heavy_check_mark: | :x: | Some information may be missing. <br> Colors will be used if supported |
| Android | :heavy_exclamation_mark: | :heavy_check_mark: | Experimental ARM support | | Android | :heavy_exclamation_mark: | :heavy_check_mark: | Some information may be missing. <br> Not tested under x86_64 |
| macOS | :heavy_check_mark: | :x: | Some information may be missing | | macOS | :heavy_check_mark: | :x: | Some information may be missing. <br> Apple M1 support may be added <br> in the future (see [#47](https://github.com/Dr-Noob/cpufetch/issues/47))|
| Emoji | Meaning | # 2. Installation
|:-----------------------:|:-------------:| ## 2.1 Building from source
|:heavy_check_mark: | Supported |
|:x: | Not supported |
|:heavy_exclamation_mark: | Not tested |
### Usage and installation
#### Linux
There is a cpufetch package available in Arch Linux ([cpufetch-git](https://aur.archlinux.org/packages/cpufetch-git)).
If you are in another distro, you can build `cpufetch` from source (see below)
#### Windows
In the [releases](https://github.com/Dr-Noob/cpufetch/releases) section you will find some cpufetch executables compiled for Windows. Just download and run it from Windows CMD.
#### Building from source
Just clone the repo and use `make` to compile it Just clone the repo and use `make` to compile it
``` ```
@@ -39,41 +58,58 @@ make
./cpufetch ./cpufetch
``` ```
The Makefile is designed to work on both Linux and Windows. The Makefile is designed to work on Linux, Windows and macOS.
### Examples ## 2.2 Linux
There is a cpufetch package available in Arch Linux ([cpufetch-git](https://aur.archlinux.org/packages/cpufetch-git)). If you are in another distribution, you can build `cpufetch` from source.
## 2.2 Windows
In the [releases](https://github.com/Dr-Noob/cpufetch/releases) section you will find some cpufetch executables compiled for Windows. Just download and run it from Windows CMD. You can also build `cpufetch` from source.
## 2.3 macOS
You need to build `cpufetch` from source.
## 2.4 Android
1. Install `termux` app (terminal emulator)
2. Run `pkg install -y git make clang` inside termux.
3. Build from source normally:
- git clone https://github.com/Dr-Noob/cpufetch
- cd cpufetch
- make
- ./cpufetch
# 3. Examples
Here are more examples of how `cpufetch` looks on different CPUs. Here are more examples of how `cpufetch` looks on different CPUs.
##### x86_64 CPUs ## 3.1 x86_64 CPUs
![cpu2](pictures/epyc.png) ![cpu2](pictures/epyc.png)
![cpu3](pictures/cascade_lake.png) ![cpu3](pictures/cascade_lake.png)
##### ARM CPUs ## 3.2 ARM CPUs
![cpu4](pictures/exynos.png) ![cpu4](pictures/exynos.png)
![cpu5](pictures/snapdragon.png) ![cpu5](pictures/snapdragon.png)
### Colors and style # 4. Colors and style
By default, `cpufetch` will print the CPU art with the system colorscheme. However, you can always set a custom color scheme, either By default, `cpufetch` will print the CPU art with the system colorscheme. However, you can always set a custom color scheme, either
specifying Intel or AMD, or specifying the colors in RGB format: specifying Intel or AMD, or specifying the colors in RGB format:
``` ```
./cpufetch --color intel (default color for Intel) ./cpufetch --color intel (default color for Intel)
./cpufetch --color amd (default color for AND) ./cpufetch --color amd (default color for AMD)
./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200 (example) ./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200 (example)
``` ```
In the case of setting the colors using RGB, 4 colors must be given in with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to CPU art color (2 colors) and for the text colors (following 2). Thus, you can customize all the colors. In the case of setting the colors using RGB, 4 colors must be given in with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to CPU art color (2 colors) and for the text colors (following 2). Thus, you can customize all the colors.
### Implementation # 5. Implementation
See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/blob/master/doc/README.md). See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/blob/master/doc/README.md).
### Bugs or improvements # 6. Bugs or improvements
There are many open issues in github (see [issues](https://github.com/Dr-Noob/cpufetch/issues)). Feel free to open a new one report an issue or propose any improvement in `cpufetch` There are many open issues in github (see [issues](https://github.com/Dr-Noob/cpufetch/issues)). Feel free to open a new one report an issue or propose any improvement in `cpufetch`
### Testing
I would like to thank [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI) for their help, running `cpufetch` in many different CPUs they have access to, which makes it easier to debug and check the correctness of `cpufetch`. I would like to thank [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI) for their help, running `cpufetch` in many different CPUs they have access to, which makes it easier to debug and check the correctness of `cpufetch`.

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@@ -1,57 +1,67 @@
.TH man 8 "1 Sep 2020" "0.7" "cpufetch man page" .\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.48.2.
.TH CPUFETCH "1" "March 2021" "cpufetch v0.97 (x86_64 build)" "User Commands"
.SH NAME .SH NAME
cpufetch \- Simplistic yet fancy CPU architecture fetching tool cpufetch \- manual page for cpufetch v0.97 (x86_64 build)
.SH SYNOPSIS .SH SYNOPSIS
cpufetch [--version] [--help] [--levels] [--style fancy|retro|legacy] [--color intel|amd|'R,G,B:R,G,B:R,G,B:R,G,B'] .B cpufetch
[\fI\,OPTION\/\fR]...
.SH DESCRIPTION .SH DESCRIPTION
cpufetch will print CPU information, for which will query CPUID instructions and udev directories on Linux as a fallback method. Some of this features are: Simple yet fancy CPU architecture fetching tool
.IP \[bu] 2
Name
.IP \[bu]
Frequency
.IP \[bu]
Number of cores (Physical and Logical)
.IP \[bu]
Cache sizes
.IP \[bu]
Theoretical peak performance in floating point operations per second (FLOP/s)
.SH OPTIONS .SH OPTIONS
.TP .TP
\fB\-\-style\fR \f[I][intel|amd|R,G,B:R,G,B:R,G,B:R,G,B]\f[] \fB\-c\fR, \fB\-\-color\fR
Set the color scheme. By default, cpufetch uses the system color scheme. This option lets the user use different colors to print the CPU art: Set the color scheme (by default, cpufetch uses the system color scheme)
.IP \[bu]
\fB"intel"\fR: Use intel color scheme
.IP \[bu]
\fB"amd"\fR: Use amd color scheme
.IP \[bu]
\fBcustom\fR: If color do not match "intel" or "amd", a custom scheme can be specified: 4 colors must be given in RGB with the format: R,G,B:R,G,B:...
These colors correspond to CPU art color (2 colors) and for the text colors (following 2)
.TP .TP
\fB\-\-style\fR \f[I]STYLE\f[] \fB\-s\fR, \fB\-\-style\fR
Specify the style of ascii logo: Set the style of CPU art
.IP \[bu]
\fB"fancy"\fR: Default style
.IP \[bu]
\fB"retro"\fR: Old cpufetch style
.IP \[bu]
\fB"legacy"\fR: Fallback style for terminals that does not support colors
.TP .TP
\fB\-\-levels\fR \fB\-d\fR, \fB\-\-debug\fR
Prints CPUID levels and CPU name Prints CPU model and cpuid levels (debug purposes)
.TP .TP
\fB\-\-verbose\fR \fB\-v\fR, \fB\-\-verbose\fR
Prints extra information (if available) about how cpufetch tried fetching information Prints extra information (if available) about how cpufetch tried fetching information
.TP .TP
\fB\-\-help\fR \fB\-r\fR, \fB\-\-raw\fR
Prints help Prints raw cpuid data
.TP .TP
\fB\-\-version\fR \fB\-h\fR, \fB\-\-help\fR
Prints cpufetch version Prints this help and exit
.SH BUGS .TP
Bugs should be posted on: https://github.com/Dr-Noob/cpufetch/issues \fB\-V\fR, \fB\-\-version\fR
.SH NOTES Prints cpufetch version and exit
Peak performance information is NOT accurate. cpufetch computes peak performance using the max .SH "COLORS:"
frequency. However, to properly compute peak performance, you need to know the frequency of the .TP
CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU. * "intel":
.SH AUTHOR Use Intel default color scheme
.TP
* "amd":
Use AMD default color scheme
.TP
* "arm":
Use ARM default color scheme
.TP
* custom:
If color argument do not match "intel", "amd" or "arm", a custom scheme can be specified.
4 colors must be given in RGB with the format: R,G,B:R,G,B:...The first 2 colors are the CPU art color and the next 2 colors are the text colors
.SH "STYLES:"
.TP
* "fancy":
Default style
.TP
* "retro":
Old cpufetch style
.TP
* "legacy":
Fallback style for terminals that do not support colors
.SH "EXAMPLES:"
Run cpufetch with Intel color scheme:
\&./cpufetch \fB\-\-color\fR intel
Run cpufetch with a custom color scheme:
\&./cpufetch \fB\-\-color\fR 239,90,45:210,200,200:100,200,45:0,200,200
.SH "BUGS:"
Report bugs to https://github.com/Dr\-Noob/cpufetch/issues
.SH "NOTE:"
Peak performance information is NOT accurate. cpufetch computes peak performance using the max frequency. However, to properly compute peak performance, you need to know the frequency of the CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU. For peak performance measurement see: https://github.com/Dr\-Noob/peakperf
.SH "AUTHOR:"
Dr-Noob (https://github.com/Dr-Noob) Dr-Noob (https://github.com/Dr-Noob)

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@@ -436,12 +436,21 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
return true; return true;
} }
// Snapdragon 730 reported as "Qualcomm Technologies, Inc. SDMMAGPIE"
if((tmp = strstr(soc_name, "SDMMAGPIE")) != NULL) {
fill_soc(soc, "730", SOC_SNAPD_SM7150_AA, 8);
return true;
}
return false; return false;
} }
struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) { struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
char* raw_name = soc->raw_name; char* raw_name = soc->raw_name;
if(match_special(raw_name, soc))
return soc;
if (match_qualcomm(raw_name, soc)) if (match_qualcomm(raw_name, soc))
return soc; return soc;
@@ -454,10 +463,7 @@ struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
if(match_hisilicon(raw_name, soc)) if(match_hisilicon(raw_name, soc))
return soc; return soc;
if(match_broadcom(raw_name, soc)) match_broadcom(raw_name, soc);
return soc;
match_special(raw_name, soc);
return soc; return soc;
} }

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@@ -17,24 +17,36 @@ static const char *SYTLES_STR_LIST[] = {
[STYLE_INVALID] = NULL [STYLE_INVALID] = NULL
}; };
enum {
ARG_CHAR_STYLE,
ARG_CHAR_COLOR,
ARG_CHAR_HELP,
ARG_CHAR_DEBUG,
ARG_CHAR_VERBOSE,
ARG_CHAR_VERSION
};
struct args_struct { struct args_struct {
bool debug_flag; bool debug_flag;
bool help_flag; bool help_flag;
bool raw_flag;
bool verbose_flag; bool verbose_flag;
bool version_flag; bool version_flag;
STYLE style; STYLE style;
struct colors* colors; struct colors* colors;
}; };
const char args_chr[] = {
/* [ARG_CHAR_STYLE] = */ 's',
/* [ARG_CHAR_COLOR] = */ 'c',
/* [ARG_CHAR_HELP] = */ 'h',
/* [ARG_CHAR_RAW] = */ 'r',
/* [ARG_CHAR_DEBUG] = */ 'd',
/* [ARG_CHAR_VERBOSE] = */ 'v',
/* [ARG_CHAR_VERSION] = */ 'V',
};
const char *args_str[] = {
/* [ARG_CHAR_STYLE] = */ "style",
/* [ARG_CHAR_COLOR] = */ "color",
/* [ARG_CHAR_HELP] = */ "help",
/* [ARG_CHAR_RAW] = */ "raw",
/* [ARG_CHAR_DEBUG] = */ "debug",
/* [ARG_CHAR_VERBOSE] = */ "verbose",
/* [ARG_CHAR_VERSION] = */ "version",
};
static struct args_struct args; static struct args_struct args;
STYLE get_style() { STYLE get_style() {
@@ -57,10 +69,23 @@ bool show_debug() {
return args.debug_flag; return args.debug_flag;
} }
bool show_raw() {
return args.raw_flag;
}
bool verbose_enabled() { bool verbose_enabled() {
return args.verbose_flag; return args.verbose_flag;
} }
int max_arg_str_length() {
int max_len = -1;
int len = sizeof(args_str) / sizeof(args_str[0]);
for(int i=0; i < len; i++) {
max_len = max(max_len, (int) strlen(args_str[i]));
}
return max_len;
}
STYLE parse_style(char* style) { STYLE parse_style(char* style) {
uint8_t i = 0; uint8_t i = 0;
uint8_t styles_count = sizeof(SYTLES_STR_LIST) / sizeof(SYTLES_STR_LIST[0]); uint8_t styles_count = sizeof(SYTLES_STR_LIST) / sizeof(SYTLES_STR_LIST[0]);
@@ -158,94 +183,103 @@ bool parse_color(char* optarg_str, struct colors** cs) {
return true; return true;
} }
char* build_short_options() {
const char *c = args_chr;
int len = sizeof(args_chr) / sizeof(args_chr[0]);
char* str = (char *) malloc(sizeof(char) * (len*2 + 1));
memset(str, 0, sizeof(char) * (len*2 + 1));
#ifdef ARCH_X86
sprintf(str, "%c:%c:%c%c%c%c%c",
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP], c[ARG_RAW],
c[ARG_DEBUG], c[ARG_VERBOSE], c[ARG_VERSION]);
#else
sprintf(str, "%c:%c:%c%c%c%c",
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
c[ARG_DEBUG], c[ARG_VERBOSE], c[ARG_VERSION]);
#endif
return str;
}
bool parse_args(int argc, char* argv[]) { bool parse_args(int argc, char* argv[]) {
int c; int opt;
int option_index = 0; int option_index = 0;
opterr = 0; opterr = 0;
bool color_flag = false; bool color_flag = false;
args.debug_flag = false; args.debug_flag = false;
args.raw_flag = false;
args.verbose_flag = false; args.verbose_flag = false;
args.help_flag = false; args.help_flag = false;
args.style = STYLE_EMPTY; args.style = STYLE_EMPTY;
args.colors = NULL; args.colors = NULL;
static struct option long_options[] = { const struct option long_options[] = {
{"style", required_argument, 0, ARG_CHAR_STYLE }, {args_str[ARG_STYLE], required_argument, 0, args_chr[ARG_STYLE] },
{"color", required_argument, 0, ARG_CHAR_COLOR }, {args_str[ARG_COLOR], required_argument, 0, args_chr[ARG_COLOR] },
{"help", no_argument, 0, ARG_CHAR_HELP }, {args_str[ARG_HELP], no_argument, 0, args_chr[ARG_HELP] },
{"debug", no_argument, 0, ARG_CHAR_DEBUG }, #ifdef ARCH_X86
{"verbose", no_argument, 0, ARG_CHAR_VERBOSE }, {args_str[ARG_RAW], no_argument, 0, args_chr[ARG_RAW] },
{"version", no_argument, 0, ARG_CHAR_VERSION }, #endif
{0, 0, 0, 0} {args_str[ARG_DEBUG], no_argument, 0, args_chr[ARG_DEBUG] },
{args_str[ARG_VERBOSE], no_argument, 0, args_chr[ARG_VERBOSE] },
{args_str[ARG_VERSION], no_argument, 0, args_chr[ARG_VERSION] },
{0, 0, 0, 0}
}; };
c = getopt_long(argc, argv, "", long_options, &option_index); char* short_options = build_short_options();
opt = getopt_long(argc, argv, short_options, long_options, &option_index);
while (c != -1) { while (!args.help_flag && !args.debug_flag && !args.version_flag && opt != -1) {
if(c == ARG_CHAR_COLOR) { if(opt == args_chr[ARG_COLOR]) {
if(color_flag) { if(color_flag) {
printErr("Color option specified more than once"); printErr("Color option specified more than once");
return false; return false;
} }
color_flag = true; color_flag = true;
if(!parse_color(optarg, &args.colors)) { if(!parse_color(optarg, &args.colors)) {
printErr("Color parsing failed"); printErr("Color parsing failed");
return false; return false;
} }
} }
else if(c == ARG_CHAR_STYLE) { else if(opt == args_chr[ARG_STYLE]) {
if(args.style != STYLE_EMPTY) { if(args.style != STYLE_EMPTY) {
printErr("Style option specified more than once"); printErr("Style option specified more than once");
return false; return false;
} }
args.style = parse_style(optarg); args.style = parse_style(optarg);
if(args.style == STYLE_INVALID) { if(args.style == STYLE_INVALID) {
printErr("Invalid style '%s'",optarg); printErr("Invalid style '%s'",optarg);
return false; return false;
} }
} break;
else if(c == ARG_CHAR_HELP) { }
if(args.help_flag) { else if(opt == args_chr[ARG_HELP]) {
printErr("Help option specified more than once"); args.help_flag = true;
return false; }
} else if(opt == args_chr[ARG_RAW]) {
args.help_flag = true; args.raw_flag = true;
} }
else if(c == ARG_CHAR_VERBOSE) { else if(opt == args_chr[ARG_VERBOSE]) {
if(args.verbose_flag) { args.verbose_flag = true;
printErr("Verbose option specified more than once"); }
return false; else if(opt == args_chr[ARG_DEBUG]) {
} args.debug_flag = true;
args.verbose_flag = true; }
} else if(opt == args_chr[ARG_VERSION]) {
else if(c == ARG_CHAR_DEBUG) { args.version_flag = true;
if(args.debug_flag) { }
printErr("Debug option specified more than once"); else {
return false; printWarn("Invalid options");
} args.help_flag = true;
args.debug_flag = true; }
}
else if (c == ARG_CHAR_VERSION) {
if(args.version_flag) {
printErr("Version option specified more than once");
return false;
}
args.version_flag = true;
}
else if(c == '?') {
printWarn("Invalid options");
args.help_flag = true;
break;
}
else
printBug("Bug at line number %d in file %s", __LINE__, __FILE__);
option_index = 0; option_index = 0;
c = getopt_long(argc, argv,"",long_options, &option_index); opt = getopt_long(argc, argv, short_options, long_options, &option_index);
} }
if (optind < argc) { if(optind < argc) {
printWarn("Invalid options"); printWarn("Invalid options");
args.help_flag = true; args.help_flag = true;
} }

View File

@@ -26,10 +26,25 @@ enum {
STYLE_INVALID STYLE_INVALID
}; };
enum {
ARG_STYLE,
ARG_COLOR,
ARG_HELP,
ARG_RAW,
ARG_DEBUG,
ARG_VERBOSE,
ARG_VERSION
};
extern const char args_chr[];
extern const char *args_str[];
#include "printer.h" #include "printer.h"
int max_arg_str_length();
bool parse_args(int argc, char* argv[]); bool parse_args(int argc, char* argv[]);
bool show_help(); bool show_help();
bool show_raw();
bool show_debug(); bool show_debug();
bool show_version(); bool show_version();
bool verbose_enabled(); bool verbose_enabled();

View File

@@ -12,10 +12,10 @@
\ \
\ \
@@@@ @@@ @@@ @@@@@@@@ ############ \ @@@@ @@@ @@@ @@@@@@@@ ############ \
@@@@@@ @@@@@ @@@@ @@@ @@@@ ########## \ @@@@@@ @@@@@ @@@@@ @@@ @@@ ########## \
@@@ @@@ @@@@@@@@@@@@@ @@@ @@ # #### \ @@@ @@@ @@@@@@@@@@@@@ @@@ @@ # ##### \
@@@ @@@ @@@ @@@ @@@ @@@ @@@ ### #### \ @@@ @@@ @@@ @@@ @@@ @@@ @@ ### ##### \
@@@@@@@@@@@@ @@@ @@@ @@@ @@@ #### ## ### \ @@@@@@@@@@@@ @@@ @@@ @@@ @@@ ######### ### \
@@@ @@@ @@@ @@@ @@@@@@@@@ ######## ## \ @@@ @@@ @@@ @@@ @@@@@@@@@ ######## ## \
\ \
\ \

View File

@@ -147,7 +147,7 @@ char* get_str_l3(struct cache* cach) {
char* get_str_freq(struct frequency* freq) { char* get_str_freq(struct frequency* freq) {
//Max 3 digits and 3 for '(M/G)Hz' plus 1 for '\0' //Max 3 digits and 3 for '(M/G)Hz' plus 1 for '\0'
uint32_t size = (4+3+1); uint32_t size = (5+1+3+1);
assert(strlen(STRING_UNKNOWN)+1 <= size); assert(strlen(STRING_UNKNOWN)+1 <= size);
char* string = malloc(sizeof(char)*size); char* string = malloc(sizeof(char)*size);
memset(string, 0, sizeof(char)*size); memset(string, 0, sizeof(char)*size);
@@ -155,9 +155,9 @@ char* get_str_freq(struct frequency* freq) {
if(freq->max == UNKNOWN_FREQ || freq->max < 0) if(freq->max == UNKNOWN_FREQ || freq->max < 0)
snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN); snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN);
else if(freq->max >= 1000) else if(freq->max >= 1000)
snprintf(string,size,"%.2f"STRING_GIGAHERZ,(float)(freq->max)/1000); snprintf(string,size,"%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000);
else else
snprintf(string,size,"%d"STRING_MEGAHERZ,freq->max); snprintf(string,size,"%d "STRING_MEGAHERZ,freq->max);
return string; return string;
} }

View File

@@ -119,6 +119,8 @@ struct cpuInfo {
uint32_t maxLevels; uint32_t maxLevels;
// Max cpuids extended levels // Max cpuids extended levels
uint32_t maxExtendedLevels; uint32_t maxExtendedLevels;
// Topology Extensions (AMD only)
bool topology_extensions;
#elif ARCH_ARM #elif ARCH_ARM
// Main ID register // Main ID register
uint32_t midr; uint32_t midr;

View File

@@ -64,3 +64,7 @@ void set_log_level(bool verbose) {
if(verbose) LOG_LEVEL = LOG_LEVEL_VERBOSE; if(verbose) LOG_LEVEL = LOG_LEVEL_VERBOSE;
else LOG_LEVEL = LOG_LEVEL_NORMAL; else LOG_LEVEL = LOG_LEVEL_NORMAL;
} }
int max(int a, int b) {
return a > b ? a : b;
}

View File

@@ -7,5 +7,6 @@ void set_log_level(bool verbose);
void printWarn(const char *fmt, ...); void printWarn(const char *fmt, ...);
void printErr(const char *fmt, ...); void printErr(const char *fmt, ...);
void printBug(const char *fmt, ...); void printBug(const char *fmt, ...);
int max(int a, int b);
#endif #endif

View File

@@ -1,5 +1,6 @@
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h>
#include "args.h" #include "args.h"
#include "printer.h" #include "printer.h"
@@ -13,41 +14,58 @@
#include "../arm/midr.h" #include "../arm/midr.h"
#endif #endif
static const char* VERSION = "0.95"; static const char* VERSION = "0.97";
void print_help(char *argv[]) { void print_help(char *argv[]) {
printf("Usage: %s [--version] [--help] [--debug] [--style \"fancy\"|\"retro\"|\"legacy\"] [--color \"intel\"|\"amd\"|'R,G,B:R,G,B:R,G,B:R,G,B']\n\n", argv[0]); const char **t = args_str;
const char *c = args_chr;
int max_len = max_arg_str_length();
printf("Options: \n\ printf("Usage: %s [OPTION]...\n", argv[0]);
--color Set the color scheme. By default, cpufetch uses the system color scheme. This option \n\ printf("Simple yet fancy CPU architecture fetching tool\n\n");
lets the user use different colors to print the CPU art: \n\
* \"intel\": Use Intel default color scheme \n\
* \"amd\": Use AMD default color scheme \n\
* \"arm\": Use ARM default color scheme \n\
* custom: If color argument do not match \"Intel\", \"AMD\" or \"ARM\", a custom scheme can be specified: \n\
4 colors must be given in RGB with the format: R,G,B:R,G,B:... \n\
These colors correspond to CPU art color (2 colors) and for the text colors (following 2) \n\
For example: --color 239,90,45:210,200,200:100,200,45:0,200,200 \n\n\
--style Set the style of CPU art: \n\
* \"fancy\": Default style \n\
* \"retro\": Old cpufetch style \n\
* \"legacy\": Fallback style for terminals that does not support colors \n\n");
printf("Options: \n");
printf(" -%c, --%s %*s Set the color scheme (by default, cpufetch uses the system color scheme)\n", c[ARG_COLOR], t[ARG_COLOR], (int) (max_len-strlen(t[ARG_COLOR])), "");
printf(" -%c, --%s %*s Set the style of CPU art\n", c[ARG_STYLE], t[ARG_STYLE], (int) (max_len-strlen(t[ARG_STYLE])), "");
#ifdef ARCH_X86 #ifdef ARCH_X86
printf(" --debug Prints CPU model and cpuid levels (debug purposes)\n\n"); printf(" -%c, --%s %*s Prints CPU model and cpuid levels (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
#elif ARCH_ARM #elif ARCH_ARM
printf(" --debug Prints main ID register values for all cores (debug purposes)\n\n"); printf(" -%c, --%s %*s Prints main ID register values for all cores (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
#endif #endif
printf(" -%c, --%s %*s Prints extra information (if available) about how cpufetch tried fetching information\n", c[ARG_VERBOSE], t[ARG_VERBOSE], (int) (max_len-strlen(t[ARG_VERBOSE])), "");
#ifdef ARCH_X86
printf(" -%c, --%s %*s Prints raw cpuid data\n", c[ARG_RAW], t[ARG_RAW], (int) (max_len-strlen(t[ARG_RAW])), "");
#endif
printf(" -%c, --%s %*s Prints this help and exit\n", c[ARG_HELP], t[ARG_HELP], (int) (max_len-strlen(t[ARG_HELP])), "");
printf(" -%c, --%s %*s Prints cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");
printf(" --verbose Prints extra information (if available) about how cpufetch tried fetching information\n\n\ printf("\nCOLORS: \n");
--help Prints this help and exit\n\n\ printf(" * \"intel\": Use Intel default color scheme \n");
--version Prints cpufetch version and exit\n\n\ printf(" * \"amd\": Use AMD default color scheme \n");
\n\ printf(" * \"arm\": Use ARM default color scheme \n");
NOTES: \n\ printf(" * custom: If color argument do not match \"intel\", \"amd\" or \"arm\", a custom scheme can be specified.\n");
- Bugs or improvements should be submitted to: github.com/Dr-Noob/cpufetch/issues \n\ printf(" 4 colors must be given in RGB with the format: R,G,B:R,G,B:...\n");
- Peak performance information is NOT accurate. cpufetch computes peak performance using the max \n\ printf(" The first 2 colors are the CPU art color and the next 2 colors are the text colors\n");
frequency. However, to properly compute peak performance, you need to know the frequency of the \n\
CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU. \n"); printf("\nSTYLES: \n");
printf(" * \"fancy\": Default style\n");
printf(" * \"retro\": Old cpufetch style\n");
printf(" * \"legacy\": Fallback style for terminals that do not support colors\n");
printf("\nEXAMPLES: \n");
printf(" Run cpufetch with Intel color scheme:\n");
printf(" ./cpufetch --color intel\n");
printf(" Run cpufetch with a custom color scheme:\n");
printf(" ./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200\n");
printf("\nBUGS: \n");
printf(" Report bugs to https://github.com/Dr-Noob/cpufetch/issues\n");
printf("\nNOTE: \n");
printf(" Peak performance information is NOT accurate. cpufetch computes peak performance using the max\n");
printf(" frequency. However, to properly compute peak performance, you need to know the frequency of the\n");
printf(" CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU.\n");
printf(" For peak performance measurement see: https://github.com/Dr-Noob/peakperf\n");
} }
void print_version() { void print_version() {
@@ -59,7 +77,6 @@ int main(int argc, char* argv[]) {
return EXIT_FAILURE; return EXIT_FAILURE;
if(show_help()) { if(show_help()) {
print_version();
print_help(argv); print_help(argv);
return EXIT_SUCCESS; return EXIT_SUCCESS;
} }
@@ -81,6 +98,17 @@ int main(int argc, char* argv[]) {
return EXIT_SUCCESS; return EXIT_SUCCESS;
} }
if(show_raw()) {
#ifdef ARCH_X86
print_version();
print_raw(cpu);
return EXIT_SUCCESS;
#else
printErr("raw option is valid only in x86_64");
return EXIT_FAILURE;
#endif
}
if(print_cpufetch(cpu, get_style(), get_colors())) if(print_cpufetch(cpu, get_style(), get_colors()))
return EXIT_SUCCESS; return EXIT_SUCCESS;
else else

View File

@@ -32,17 +32,11 @@ long get_freq_from_file(char* path, bool hv_present) {
int filelen; int filelen;
char* buf; char* buf;
if((buf = read_file(path, &filelen)) == NULL) { if((buf = read_file(path, &filelen)) == NULL) {
#ifdef ARCH_X86 if(hv_present)
if(hv_present) { printWarn("Could not open '%s' (HV is present)", path);
printWarn("Could not open '%s'", path); else
}
else {
perror("open");
printBug("Could not open '%s'", path);
}
#elif ARCH_ARM
printWarn("Could not open '%s'", path); printWarn("Could not open '%s'", path);
#endif
return UNKNOWN_FREQ; return UNKNOWN_FREQ;
} }

View File

@@ -1,10 +1,11 @@
#ifdef _WIN32 #ifdef _WIN32
#include <windows.h> #define NOMINMAX
#include <windows.h>
#elif defined __linux__ #elif defined __linux__
#define _GNU_SOURCE #define _GNU_SOURCE
#include <sched.h> #include <sched.h>
#elif defined __APPLE__ #elif defined __APPLE__
#define UNUSED(x) (void)(x) #define UNUSED(x) (void)(x)
#endif #endif
#include <stdlib.h> #include <stdlib.h>
@@ -318,7 +319,22 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
uint32_t* apic_smt = malloc(sizeof(uint32_t) * topo->total_cores); uint32_t* apic_smt = malloc(sizeof(uint32_t) * topo->total_cores);
uint32_t** cache_smt_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores); uint32_t** cache_smt_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
uint32_t** cache_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores); uint32_t** cache_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
bool x2apic_id = cpu->maxLevels >= 0x0000000B; bool x2apic_id;
if(cpu->maxLevels >= 0x0000000B) {
uint32_t eax = 0x0000000B;
uint32_t ebx = 0;
uint32_t ecx = 0;
uint32_t edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
if(ebx == 0) x2apic_id = false;
else x2apic_id = true;
}
else {
x2apic_id = false;
}
for(int i=0; i < topo->total_cores; i++) { for(int i=0; i < topo->total_cores; i++) {
cache_smt_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level)); cache_smt_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));

View File

@@ -17,4 +17,8 @@ struct apic {
bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo); bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo);
uint32_t is_smt_enabled_amd(struct topology* topo); uint32_t is_smt_enabled_amd(struct topology* topo);
#ifndef __APPLE__
bool bind_to_cpu(int cpu_id);
#endif
#endif #endif

View File

@@ -1,4 +1,5 @@
#ifdef _WIN32 #ifdef _WIN32
#define NOMINMAX
#include <windows.h> #include <windows.h>
#else #else
#include "../common/udev.h" #include "../common/udev.h"
@@ -309,16 +310,26 @@ struct cpuInfo* get_cpu_info() {
printWarn("Can't read cpu name from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000004, cpu->maxExtendedLevels); printWarn("Can't read cpu name from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000004, cpu->maxExtendedLevels);
} }
cpu->topology_extensions = false;
if(cpu->cpu_vendor == CPU_VENDOR_AMD && cpu->maxExtendedLevels >= 0x80000001) {
eax = 0x80000001;
cpuid(&eax, &ebx, &ecx, &edx);
cpu->topology_extensions = (ecx >> 22) & 1;
}
cpu->arch = get_cpu_uarch(cpu); cpu->arch = get_cpu_uarch(cpu);
cpu->freq = get_frequency_info(cpu); cpu->freq = get_frequency_info(cpu);
cpu->cach = get_cache_info(cpu); cpu->cach = get_cache_info(cpu);
cpu->topo = get_topology_info(cpu, cpu->cach); cpu->topo = get_topology_info(cpu, cpu->cach);
if(cpu->cach == NULL || cpu->topo == NULL) {
return NULL;
}
return cpu; return cpu;
} }
bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) { bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
if(cpu->maxExtendedLevels >= 0x8000001D) { if(cpu->maxExtendedLevels >= 0x8000001D && cpu->topology_extensions) {
uint32_t i, eax, ebx, ecx, edx, num_sharing_cache, cache_type, cache_level; uint32_t i, eax, ebx, ecx, edx, num_sharing_cache, cache_type, cache_level;
i = 0; i = 0;
@@ -361,13 +372,12 @@ bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
topo->cach->L3->num_caches = topo->logical_cores / num_sharing_cache; topo->cach->L3->num_caches = topo->logical_cores / num_sharing_cache;
} }
else { else {
printBug("Found unified cache at level %d (expected == 2 or 3)", cache_level); printWarn("Found unknown unified cache at level %d", cache_level);
return false;
} }
break; break;
default: // Unknown Type Cache default: // Unknown cache type
printBug("Unknown Type Cache found at ID %d", i); printBug("Unknown cache type %d with level %d found at i=%d", cache_type, cache_level, i);
return false; return false;
} }
} }
@@ -376,7 +386,7 @@ bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
} while (cache_type > 0); } while (cache_type > 0);
} }
else { else {
printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X). Guessing cache sizes", 0x8000001D, cpu->maxExtendedLevels); printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X and topology_extensions=%s). Guessing cache topology", 0x8000001D, cpu->maxExtendedLevels, cpu->topology_extensions ? "true" : "false");
topo->cach->L1i->num_caches = topo->physical_cores; topo->cach->L1i->num_caches = topo->physical_cores;
topo->cach->L1d->num_caches = topo->physical_cores; topo->cach->L1d->num_caches = topo->physical_cores;
@@ -424,7 +434,7 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach) {
get_topology_from_apic(cpu, topo); get_topology_from_apic(cpu, topo);
} }
else { else {
printErr("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000001, cpu->maxLevels); printWarn("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000001, cpu->maxLevels);
topo->physical_cores = 1; topo->physical_cores = 1;
topo->logical_cores = 1; topo->logical_cores = 1;
topo->smt_available = 1; topo->smt_available = 1;
@@ -437,18 +447,18 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach) {
cpuid(&eax, &ebx, &ecx, &edx); cpuid(&eax, &ebx, &ecx, &edx);
topo->logical_cores = (ecx & 0xFF) + 1; topo->logical_cores = (ecx & 0xFF) + 1;
if (cpu->maxExtendedLevels >= 0x8000001E) { if (cpu->maxExtendedLevels >= 0x8000001E && cpu->topology_extensions) {
eax = 0x8000001E; eax = 0x8000001E;
cpuid(&eax, &ebx, &ecx, &edx); cpuid(&eax, &ebx, &ecx, &edx);
topo->smt_supported = ((ebx >> 8) & 0x03) + 1; topo->smt_supported = ((ebx >> 8) & 0x03) + 1;
} }
else { else {
printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x8000001E, cpu->maxExtendedLevels); printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X and topology_extensions=%s)", 0x8000001E, cpu->maxExtendedLevels, cpu->topology_extensions ? "true" : "false");
topo->smt_supported = 1; topo->smt_supported = 1;
} }
} }
else { else {
printErr("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000008, cpu->maxExtendedLevels); printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000008, cpu->maxExtendedLevels);
topo->physical_cores = 1; topo->physical_cores = 1;
topo->logical_cores = 1; topo->logical_cores = 1;
topo->smt_supported = 1; topo->smt_supported = 1;
@@ -570,13 +580,12 @@ struct cache* get_cache_info_general(struct cache* cach, uint32_t level) {
cach->L3->exists = true; cach->L3->exists = true;
} }
else { else {
printBug("Found unified cache at level %d (expected == 2 or 3)", cache_level); printWarn("Found unknown unified cache at level %d (size is %d bytes)", cache_level, cache_total_size);
return NULL;
} }
break; break;
default: // Unknown Type Cache default: // Unknown cache type
printBug("Unknown Type Cache found at ID %d", i); printBug("Unknown cache type %d with level %d found at i=%d", cache_type, cache_level, i);
return NULL; return NULL;
} }
} }
@@ -599,7 +608,7 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
if(cpu->cpu_vendor == CPU_VENDOR_INTEL) { if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
level = 0x00000004; level = 0x00000004;
if(cpu->maxLevels < level) { if(cpu->maxLevels < level) {
printErr("Can't read cache information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", level, cpu->maxLevels); printWarn("Can't read cache information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", level, cpu->maxLevels);
return NULL; return NULL;
} }
else { else {
@@ -608,11 +617,11 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
} }
else { else {
level = 0x8000001D; level = 0x8000001D;
if(cpu->maxExtendedLevels < level) { if(cpu->maxExtendedLevels < level || !cpu->topology_extensions) {
printWarn("Can't read cache information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", level, cpu->maxExtendedLevels); printWarn("Can't read cache information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X and topology_extensions=%s)", level, cpu->maxExtendedLevels, cpu->topology_extensions ? "true" : "false");
level = 0x80000006; level = 0x80000006;
if(cpu->maxExtendedLevels < level) { if(cpu->maxExtendedLevels < level) {
printErr("Can't read cache information from cpuid using old method (needed extended level is 0x%.8X, max is 0x%.8X)", level, cpu->maxExtendedLevels); printWarn("Can't read cache information from cpuid using old method (needed extended level is 0x%.8X, max is 0x%.8X)", level, cpu->maxExtendedLevels);
return NULL; return NULL;
} }
printWarn("Fallback to old method using 0x%.8X and 0x%.8X", level-1, level); printWarn("Fallback to old method using 0x%.8X and 0x%.8X", level-1, level);
@@ -623,35 +632,6 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
} }
} }
// Sanity checks. If we read values greater than this, they can't be valid ones
// The values were chosen by me
if(cach->L1i->size > 64 * 1024) {
printBug("Invalid L1i size: %dKB", cach->L1i->size/1024);
return NULL;
}
if(cach->L1d->size > 64 * 1024) {
printBug("Invalid L1d size: %dKB", cach->L1d->size/1024);
return NULL;
}
if(cach->L2->exists) {
if(cach->L3->exists && cach->L2->size > 2 * 1048576) {
printBug("Invalid L2 size: %dMB", cach->L2->size/(1048576));
return NULL;
}
else if(cach->L2->size > 100 * 1048576) {
printBug("Invalid L2 size: %dMB", cach->L2->size/(1048576));
return NULL;
}
}
if(cach->L3->exists && cach->L3->size > 100 * 1048576) {
printBug("Invalid L3 size: %dMB", cach->L3->size/(1048576));
return NULL;
}
if(!cach->L2->exists) {
printBug("Could not find L2 cache");
return NULL;
}
return cach; return cach;
} }
@@ -659,17 +639,8 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
struct frequency* freq = malloc(sizeof(struct frequency)); struct frequency* freq = malloc(sizeof(struct frequency));
if(cpu->maxLevels < 0x00000016) { if(cpu->maxLevels < 0x00000016) {
#ifdef _WIN32 #if defined (_WIN32) || defined (__APPLE__)
if(cpu->hv->present) { printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
}
else {
printErr("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
}
freq->base = UNKNOWN_FREQ;
freq->max = UNKNOWN_FREQ;
#elif defined __APPLE__
printErr("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
freq->base = UNKNOWN_FREQ; freq->base = UNKNOWN_FREQ;
freq->max = UNKNOWN_FREQ; freq->max = UNKNOWN_FREQ;
#else #else
@@ -903,14 +874,102 @@ void print_debug(struct cpuInfo* cpu) {
cpuid(&eax, &ebx, &ecx, &edx); cpuid(&eax, &ebx, &ecx, &edx);
printf("%s\n", cpu->cpu_name); printf("%s\n", cpu->cpu_name);
if(cpu->hv->present) printf("- Hypervisor: %s\n", cpu->hv->hv_name); if(cpu->hv->present) {
printf("- Hypervisor: %s\n", cpu->hv->hv_name);
}
printf("- Max standard level: 0x%.8X\n", cpu->maxLevels); printf("- Max standard level: 0x%.8X\n", cpu->maxLevels);
printf("- Max extended level: 0x%.8X\n", cpu->maxExtendedLevels); printf("- Max extended level: 0x%.8X\n", cpu->maxExtendedLevels);
if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
printf("- AMD topology extensions: %d\n", cpu->topology_extensions);
}
printf("- CPUID dump: 0x%.8X\n", eax); printf("- CPUID dump: 0x%.8X\n", eax);
free_cpuinfo_struct(cpu); free_cpuinfo_struct(cpu);
} }
// TODO: Query HV and Xeon Phi levels
void print_raw(struct cpuInfo* cpu) {
uint32_t eax;
uint32_t ebx;
uint32_t ecx;
uint32_t edx;
printf("%s\n\n", cpu->cpu_name);
printf(" CPUID leaf sub EAX EBX ECX EDX \n");
printf("--------------------------------------------------------------\n");
for(int c=0; c < cpu->topo->total_cores; c++) {
#ifndef __APPLE__
if(!bind_to_cpu(c)) {
printErr("Failed binding to CPU %d", c);
return;
}
#endif
printf("CPU %d:\n", c);
for(uint32_t reg=0x00000000; reg <= cpu->maxLevels; reg++) {
if(reg == 0x00000004) {
for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) {
eax = reg;
ebx = 0;
ecx = reg2;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
}
}
else if(reg == 0x0000000B) {
for(uint32_t reg2=0x00000000; reg2 < cpu->topo->smt_supported; reg2++) {
eax = reg;
ebx = 0;
ecx = reg2;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
}
}
else {
eax = reg;
ebx = 0;
ecx = 0;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
}
}
for(uint32_t reg=0x80000000; reg <= cpu->maxExtendedLevels; reg++) {
if(reg == 0x8000001D) {
for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) {
eax = reg;
ebx = 0;
ecx = reg2;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
}
}
else {
eax = reg;
ebx = 0;
ecx = 0;
edx = 0;
cpuid(&eax, &ebx, &ecx, &edx);
printf(" 0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
}
}
}
}
void free_topo_struct(struct topology* topo) { void free_topo_struct(struct topology* topo) {
free(topo->apic->cache_select_mask); free(topo->apic->cache_select_mask);
free(topo->apic->cache_id_apic); free(topo->apic->cache_id_apic);

View File

@@ -15,6 +15,7 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
char* get_str_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq); char* get_str_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq);
void print_debug(struct cpuInfo* cpu); void print_debug(struct cpuInfo* cpu);
void print_raw(struct cpuInfo* cpu);
void free_topo_struct(struct topology* topo); void free_topo_struct(struct topology* topo);

View File

@@ -65,6 +65,7 @@ enum {
UARCH_AIRMONT, UARCH_AIRMONT,
UARCH_KABY_LAKE, UARCH_KABY_LAKE,
UARCH_COMET_LAKE, UARCH_COMET_LAKE,
UARCH_ROCKET_LAKE,
UARCH_AMBER_LAKE, UARCH_AMBER_LAKE,
UARCH_WHISKEY_LAKE, UARCH_WHISKEY_LAKE,
UARCH_SKYLAKE, UARCH_SKYLAKE,
@@ -233,6 +234,7 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
CHECK_UARCH(arch, 0, 6, 9, 14, 13, "Coffee Lake", UARCH_COFFE_LAKE, 14) CHECK_UARCH(arch, 0, 6, 9, 14, 13, "Coffee Lake", UARCH_COFFE_LAKE, 14)
CHECK_UARCH(arch, 0, 6, 10, 5, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip CHECK_UARCH(arch, 0, 6, 10, 5, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 10, 6, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // instlatx64.atw.hu (i7-10710U) CHECK_UARCH(arch, 0, 6, 10, 6, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // instlatx64.atw.hu (i7-10710U)
CHECK_UARCH(arch, 0, 6, 10, 7, NA, "Rocket Lake", UARCH_ROCKET_LAKE, 14) // instlatx64.atw.hu (i7-11700K)
CHECK_UARCH(arch, 0, 11, 0, 0, NA, "Knights Ferry", UARCH_KNIGHTS_FERRY, 45) // found only on en.wikichip.org CHECK_UARCH(arch, 0, 11, 0, 0, NA, "Knights Ferry", UARCH_KNIGHTS_FERRY, 45) // found only on en.wikichip.org
CHECK_UARCH(arch, 0, 11, 0, 1, NA, "Knights Corner", UARCH_KNIGHTS_CORNER, 22) CHECK_UARCH(arch, 0, 11, 0, 1, NA, "Knights Corner", UARCH_KNIGHTS_CORNER, 22)
CHECK_UARCH(arch, 0, 15, 0, 0, NA, "Willamette", UARCH_WILLAMETTE, 180) CHECK_UARCH(arch, 0, 15, 0, 0, NA, "Willamette", UARCH_WILLAMETTE, 180)
@@ -367,6 +369,7 @@ bool is_knights_landing(struct cpuInfo* cpu) {
int get_number_of_vpus(struct cpuInfo* cpu) { int get_number_of_vpus(struct cpuInfo* cpu) {
switch(cpu->arch->uarch) { switch(cpu->arch->uarch) {
// Intel
case UARCH_HASWELL: case UARCH_HASWELL:
case UARCH_BROADWELL: case UARCH_BROADWELL:
@@ -374,6 +377,7 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
case UARCH_CASCADE_LAKE: case UARCH_CASCADE_LAKE:
case UARCH_KABY_LAKE: case UARCH_KABY_LAKE:
case UARCH_COMET_LAKE: case UARCH_COMET_LAKE:
case UARCH_ROCKET_LAKE:
case UARCH_AMBER_LAKE: case UARCH_AMBER_LAKE:
case UARCH_WHISKEY_LAKE: case UARCH_WHISKEY_LAKE:
case UARCH_COFFE_LAKE: case UARCH_COFFE_LAKE:
@@ -384,7 +388,7 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
case UARCH_ICE_LAKE: case UARCH_ICE_LAKE:
// Right now is just a guess! // AMD
case UARCH_ZEN2: case UARCH_ZEN2:
case UARCH_ZEN3: case UARCH_ZEN3:
return 2; return 2;