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11 Commits
| Author | SHA1 | Date | |
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ae6c7f75ad | ||
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f84160f97e | ||
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e7ec4d492e | ||
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dfa2b773d1 | ||
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59efbf4e08 | ||
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29768e841d | ||
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cc16bc56ef | ||
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1504c5d0ef | ||
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08919916dc | ||
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4a8a7567f0 | ||
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c01f60fa6c |
@@ -324,6 +324,8 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
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return 3;
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return 3;
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case UARCH_ICESTORM: // [https://dougallj.github.io/applecpu/icestorm-simd.html]
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case UARCH_ICESTORM: // [https://dougallj.github.io/applecpu/icestorm-simd.html]
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case UARCH_BLIZZARD: // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
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case UARCH_BLIZZARD: // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
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case UARCH_TAISHAN_V110:// [https://www-file.huawei.com/-/media/corp2020/pdf/publications/huawei-research/2022/huawei-research-issue1-en.pdf]: "128-bit x 2 for single precision"
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case UARCH_TAISHAN_V200:// Not confirmed, asssuming same as v110
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case UARCH_CORTEX_A57: // [https://www.anandtech.com/show/8718/the-samsung-galaxy-note-4-exynos-review/5]
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case UARCH_CORTEX_A57: // [https://www.anandtech.com/show/8718/the-samsung-galaxy-note-4-exynos-review/5]
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case UARCH_CORTEX_A72: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
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case UARCH_CORTEX_A72: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
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case UARCH_CORTEX_A73: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
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case UARCH_CORTEX_A73: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
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@@ -32,6 +32,7 @@ enum {
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enum {
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enum {
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HV_VENDOR_KVM,
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HV_VENDOR_KVM,
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HV_VENDOR_QEMU,
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HV_VENDOR_QEMU,
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HV_VENDOR_VBOX,
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HV_VENDOR_HYPERV,
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HV_VENDOR_HYPERV,
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HV_VENDOR_VMWARE,
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HV_VENDOR_VMWARE,
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HV_VENDOR_XEN,
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HV_VENDOR_XEN,
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@@ -21,7 +21,7 @@
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#endif
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#endif
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#ifdef ARCH_X86
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#ifdef ARCH_X86
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static const char* ARCH_STR = "x86_64 build";
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static const char* ARCH_STR = "x86 / x86_64 build";
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#include "../x86/cpuid.h"
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#include "../x86/cpuid.h"
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#elif ARCH_PPC
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#elif ARCH_PPC
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static const char* ARCH_STR = "PowerPC build";
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static const char* ARCH_STR = "PowerPC build";
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@@ -336,6 +336,13 @@ struct ascii_logo* choose_ascii_art_aux(struct ascii_logo* logo_long, struct asc
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}
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}
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}
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}
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// https://no-color.org/
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bool is_color_enabled(void) {
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const char *var_name = "NO_COLOR";
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char *no_color = getenv(var_name);
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return no_color == NULL || no_color[0] == '\0';
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}
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void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* term, int lf) {
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void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* term, int lf) {
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// 1. Choose logo
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// 1. Choose logo
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#ifdef ARCH_X86
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#ifdef ARCH_X86
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@@ -394,6 +401,9 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
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// 2. Choose colors
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// 2. Choose colors
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struct ascii_logo* logo = art->art;
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struct ascii_logo* logo = art->art;
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bool color = is_color_enabled();
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if (!color)
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art->style = STYLE_LEGACY;
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switch(art->style) {
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switch(art->style) {
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case STYLE_LEGACY:
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case STYLE_LEGACY:
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@@ -14,6 +14,7 @@
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static char *hv_vendors_name[] = {
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static char *hv_vendors_name[] = {
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[HV_VENDOR_KVM] = "KVM",
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[HV_VENDOR_KVM] = "KVM",
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[HV_VENDOR_QEMU] = "QEMU",
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[HV_VENDOR_QEMU] = "QEMU",
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[HV_VENDOR_VBOX] = "VirtualBox",
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[HV_VENDOR_HYPERV] = "Microsoft Hyper-V",
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[HV_VENDOR_HYPERV] = "Microsoft Hyper-V",
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[HV_VENDOR_VMWARE] = "VMware",
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[HV_VENDOR_VMWARE] = "VMware",
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[HV_VENDOR_XEN] = "Xen",
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[HV_VENDOR_XEN] = "Xen",
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@@ -80,9 +81,13 @@ struct topology* get_topology_info(struct cache* cach) {
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if(!fill_package_ids_from_sys(package_ids, topo->total_cores)) {
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if(!fill_package_ids_from_sys(package_ids, topo->total_cores)) {
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printWarn("fill_package_ids_from_sys failed, output may be incomplete/invalid");
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printWarn("fill_package_ids_from_sys failed, output may be incomplete/invalid");
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for(int i=0; i < topo->total_cores; i++) package_ids[i] = 0;
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for(int i=0; i < topo->total_cores; i++) package_ids[i] = 0;
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// fill_package_ids_from_sys failed, use a
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// fill_package_ids_from_sys failed, use udev to try
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// more sophisticated wat to find the number of sockets
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// to find the number of sockets
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topo->sockets = get_num_sockets_package_cpus(topo);
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topo->sockets = get_num_sockets_package_cpus(topo);
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if (topo->sockets == UNKNOWN_DATA) {
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printWarn("get_num_sockets_package_cpus failed: assuming 1 socket");
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topo->sockets = 1;
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}
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}
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}
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else {
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else {
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// fill_package_ids_from_sys succeeded, use the
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// fill_package_ids_from_sys succeeded, use the
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@@ -25,6 +25,7 @@ enum {
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UARCH_PPC603,
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UARCH_PPC603,
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UARCH_PPC440,
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UARCH_PPC440,
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UARCH_PPC470,
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UARCH_PPC470,
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UARCH_ESPRESSO, // Not exactly an uarch, but the codename of Wii U
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UARCH_PPC970,
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UARCH_PPC970,
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UARCH_PPC970FX,
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UARCH_PPC970FX,
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UARCH_PPC970MP,
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UARCH_PPC970MP,
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@@ -75,6 +76,7 @@ void fill_uarch(struct uarch* arch, MICROARCH u) {
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FILL_UARCH(arch->uarch, UARCH_PPC603, "PowerPC 603", UNK) // varies
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FILL_UARCH(arch->uarch, UARCH_PPC603, "PowerPC 603", UNK) // varies
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FILL_UARCH(arch->uarch, UARCH_PPC440, "PowerPC 440", UNK)
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FILL_UARCH(arch->uarch, UARCH_PPC440, "PowerPC 440", UNK)
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FILL_UARCH(arch->uarch, UARCH_PPC470, "PowerPC 470", 45) // strange...
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FILL_UARCH(arch->uarch, UARCH_PPC470, "PowerPC 470", 45) // strange...
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FILL_UARCH(arch->uarch, UARCH_ESPRESSO, "Espresso", 45) // https://en.wikipedia.org/wiki/PowerPC_7xx#Espresso, https://en.wikipedia.org/wiki/Espresso_(processor)
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FILL_UARCH(arch->uarch, UARCH_PPC970, "PowerPC 970", 130)
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FILL_UARCH(arch->uarch, UARCH_PPC970, "PowerPC 970", 130)
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FILL_UARCH(arch->uarch, UARCH_PPC970FX, "PowerPC 970FX", 90)
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FILL_UARCH(arch->uarch, UARCH_PPC970FX, "PowerPC 970FX", 90)
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FILL_UARCH(arch->uarch, UARCH_PPC970MP, "PowerPC 970MP", 90)
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FILL_UARCH(arch->uarch, UARCH_PPC970MP, "PowerPC 970MP", 90)
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@@ -234,6 +236,7 @@ struct uarch* get_uarch_from_pvr(uint32_t pvr) {
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CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff50000, UARCH_PPC470)
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CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff50000, UARCH_PPC470)
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CHECK_UARCH(arch, pvr, 0xffff0000, 0x00050000, UARCH_PPC470)
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CHECK_UARCH(arch, pvr, 0xffff0000, 0x00050000, UARCH_PPC470)
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CHECK_UARCH(arch, pvr, 0xffff0000, 0x11a50000, UARCH_PPC470)
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CHECK_UARCH(arch, pvr, 0xffff0000, 0x11a50000, UARCH_PPC470)
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CHECK_UARCH(arch, pvr, 0xffffffff, 0x70010201, UARCH_ESPRESSO)
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UARCH_END
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UARCH_END
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return arch;
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return arch;
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@@ -280,9 +283,6 @@ char* get_str_process(struct cpuInfo* cpu) {
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if(process == UNK) {
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if(process == UNK) {
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snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
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snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
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}
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}
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else if(process > 100) {
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sprintf(str, "%.2fum", (double)process/100);
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}
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else if(process > 0){
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else if(process > 0){
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sprintf(str, "%dnm", process);
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sprintf(str, "%dnm", process);
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}
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}
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@@ -26,6 +26,7 @@
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static const char *hv_vendors_string[] = {
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static const char *hv_vendors_string[] = {
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[HV_VENDOR_KVM] = "KVMKVMKVM",
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[HV_VENDOR_KVM] = "KVMKVMKVM",
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[HV_VENDOR_QEMU] = "TCGTCGTCGTCG",
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[HV_VENDOR_QEMU] = "TCGTCGTCGTCG",
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[HV_VENDOR_VBOX] = "VBoxVBoxVBox",
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[HV_VENDOR_HYPERV] = "Microsoft Hv",
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[HV_VENDOR_HYPERV] = "Microsoft Hv",
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[HV_VENDOR_VMWARE] = "VMwareVMware",
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[HV_VENDOR_VMWARE] = "VMwareVMware",
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[HV_VENDOR_XEN] = "XenVMMXenVMM",
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[HV_VENDOR_XEN] = "XenVMMXenVMM",
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@@ -38,6 +39,7 @@ static const char *hv_vendors_string[] = {
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static char *hv_vendors_name[] = {
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static char *hv_vendors_name[] = {
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[HV_VENDOR_KVM] = "KVM",
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[HV_VENDOR_KVM] = "KVM",
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[HV_VENDOR_QEMU] = "QEMU",
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[HV_VENDOR_QEMU] = "QEMU",
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[HV_VENDOR_VBOX] = "VirtualBox",
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[HV_VENDOR_HYPERV] = "Microsoft Hyper-V",
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[HV_VENDOR_HYPERV] = "Microsoft Hyper-V",
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[HV_VENDOR_VMWARE] = "VMware",
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[HV_VENDOR_VMWARE] = "VMware",
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[HV_VENDOR_XEN] = "Xen",
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[HV_VENDOR_XEN] = "Xen",
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@@ -486,9 +488,8 @@ struct cpuInfo* get_cpu_info(void) {
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cpu->cpu_name = get_str_cpu_name_internal();
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cpu->cpu_name = get_str_cpu_name_internal();
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}
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}
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else {
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else {
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cpu->cpu_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN) + 1));
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cpu->cpu_name = NULL;
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strcpy(cpu->cpu_name, STRING_UNKNOWN);
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printWarn("Can't read CPU name from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000004, cpu->maxExtendedLevels);
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printWarn("Can't read cpu name from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000004, cpu->maxExtendedLevels);
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}
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}
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cpu->topology_extensions = false;
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cpu->topology_extensions = false;
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@@ -538,12 +539,17 @@ struct cpuInfo* get_cpu_info(void) {
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ptr->first_core_id = first_core;
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ptr->first_core_id = first_core;
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ptr->feat = get_features_info(ptr);
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ptr->feat = get_features_info(ptr);
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// If any field of the struct is NULL,
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// return inmideately, as further functions
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// require valid fields (cach, topo, etc)
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ptr->arch = get_cpu_uarch(ptr);
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ptr->arch = get_cpu_uarch(ptr);
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ptr->freq = get_frequency_info(ptr);
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ptr->freq = get_frequency_info(ptr);
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if (cpu->cpu_name == NULL && ptr == cpu) {
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// If we couldnt read CPU name from cpuid, infer it now
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cpu->cpu_name = infer_cpu_name_from_uarch(cpu->arch);
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}
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// If any field of the struct is NULL,
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// return early, as next functions
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// require non NULL fields in cach and topo
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ptr->cach = get_cache_info(ptr);
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ptr->cach = get_cache_info(ptr);
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if(ptr->cach == NULL) return cpu;
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if(ptr->cach == NULL) return cpu;
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||||||
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298
src/x86/uarch.c
298
src/x86/uarch.c
@@ -48,7 +48,9 @@ enum {
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UARCH_UNKNOWN,
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UARCH_UNKNOWN,
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// INTEL //
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// INTEL //
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UARCH_P5,
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UARCH_P5,
|
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UARCH_P6,
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UARCH_P5_MMX,
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||||||
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UARCH_P6_PENTIUM_II,
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||||||
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UARCH_P6_PENTIUM_III,
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||||||
UARCH_DOTHAN,
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UARCH_DOTHAN,
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UARCH_YONAH,
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UARCH_YONAH,
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UARCH_MEROM,
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UARCH_MEROM,
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||||||
@@ -139,128 +141,128 @@ void fill_uarch(struct uarch* arch, char* str, MICROARCH u, uint32_t process) {
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struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
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struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
|
||||||
struct uarch* arch = emalloc(sizeof(struct uarch));
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struct uarch* arch = emalloc(sizeof(struct uarch));
|
||||||
|
|
||||||
// EF: Extended Family //
|
// EF: Extended Family //
|
||||||
// F: Family //
|
// F: Family //
|
||||||
// EM: Extended Model //
|
// EM: Extended Model //
|
||||||
// M: Model //
|
// M: Model //
|
||||||
// S: Stepping //
|
// S: Stepping //
|
||||||
// ----------------------------------------------------------------------------- //
|
// ------------------------------------------------------------------------------- //
|
||||||
// EF F EM M S //
|
// EF F EM M S //
|
||||||
UARCH_START
|
UARCH_START
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 0, NA, "P5", UARCH_P5, 800)
|
CHECK_UARCH(arch, 0, 5, 0, 0, NA, "P5", UARCH_P5, 800)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 1, NA, "P5", UARCH_P5, 800)
|
CHECK_UARCH(arch, 0, 5, 0, 1, NA, "P5", UARCH_P5, 800)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 2, NA, "P5", UARCH_P5, UNK)
|
CHECK_UARCH(arch, 0, 5, 0, 2, NA, "P5", UARCH_P5, UNK)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 3, NA, "P5", UARCH_P5, 600)
|
CHECK_UARCH(arch, 0, 5, 0, 3, NA, "P5", UARCH_P5, 600)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 4, NA, "P5 MMX", UARCH_P5, UNK)
|
CHECK_UARCH(arch, 0, 5, 0, 4, NA, "P5 (MMX)", UARCH_P5_MMX, UNK)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "P5 MMX", UARCH_P5, UNK)
|
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "P5 (MMX)", UARCH_P5_MMX, UNK)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 8, NA, "P5 MMX", UARCH_P5, 250)
|
CHECK_UARCH(arch, 0, 5, 0, 8, NA, "P5 (MMX)", UARCH_P5_MMX, 250)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 9, 0, "Lakemont", UARCH_LAKEMONT, 32)
|
CHECK_UARCH(arch, 0, 5, 0, 9, 0, "Lakemont", UARCH_LAKEMONT, 32)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 9, NA, "P5 MMX", UARCH_P5, UNK)
|
CHECK_UARCH(arch, 0, 5, 0, 9, NA, "P5 (MMX)", UARCH_P5_MMX, UNK)
|
||||||
CHECK_UARCH(arch, 0, 5, 0, 10, 0, "Lakemont", UARCH_LAKEMONT, 32)
|
CHECK_UARCH(arch, 0, 5, 0, 10, 0, "Lakemont", UARCH_LAKEMONT, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 0, NA, "P6 Pentium II", UARCH_P6, UNK)
|
CHECK_UARCH(arch, 0, 6, 0, 0, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 1, NA, "P6 Pentium II", UARCH_P6, UNK) // process depends on core
|
CHECK_UARCH(arch, 0, 6, 0, 1, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK) // process depends on core
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 2, NA, "P6 Pentium II", UARCH_P6, UNK)
|
CHECK_UARCH(arch, 0, 6, 0, 2, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 3, NA, "P6 Pentium II", UARCH_P6, 350)
|
CHECK_UARCH(arch, 0, 6, 0, 3, NA, "P6 (Klamath)", UARCH_P6_PENTIUM_II, 350) // http://instlatx64.atw.hu.
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 4, NA, "P6 Pentium II", UARCH_P6, UNK)
|
CHECK_UARCH(arch, 0, 6, 0, 4, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 5, NA, "P6 Pentium II", UARCH_P6, 250)
|
CHECK_UARCH(arch, 0, 6, 0, 5, NA, "P6 (Deschutes)", UARCH_P6_PENTIUM_II, 250) // http://instlatx64.atw.hu.
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 6, NA, "P6 Pentium II", UARCH_P6, UNK)
|
CHECK_UARCH(arch, 0, 6, 0, 6, NA, "P6 (Dixon)", UARCH_P6_PENTIUM_II, UNK) // http://instlatx64.atw.hu.
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 7, NA, "P6 Pentium III", UARCH_P6, 250)
|
CHECK_UARCH(arch, 0, 6, 0, 7, NA, "P6 (Katmai)", UARCH_P6_PENTIUM_III, 250) // Core names from: https://en.wikichip.org/wiki/intel/cpuid. NOTE: Xeon core names are different! https://www.techpowerup.com/cpu-specs/?generation=Intel+Pentium+III+Xeon
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 8, NA, "P6 Pentium III", UARCH_P6, 180)
|
CHECK_UARCH(arch, 0, 6, 0, 8, NA, "P6 (Coppermine)", UARCH_P6_PENTIUM_III, 180) // Also: https://en.wikipedia.org/wiki/Pentium_III
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 9, NA, "P6 Pentium M", UARCH_P6, 130)
|
CHECK_UARCH(arch, 0, 6, 0, 9, NA, "P6 (Pentium M)", UARCH_P6_PENTIUM_III, 130)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 10, NA, "P6 Pentium III", UARCH_P6, 180)
|
CHECK_UARCH(arch, 0, 6, 0, 10, NA, "P6 (Coppermine T)", UARCH_P6_PENTIUM_III, 180)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 11, NA, "P6 Pentium III", UARCH_P6, 130)
|
CHECK_UARCH(arch, 0, 6, 0, 11, NA, "P6 (Tualatin)", UARCH_P6_PENTIUM_III, 130)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 13, NA, "Dothan", UARCH_DOTHAN, UNK) // process depends on core
|
CHECK_UARCH(arch, 0, 6, 0, 13, NA, "Dothan", UARCH_DOTHAN, UNK) // process depends on core
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 14, NA, "Yonah", UARCH_YONAH, 65)
|
CHECK_UARCH(arch, 0, 6, 0, 14, NA, "Yonah", UARCH_YONAH, 65)
|
||||||
CHECK_UARCH(arch, 0, 6, 0, 15, NA, "Merom", UARCH_MEROM, 65)
|
CHECK_UARCH(arch, 0, 6, 0, 15, NA, "Merom", UARCH_MEROM, 65)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 5, NA, "Dothan", UARCH_DOTHAN, 90)
|
CHECK_UARCH(arch, 0, 6, 1, 5, NA, "Dothan", UARCH_DOTHAN, 90)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 6, NA, "Merom", UARCH_MEROM, 65)
|
CHECK_UARCH(arch, 0, 6, 1, 6, NA, "Merom", UARCH_MEROM, 65)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 7, NA, "Penryn", UARCH_PENYR, 45)
|
CHECK_UARCH(arch, 0, 6, 1, 7, NA, "Penryn", UARCH_PENYR, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 10, NA, "Nehalem", UARCH_NEHALEM, 45)
|
CHECK_UARCH(arch, 0, 6, 1, 10, NA, "Nehalem", UARCH_NEHALEM, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 12, NA, "Bonnell", UARCH_BONNELL, 45)
|
CHECK_UARCH(arch, 0, 6, 1, 12, NA, "Bonnell", UARCH_BONNELL, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 13, NA, "Penryn", UARCH_PENYR, 45)
|
CHECK_UARCH(arch, 0, 6, 1, 13, NA, "Penryn", UARCH_PENYR, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 14, NA, "Nehalem", UARCH_NEHALEM, 45)
|
CHECK_UARCH(arch, 0, 6, 1, 14, NA, "Nehalem", UARCH_NEHALEM, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 1, 15, NA, "Nehalem", UARCH_NEHALEM, 45)
|
CHECK_UARCH(arch, 0, 6, 1, 15, NA, "Nehalem", UARCH_NEHALEM, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 5, NA, "Westmere", UARCH_WESTMERE, 32)
|
CHECK_UARCH(arch, 0, 6, 2, 5, NA, "Westmere", UARCH_WESTMERE, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 2 , 6, NA, "Bonnell", UARCH_BONNELL, 45)
|
CHECK_UARCH(arch, 0, 6, 2 , 6, NA, "Bonnell", UARCH_BONNELL, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 7, NA, "Saltwell", UARCH_SALTWELL, 32)
|
CHECK_UARCH(arch, 0, 6, 2, 7, NA, "Saltwell", UARCH_SALTWELL, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 10, NA, "Sandy Bridge", UARCH_SANDY_BRIDGE, 32)
|
CHECK_UARCH(arch, 0, 6, 2, 10, NA, "Sandy Bridge", UARCH_SANDY_BRIDGE, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 12, NA, "Westmere", UARCH_WESTMERE, 32)
|
CHECK_UARCH(arch, 0, 6, 2, 12, NA, "Westmere", UARCH_WESTMERE, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 13, NA, "Sandy Bridge", UARCH_SANDY_BRIDGE, 32)
|
CHECK_UARCH(arch, 0, 6, 2, 13, NA, "Sandy Bridge", UARCH_SANDY_BRIDGE, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 14, NA, "Nehalem", UARCH_NEHALEM, 45)
|
CHECK_UARCH(arch, 0, 6, 2, 14, NA, "Nehalem", UARCH_NEHALEM, 45)
|
||||||
CHECK_UARCH(arch, 0, 6, 2, 15, NA, "Westmere", UARCH_WESTMERE, 32)
|
CHECK_UARCH(arch, 0, 6, 2, 15, NA, "Westmere", UARCH_WESTMERE, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 5, NA, "Saltwell", UARCH_SALTWELL, 14)
|
CHECK_UARCH(arch, 0, 6, 3, 5, NA, "Saltwell", UARCH_SALTWELL, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 6, NA, "Saltwell", UARCH_SALTWELL, 32)
|
CHECK_UARCH(arch, 0, 6, 3, 6, NA, "Saltwell", UARCH_SALTWELL, 32)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 7, NA, "Silvermont", UARCH_SILVERMONT, 22)
|
CHECK_UARCH(arch, 0, 6, 3, 7, NA, "Silvermont", UARCH_SILVERMONT, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 10, NA, "Ivy Bridge", UARCH_IVY_BRIDGE, 22)
|
CHECK_UARCH(arch, 0, 6, 3, 10, NA, "Ivy Bridge", UARCH_IVY_BRIDGE, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 12, NA, "Haswell", UARCH_HASWELL, 22)
|
CHECK_UARCH(arch, 0, 6, 3, 12, NA, "Haswell", UARCH_HASWELL, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 13, NA, "Broadwell", UARCH_BROADWELL, 14)
|
CHECK_UARCH(arch, 0, 6, 3, 13, NA, "Broadwell", UARCH_BROADWELL, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 14, NA, "Ivy Bridge", UARCH_IVY_BRIDGE, 22)
|
CHECK_UARCH(arch, 0, 6, 3, 14, NA, "Ivy Bridge", UARCH_IVY_BRIDGE, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 3, 15, NA, "Haswell", UARCH_HASWELL, 22)
|
CHECK_UARCH(arch, 0, 6, 3, 15, NA, "Haswell", UARCH_HASWELL, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 5, NA, "Haswell", UARCH_HASWELL, 22)
|
CHECK_UARCH(arch, 0, 6, 4, 5, NA, "Haswell", UARCH_HASWELL, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 6, NA, "Haswell", UARCH_HASWELL, 22)
|
CHECK_UARCH(arch, 0, 6, 4, 6, NA, "Haswell", UARCH_HASWELL, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 7, NA, "Broadwell", UARCH_BROADWELL, 14)
|
CHECK_UARCH(arch, 0, 6, 4, 7, NA, "Broadwell", UARCH_BROADWELL, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 10, NA, "Silvermont", UARCH_SILVERMONT, 22) // no docs, but /proc/cpuinfo seen in wild
|
CHECK_UARCH(arch, 0, 6, 4, 10, NA, "Silvermont", UARCH_SILVERMONT, 22) // no docs, but /proc/cpuinfo seen in wild
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 12, NA, "Airmont", UARCH_AIRMONT, 14)
|
CHECK_UARCH(arch, 0, 6, 4, 12, NA, "Airmont", UARCH_AIRMONT, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 13, NA, "Silvermont", UARCH_SILVERMONT, 22)
|
CHECK_UARCH(arch, 0, 6, 4, 13, NA, "Silvermont", UARCH_SILVERMONT, 22)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 14, 8, "Kaby Lake", UARCH_KABY_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 4, 14, 8, "Kaby Lake", UARCH_KABY_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 14, NA, "Skylake", UARCH_SKYLAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 4, 14, NA, "Skylake", UARCH_SKYLAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 4, 15, NA, "Broadwell", UARCH_BROADWELL, 14)
|
CHECK_UARCH(arch, 0, 6, 4, 15, NA, "Broadwell", UARCH_BROADWELL, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 5, 6, "Cascade Lake", UARCH_CASCADE_LAKE, 14) // no docs, but example from Greg Stewart
|
CHECK_UARCH(arch, 0, 6, 5, 5, 6, "Cascade Lake", UARCH_CASCADE_LAKE, 14) // no docs, but example from Greg Stewart
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 5, 7, "Cascade Lake", UARCH_CASCADE_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 5, 7, "Cascade Lake", UARCH_CASCADE_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 5, 10, "Cooper Lake", UARCH_COOPER_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 5, 10, "Cooper Lake", UARCH_COOPER_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 5, NA, "Skylake", UARCH_SKYLAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 5, NA, "Skylake", UARCH_SKYLAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 6, NA, "Broadwell", UARCH_BROADWELL, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 6, NA, "Broadwell", UARCH_BROADWELL, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 7, NA, "Knights Landing", UARCH_KNIGHTS_LANDING, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 7, NA, "Knights Landing", UARCH_KNIGHTS_LANDING, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 10, NA, "Silvermont", UARCH_SILVERMONT, 22) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 5, 10, NA, "Silvermont", UARCH_SILVERMONT, 22) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 12, NA, "Goldmont", UARCH_GOLDMONT, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 12, NA, "Goldmont", UARCH_GOLDMONT, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 13, NA, "Silvermont", UARCH_SILVERMONT, 22) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 5, 13, NA, "Silvermont", UARCH_SILVERMONT, 22) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 14, 8, "Kaby Lake", UARCH_KABY_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 14, 8, "Kaby Lake", UARCH_KABY_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 14, NA, "Skylake", UARCH_SKYLAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 14, NA, "Skylake", UARCH_SKYLAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 5, 15, NA, "Goldmont", UARCH_GOLDMONT, 14)
|
CHECK_UARCH(arch, 0, 6, 5, 15, NA, "Goldmont", UARCH_GOLDMONT, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 6, 6, NA, "Palm Cove", UARCH_PALM_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 6, 6, NA, "Palm Cove", UARCH_PALM_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 6, 10, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 6, 10, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 6, 12, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 6, 12, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 7, 5, NA, "Airmont", UARCH_AIRMONT, 14) // no spec update; whispers & rumors
|
CHECK_UARCH(arch, 0, 6, 7, 5, NA, "Airmont", UARCH_AIRMONT, 14) // no spec update; whispers & rumors
|
||||||
CHECK_UARCH(arch, 0, 6, 7, 10, NA, "Goldmont Plus", UARCH_GOLDMONT_PLUS, 14)
|
CHECK_UARCH(arch, 0, 6, 7, 10, NA, "Goldmont Plus", UARCH_GOLDMONT_PLUS, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 7, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 7, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 7, 14, NA, "Ice Lake", UARCH_ICE_LAKE, 10)
|
CHECK_UARCH(arch, 0, 6, 7, 14, NA, "Ice Lake", UARCH_ICE_LAKE, 10)
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 5, NA, "Knights Mill", UARCH_KNIGHTS_MILL, 14) // no spec update; only MSR_CPUID_table* so far
|
CHECK_UARCH(arch, 0, 6, 8, 5, NA, "Knights Mill", UARCH_KNIGHTS_MILL, 14) // no spec update; only MSR_CPUID_table* so far
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
CHECK_UARCH(arch, 0, 6, 8, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 10, NA, "Tremont", UARCH_TREMONT, 10) // no spec update; only geekbench.com example
|
CHECK_UARCH(arch, 0, 6, 8, 10, NA, "Tremont", UARCH_TREMONT, 10) // no spec update; only geekbench.com example
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 12, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64
|
CHECK_UARCH(arch, 0, 6, 8, 12, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 13, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64
|
CHECK_UARCH(arch, 0, 6, 8, 13, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64
|
||||||
// CHECK_UARCH(arch, 0, 6, 8, 14, 9, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
|
// CHECK_UARCH(arch, 0, 6, 8, 14, 9, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
|
||||||
// CHECK_UARCH(arch, 0, 6, 8, 14, 10, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
|
// CHECK_UARCH(arch, 0, 6, 8, 14, 10, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 14, 11, "Whiskey Lake", UARCH_WHISKEY_LAKE, 14) // wikichip
|
CHECK_UARCH(arch, 0, 6, 8, 14, 11, "Whiskey Lake", UARCH_WHISKEY_LAKE, 14) // wikichip
|
||||||
CHECK_UARCH(arch, 0, 6, 8, 14, 12, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
|
CHECK_UARCH(arch, 0, 6, 8, 14, 12, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
CHECK_UARCH(arch, 0, 6, 9, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 7, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-S)
|
CHECK_UARCH(arch, 0, 6, 9, 7, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-S)
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 10, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-P)
|
CHECK_UARCH(arch, 0, 6, 9, 10, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-P)
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 12, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
CHECK_UARCH(arch, 0, 6, 9, 12, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // LX*
|
CHECK_UARCH(arch, 0, 6, 9, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // LX*
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 14, 9, "Kaby Lake", UARCH_KABY_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 9, 14, 9, "Kaby Lake", UARCH_KABY_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 14, 10, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 9, 14, 10, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 14, 11, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 9, 14, 11, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 14, 12, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 9, 14, 12, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 9, 14, 13, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
CHECK_UARCH(arch, 0, 6, 9, 14, 13, "Coffee Lake", UARCH_COFFEE_LAKE, 14)
|
||||||
CHECK_UARCH(arch, 0, 6, 10, 5, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
|
CHECK_UARCH(arch, 0, 6, 10, 5, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
|
||||||
CHECK_UARCH(arch, 0, 6, 10, 6, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // instlatx64.atw.hu (i7-10710U)
|
CHECK_UARCH(arch, 0, 6, 10, 6, NA, "Comet Lake", UARCH_COMET_LAKE, 14) // instlatx64.atw.hu (i7-10710U)
|
||||||
CHECK_UARCH(arch, 0, 6, 10, 7, NA, "Rocket Lake", UARCH_ROCKET_LAKE, 14) // instlatx64.atw.hu (i7-11700K)
|
CHECK_UARCH(arch, 0, 6, 10, 7, NA, "Rocket Lake", UARCH_ROCKET_LAKE, 14) // instlatx64.atw.hu (i7-11700K)
|
||||||
CHECK_UARCH(arch, 0, 6, 11, 7, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i5-13600K)
|
CHECK_UARCH(arch, 0, 6, 11, 7, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i5-13600K)
|
||||||
CHECK_UARCH(arch, 0, 6, 11, 10, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i7-1370P)
|
CHECK_UARCH(arch, 0, 6, 11, 10, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i7-1370P)
|
||||||
CHECK_UARCH(arch, 0, 6, 11, 14, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64.atw.hu (Alder Lake-N)
|
CHECK_UARCH(arch, 0, 6, 11, 14, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64.atw.hu (Alder Lake-N)
|
||||||
CHECK_UARCH(arch, 0, 6, 11, 15, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i5-13500)
|
CHECK_UARCH(arch, 0, 6, 11, 15, NA, "Raptor Lake", UARCH_RAPTOR_LAKE, 10) // instlatx64.atw.hu (i5-13500)
|
||||||
CHECK_UARCH(arch, 0, 11, 0, 0, NA, "Knights Ferry", UARCH_KNIGHTS_FERRY, 45) // found only on en.wikichip.org
|
CHECK_UARCH(arch, 0, 11, 0, 0, NA, "Knights Ferry", UARCH_KNIGHTS_FERRY, 45) // found only on en.wikichip.org
|
||||||
CHECK_UARCH(arch, 0, 11, 0, 1, NA, "Knights Corner", UARCH_KNIGHTS_CORNER, 22)
|
CHECK_UARCH(arch, 0, 11, 0, 1, NA, "Knights Corner", UARCH_KNIGHTS_CORNER, 22)
|
||||||
CHECK_UARCH(arch, 0, 15, 0, 0, NA, "Willamette", UARCH_WILLAMETTE, 180)
|
CHECK_UARCH(arch, 0, 15, 0, 0, NA, "Willamette", UARCH_WILLAMETTE, 180)
|
||||||
CHECK_UARCH(arch, 0, 15, 0, 1, NA, "Willamette", UARCH_WILLAMETTE, 180)
|
CHECK_UARCH(arch, 0, 15, 0, 1, NA, "Willamette", UARCH_WILLAMETTE, 180)
|
||||||
CHECK_UARCH(arch, 0, 15, 0, 2, NA, "Northwood", UARCH_NORTHWOOD, 130)
|
CHECK_UARCH(arch, 0, 15, 0, 2, NA, "Northwood", UARCH_NORTHWOOD, 130)
|
||||||
CHECK_UARCH(arch, 0, 15, 0, 3, NA, "Prescott", UARCH_PRESCOTT, 90)
|
CHECK_UARCH(arch, 0, 15, 0, 3, NA, "Prescott", UARCH_PRESCOTT, 90)
|
||||||
CHECK_UARCH(arch, 0, 15, 0, 4, NA, "Prescott", UARCH_PRESCOTT, 90)
|
CHECK_UARCH(arch, 0, 15, 0, 4, NA, "Prescott", UARCH_PRESCOTT, 90)
|
||||||
CHECK_UARCH(arch, 0, 15, 0, 6, NA, "Cedar Mill", UARCH_CEDAR_MILL, 65)
|
CHECK_UARCH(arch, 0, 15, 0, 6, NA, "Cedar Mill", UARCH_CEDAR_MILL, 65)
|
||||||
CHECK_UARCH(arch, 1, 15, 0, 0, NA, "Itanium2", UARCH_ITANIUM2, 180)
|
CHECK_UARCH(arch, 1, 15, 0, 0, NA, "Itanium2", UARCH_ITANIUM2, 180)
|
||||||
CHECK_UARCH(arch, 1, 15, 0, 1, NA, "Itanium2", UARCH_ITANIUM2, 130)
|
CHECK_UARCH(arch, 1, 15, 0, 1, NA, "Itanium2", UARCH_ITANIUM2, 130)
|
||||||
CHECK_UARCH(arch, 1, 15, 0, 2, NA, "Itanium2", UARCH_ITANIUM2, 130)
|
CHECK_UARCH(arch, 1, 15, 0, 2, NA, "Itanium2", UARCH_ITANIUM2, 130)
|
||||||
UARCH_END
|
UARCH_END
|
||||||
return arch;
|
return arch;
|
||||||
}
|
}
|
||||||
@@ -380,6 +382,7 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
|
|||||||
CHECK_UARCH(arch, 10, 15, 5, 0, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
|
CHECK_UARCH(arch, 10, 15, 5, 0, NA, "Zen 3", UARCH_ZEN3, 7) // instlatx64
|
||||||
CHECK_UARCH(arch, 10, 15, 6, 1, 2, "Zen 4", UARCH_ZEN4, 5) // instlatx64
|
CHECK_UARCH(arch, 10, 15, 6, 1, 2, "Zen 4", UARCH_ZEN4, 5) // instlatx64
|
||||||
CHECK_UARCH(arch, 10, 15, 7, 4, 1, "Zen 4", UARCH_ZEN4, 4) // instlatx64
|
CHECK_UARCH(arch, 10, 15, 7, 4, 1, "Zen 4", UARCH_ZEN4, 4) // instlatx64
|
||||||
|
CHECK_UARCH(arch, 10, 15, 7, 5, 2, "Zen 4", UARCH_ZEN4, 4) // instlatx64
|
||||||
CHECK_UARCH(arch, 10, 15, 7, 8, 0, "Zen 4", UARCH_ZEN4, 4) // instlatx64
|
CHECK_UARCH(arch, 10, 15, 7, 8, 0, "Zen 4", UARCH_ZEN4, 4) // instlatx64
|
||||||
CHECK_UARCH(arch, 10, 15, 8, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300C)
|
CHECK_UARCH(arch, 10, 15, 8, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300C)
|
||||||
CHECK_UARCH(arch, 10, 15, 9, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300A)
|
CHECK_UARCH(arch, 10, 15, 9, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300A)
|
||||||
@@ -391,11 +394,16 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
|
|||||||
|
|
||||||
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
|
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
|
||||||
if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
|
if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
|
||||||
|
struct uarch* arch = emalloc(sizeof(struct uarch));
|
||||||
if(dump == 0x000806E9) {
|
if(dump == 0x000806E9) {
|
||||||
|
if (cpu->cpu_name == NULL) {
|
||||||
|
printErr("Unable to find uarch without CPU name");
|
||||||
|
fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK);
|
||||||
|
return arch;
|
||||||
|
}
|
||||||
|
|
||||||
// It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
|
// It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
|
||||||
// See issue https://github.com/Dr-Noob/cpufetch/issues/122
|
// See issue https://github.com/Dr-Noob/cpufetch/issues/122
|
||||||
struct uarch* arch = emalloc(sizeof(struct uarch));
|
|
||||||
|
|
||||||
if(strstr(cpu->cpu_name, "Y") != NULL) {
|
if(strstr(cpu->cpu_name, "Y") != NULL) {
|
||||||
fill_uarch(arch, "Amber Lake", UARCH_AMBER_LAKE, 14);
|
fill_uarch(arch, "Amber Lake", UARCH_AMBER_LAKE, 14);
|
||||||
}
|
}
|
||||||
@@ -406,10 +414,14 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
|
|||||||
return arch;
|
return arch;
|
||||||
}
|
}
|
||||||
else if (dump == 0x000806EA) {
|
else if (dump == 0x000806EA) {
|
||||||
|
if (cpu->cpu_name == NULL) {
|
||||||
|
printErr("Unable to find uarch without CPU name");
|
||||||
|
fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, UNK);
|
||||||
|
return arch;
|
||||||
|
}
|
||||||
|
|
||||||
// It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
|
// It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
|
||||||
// See issue https://github.com/Dr-Noob/cpufetch/issues/149
|
// See issue https://github.com/Dr-Noob/cpufetch/issues/149
|
||||||
struct uarch* arch = emalloc(sizeof(struct uarch));
|
|
||||||
|
|
||||||
if(strstr(cpu->cpu_name, "i5-8250U") != NULL ||
|
if(strstr(cpu->cpu_name, "i5-8250U") != NULL ||
|
||||||
strstr(cpu->cpu_name, "i5-8350U") != NULL ||
|
strstr(cpu->cpu_name, "i5-8350U") != NULL ||
|
||||||
strstr(cpu->cpu_name, "i7-8550U") != NULL ||
|
strstr(cpu->cpu_name, "i7-8550U") != NULL ||
|
||||||
@@ -428,6 +440,41 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
|
|||||||
return get_uarch_from_cpuid_amd(ef, f, em, m, s);
|
return get_uarch_from_cpuid_amd(ef, f, em, m, s);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// If we cannot get the CPU name from CPUID, try to infer it from uarch
|
||||||
|
char* infer_cpu_name_from_uarch(struct uarch* arch) {
|
||||||
|
char* cpu_name = NULL;
|
||||||
|
if (arch == NULL) {
|
||||||
|
printErr("infer_cpu_name_from_uarch: Unable to find CPU name");
|
||||||
|
cpu_name = ecalloc(strlen(STRING_UNKNOWN) + 1, sizeof(char));
|
||||||
|
strcpy(cpu_name, STRING_UNKNOWN);
|
||||||
|
return cpu_name;
|
||||||
|
}
|
||||||
|
|
||||||
|
char *str = NULL;
|
||||||
|
|
||||||
|
if (arch->uarch == UARCH_P5)
|
||||||
|
str = "Intel Pentium";
|
||||||
|
else if (arch->uarch == UARCH_P5_MMX)
|
||||||
|
str = "Intel Pentium MMX";
|
||||||
|
else if (arch->uarch == UARCH_P6_PENTIUM_II)
|
||||||
|
str = "Intel Pentium II";
|
||||||
|
else if (arch->uarch == UARCH_P6_PENTIUM_III)
|
||||||
|
str = "Intel Pentium III";
|
||||||
|
else
|
||||||
|
printErr("Unable to find name from uarch: %d", arch->uarch);
|
||||||
|
|
||||||
|
if (str == NULL) {
|
||||||
|
cpu_name = ecalloc(strlen(STRING_UNKNOWN) + 1, sizeof(char));
|
||||||
|
strcpy(cpu_name, STRING_UNKNOWN);
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
cpu_name = ecalloc(strlen(str) + 1, sizeof(char));
|
||||||
|
strcpy(cpu_name, str);
|
||||||
|
}
|
||||||
|
|
||||||
|
return cpu_name;
|
||||||
|
}
|
||||||
|
|
||||||
bool vpus_are_AVX512(struct cpuInfo* cpu) {
|
bool vpus_are_AVX512(struct cpuInfo* cpu) {
|
||||||
return cpu->arch->uarch != UARCH_ICE_LAKE &&
|
return cpu->arch->uarch != UARCH_ICE_LAKE &&
|
||||||
cpu->arch->uarch != UARCH_TIGER_LAKE &&
|
cpu->arch->uarch != UARCH_TIGER_LAKE &&
|
||||||
@@ -498,9 +545,6 @@ char* get_str_process(struct cpuInfo* cpu) {
|
|||||||
if(process == UNK) {
|
if(process == UNK) {
|
||||||
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
|
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
|
||||||
}
|
}
|
||||||
else if(process > 100) {
|
|
||||||
sprintf(str, "%.2fum", (double)process/100);
|
|
||||||
}
|
|
||||||
else if(process > 0){
|
else if(process > 0){
|
||||||
sprintf(str, "%dnm", process);
|
sprintf(str, "%dnm", process);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -8,6 +8,7 @@
|
|||||||
struct uarch;
|
struct uarch;
|
||||||
|
|
||||||
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
|
struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
|
||||||
|
char* infer_cpu_name_from_uarch(struct uarch* arch);
|
||||||
bool vpus_are_AVX512(struct cpuInfo* cpu);
|
bool vpus_are_AVX512(struct cpuInfo* cpu);
|
||||||
bool is_knights_landing(struct cpuInfo* cpu);
|
bool is_knights_landing(struct cpuInfo* cpu);
|
||||||
int get_number_of_vpus(struct cpuInfo* cpu);
|
int get_number_of_vpus(struct cpuInfo* cpu);
|
||||||
|
|||||||
Reference in New Issue
Block a user