[v1.04] Bump version

[v1.03][X86] Fix compilation warning under Windows
[v1.03][X86] Refactor --raw. Add support for printing HV level
2026-03-25 07:50:40 +01:00 · 2023-05-06 11:37:32 +02:00 · 2023-05-06 11:30:14 +02:00 · 2023-05-06 11:14:46 +02:00 · 2023-05-06 11:02:37 +02:00 · 2023-05-06 10:19:39 +02:00
51 changed files with 2282 additions and 623 deletions
--- a/19
+++ b/19
@@ -1,7 +1,7 @@
 CC ?= gcc

 CFLAGS+=-Wall -Wextra -pedantic
-SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith
+SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith -Wstrict-prototypes

 PREFIX ?= /usr

@@ -11,6 +11,7 @@ COMMON_SRC = $(SRC_COMMON)main.c $(SRC_COMMON)cpu.c $(SRC_COMMON)udev.c $(SRC_CO
 COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_COMMON)printer.h $(SRC_COMMON)args.h $(SRC_COMMON)global.h

 ifneq ($(OS),Windows_NT)
+	GIT_VERSION := "$(shell git describe --abbrev=4 --dirty --always --tags)"
 	arch := $(shell uname -m)
 	ifeq ($(arch), $(filter $(arch), x86_64 amd64 i386 i486 i586 i686))
 		SRC_DIR=src/x86/
@@ -28,11 +29,11 @@ ifneq ($(OS),Windows_NT)
 		SRC_DIR=src/ppc/
 		SOURCE += $(COMMON_SRC) $(SRC_DIR)ppc.c $(SRC_DIR)uarch.c $(SRC_DIR)udev.c
 		HEADERS += $(COMMON_HDR) $(SRC_DIR)ppc.h $(SRC_DIR)uarch.h  $(SRC_DIR)udev.c
-		CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all
+		CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all -Wno-language-extension-token
 	else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
 		SRC_DIR=src/arm/
-		SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
-		HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h  $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
+		SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
+		HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h  $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
 		CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99 -fstack-protector-all

 		os := $(shell uname -s)
@@ -40,6 +41,11 @@ ifneq ($(OS),Windows_NT)
 			SOURCE += $(SRC_DIR)sysctl.c
 			HEADERS += $(SRC_DIR)sysctl.h
 		endif
+        else ifeq ($(arch), $(filter $(arch), riscv64 riscv32))
+                SRC_DIR=src/riscv/
+                SOURCE += $(COMMON_SRC) $(SRC_DIR)riscv.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
+                HEADERS += $(COMMON_HDR) $(SRC_DIR)riscv.h $(SRC_DIR)uarch.h $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_DIR)udev.h $(SRC_DIR)socs.h
+                CFLAGS += -DARCH_RISCV -Wno-unused-parameter -std=c99 -fstack-protector-all
 	else
 		# Error lines should not be tabulated because Makefile complains about it
 $(warning Unsupported arch detected: $(arch). See https://github.com/Dr-Noob/cpufetch#1-support)
@@ -50,6 +56,7 @@ $(error Aborting compilation)
 	OUTPUT=cpufetch
 else
 	# Assume x86_64
+	GIT_VERSION := ""
 	SRC_DIR=src/x86/
 	SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
 	HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
@@ -80,7 +87,11 @@ freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.
 	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -pthread $(SRC_DIR)freq/freq_avx512.c -o $@

 $(OUTPUT): Makefile $(SOURCE) $(HEADERS)
+ifeq ($(GIT_VERSION),"")
 	$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
+else
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -DGIT_FULL_VERSION=\"$(GIT_VERSION)\" $(SOURCE) -o $(OUTPUT)
+endif

 run: $(OUTPUT)
 	./$(OUTPUT)
--- a/README.md
+++ b/README.md
@@ -57,17 +57,17 @@ cpufetch is a command-line tool written in C that displays the CPU information i

 ## 1. Support

-| OS          | x86_64 / x86       | ARM                | PowerPC            |
-|:-----------:|:------------------:|:------------------:|:------------------:|
-| GNU / Linux | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
-| Windows     | :heavy_check_mark: | :x:                | :x:                |
-| Android     | :heavy_check_mark: | :heavy_check_mark: | :x:                |
-| macOS       | :heavy_check_mark: | :heavy_check_mark: | :x:                |
-| FreeBSD     | :heavy_check_mark: | :x:                | :x:                |
+| OS          | x86_64 / x86       | ARM                | RISC-V             | PowerPC            |
+|:-----------:|:------------------:|:------------------:|:------------------:|:------------------:|
+| GNU / Linux | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
+| Windows     | :heavy_check_mark: | :x:                | :x:                | :x:                |
+| Android     | :heavy_check_mark: | :heavy_check_mark: | :x:                | :x:                |
+| macOS       | :heavy_check_mark: | :heavy_check_mark: | :x:                | :heavy_check_mark: |
+| FreeBSD     | :heavy_check_mark: | :x:                | :x:                | :x:                |

 **NOTES:**
 - Colors will be used in Windows only if the terminal supports it.
- Support in macOS ARM is limited to Apple M1 only
+- Support in macOS ARM is limited to Apple chips only

 ## 2. Installation
 ### 2.1 Installing from a package
@@ -151,10 +151,12 @@ See [cpufetch contributing guidelines](https://github.com/Dr-Noob/cpufetch/blob/

 ## 7. Acknowledgements
 Thanks to the fellow contributors and interested people in the project. Special thanks to:
- [Gonzalocl](https://github.com/Gonzalocl), [OdnetninI](https://github.com/OdnetninI): Tested cpufetch in the earlier versions of the project in many different CPUs.
+- [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI): Tested cpufetch in the earlier versions of the project in many different CPUs.
 - [Kyngo](https://github.com/Kyngo): Tested cpufetch in the Apple M1 CPU.
- [avollmerhaus](https://github.com/avollmerhaus): Gave me ssh acess to a PowerPC machine, allowing me to develop the PowerPC port.
- [bbonev](https://github.com/bbonev), [stephan-cr](https://github.com/stephan-cr): Reviewed the source code.
+- [avollmerhaus](https://github.com/avollmerhaus): Helped with PowerPC port giving ssh access to a PowerPC machine.
+- [bbonev](https://github.com/bbonev) and [stephan-cr](https://github.com/stephan-cr): Reviewed the source code.
+- [mdoksa76](https://github.com/mdoksa76) and [exkc](https://github.com/exkc): Excellent ideas and feedback for supporting Allwinner SoCs.
+- [Sakura286](https://github.com/Sakura286), [exkc](https://github.com/exkc) and [Patola](https://github.com/Patola): Helped with RISC-V port with ssh access, ideas, testing, etc.

 ## 8. cpufetch for GPUs (gpufetch)
 See [gpufetch](https://github.com/Dr-Noob/gpufetch) project!
--- a/src/arm/midr.c
+++ b/src/arm/midr.c
@@ -13,10 +13,10 @@
 #endif

 #include "../common/global.h"
+#include "../common/soc.h"
 #include "udev.h"
 #include "midr.h"
 #include "uarch.h"
-#include "soc.h"

 bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
  return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
@@ -81,12 +81,23 @@ int64_t get_peak_performance(struct cpuInfo* cpu) {
  }

  int64_t flops = 0;
-
  ptr = cpu;
+
+  if(cpu->soc->soc_vendor == SOC_VENDOR_APPLE) {
+    // Special case for M1/M2
+    // First we find the E cores, then the P
+    // M1 have 2 (E cores) or 4 (P cores) FMA units
+    // Source: https://dougallj.github.io/applecpu/firestorm-simd.html
+    flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000) * 2 * 4 * 2;
+    ptr = ptr->next_cpu;
+    flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000) * 2 * 4 * 4;
+  }
+  else {
    for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
      flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000);
    }
    if(cpu->feat->NEON) flops = flops * 4;
+  }

  return flops;
 }
@@ -130,7 +141,7 @@ void init_cpu_info(struct cpuInfo* cpu) {
 // true...
 // ARM32 https://elixir.bootlin.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h
 // ARM64 https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h
-struct features* get_features_info() {
+struct features* get_features_info(void) {
  struct features* feat = emalloc(sizeof(struct features));
  bool *ptr = &(feat->AES);
  for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
@@ -273,11 +284,46 @@ void fill_cpu_info_firestorm_icestorm(struct cpuInfo* cpu, uint32_t pcores, uint
  fire->next_cpu = NULL;
 }

+void fill_cpu_info_avalanche_blizzard(struct cpuInfo* cpu, uint32_t pcores, uint32_t ecores) {
+  // 1. Fill BLIZZARD
+  struct cpuInfo* bli = cpu;
+
+  bli->midr = MIDR_APPLE_M2_BLIZZARD;
+  bli->arch = get_uarch_from_midr(bli->midr, bli);
+  bli->cach = get_cache_info(bli);
+  bli->feat = get_features_info();
+  bli->topo = malloc(sizeof(struct topology));
+  bli->topo->cach = bli->cach;
+  bli->topo->total_cores = pcores;
+  bli->freq = malloc(sizeof(struct frequency));
+  bli->freq->base = UNKNOWN_DATA;
+  bli->freq->max = 2800;
+  bli->hv = malloc(sizeof(struct hypervisor));
+  bli->hv->present = false;
+  bli->next_cpu = malloc(sizeof(struct cpuInfo));
+
+  // 2. Fill AVALANCHE
+  struct cpuInfo* ava = bli->next_cpu;
+  ava->midr = MIDR_APPLE_M2_AVALANCHE;
+  ava->arch = get_uarch_from_midr(ava->midr, ava);
+  ava->cach = get_cache_info(ava);
+  ava->feat = get_features_info();
+  ava->topo = malloc(sizeof(struct topology));
+  ava->topo->cach = ava->cach;
+  ava->topo->total_cores = ecores;
+  ava->freq = malloc(sizeof(struct frequency));
+  ava->freq->base = UNKNOWN_DATA;
+  ava->freq->max = 3500;
+  ava->hv = malloc(sizeof(struct hypervisor));
+  ava->hv->present = false;
+  ava->next_cpu = NULL;
+}
+
 struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
  uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");

-  // Manually fill the cpuInfo assuming that the CPU
-  // is a ARM_FIRESTORM_ICESTORM (Apple M1)
+  // Manually fill the cpuInfo assuming that
+  // the CPU is an Apple M1/M2
  if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
    cpu->num_cpus = 2;
    // Now detect the M1 version
@@ -287,13 +333,20 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
      fill_cpu_info_firestorm_icestorm(cpu, 4, 4);
    }
    else if(cpu_subfamily == CPUSUBFAMILY_ARM_HS || cpu_subfamily == CPUSUBFAMILY_ARM_HC_HD) {
-      // Apple M1 Pro/Max. Detect number of cores
+      // Apple M1 Pro/Max/Ultra. Detect number of cores
      uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
-      if(physicalcpu < 8 || physicalcpu > 10) {
-        printBug("Found invalid physicalcpu: 0x%.8X", physicalcpu);
+      if(physicalcpu == 20) {
+        // M1 Ultra
+        fill_cpu_info_firestorm_icestorm(cpu, 16, 4);
+      }
+      else if(physicalcpu == 8 || physicalcpu == 10) {
+        // M1 Pro/Max
+        fill_cpu_info_firestorm_icestorm(cpu, physicalcpu-2, 2);
+      }
+      else {
+        printBug("Found invalid physical cpu number: %d", physicalcpu);
        return NULL;
      }
-      fill_cpu_info_firestorm_icestorm(cpu, physicalcpu-2, 2);
    }
    else {
      printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
@@ -302,6 +355,13 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
    cpu->soc = get_soc();
    cpu->peak_performance = get_peak_performance(cpu);
  }
+  else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
+    // Just the "normal" M2 exists for now
+    cpu->num_cpus = 2;
+    fill_cpu_info_avalanche_blizzard(cpu, 4, 4);
+    cpu->soc = get_soc();
+    cpu->peak_performance = get_peak_performance(cpu);
+  }
  else {
    printBug("Found invalid cpu_family: 0x%.8X", cpu_family);
    return NULL;
@@ -311,7 +371,7 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
 }
 #endif

-struct cpuInfo* get_cpu_info() {
+struct cpuInfo* get_cpu_info(void) {
  struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
  init_cpu_info(cpu);

--- a/src/arm/midr.h
+++ b/src/arm/midr.h
@@ -3,7 +3,7 @@

 #include "../common/cpu.h"

-struct cpuInfo* get_cpu_info();
+struct cpuInfo* get_cpu_info(void);

 uint32_t get_nsockets(struct topology* topo);
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket);
--- a/src/arm/soc.c
+++ b/src/arm/soc.c
@@ -15,16 +15,6 @@
 #define min(a,b) (((a)<(b))?(a):(b))
 #define ARRAY_SIZE(arr)     (sizeof(arr) / sizeof((arr)[0]))

-static char* soc_trademark_string[] = {
-  [SOC_VENDOR_SNAPDRAGON] = "Snapdragon ",
-  [SOC_VENDOR_MEDIATEK]   = "MediaTek ",
-  [SOC_VENDOR_EXYNOS]     = "Exynos ",
-  [SOC_VENDOR_KIRIN]      = "Kirin ",
-  [SOC_VENDOR_BROADCOM]   = "Broadcom BCM",
-  [SOC_VENDOR_APPLE]      = "Apple ",
-  [SOC_VENDOR_ALLWINNER]  = "Allwinner "
-};
-
 static char* soc_rpi_string[] = {
  "BCM2835",
  "BCM2836",
@@ -32,30 +22,6 @@ static char* soc_rpi_string[] = {
  "BCM2711"
 };

-void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process) {
-  soc->soc_model = soc_model;
-  soc->soc_vendor = get_soc_vendor_from_soc(soc_model);
-  soc->process = process;
-  int len = strlen(soc_name) + strlen(soc_trademark_string[soc->soc_vendor]) + 1;
-  soc->soc_name = emalloc(sizeof(char) * len);
-  memset(soc->soc_name, 0, sizeof(char) * len);
-  sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);
-}
-
-bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
-  int len1 = strlen(raw_name);
-  int len2 = strlen(expected_name);
-  int len = min(len1, len2);
-
-  if(strncmp(raw_name, expected_name, len) != 0) {
-    return false;
-  }
-  else {
-    fill_soc(soc, soc_name, soc_model, process);
-    return true;
-  }
-}
-
 char* toupperstr(char* str) {
  int len = strlen(str) + 1;
  char* ret = emalloc(sizeof(char) * len);
@@ -68,11 +34,61 @@ char* toupperstr(char* str) {
  return ret;
 }

-#define SOC_START if (false) {}
-#define SOC_EQ(raw_name, expected_name, soc_name, soc_model, soc, process) \
-   else if (match_soc(soc, raw_name, expected_name, soc_name, soc_model, process)) return true;
-#define SOC_END else { return false; }
-// Exynos special define
+uint32_t get_sid_from_nvmem(char* buf) {
+  uint32_t sid = 0;
+  sid += (unsigned char) buf[0] * 1<<0;
+  sid += (unsigned char) buf[1] * 1<<8;
+  sid += (unsigned char) buf[2] * 1<<16;
+  sid += (unsigned char) buf[3] * 1<<24;
+  return sid;
+}
+
+// Security ID (SID) is an identifier that can help with SoC detection
+// in Allwinner SoCs (https://linux-sunxi.org/SID_Register_Guide#Security_ID)
+// SIDs list:
+// - https://linux-sunxi.org/SID_Register_Guide#Currently_known_SID.27s
+// - https://github.com/Dr-Noob/cpufetch/issues/173
+bool get_sunxisoc_from_sid(struct system_on_chip* soc, char* raw_name, uint32_t sid) {
+  typedef struct {
+    uint32_t sid;
+    struct system_on_chip soc;
+  } sidToSoC;
+
+  sidToSoC socFromSid[] = {
+    // --- sun8i Family ---
+    // H2+
+    {0x02c00042, {SOC_ALLWINNER_H2PLUS, SOC_VENDOR_ALLWINNER, 40, "H2+",  raw_name} },
+    {0x02c00142, {SOC_ALLWINNER_H2PLUS, SOC_VENDOR_ALLWINNER, 40, "H2+",  raw_name} },
+    // H3
+    {0x02c00181, {SOC_ALLWINNER_H3,     SOC_VENDOR_ALLWINNER, 40, "H3",   raw_name} },
+    {0x02c00081, {SOC_ALLWINNER_H3,     SOC_VENDOR_ALLWINNER, 40, "H3",   raw_name} },
+    // Others
+    {0x12c00017, {SOC_ALLWINNER_R40,    SOC_VENDOR_ALLWINNER, 40, "R40",  raw_name} },
+    {0x12c00000, {SOC_ALLWINNER_V3S,    SOC_VENDOR_ALLWINNER, 40, "V3s",  raw_name} }, // 40nm is only my guess, no source
+    // --- sun50i Family ---
+    {0x82800001, {SOC_ALLWINNER_H5,     SOC_VENDOR_ALLWINNER, 40, "H5",   raw_name} },
+    {0x82c00007, {SOC_ALLWINNER_H6,     SOC_VENDOR_ALLWINNER, 28, "H6",   raw_name} },
+    {0x92c000bb, {SOC_ALLWINNER_H64,    SOC_VENDOR_ALLWINNER, 40, "H64",  raw_name} }, // Same as A64
+    {0x32c05000, {SOC_ALLWINNER_H616,   SOC_VENDOR_ALLWINNER, 28, "H616", raw_name} },
+    {0x92c000ba, {SOC_ALLWINNER_A64,    SOC_VENDOR_ALLWINNER, 40, "A64",  raw_name} },
+    // Unknown
+    {0x00000000, {UNKNOWN,              SOC_VENDOR_UNKNOWN,   -1, "",    raw_name} }
+  };
+
+  int index = 0;
+  while(socFromSid[index].sid != 0x0) {
+    if(socFromSid[index].sid == sid) {
+      fill_soc(soc, socFromSid[index].soc.soc_name, socFromSid[index].soc.soc_model, socFromSid[index].soc.process);
+      return true;
+    }
+    index++;
+  }
+
+  printErr("SID was found but it does not match any known SIDs: %08x", sid);
+  return false;
+}
+
+// Exynos special define (not included in src/common/soc.h)
 #define SOC_EXY_EQ(raw_name, tmpsoc, soc_name, soc_model, soc, process)             \
   sprintf(tmpsoc, "exynos%s", soc_name);                                           \
   if (match_soc(soc, raw_name, tmpsoc, soc_name, soc_model, process)) return true; \
@@ -88,6 +104,8 @@ bool match_broadcom(char* soc_name, struct system_on_chip* soc) {
  if((tmp = strstr(soc_name, "BCM")) == NULL)
    return false;

+  soc->soc_vendor = SOC_VENDOR_BROADCOM;
+
  SOC_START
  SOC_EQ(tmp, "BCM2835",              "2835",              SOC_BCM_2835,   soc, 65)
  SOC_EQ(tmp, "BCM2836",              "2836",              SOC_BCM_2836,   soc, 40)
@@ -111,11 +129,13 @@ bool match_broadcom(char* soc_name, struct system_on_chip* soc) {
 bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
  char* tmp;

-  if((tmp = strstr(soc_name, "Hi")) == NULL)
+  if((tmp = strstr(soc_name, "hi")) == NULL)
    return false;

+  soc->soc_vendor = SOC_VENDOR_KIRIN;
+
  SOC_START
-  SOC_EQ(tmp, "Hi3620GFC",  "K3V2",  SOC_HISILICON_3620, soc, 40)
+  SOC_EQ(tmp, "hi3620GFC",  "K3V2",  SOC_HISILICON_3620, soc, 40)
  //SOC_EQ(tmp, "?",        "K3V2E", SOC_KIRIN, soc,  ?)
  //SOC_EQ(tmp, "?",        "620",   SOC_KIRIN, soc, 28)
  //SOC_EQ(tmp, "?",        "650",   SOC_KIRIN, soc, 16)
@@ -131,18 +151,18 @@ bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
  //SOC_EQ(tmp, "?",        "9000E", SOC_KIRIN, soc,  5)
  //SOC_EQ(tmp, "?",        "910",   SOC_KIRIN, soc, 28)
  //SOC_EQ(tmp, "?",        "910T",  SOC_KIRIN, soc, 28)
-  SOC_EQ(tmp, "Hi3630",     "920",   SOC_HISILICON_3630, soc, 28)
+  SOC_EQ(tmp, "hi3630",     "920",   SOC_HISILICON_3630, soc, 28)
  //SOC_EQ(tmp, "?",        "925",   SOC_KIRIN, soc, 28)
  //SOC_EQ(tmp, "?",        "930",   SOC_KIRIN, soc, ?)
  //SOC_EQ(tmp, "?",        "935",   SOC_KIRIN, soc, ?)
-  SOC_EQ(tmp, "Hi3650",     "950",   SOC_HISILICON_3650, soc, 16)
+  SOC_EQ(tmp, "hi3650",     "950",   SOC_HISILICON_3650, soc, 16)
  //SOC_EQ(tmp, "?",        "955",   SOC_KIRIN, soc, ?)
-  SOC_EQ(tmp, "Hi3660",     "960",   SOC_HISILICON_3660, soc, 16)
+  SOC_EQ(tmp, "hi3660",     "960",   SOC_HISILICON_3660, soc, 16)
  //SOC_EQ(tmp, "?",        "960S",  SOC_KIRIN, soc, 16)
-  SOC_EQ(tmp, "Hi3670",     "970",   SOC_HISILICON_3670, soc, 10)
-  SOC_EQ(tmp, "Hi3680",     "980",   SOC_HISILICON_3680, soc,  7)
+  SOC_EQ(tmp, "hi3670",     "970",   SOC_HISILICON_3670, soc, 10)
+  SOC_EQ(tmp, "hi3680",     "980",   SOC_HISILICON_3680, soc,  7)
  //SOC_EQ(tmp, "?",        "985",   SOC_KIRIN, soc,  7)
-  SOC_EQ(tmp, "Hi3690",     "990",   SOC_HISILICON_3690, soc,  7)
+  SOC_EQ(tmp, "hi3690",     "990",   SOC_HISILICON_3690, soc,  7)
  SOC_END
 }

@@ -153,6 +173,8 @@ bool match_exynos(char* soc_name, struct system_on_chip* soc) {
  else if((tmp = strstr(soc_name, "exynos")) != NULL);
  else return false;

+  soc->soc_vendor = SOC_VENDOR_EXYNOS;
+
  // Because exynos are recently using "exynosXXXX" instead
  // of "universalXXXX" as codenames, SOC_EXY_EQ will check for
  // both cases, since it seems that there are some SoCs that
@@ -207,6 +229,8 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
  if((tmp = strstr(soc_name_upper, "MT")) == NULL)
    return false;

+  soc->soc_vendor = SOC_VENDOR_MEDIATEK;
+
  SOC_START
  // Dimensity //
  SOC_EQ(tmp, "MT6893",   "Dimensity 1200",  SOC_MTK_MT6893,   soc, 6)
@@ -335,6 +359,8 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
  else if((tmp = strstr(soc_name_upper, "QSD")) != NULL);
  else return false;

+  soc->soc_vendor = SOC_VENDOR_SNAPDRAGON;
+
  SOC_START
  // Snapdragon S1 //
  SOC_EQ(tmp, "QSD8650",        "S1",        SOC_SNAPD_QSD8650,        soc, 65)
@@ -430,6 +456,7 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
  SOC_EQ(tmp, "SM7125",         "720G",      SOC_SNAPD_SM7125,         soc,  8)
  SOC_EQ(tmp, "SM7150-AA",      "730",       SOC_SNAPD_SM7150_AA,      soc,  8)
  SOC_EQ(tmp, "SM7150-AB",      "730G",      SOC_SNAPD_SM7150_AB,      soc,  8)
+  SOC_EQ(tmp, "SDM730G",        "730G",      SOC_SNAPD_SM7150_AB,      soc,  8) // Issue #174
  SOC_EQ(tmp, "SM7150-AC",      "732G",      SOC_SNAPD_SM7150_AC,      soc,  8)
  SOC_EQ(tmp, "SM7225",         "750G",      SOC_SNAPD_SM7225,         soc,  8)
  SOC_EQ(tmp, "SM7250-AA",      "765",       SOC_SNAPD_SM7250_AA,      soc,  7)
@@ -466,40 +493,25 @@ bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
  if((tmp = strstr(soc_name, "sun")) == NULL)
    return false;

+  soc->soc_vendor = SOC_VENDOR_ALLWINNER;
+
  SOC_START
-  // A series 32 bits
+  // SoCs we can detect just with with the name
  SOC_EQ(tmp, "sun4i", "A10",   SOC_ALLWINNER_A10,  soc, 55)
-  SOC_EQ(tmp, "sun5i", "A13",   SOC_ALLWINNER_A13,  soc, 55)
-  SOC_EQ(tmp, "sun5i", "A10s",  SOC_ALLWINNER_A10S, soc, 55)
-  SOC_EQ(tmp, "sun7i", "A20",   SOC_ALLWINNER_A20,  soc, 40)
-  SOC_EQ(tmp, "sun8i", "A23",   SOC_ALLWINNER_A23,  soc, 40)
  SOC_EQ(tmp, "sun6i", "A31",   SOC_ALLWINNER_A31,  soc, 40)
-  SOC_EQ(tmp, "sun6i", "A31s",  SOC_ALLWINNER_A31S, soc, 40)
-  SOC_EQ(tmp, "sun8i", "A33",   SOC_ALLWINNER_A33,  soc, 40)
-  SOC_EQ(tmp, "sun8i", "A40",   SOC_ALLWINNER_A40,  soc, 40)
-  SOC_EQ(tmp, "sun8i", "A50",   SOC_ALLWINNER_A50,  soc, 28)
-  SOC_EQ(tmp, "sun9i", "A80",   SOC_ALLWINNER_A80,  soc, 28)
-  SOC_EQ(tmp, "sun8i", "A83T",  SOC_ALLWINNER_A83T, soc, 28)
-
-  // H series 32 bits
-  SOC_EQ(tmp, "sun8i", "H2+",   SOC_ALLWINNER_HZP,  soc, 40)
-  SOC_EQ(tmp, "sun8i", "H3",    SOC_ALLWINNER_H3,   soc, 40)
-  SOC_EQ(tmp, "sun8i", "H8",    SOC_ALLWINNER_H8,   soc, 28)
-
-  // H series 64 bits
-  SOC_EQ(tmp, "sun50i", "H5",   SOC_ALLWINNER_H5,   soc, 40)
-  SOC_EQ(tmp, "sun50i", "H6",   SOC_ALLWINNER_H6,   soc, 28)
-  SOC_EQ(tmp, "sun50i", "H616", SOC_ALLWINNER_H616, soc, 28)
-
-  // R series 32 bits
-  SOC_EQ(tmp, "sun5i", "R8",    SOC_ALLWINNER_R8,   soc, 55)
-  SOC_EQ(tmp, "sun8i", "R16",   SOC_ALLWINNER_R16,  soc, 40)
-  SOC_EQ(tmp, "sun8i", "R40",   SOC_ALLWINNER_R40,  soc, 40)
-  SOC_EQ(tmp, "sun8i", "R58",   SOC_ALLWINNER_R58,  soc, 28)
-
-  // R series  64 bits
-  SOC_EQ(tmp, "sun50i", "R329", SOC_ALLWINNER_R328, soc, 28)
-  SOC_END
+  SOC_EQ(tmp, "sun7i", "A20",   SOC_ALLWINNER_A20,  soc, 40)
+  else {
+    // sun5i/sun8i/sun9i/sun50i will fall here
+    // We need SID to actually distingish between the exact model
+    int filelen;
+    char* sid_nvmem = read_file(_PATH_SUNXI_NVMEM, &filelen);
+    if(sid_nvmem == NULL) {
+      printWarn("read_file: %s: %s", _PATH_SUNXI_NVMEM, strerror(errno));
+      return false;
+    }
+    uint32_t sid = get_sid_from_nvmem(sid_nvmem);
+    return get_sunxisoc_from_sid(soc, soc_name, sid);
+  }
 }

 bool match_special(char* soc_name, struct system_on_chip* soc) {
@@ -517,6 +529,12 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
    return true;
  }

+  // Snapdragon 8 Gen 1 reported as "taro"
+  if(strcmp(soc_name, "taro") == 0) {
+    fill_soc(soc, "8 Gen 1", SOC_SNAPD_SM8450, 4);
+    return true;
+  }
+
  return false;
 }

@@ -600,6 +618,70 @@ struct system_on_chip* guess_soc_from_cpuinfo(struct system_on_chip* soc) {
  return soc;
 }

+char* get_rk_efuse(void) {
+  int filelen;
+  char* rk_soc = read_file(_PATH_RK_EFUSE0, &filelen);
+  if(rk_soc == NULL) {
+    printWarn("read_file: %s: %s", _PATH_RK_EFUSE0, strerror(errno));
+  }
+  return rk_soc;
+}
+
+bool get_rk_soc_from_efuse(struct system_on_chip* soc, char* efuse) {
+  typedef struct {
+    uint16_t rk_soc;
+    struct system_on_chip soc;
+  } rkToSoC;
+
+  uint16_t rk_soc = efuse[2]*256 + efuse[3];
+
+  // https://wikimovel.com/index.php/Rockchip
+  rkToSoC socFromRK[] = {
+    // TODO: Add RK2XXX
+    // RK3XXX
+    {0x2388, {SOC_ROCKCHIP_3288, SOC_VENDOR_ROCKCHIP, 28, "RK3288",  NULL} },
+    {0x2392, {SOC_ROCKCHIP_3229, SOC_VENDOR_ROCKCHIP, 28, "RK3229",  NULL} }, // https://gadgetversus.com/processor/rockchip-rk3229-vs-rockchip-rk3128/
+    {0x3380, {SOC_ROCKCHIP_3308, SOC_VENDOR_ROCKCHIP, 28, "RK3308",  NULL} }, // https://en.t-firefly.com/product/rocrk3308cc?theme=pc
+    {0x3381, {SOC_ROCKCHIP_3318, SOC_VENDOR_ROCKCHIP, 28, "RK3318",  NULL} },
+    {0x3362, {SOC_ROCKCHIP_3326, SOC_VENDOR_ROCKCHIP, 28, "RK3326",  NULL} },
+    {0x3382, {SOC_ROCKCHIP_3328, SOC_VENDOR_ROCKCHIP, 28, "RK3328",  NULL} },
+    {0x3386, {SOC_ROCKCHIP_3368, SOC_VENDOR_ROCKCHIP, 28, "RK3368",  NULL} },
+    {0x3399, {SOC_ROCKCHIP_3399, SOC_VENDOR_ROCKCHIP, 28, "RK3399",  NULL} },
+    {0x5366, {SOC_ROCKCHIP_3566, SOC_VENDOR_ROCKCHIP, 22, "RK3566",  NULL} },
+    {0x5386, {SOC_ROCKCHIP_3568, SOC_VENDOR_ROCKCHIP, 22, "RK3568",  NULL} },
+    {0x5388, {SOC_ROCKCHIP_3588, SOC_VENDOR_ROCKCHIP,  8, "RK3588",  NULL} },
+    // Unknown
+    {0x0000, {UNKNOWN,           SOC_VENDOR_UNKNOWN,   -1,       "", NULL} }
+  };
+
+  int index = 0;
+  while(socFromRK[index].rk_soc != 0x0) {
+    if(socFromRK[index].rk_soc == rk_soc) {
+      fill_soc(soc, socFromRK[index].soc.soc_name, socFromRK[index].soc.soc_model, socFromRK[index].soc.process);
+      return true;
+    }
+    index++;
+  }
+
+  printErr("RK SoC was found but it does not match any known SoCs: 0x%04x", rk_soc);
+  return false;
+}
+
+struct system_on_chip* guess_soc_from_nvmem(struct system_on_chip* soc) {
+  // This method is only valid for Rockchip SoCs
+  char* rk_soc = get_rk_efuse();
+  if(rk_soc != NULL) {
+    if(rk_soc[0] == 0x52 && rk_soc[1] == 0x4b) {
+      get_rk_soc_from_efuse(soc, rk_soc);
+      return soc;
+    }
+    else {
+      printWarn("guess_soc_from_nvmem: efuse found, but contains unexpected header: 0x%x 0x%x", rk_soc[0], rk_soc[1]);
+    }
+  }
+  return soc;
+}
+
 int hex2int(char c) {
  if (c >= '0' && c <= '9')
    return c - '0';
@@ -648,7 +730,11 @@ struct system_on_chip* guess_soc_raspbery_pi(struct system_on_chip* soc) {

 #if defined(__APPLE__) || defined(__MACH__)
 struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
+  uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");
  uint32_t cpu_subfamily = get_sys_info_by_name("hw.cpusubfamily");
+
+  if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
+    // Check M1 version
    if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
      fill_soc(soc, "M1", SOC_APPLE_M1, 5);
    }
@@ -656,16 +742,47 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
      fill_soc(soc, "M1 Pro", SOC_APPLE_M1_PRO, 5);
    }
    else if(cpu_subfamily == CPUSUBFAMILY_ARM_HC_HD) {
+      // Could be M1 Max or M1 Ultra (2x M1 Max)
+      uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
+      if(physicalcpu == 20) {
+        fill_soc(soc, "M1 Ultra", SOC_APPLE_M1_ULTRA, 5);
+      }
+      else if(physicalcpu == 10) {
        fill_soc(soc, "M1 Max", SOC_APPLE_M1_MAX, 5);
      }
+      else {
+        printBug("Found invalid physical cpu number: %d", physicalcpu);
+        soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+      }
+    }
+    else {
+      printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+    }
+  }
+  else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
+    // Check M2 version
+    if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
+      fill_soc(soc, "M2", SOC_APPLE_M2, 5);
+    }
+    else {
+      printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+    }
+  }
+  else {
+    printBug("Found invalid cpu_family: 0x%.8X", cpu_family);
+    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+  }
  return soc;
 }
 #endif

-struct system_on_chip* get_soc() {
+struct system_on_chip* get_soc(void) {
  struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
  soc->raw_name = NULL;
  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+  soc->soc_model = SOC_MODEL_UNKNOWN;
  soc->process = UNKNOWN;

 #ifdef __linux__
@@ -682,17 +799,25 @@ struct system_on_chip* get_soc() {

  soc = guess_soc_from_cpuinfo(soc);
  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
-    if(soc->raw_name != NULL)
+    if(soc->raw_name != NULL) {
      printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);
-    else
+    }
+    else {
      printWarn("SoC detection failed using /proc/cpuinfo: No string found");
+    }
 #ifdef __ANDROID__
    soc = guess_soc_from_android(soc);
-    if(soc->raw_name == NULL)
+    if(soc->raw_name == NULL) {
      printWarn("SoC detection failed using Android: No string found");
-    else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN)
+    }
+    else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
      printWarn("SoC detection failed using Android: Found '%s' string", soc->raw_name);
+    }
 #endif // ifdef __ANDROID__
+    // If cpufinfo/Android (if available) detection fails, try with nvmem
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
+      soc = guess_soc_from_nvmem(soc);
+    }
  }
 #elif defined __APPLE__ || __MACH__
  soc = guess_soc_apple(soc);
@@ -704,35 +829,12 @@ struct system_on_chip* get_soc() {
  }
 #endif // ifdef __linux__

-  if(soc->raw_name == NULL) {
+  if(soc->soc_model == SOC_MODEL_UNKNOWN) {
+    // raw_name might not be NULL, but if we were unable to find
+    // the exact SoC, just print "Unkwnown"
    soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
    snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
  }

  return soc;
 }
-
-char* get_soc_name(struct system_on_chip* soc) {
-  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN)
-    return soc->raw_name;
-  return soc->soc_name;
-}
-
-VENDOR get_soc_vendor(struct system_on_chip* soc) {
-  return soc->soc_vendor;
-}
-
-char* get_str_process(struct system_on_chip* soc) {
-  char* str;
-
-  if(soc->process == UNKNOWN) {
-    str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
-    snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
-  }
-  else {
-    str = emalloc(sizeof(char) * 5);
-    memset(str, 0, sizeof(char) * 5);
-    snprintf(str, 5, "%dnm", soc->process);
-  }
-  return str;
-}
--- a/src/arm/soc.h
+++ b/src/arm/soc.h
@@ -1,33 +1,10 @@
-#ifndef __SOC__
-#define __SOC__
+#ifndef __SOC_ARM__
+#define __SOC_ARM__

 #include "../common/cpu.h"
+#include "../common/soc.h"
 #include <stdint.h>

-typedef int32_t SOC;
-
-enum {
-  SOC_VENDOR_UNKNOWN,
-  SOC_VENDOR_SNAPDRAGON,
-  SOC_VENDOR_MEDIATEK,
-  SOC_VENDOR_EXYNOS,
-  SOC_VENDOR_KIRIN,
-  SOC_VENDOR_BROADCOM,
-  SOC_VENDOR_APPLE,
-  SOC_VENDOR_ALLWINNER
-};
-
-struct system_on_chip {
-  SOC soc_model;
-  VENDOR soc_vendor;
-  int32_t process;
-  char* soc_name;
-  char* raw_name;    
-};
-
-struct system_on_chip* get_soc();
-char* get_soc_name(struct system_on_chip* soc);
-VENDOR get_soc_vendor(struct system_on_chip* soc);
-char* get_str_process(struct system_on_chip* soc);
+struct system_on_chip* get_soc(void);

 #endif
--- a/src/arm/socs.h
+++ b/src/arm/socs.h
@@ -252,10 +252,13 @@ enum {
  SOC_SNAPD_SM8250,
  SOC_SNAPD_SM8250_AB,
  SOC_SNAPD_SM8350,
+  SOC_SNAPD_SM8450,
  // APPLE
  SOC_APPLE_M1,
  SOC_APPLE_M1_PRO,
  SOC_APPLE_M1_MAX,
+  SOC_APPLE_M1_ULTRA,
+  SOC_APPLE_M2,
  // ALLWINNER
  SOC_ALLWINNER_A10,
  SOC_ALLWINNER_A13,
@@ -267,19 +270,37 @@ enum {
  SOC_ALLWINNER_A33,
  SOC_ALLWINNER_A40,
  SOC_ALLWINNER_A50,
+  SOC_ALLWINNER_A64,
  SOC_ALLWINNER_A80,
  SOC_ALLWINNER_A83T,
+  SOC_ALLWINNER_V3S,
  SOC_ALLWINNER_HZP,
+  SOC_ALLWINNER_H2PLUS,
  SOC_ALLWINNER_H3,
  SOC_ALLWINNER_H8,
  SOC_ALLWINNER_H5,
  SOC_ALLWINNER_H6,
+  SOC_ALLWINNER_H64,
  SOC_ALLWINNER_H616,
  SOC_ALLWINNER_R8,
  SOC_ALLWINNER_R16,
  SOC_ALLWINNER_R40,
  SOC_ALLWINNER_R58,
-  SOC_ALLWINNER_R328
+  SOC_ALLWINNER_R328,
+  // ROCKCHIP
+  SOC_ROCKCHIP_3288,
+  SOC_ROCKCHIP_3229,
+  SOC_ROCKCHIP_3308,
+  SOC_ROCKCHIP_3318,
+  SOC_ROCKCHIP_3326,
+  SOC_ROCKCHIP_3328,
+  SOC_ROCKCHIP_3368,
+  SOC_ROCKCHIP_3399,
+  SOC_ROCKCHIP_3566,
+  SOC_ROCKCHIP_3568,
+  SOC_ROCKCHIP_3588,
+  // UNKNOWN
+  SOC_MODEL_UNKNOWN
 };

 inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
@@ -287,9 +308,10 @@ inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
  else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
  else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
  else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
-  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8350) return SOC_VENDOR_SNAPDRAGON;
-  else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M1_MAX) return SOC_VENDOR_APPLE;
+  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8450) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M2) return SOC_VENDOR_APPLE;
  else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
+  else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588) return SOC_VENDOR_ROCKCHIP;
  return SOC_VENDOR_UNKNOWN;
 }

--- a/src/arm/sysctl.h
+++ b/src/arm/sysctl.h
@@ -4,9 +4,23 @@
 // From Linux kernel: arch/arm64/include/asm/cputype.h
 #define MIDR_APPLE_M1_ICESTORM  0x610F0220
 #define MIDR_APPLE_M1_FIRESTORM 0x610F0230
+// Kernel does not include those, so I just assume that
+// APPLE_CPU_PART_M2_BLIZZARD=0x30,M2_AVALANCHE=0x31
+#define MIDR_APPLE_M2_BLIZZARD  0x610F0300
+#define MIDR_APPLE_M2_AVALANCHE 0x610F0310
+
+// M1 / A14
 #ifndef CPUFAMILY_ARM_FIRESTORM_ICESTORM
  #define CPUFAMILY_ARM_FIRESTORM_ICESTORM 0x1B588BB3
 #endif
+// M2 / A15
+#ifndef CPUFAMILY_ARM_AVALANCHE_BLIZZARD
+  #define CPUFAMILY_ARM_AVALANCHE_BLIZZARD 0xDA33D83D
+#endif
+
+// For detecting different M1 types
+// NOTE: Could also be achieved detecting different
+// MIDR values (e.g., APPLE_CPU_PART_M1_ICESTORM_PRO)
 #ifndef CPUSUBFAMILY_ARM_HG
  #define CPUSUBFAMILY_ARM_HG 2
 #endif
--- a/src/arm/uarch.c
+++ b/src/arm/uarch.c
@@ -33,6 +33,8 @@ enum {
  ISA_ARMv8_2_A,
  ISA_ARMv8_3_A,
  ISA_ARMv8_4_A,
+  ISA_ARMv8_5_A,
+  ISA_ARMv9_A
 };

 enum {
@@ -64,7 +66,10 @@ enum {
  UARCH_CORTEX_A76,
  UARCH_CORTEX_A77,
  UARCH_CORTEX_A78,
+  UARCH_CORTEX_A510,
+  UARCH_CORTEX_A710,
  UARCH_CORTEX_X1,
+  UARCH_CORTEX_X2,
  UARCH_NEOVERSE_N1,
  UARCH_NEOVERSE_E1,
  UARCH_SCORPION,
@@ -95,6 +100,8 @@ enum {
  UARCH_THUNDER,    // Apple A13 processor (little cores).
  UARCH_ICESTORM,   // Apple M1 processor (little cores).
  UARCH_FIRESTORM,  // Apple M1 processor (big cores).
+  UARCH_BLIZZARD,   // Apple M2 processor (little cores).
+  UARCH_AVALANCHE,  // Apple M2 processor (big cores).
  // CAVIUM
  UARCH_THUNDERX,   // Cavium ThunderX
  UARCH_THUNDERX2,  //  Cavium ThunderX2 (originally Broadcom Vulkan).
@@ -133,7 +140,10 @@ static const ISA isas_uarch[] = {
  [UARCH_CORTEX_A76]   = ISA_ARMv8_2_A,
  [UARCH_CORTEX_A77]   = ISA_ARMv8_2_A,
  [UARCH_CORTEX_A78]   = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_A510]   = ISA_ARMv9_A,
+  [UARCH_CORTEX_A710]   = ISA_ARMv9_A,
  [UARCH_CORTEX_X1]    = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_X2]    = ISA_ARMv9_A,
  [UARCH_NEOVERSE_N1]  = ISA_ARMv8_2_A,
  [UARCH_NEOVERSE_E1]  = ISA_ARMv8_2_A,
  [UARCH_BRAHMA_B15]   = ISA_ARMv7_A,   // Same as Cortex-A15
@@ -155,8 +165,10 @@ static const ISA isas_uarch[] = {
  [UARCH_EXYNOS_M3]    = ISA_ARMv8_A,
  [UARCH_EXYNOS_M4]    = ISA_ARMv8_2_A,
  [UARCH_EXYNOS_M5]    = ISA_ARMv8_2_A,
-  [UARCH_ICESTORM]     = ISA_ARMv8_4_A,
-  [UARCH_FIRESTORM]    = ISA_ARMv8_4_A,
+  [UARCH_ICESTORM]     = ISA_ARMv8_5_A, // https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/AArch64TargetParser.def
+  [UARCH_FIRESTORM]    = ISA_ARMv8_5_A,
+  [UARCH_BLIZZARD]     = ISA_ARMv8_5_A, // Not confirmed
+  [UARCH_AVALANCHE]    = ISA_ARMv8_5_A,
  [UARCH_PJ4]          = ISA_ARMv7_A,
  [UARCH_XIAOMI]       = ISA_ARMv8_A,
 };
@@ -172,7 +184,9 @@ static char* isas_string[] = {
  [ISA_ARMv8_1_A] = "ARMv8.1",
  [ISA_ARMv8_2_A] = "ARMv8.2",
  [ISA_ARMv8_3_A] = "ARMv8.3",
-  [ISA_ARMv8_4_A] = "ARMv8.4"
+  [ISA_ARMv8_4_A] = "ARMv8.4",
+  [ISA_ARMv8_5_A] = "ARMv8.5",
+  [ISA_ARMv9_A] = "ARMv9"
 };

 #define UARCH_START if (false) {}
@@ -242,6 +256,9 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
  CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)
  CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78",            UARCH_CORTEX_A78,   CPU_VENDOR_ARM)
  CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1",             UARCH_CORTEX_X1,    CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD46, NA, NA, "Cortex‑A510",           UARCH_CORTEX_A510,  CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD47, NA, NA, "Cortex‑A710",           UARCH_CORTEX_A710,  CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD48, NA, NA, "Cortex-X2",             UARCH_CORTEX_X2,    CPU_VENDOR_ARM)
  CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1",           UARCH_NEOVERSE_E1,  CPU_VENDOR_ARM)

  CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15",            UARCH_BRAHMA_B15,   CPU_VENDOR_BROADCOM)
@@ -297,6 +314,8 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {

  CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm",              UARCH_ICESTORM,     CPU_VENDOR_APPLE)
  CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm",             UARCH_FIRESTORM,    CPU_VENDOR_APPLE)
+  CHECK_UARCH(arch, cpu, 'a', 0x030, NA, NA, "Blizzard",              UARCH_BLIZZARD,     CPU_VENDOR_APPLE)
+  CHECK_UARCH(arch, cpu, 'a', 0x031, NA, NA, "Avalanche",             UARCH_AVALANCHE,    CPU_VENDOR_APPLE)

  CHECK_UARCH(arch, cpu, 'V', 0x581, NA, NA, "PJ4",                   UARCH_PJ4,          CPU_VENDOR_MARVELL)
  CHECK_UARCH(arch, cpu, 'V', 0x584, NA, NA, "PJ4B-MP",               UARCH_PJ4,          CPU_VENDOR_MARVELL)
--- a/src/arm/udev.c
+++ b/src/arm/udev.c
@@ -3,8 +3,6 @@
 #include "midr.h"

 #define _PATH_DEVICETREE_MODEL       "/sys/firmware/devicetree/base/model"
-#define _PATH_CPUINFO                "/proc/cpuinfo"
-//#define _PATH_CPUINFO                "cpuinfo_debug"

 #define CPUINFO_CPU_IMPLEMENTER_STR  "CPU implementer\t: "
 #define CPUINFO_CPU_ARCHITECTURE_STR "CPU architecture: "
@@ -108,36 +106,15 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
  return midr;
 }

-char* get_field_from_cpuinfo(char* CPUINFO_FIELD) {
-  int filelen;
-  char* buf;
-  if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
-    printWarn("read_file: %s: %s:\n", _PATH_CPUINFO, strerror(errno));
-    return NULL;
-  }
-
-  char* tmp1 = strstr(buf, CPUINFO_FIELD);
-  if(tmp1 == NULL) return NULL;
-  tmp1 = tmp1 + strlen(CPUINFO_FIELD);
-  char* tmp2 = strstr(tmp1, "\n");
-
-  int strlen = (1 + (tmp2-tmp1));
-  char* hardware = emalloc(sizeof(char) * strlen);
-  memset(hardware, 0, sizeof(char) * strlen);
-  strncpy(hardware, tmp1, tmp2-tmp1);
-
-  return hardware;
-}
-
-char* get_hardware_from_cpuinfo() {
+char* get_hardware_from_cpuinfo(void) {
  return get_field_from_cpuinfo(CPUINFO_HARDWARE_STR);
 }

-char* get_revision_from_cpuinfo() {
+char* get_revision_from_cpuinfo(void) {
  return get_field_from_cpuinfo(CPUINFO_REVISION_STR);
 }

-bool is_raspberry_pi() {
+bool is_raspberry_pi(void) {
  int filelen;
  char* buf;
  if((buf = read_file(_PATH_DEVICETREE_MODEL, &filelen)) == NULL) {
--- a/src/arm/udev.h
+++ b/src/arm/udev.h
@@ -3,12 +3,15 @@

 #include "../common/udev.h"

+#define _PATH_SUNXI_NVMEM  "/sys/bus/nvmem/devices/sunxi-sid0/nvmem"
+#define _PATH_RK_EFUSE0    "/sys/bus/nvmem/devices/rockchip-efuse0/nvmem"
+
 #define UNKNOWN -1
-int get_ncores_from_cpuinfo();
+int get_ncores_from_cpuinfo(void);
 uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success);
-char* get_hardware_from_cpuinfo();
-char* get_revision_from_cpuinfo();
-bool is_raspberry_pi();
+char* get_hardware_from_cpuinfo(void);
+char* get_revision_from_cpuinfo(void);
+bool is_raspberry_pi(void);

 #endif

--- a/src/common/args.c
+++ b/src/common/args.c
@@ -12,6 +12,8 @@
 #define COLOR_STR_AMD       "amd"
 #define COLOR_STR_IBM       "ibm"
 #define COLOR_STR_ARM       "arm"
+#define COLOR_STR_ROCKCHIP  "rockchip"
+#define COLOR_STR_SIFIVE    "sifive"

 static const char *SYTLES_STR_LIST[] = {
  [STYLE_EMPTY]   = NULL,
@@ -71,59 +73,59 @@ const char *args_str[] = {

 static struct args_struct args;

-STYLE get_style() {
+STYLE get_style(void) {
  return args.style;
 }

-struct color** get_colors() {
+struct color** get_colors(void) {
  return args.colors;
 }

-bool show_help() {
+bool show_help(void) {
  return args.help_flag;
 }

-bool show_version() {
+bool show_version(void) {
  return args.version_flag;
 }

-bool show_debug() {
+bool show_debug(void) {
  return args.debug_flag;
 }

-bool show_raw() {
+bool show_raw(void) {
  return args.raw_flag;
 }

-bool accurate_pp() {
+bool accurate_pp(void) {
  return args.accurate_pp;
 }

-bool show_full_cpu_name() {
+bool show_full_cpu_name(void) {
  return args.full_cpu_name_flag;
 }

-bool show_logo_long() {
+bool show_logo_long(void) {
  return args.logo_long;
 }

-bool show_logo_short() {
+bool show_logo_short(void) {
  return args.logo_short;
 }

-bool show_logo_intel_new() {
+bool show_logo_intel_new(void) {
  return args.logo_intel_new;
 }

-bool show_logo_intel_old() {
+bool show_logo_intel_old(void) {
  return args.logo_intel_old;
 }

-bool verbose_enabled() {
+bool verbose_enabled(void) {
  return args.verbose_flag;
 }

-int max_arg_str_length() {
+int max_arg_str_length(void) {
  int max_len = -1;
  int len = sizeof(args_str) / sizeof(args_str[0]);
  for(int i=0; i < len; i++) {
@@ -168,6 +170,8 @@ bool parse_color(char* optarg_str, struct color*** cs) {
  else if(strcmp(optarg_str, COLOR_STR_AMD) == 0) color_to_copy = COLOR_DEFAULT_AMD;
  else if(strcmp(optarg_str, COLOR_STR_IBM) == 0) color_to_copy = COLOR_DEFAULT_IBM;
  else if(strcmp(optarg_str, COLOR_STR_ARM) == 0) color_to_copy = COLOR_DEFAULT_ARM;
+  else if(strcmp(optarg_str, COLOR_STR_ROCKCHIP) == 0) color_to_copy = COLOR_DEFAULT_ROCKCHIP;
+  else if(strcmp(optarg_str, COLOR_STR_SIFIVE) == 0) color_to_copy = COLOR_DEFAULT_SIFIVE;
  else {
    str_to_parse = optarg_str;
    free_ptr = false;
@@ -211,7 +215,7 @@ bool parse_color(char* optarg_str, struct color*** cs) {
  return true;
 }

-char* build_short_options() {
+char* build_short_options(void) {
  const char *c = args_chr;
  int len = sizeof(args_chr) / sizeof(args_chr[0]);
  char* str = (char *) emalloc(sizeof(char) * (len*2 + 1));
--- a/src/common/args.h
+++ b/src/common/args.h
@@ -39,21 +39,21 @@ extern const char *args_str[];

 #include "printer.h"

-int max_arg_str_length();
+int max_arg_str_length(void);
 bool parse_args(int argc, char* argv[]);
-bool show_help();
-bool accurate_pp();
-bool show_full_cpu_name();
-bool show_logo_long();
-bool show_logo_short();
-bool show_logo_intel_new();
-bool show_logo_intel_old();
-bool show_raw();
-bool show_debug();
-bool show_version();
-bool verbose_enabled();
+bool show_help(void);
+bool accurate_pp(void);
+bool show_full_cpu_name(void);
+bool show_logo_long(void);
+bool show_logo_short(void);
+bool show_logo_intel_new(void);
+bool show_logo_intel_old(void);
+bool show_raw(void);
+bool show_debug(void);
+bool show_version(void);
+bool verbose_enabled(void);
 void free_colors_struct(struct color** cs);
-struct color** get_colors();
-STYLE get_style();
+struct color** get_colors(void);
+STYLE get_style(void);

 #endif
--- a/src/common/ascii.h
+++ b/src/common/ascii.h
@@ -236,6 +236,76 @@ $C1      #####                 ##.                \
 $C1            ###########.                       \
 $C1                                               "

+#define ASCII_ROCKCHIP \
+"$C1                                                          \
+$C1                                              $C2##          \
+$C1   ######                ##            ##                 \
+$C1  ##.  ### ##### #####  ## .## #####  ######. ##   #####  \
+$C1 #######. ##. # #.     #####  ##.    ###  ###  #     .##  \
+$C1##.  ###.  ####. #### ###  .## #### ###  ###   #.#####    \
+$C1                                                ##        \
+$C1                                                          "
+
+#define ASCII_RISCV \
+"$C1                                                               \
+$C1                                ************                   \
+$C1                    %%%%%%%%%    ***********                   \
+$C1                    %%%%%%%%%%   **********                    \
+$C1                    %%%%%%%%%    *********                     \
+$C1                    %           ********                       \
+$C1                    %%      .*********     %                   \
+$C1                    %%%%     *******     %%%                   \
+$C1                    %%%%%%.    ****    %%%%%                   \
+$C1                    %%%%%%%%.        %%%%%%%                   \
+$C1                                                               \
+$C1                                                               \
+$C1 ###########   ##   .#########    #########   .##           ## \
+$C1 ##        ##  ##  ##           ##              ###       ###  \
+$C1 ###########   ##  ##########. ##          ####  .##     ##    \
+$C1 ##     ###    ##           ##. ##                 ### ###     \
+$C1 ##       ###  ##  ##########.   ##########          ###       \
+$C1                                                               "
+
+#define ASCII_SIFIVE \
+"$C1 ############################################## \
+$C1 ###########@@@@@@@@@@@@@@@@@@@@@@@@########### \
+$C1 #########@@@@@@@@@@@@@@@@@@@@@@@@@@@@######### \
+$C1 ########@@@@######################@@@@######## \
+$C1 #######@@@@########################@@@@####### \
+$C1 ######@@@@##########################@@@@###### \
+$C1 #####@@@@#######@@@@@@@@@@@@@@@@@@@@@@@@@##### \
+$C1 ####@@@@#######@@@@@@@@@@@@@@@@@@@@@@@@@@@#### \
+$C1 ###@@@@################################@@@@### \
+$C1 ##@@@@##################################@@@@## \
+$C1 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@#########@@@@# \
+$C1 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@@###########@@@@# \
+$C1 ##@@@@@@############@@@@@@############@@@@@@## \
+$C1 ######@@@@@###########@@###########@@@@@###### \
+$C1 #########@@@@@@################@@@@@@######### \
+$C1 #############@@@@@##########@@@@@############# \
+$C1 ################@@@@@@##@@@@@@################ \
+$C1 ####################@@@@@@#################### \
+$C1 ############################################## "
+
+#define ASCII_STARFIVE \
+"$C1                   #             \
+$C1               ##########        \
+$C1          ########   ########    \
+$C1     ########              ####  \
+$C1  #######           ####         \
+$C1 ####                #######     \
+$C1 ####        #####       ####### \
+$C1  #######      ########      .## \
+$C1      ########      ########     \
+$C1 ###      ########.     #######  \
+$C1 #######       #####        #### \
+$C1     ########      #.       #### \
+$C1  #      ####           #######  \
+$C1  #####             #######      \
+$C1    ########   ########          \
+$C1         #########               \
+$C1             #                   "
+
 // --------------------- LONG LOGOS ------------------------- //
 #define ASCII_AMD_L \
 "$C1                                                              \
@@ -320,11 +390,59 @@ $C1 ############ ################## #########   ####   ######### \
 $C1                                                              \
 $C1 ############ ################   #########    ##    ######### "

+#define ASCII_SIFIVE_L \
+"$C1 ################################################### \
+$C1 ###########@@@@@@@@@@@@@@@@@@@@@@@@@@@@############ \
+$C1 ##########@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@########### \
+$C1 #########@@@@@#######################@@@@########## \
+$C1 ########@@@@@#########################@@@@######### \
+$C1 #######@@@@@###########################@@@@######## \
+$C1 ######@@@@@########@@@@@@@@@@@@@@@@@@@@@@@@@####### \
+$C1 #####@@@@@########@@@@@@@@@@@@@@@@@@@@@@@@@@@###### \
+$C1 ####@@@@@################################@@@@@##### \
+$C1 ###@@@@@##################################@@@@@#### \
+$C1 ##@@@@@####################################@@@@@### \
+$C1 ##@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@#########@@@@### \
+$C1 ##@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@############@@@@### \
+$C1 ####@@@@@#############@@@@@@@############@@@@@##### \
+$C1 #######@@@@@@############@############@@@@@@####### \
+$C1 ##########@@@@@@###################@@@@@@########## \
+$C1 ##############@@@@@@###########@@@@@@############## \
+$C1 #################@@@@@@#####@@@@@@################# \
+$C1 ####################@@@@@@@@@@@#################### \
+$C1 ########################@@@######################## \
+$C1 ################################################### "
+
+#define ASCII_STARFIVE_L \
+"$C1                          #######                 \
+$C1                     ################.            \
+$C1                ############   ###########        \
+$C1            ############           ##########.    \
+$C1       ############           #         ######    \
+$C1    ###########               #####         ##    \
+$C1   #######.                   ##########          \
+$C1  ######            ###         *###########      \
+$C1  ######            #######.         ##########   \
+$C1   #########        ############         ######   \
+$C1     ###########.        ###########*         #   \
+$C1         ############        ############         \
+$C1   #         ############.       .###########     \
+$C1   ######         ###########         #########   \
+$C1   ##########         .######,            #####   \
+$C1      ############         ##.            #####.  \
+$C1           #########                   ########   \
+$C1    ##         #####               ##########.    \
+$C1    #######        #          ############        \
+$C1    ###########           ###########.            \
+$C1        ###########. ############                 \
+$C1            ################                      \
+$C1                 #######                          "
+
 typedef struct ascii_logo asciiL;

-//                        ------------------------------------------------------------------------------------------------------+
+//                        +-----------------------------------------------------------------------------------------------------+
 //                        | LOGO             | W | H | REPLACE | COLORS LOGO (>0 && <10)          | COLORS TEXT (=2)            |
-//                        ------------------------------------------------------------------------------------------------------+
+//                        +-----------------------------------------------------------------------------------------------------+
 asciiL logo_amd         = { ASCII_AMD,         39, 15, false, {C_FG_WHITE, C_FG_GREEN},           {C_FG_WHITE,   C_FG_GREEN}   };
 asciiL logo_intel       = { ASCII_INTEL,       48, 14, false, {C_FG_CYAN},                        {C_FG_CYAN,    C_FG_WHITE}   };
 asciiL logo_intel_new   = { ASCII_INTEL_NEW,   51,  9, false, {C_FG_CYAN},                        {C_FG_CYAN,    C_FG_WHITE}   };
@@ -337,6 +455,10 @@ asciiL logo_arm         = { ASCII_ARM,         42,  5, false, {C_FG_CYAN},
 asciiL logo_ibm         = { ASCII_IBM,         42,  9, false, {C_FG_CYAN, C_FG_WHITE},            {C_FG_CYAN,    C_FG_WHITE}   };
 asciiL logo_apple       = { ASCII_APPLE,       32, 17, false, {C_FG_WHITE},                       {C_FG_CYAN,    C_FG_B_WHITE} };
 asciiL logo_allwinner   = { ASCII_ALLWINNER,   47, 16, false, {C_FG_CYAN},                        {C_FG_B_BLACK, C_FG_B_CYAN } };
+asciiL logo_rockchip    = { ASCII_ROCKCHIP,    58,  8, false, {C_FG_CYAN, C_FG_YELLOW},           {C_FG_CYAN,    C_FG_YELLOW}  };
+asciiL logo_riscv       = { ASCII_RISCV,       63, 18, false, {C_FG_CYAN, C_FG_YELLOW},           {C_FG_CYAN,    C_FG_YELLOW}  };
+asciiL logo_sifive      = { ASCII_SIFIVE,      48, 19, true,  {C_BG_WHITE, C_BG_BLACK},           {C_FG_WHITE,   C_FG_BLUE}    };
+asciiL logo_starfive    = { ASCII_STARFIVE,    33, 17, false, {C_FG_WHITE},                       {C_FG_WHITE,   C_FG_BLUE}    };

 // Long variants          | ----------------------------------------------------------------------------------------------------|
 asciiL logo_amd_l       = { ASCII_AMD_L,       62, 19, true,  {C_BG_WHITE, C_BG_GREEN},           {C_FG_WHITE, C_FG_GREEN}     };
@@ -344,6 +466,8 @@ asciiL logo_intel_l     = { ASCII_INTEL_L,     62, 19, true,  {C_BG_CYAN, C_BG_W
 asciiL logo_intel_l_new = { ASCII_INTEL_L_NEW, 57, 14, true,  {C_BG_CYAN, C_BG_WHITE, C_BG_BLUE}, {C_FG_CYAN,  C_FG_WHITE}     };
 asciiL logo_arm_l       = { ASCII_ARM_L,       60,  8, true,  {C_BG_CYAN},                        {C_FG_WHITE, C_FG_CYAN}      };
 asciiL logo_ibm_l       = { ASCII_IBM_L,       62, 13, true,  {C_BG_CYAN, C_FG_WHITE},            {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_starfive_l  = { ASCII_STARFIVE_L,  50, 22, false, {C_FG_WHITE},                       {C_FG_WHITE, C_FG_BLUE}      };
+asciiL logo_sifive_l    = { ASCII_SIFIVE_L,    53, 21, true,  {C_BG_WHITE, C_BG_BLACK},           {C_FG_WHITE, C_FG_CYAN}      };
 asciiL logo_unknown     = { NULL,               0,  0, false, {COLOR_NONE},                       {COLOR_NONE, COLOR_NONE}     };

 #endif
--- a/src/common/cpu.c
+++ b/src/common/cpu.c
@@ -14,10 +14,10 @@
  #include "../ppc/uarch.h"
 #elif ARCH_ARM
  #include "../arm/uarch.h"
+#elif ARCH_RISCV
+  #include "../riscv/uarch.h"
 #endif

-#define UNUSED(x) (void)(x)
-
 #define STRING_YES        "Yes"
 #define STRING_NO         "No"
 #define STRING_NONE       "None"
--- a/src/common/cpu.h
+++ b/src/common/cpu.h
@@ -20,6 +20,10 @@ enum {
  CPU_VENDOR_SAMSUNG,
  CPU_VENDOR_MARVELL,
  CPU_VENDOR_PHYTIUM,
+// ARCH_RISCV
+  CPU_VENDOR_RISCV,
+  CPU_VENDOR_SIFIVE,
+  CPU_VENDOR_THEAD,
 // OTHERS
  CPU_VENDOR_UNKNOWN,
  CPU_VENDOR_INVALID
@@ -32,9 +36,16 @@ enum {
  HV_VENDOR_VMWARE,
  HV_VENDOR_XEN,
  HV_VENDOR_PARALLELS,
+  HV_VENDOR_PHYP,
  HV_VENDOR_INVALID
 };

+enum {
+  CORE_TYPE_EFFICIENCY,
+  CORE_TYPE_PERFORMANCE,
+  CORE_TYPE_UNKNOWN
+};
+
 #define UNKNOWN_DATA -1
 #define CPU_NAME_MAX_LENGTH 64

@@ -78,6 +89,7 @@ struct topology {
  uint32_t smt_supported; // Number of SMT that CPU supports (equal to smt_available if SMT is enabled)
 #ifdef ARCH_X86
  uint32_t smt_available; // Number of SMT that is currently enabled
+  int32_t total_cores_module; // Total cores in the current module (only makes sense in hybrid archs, like ADL)
  struct apic* apic;
 #endif
 #endif
@@ -109,6 +121,11 @@ struct features {
 #endif  
 };

+struct extensions {
+  char* str;
+  uint32_t mask;
+};
+
 struct cpuInfo {
  VENDOR cpu_vendor;
  struct uarch* arch;
@@ -116,9 +133,16 @@ struct cpuInfo {
  struct frequency* freq;
  struct cache* cach;
  struct topology* topo;
-  struct features* feat;
  int64_t peak_performance;

+  // Similar but not exactly equal
+  // to struct features
+#ifdef ARCH_RISCV
+  struct extensions* ext;
+#else
+  struct features* feat;
+#endif
+
 #if defined(ARCH_X86) || defined(ARCH_PPC)
  // CPU name from model
  char* cpu_name;
@@ -131,6 +155,10 @@ struct cpuInfo {
  uint32_t maxExtendedLevels;
  // Topology Extensions (AMD only)
  bool topology_extensions;
+  // Hybrid Flag (Intel only)
+  bool hybrid_flag;
+  // Core Type (P/E)
+  uint32_t core_type;
 #elif ARCH_PPC
  uint32_t pvr;
 #elif ARCH_ARM
@@ -138,13 +166,20 @@ struct cpuInfo {
  uint32_t midr;
 #endif

-#ifdef ARCH_ARM
+#if defined(ARCH_ARM) || defined(ARCH_RISCV)
  struct system_on_chip* soc;
+#endif
+
+#if defined(ARCH_X86) || defined(ARCH_ARM)
  // If SoC contains more than one CPU and they
  // are different, the others will be stored in
  // the next_cpu field
  struct cpuInfo* next_cpu;
  uint8_t num_cpus;
+#ifdef ARCH_X86
+  // The index of the first core in the module
+  uint32_t first_core_id;
+#endif
 #endif
 };

--- a/src/common/global.c
+++ b/src/common/global.c
@@ -20,6 +20,40 @@

 #endif

+#ifdef ARCH_X86
+  static const char* ARCH_STR = "x86_64 build";
+  #include "../x86/cpuid.h"
+#elif ARCH_PPC
+  static const char* ARCH_STR = "PowerPC build";
+  #include "../ppc/ppc.h"
+#elif ARCH_ARM
+  static const char* ARCH_STR = "ARM build";
+  #include "../arm/midr.h"
+#elif ARCH_RISCV
+  static const char* ARCH_STR = "RISC-V build";
+  #include "../riscv/riscv.h"
+#endif
+
+#ifdef __linux__
+  #ifdef __ANDROID__
+    static const char* OS_STR = "Android";
+  #else
+    static const char* OS_STR = "Linux";
+  #endif
+#elif __FreeBSD__
+  static const char* OS_STR = "FreeBSD";
+#elif _WIN32
+  static const char* OS_STR = "Windows";
+#elif defined __APPLE__ || __MACH__
+  static const char* OS_STR = "macOS";
+#else
+  static const char* OS_STR = "Unknown OS";
+#endif
+
+#ifndef GIT_FULL_VERSION
+  static const char* VERSION = "1.04";
+#endif
+
 enum {
  LOG_LEVEL_NORMAL,
  LOG_LEVEL_VERBOSE
@@ -47,6 +81,8 @@ void printErr(const char *fmt, ...) {
  vsnprintf(buffer,buffer_size, fmt, args);
  va_end(args);
  fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
+  fprintf(stderr,"[VERSION]: ");
+  print_version(stderr);
 }

 void printBug(const char *fmt, ...) {
@@ -57,6 +93,8 @@ void printBug(const char *fmt, ...) {
  vsnprintf(buffer,buffer_size, fmt, args);
  va_end(args);
  fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
+  fprintf(stderr,"[VERSION]: ");
+  print_version(stderr);
 #if defined(ARCH_X86) || defined(ARCH_PPC)
  fprintf(stderr, "Please, create a new issue with this error message, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
 #elif ARCH_ARM
@@ -123,3 +161,10 @@ void* erealloc(void *ptr, size_t size) {
  return newptr;
 }

+void print_version(FILE *restrict stream) {
+#ifdef GIT_FULL_VERSION
+  fprintf(stream, "cpufetch %s (%s %s)\n", GIT_FULL_VERSION, OS_STR, ARCH_STR);
+#else
+  fprintf(stream, "cpufetch v%s (%s %s)\n", VERSION, OS_STR, ARCH_STR);
+#endif
+}
--- a/src/common/global.h
+++ b/src/common/global.h
@@ -1,10 +1,12 @@
 #ifndef __GLOBAL__
 #define __GLOBAL__

+#include <stdio.h>
 #include <stdbool.h>
 #include <stddef.h>

 #define STRING_UNKNOWN "Unknown"
+#define UNUSED(x) (void)(x)

 void set_log_level(bool verbose);
 void printWarn(const char *fmt, ...);
@@ -16,5 +18,6 @@ char *strremove(char *str, const char *sub);
 void* emalloc(size_t size);
 void* ecalloc(size_t nmemb, size_t size);
 void* erealloc(void *ptr, size_t size);
+void print_version(FILE *restrict stream);

 #endif
--- a/src/common/main.c
+++ b/src/common/main.c
@@ -6,35 +6,6 @@
 #include "printer.h"
 #include "global.h"

-#ifdef ARCH_X86
-  static const char* ARCH_STR = "x86_64 build";
-  #include "../x86/cpuid.h"
-#elif ARCH_PPC
-  static const char* ARCH_STR = "PowerPC build";
-  #include "../ppc/ppc.h"
-#elif ARCH_ARM
-  static const char* ARCH_STR = "ARM build";
-  #include "../arm/midr.h"
-#endif
-
-#ifdef __linux__
-  #ifdef __ANDROID__
-    static const char* OS_STR = "Android";
-  #else
-    static const char* OS_STR = "Linux";
-  #endif
-#elif __FreeBSD__
-  static const char* OS_STR = "FreeBSD";
-#elif _WIN32
-  static const char* OS_STR = "Windows";
-#elif defined __APPLE__ || __MACH__
-  static const char* OS_STR = "macOS";
-#else
-  static const char* OS_STR = "Unknown OS";
-#endif
-
-static const char* VERSION = "1.02";
-
 void print_help(char *argv[]) {
  const char **t = args_str;
  const char *c = args_chr;
@@ -69,10 +40,13 @@ void print_help(char *argv[]) {
  printf("  -%c, --%s %*s Print cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");

  printf("\nCOLORS: \n");
-  printf("  * \"intel\":     Use Intel default color scheme \n");
-  printf("  * \"amd\":       Use AMD default color scheme \n");
-  printf("  * \"ibm\",       Use IBM default color scheme \n");
-  printf("  * \"arm\":       Use ARM default color scheme \n");
+  printf("  * \"intel\":     Use Intel color scheme \n");
+  printf("  * \"intel-new\": Use Intel (new logo) color scheme \n");
+  printf("  * \"amd\":       Use AMD color scheme \n");
+  printf("  * \"ibm\",       Use IBM color scheme \n");
+  printf("  * \"arm\":       Use ARM color scheme \n");
+  printf("  * \"rockchip\":  Use ARM color scheme \n");
+  printf("  * \"sifive\":    Use SiFive color scheme \n");
  printf("  * custom:      If the argument of --color does not match any of the previous strings, a custom scheme can be specified.\n");
  printf("                 5 colors must be given in RGB with the format: R,G,B:R,G,B:...\n");
  printf("                 The first 3 colors are the CPU art color and the next 2 colors are the text colors\n");
@@ -102,12 +76,10 @@ void print_help(char *argv[]) {
  printf("\nNOTE: \n");
  printf("    Peak performance information is NOT accurate. cpufetch computes peak performance using the max\n");
  printf("    frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the\n");
-  printf("    CPU running AVX code. This value is not be fetched by cpufetch since it depends on each specific CPU.\n");
-  printf("    To correctly measure peak performance, see: https://github.com/Dr-Noob/peakperf\n");
-}
-
-void print_version() {
-  printf("cpufetch v%s (%s %s)\n",VERSION, OS_STR, ARCH_STR);
+  printf("    CPU running AVX code. By default, this value is not fetched by cpufetch, but you can use the\n");
+  printf("    --accurate-pp option, which will measure the AVX frequency and show a more precise estimation\n");
+  printf("    (this option is only available in x86 architectures).\n");
+  printf("    To precisely measure peak performance, see: https://github.com/Dr-Noob/peakperf\n");
 }

 int main(int argc, char* argv[]) {
@@ -120,7 +92,7 @@ int main(int argc, char* argv[]) {
  }

  if(show_version()) {
-    print_version();
+    print_version(stdout);
    return EXIT_SUCCESS;
  }

@@ -131,7 +103,7 @@ int main(int argc, char* argv[]) {
    return EXIT_FAILURE;

  if(show_debug()) {
-    print_version();
+    print_version(stdout);
    print_debug(cpu);
    return EXIT_SUCCESS;
  }
@@ -139,7 +111,7 @@ int main(int argc, char* argv[]) {
  // TODO: This should be moved to the end of args.c
  if(show_raw()) {
  #ifdef ARCH_X86
-    print_version();
+    print_version(stdout);
    print_raw(cpu);
    return EXIT_SUCCESS;
  #else
@@ -148,8 +120,10 @@ int main(int argc, char* argv[]) {
  #endif
  }

-  if(print_cpufetch(cpu, get_style(), get_colors(), show_full_cpu_name()))
+  if(print_cpufetch(cpu, get_style(), get_colors(), show_full_cpu_name())) {
    return EXIT_SUCCESS;
-  else
+  }
+  else {
    return EXIT_FAILURE;
+  }
 }
--- a/src/common/printer.c
+++ b/src/common/printer.c
@@ -16,10 +16,15 @@
 #elif ARCH_PPC
  #include "../ppc/uarch.h"
  #include "../ppc/ppc.h"
-#else
+#elif ARCH_ARM
  #include "../arm/uarch.h"
  #include "../arm/midr.h"
  #include "../arm/soc.h"
+  #include "../common/soc.h"
+#elif ARCH_RISCV
+  #include "../riscv/riscv.h"
+  #include "../riscv/uarch.h"
+  #include "../riscv/soc.h"
 #endif

 #ifdef _WIN32
@@ -42,8 +47,10 @@
 enum {
 #if defined(ARCH_X86) || defined(ARCH_PPC)
  ATTRIBUTE_NAME,
-#elif ARCH_ARM
+#elif defined(ARCH_ARM) || defined(ARCH_RISCV)
  ATTRIBUTE_SOC,
+#endif
+#if defined(ARCH_X86) || defined(ARCH_ARM)
  ATTRIBUTE_CPU_NUM,
 #endif
  ATTRIBUTE_HYPERVISOR,
@@ -60,6 +67,8 @@ enum {
  ATTRIBUTE_ALTIVEC,
 #elif ARCH_ARM
  ATTRIBUTE_FEATURES,
+#elif ARCH_RISCV
+  ATTRIBUTE_EXTENSIONS,
 #endif
  ATTRIBUTE_L1i,
  ATTRIBUTE_L1d,
@@ -73,8 +82,10 @@ static const char* ATTRIBUTE_FIELDS [] = {
  "Name:",
 #elif ARCH_PPC
  "Part Number:",
-#elif ARCH_ARM
+#elif defined(ARCH_ARM) || defined(ARCH_RISCV)
  "SoC:",
+#endif
+#if defined(ARCH_X86) || defined(ARCH_ARM)
  "",
 #endif
  "Hypervisor:",
@@ -91,6 +102,8 @@ static const char* ATTRIBUTE_FIELDS [] = {
  "Altivec: ",
 #elif defined(ARCH_ARM)
  "Features: ",
+#elif defined(ARCH_RISCV)
+  "Extensions: ",
 #endif
  "L1i Size:",
  "L1d Size:",
@@ -106,6 +119,8 @@ static const char* ATTRIBUTE_FIELDS_SHORT [] = {
  "P/N:",
 #elif ARCH_ARM
  "SoC:",
+#endif
+#if defined(ARCH_X86) || defined(ARCH_ARM)
  "",
 #endif
  "Hypervisor:",
@@ -122,6 +137,8 @@ static const char* ATTRIBUTE_FIELDS_SHORT [] = {
  "Altivec: ",
 #elif defined(ARCH_ARM)
  "Features: ",
+#elif defined(ARCH_RISCV)
+  "Extensions: ",
 #endif
  "L1i Size:",
  "L1d Size:",
@@ -297,8 +314,6 @@ bool ascii_fits_screen(int termw, struct ascii_logo logo, int lf) {
 void replace_bgbyfg_color(struct ascii_logo* logo) {
  // Replace background by foreground color
  for(int i=0; i < 3; i++) {
-    if(logo->color_ascii[i] == NULL) break;
-
    if(strcmp(logo->color_ascii[i], C_BG_BLACK) == 0) strcpy(logo->color_ascii[i], C_FG_BLACK);
    else if(strcmp(logo->color_ascii[i], C_BG_RED) == 0) strcpy(logo->color_ascii[i], C_FG_RED);
    else if(strcmp(logo->color_ascii[i], C_BG_GREEN) == 0) strcpy(logo->color_ascii[i], C_FG_GREEN);
@@ -355,9 +370,20 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
    art->art = &logo_apple;
  else if(art->vendor == SOC_VENDOR_ALLWINNER)
    art->art = &logo_allwinner;
+  else if(art->vendor == SOC_VENDOR_ROCKCHIP)
+    art->art = &logo_rockchip;
  else {
    art->art = choose_ascii_art_aux(&logo_arm_l, &logo_arm, term, lf);
  }
+#elif ARCH_RISCV
+  if(art->vendor == SOC_VENDOR_SIFIVE)
+    art->art = choose_ascii_art_aux(&logo_sifive_l, &logo_sifive, term, lf);
+  else if(art->vendor == SOC_VENDOR_STARFIVE)
+    art->art = choose_ascii_art_aux(&logo_starfive_l, &logo_starfive, term, lf);
+  else if(art->vendor == SOC_VENDOR_ALLWINNER)
+    art->art = &logo_allwinner;
+  else
+    art->art = &logo_riscv;
 #endif

  // 2. Choose colors
@@ -424,11 +450,12 @@ uint32_t longest_field_length(struct ascii* art, int la) {
 }

 #if defined(ARCH_X86) || defined(ARCH_PPC)
-void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const char** attribute_fields) {
+void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const char** attribute_fields, bool hybrid_architecture) {
  struct ascii_logo* logo = art->art;
  int attr_to_print = 0;
  int attr_type;
  char* attr_value;
+  int32_t beg_space;
  int32_t space_right;
  int32_t space_up = ((int)logo->height - (int)art->n_attributes_set)/2;
  int32_t space_down = (int)logo->height - (int)art->n_attributes_set - (int)space_up;
@@ -439,6 +466,7 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const ch
  lbuf->buf = emalloc(sizeof(char) * LINE_BUFFER_SIZE);
  lbuf->pos = 0;
  lbuf->chars = 0;
+  bool add_space = false;

  printf("\n");
  for(int32_t n=0; n < iters; n++) {
@@ -473,9 +501,28 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const ch
      attr_value = art->attributes[attr_to_print]->value;
      attr_to_print++;

-      space_right = 1 + (la - strlen(attribute_fields[attr_type]));
-      printOut(lbuf, strlen(attribute_fields[attr_type]) + space_right + strlen(attr_value),
-               "%s%s%s%*s%s%s%s", logo->color_text[0], attribute_fields[attr_type], art->reset, space_right, "", logo->color_text[1], attr_value, art->reset);
+#ifdef ARCH_X86
+      if(attr_type == ATTRIBUTE_L3) {
+        add_space = false;
+      }
+      if(attr_type == ATTRIBUTE_CPU_NUM) {
+        printOut(lbuf, strlen(attr_value), "%s%s%s", logo->color_text[0], attr_value, art->reset);
+        add_space = true;
+      }
+      else {
+#endif
+        beg_space = 0;
+        space_right = 2 + 1 + (la - strlen(attribute_fields[attr_type]));
+        if(hybrid_architecture && add_space) {
+          beg_space = 2;
+          space_right -= 2;
+        }
+
+        printOut(lbuf, beg_space + strlen(attribute_fields[attr_type]) + space_right + strlen(attr_value),
+                 "%*s%s%s%s%*s%s%s%s", beg_space, "", logo->color_text[0], attribute_fields[attr_type], art->reset, space_right, "", logo->color_text[1], attr_value, art->reset);
+#ifdef ARCH_X86
+      }
+#endif
    }
    printOutLine(lbuf, art, termw);
    printf("\n");
@@ -501,43 +548,56 @@ bool print_cpufetch_x86(struct cpuInfo* cpu, STYLE s, struct color** cs, struct

  art->new_intel_logo = choose_new_intel_logo(cpu);

-  // Step 1. Retrieve attributes (if some structures are NULL, like topo
-  //         or cache, do not try to retrieve them)
  uint32_t socket_num = 1;
  char* l1i, *l1d, *l2, *l3, *n_cores, *n_cores_dual, *sockets;
  l1i = l1d = l2 = l3 = n_cores = n_cores_dual = sockets = NULL;

-  char* uarch = get_str_uarch(cpu);
-  char* manufacturing_process = get_str_process(cpu);
-  char* max_frequency = get_str_freq(cpu->freq);
  char* cpu_name = get_str_cpu_name(cpu, fcpuname);
-  char* avx = get_str_avx(cpu);
-  char* fma = get_str_fma(cpu);
+  char* uarch = get_str_uarch(cpu);
  char* pp = get_str_peak_performance(cpu->peak_performance);
-
-  if(cpu->topo != NULL) {
-    sockets = get_str_sockets(cpu->topo);
-    n_cores = get_str_topology(cpu, cpu->topo, false);
-    n_cores_dual = get_str_topology(cpu, cpu->topo, true);
-  }
+  char* manufacturing_process = get_str_process(cpu);
+  bool hybrid_architecture = cpu->next_cpu != NULL;

  if(cpu->cach != NULL) {
-    l1i = get_str_l1i(cpu->cach);
-    l1d = get_str_l1d(cpu->cach);
-    l2 = get_str_l2(cpu->cach);
    l3 = get_str_l3(cpu->cach);
  }

-  // Step 2. Set attributes
  setAttribute(art, ATTRIBUTE_NAME, cpu_name);
  if(cpu->hv->present) {
    setAttribute(art, ATTRIBUTE_HYPERVISOR, cpu->hv->hv_name);
  }
  setAttribute(art, ATTRIBUTE_UARCH, uarch);
  setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);
+
+  struct cpuInfo* ptr = cpu;
+  for(int i = 0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    char* max_frequency = get_str_freq(ptr->freq);
+    char* avx = get_str_avx(ptr);
+    char* fma = get_str_fma(ptr);
+    char* cpu_num = emalloc(sizeof(char) * 9);
+
+    if(ptr->topo != NULL) {
+      sockets = get_str_sockets(ptr->topo);
+      n_cores = get_str_topology(ptr, ptr->topo, false);
+      n_cores_dual = get_str_topology(ptr, ptr->topo, true);
+    }
+
+    if(ptr->cach != NULL) {
+      l1i = get_str_l1i(ptr->cach);
+      l1d = get_str_l1d(ptr->cach);
+      l2 = get_str_l2(ptr->cach);
+    }
+
+    if(hybrid_architecture) {
+      if(ptr->core_type == CORE_TYPE_EFFICIENCY) sprintf(cpu_num, "E-cores:");
+      else if(ptr->core_type == CORE_TYPE_PERFORMANCE) sprintf(cpu_num, "P-cores:");
+      else printBug("Found invalid core type!\n");
+
+      setAttribute(art, ATTRIBUTE_CPU_NUM, cpu_num);
+    }
    setAttribute(art, ATTRIBUTE_FREQUENCY, max_frequency);
-  if(cpu->topo != NULL) {
-    socket_num = get_nsockets(cpu->topo);
+    if(ptr->topo != NULL) {
+      socket_num = get_nsockets(ptr->topo);
      if (socket_num > 1) {
        setAttribute(art, ATTRIBUTE_SOCKETS, sockets);
        setAttribute(art, ATTRIBUTE_NCORES, n_cores);
@@ -552,6 +612,7 @@ bool print_cpufetch_x86(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
    if(l1i != NULL) setAttribute(art, ATTRIBUTE_L1i, l1i);
    if(l1d != NULL) setAttribute(art, ATTRIBUTE_L1d, l1d);
    if(l2 != NULL) setAttribute(art, ATTRIBUTE_L2, l2);
+  }
  if(l3 != NULL) setAttribute(art, ATTRIBUTE_L3, l3);
  setAttribute(art, ATTRIBUTE_PEAK, pp);

@@ -568,15 +629,12 @@ bool print_cpufetch_x86(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
    longest_attribute = longest_attribute_length(art, attribute_fields);
  }

-  print_ascii_generic(art, longest_attribute, term->w, attribute_fields);
+  print_ascii_generic(art, longest_attribute, term->w, attribute_fields, hybrid_architecture);

  free(manufacturing_process);
-  free(max_frequency);
  free(sockets);
  free(n_cores);
  free(n_cores_dual);
-  free(avx);
-  free(fma);
  free(l1i);
  free(l1d);
  free(l2);
@@ -620,11 +678,14 @@ bool print_cpufetch_ppc(struct cpuInfo* cpu, STYLE s, struct color** cs, struct

  // Step 2. Set attributes
  if(cpu_name != NULL) {
-    setAttribute(art,ATTRIBUTE_NAME,cpu_name);
+    setAttribute(art, ATTRIBUTE_NAME, cpu_name);
  }
-  setAttribute(art,ATTRIBUTE_UARCH,uarch);
-  setAttribute(art,ATTRIBUTE_TECHNOLOGY,manufacturing_process);
-  setAttribute(art,ATTRIBUTE_FREQUENCY,max_frequency);
+  setAttribute(art, ATTRIBUTE_UARCH, uarch);
+  if(cpu->hv->present) {
+    setAttribute(art, ATTRIBUTE_HYPERVISOR, cpu->hv->hv_name);
+  }
+  setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);
+  setAttribute(art, ATTRIBUTE_FREQUENCY, max_frequency);
  uint32_t socket_num = get_nsockets(cpu->topo);
  if (socket_num > 1) {
    setAttribute(art, ATTRIBUTE_SOCKETS, sockets);
@@ -632,16 +693,16 @@ bool print_cpufetch_ppc(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
    setAttribute(art, ATTRIBUTE_NCORES_DUAL, n_cores_dual);
  }
  else {
-    setAttribute(art,ATTRIBUTE_NCORES, n_cores);
+    setAttribute(art, ATTRIBUTE_NCORES, n_cores);
  }
-  setAttribute(art,ATTRIBUTE_ALTIVEC, altivec);
-  setAttribute(art,ATTRIBUTE_L1i,l1i);
-  setAttribute(art,ATTRIBUTE_L1d,l1d);
-  setAttribute(art,ATTRIBUTE_L2,l2);
+  setAttribute(art, ATTRIBUTE_ALTIVEC, altivec);
+  setAttribute(art, ATTRIBUTE_L1i, l1i);
+  setAttribute(art, ATTRIBUTE_L1d, l1d);
+  setAttribute(art, ATTRIBUTE_L2, l2);
  if(l3 != NULL) {
-    setAttribute(art,ATTRIBUTE_L3,l3);
+    setAttribute(art, ATTRIBUTE_L3, l3);
  }
-  setAttribute(art,ATTRIBUTE_PEAK,pp);
+  setAttribute(art, ATTRIBUTE_PEAK, pp);

  // Step 3. Print output
  const char** attribute_fields = ATTRIBUTE_FIELDS;
@@ -656,7 +717,7 @@ bool print_cpufetch_ppc(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
    longest_attribute = longest_attribute_length(art, attribute_fields);
  }

-  print_ascii_generic(art, longest_attribute, term->w, attribute_fields);
+  print_ascii_generic(art, longest_attribute, term->w, attribute_fields, false);

  return true;
 }
@@ -782,26 +843,17 @@ bool print_cpufetch_arm(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
  char* manufacturing_process = get_str_process(cpu->soc);
  char* soc_name = get_soc_name(cpu->soc);
  char* features = get_str_features(cpu);
-  setAttribute(art,ATTRIBUTE_SOC,soc_name);
-  setAttribute(art,ATTRIBUTE_TECHNOLOGY,manufacturing_process);
+  setAttribute(art, ATTRIBUTE_SOC, soc_name);
+  setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);

  if(cpu->num_cpus == 1) {
    char* uarch = get_str_uarch(cpu);
    char* max_frequency = get_str_freq(cpu->freq);
    char* n_cores = get_str_topology(cpu, cpu->topo, false);
-    /*
-     * char* l1i = get_str_l1i(cpu->cach);
-     * char* l1d = get_str_l1d(cpu->cach);
-     * char* l2 = get_str_l2(cpu->cach);
-     * char* l3 = get_str_l3(cpu->cach);
-     * Do not setAttribute for caches.
-     * Cache functionality may be implemented
-     * in the future
-    */

-    setAttribute(art,ATTRIBUTE_UARCH,uarch);
-    setAttribute(art,ATTRIBUTE_FREQUENCY,max_frequency);
-    setAttribute(art,ATTRIBUTE_NCORES,n_cores);
+    setAttribute(art, ATTRIBUTE_UARCH, uarch);
+    setAttribute(art, ATTRIBUTE_FREQUENCY, max_frequency);
+    setAttribute(art, ATTRIBUTE_NCORES, n_cores);
    if(features != NULL) {
      setAttribute(art, ATTRIBUTE_FEATURES, features);
    }
@@ -812,17 +864,8 @@ bool print_cpufetch_arm(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
      char* uarch = get_str_uarch(ptr);
      char* max_frequency = get_str_freq(ptr->freq);
      char* n_cores = get_str_topology(ptr, ptr->topo, false);
-      /*
-       * char* l1i = get_str_l1i(cpu->cach);
-       * char* l1d = get_str_l1d(cpu->cach);
-       * char* l2 = get_str_l2(cpu->cach);
-       * char* l3 = get_str_l3(cpu->cach);
-       * Do not setAttribute for caches.
-       * Cache functionality may be implemented
-       * in the future
-       */
-
      char* cpu_num = emalloc(sizeof(char) * 9);
+
      sprintf(cpu_num, "CPU %d:", i+1);
      setAttribute(art, ATTRIBUTE_CPU_NUM, cpu_num);
      setAttribute(art, ATTRIBUTE_UARCH, uarch);
@@ -834,7 +877,7 @@ bool print_cpufetch_arm(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
    }
  }
  char* pp = get_str_peak_performance(cpu->peak_performance);
-  setAttribute(art,ATTRIBUTE_PEAK,pp);
+  setAttribute(art, ATTRIBUTE_PEAK, pp);
  if(cpu->hv->present) {
    setAttribute(art, ATTRIBUTE_HYPERVISOR, cpu->hv->hv_name);
  }
@@ -873,7 +916,144 @@ bool print_cpufetch_arm(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
 }
 #endif

-struct terminal* get_terminal_size() {
+#ifdef ARCH_RISCV
+// https://stackoverflow.com/questions/109023/count-the-number-of-set-bits-in-a-32-bit-integer
+int number_of_bits(uint32_t i) {
+  i = i - ((i >> 1) & 0x55555555);                 // add pairs of bits
+  i = (i & 0x33333333) + ((i >> 2) & 0x33333333);  // quads
+  i = (i + (i >> 4)) & 0x0F0F0F0F;                 // groups of 8
+
+  return (i * 0x01010101) >> 24;                   // horizontal sum of bytes
+}
+
+void print_ascii_riscv(struct ascii* art, uint32_t la, int32_t termw, const char** attribute_fields, uint32_t extensions_mask) {
+  struct ascii_logo* logo = art->art;
+  int attr_to_print = 0;
+  int attr_type;
+  char* attr_value;
+  int32_t beg_space;
+  int32_t space_right;
+  int32_t ext_list_size = sizeof(extension_list)/sizeof(extension_list[0]);
+  int32_t ext_num = 0;
+  int32_t ext_to_print = 0;
+  int32_t num_extensions = number_of_bits(extensions_mask);
+  int32_t space_up = ((int)logo->height - (int)(art->n_attributes_set + num_extensions))/2;
+  int32_t space_down = (int)logo->height - (int)(art->n_attributes_set + num_extensions) - (int)space_up;
+  uint32_t logo_pos = 0;
+  int32_t iters = max(logo->height, art->n_attributes_set);
+
+  struct line_buffer* lbuf = emalloc(sizeof(struct line_buffer));
+  lbuf->buf = emalloc(sizeof(char) * LINE_BUFFER_SIZE);
+  lbuf->pos = 0;
+  lbuf->chars = 0;
+
+  printf("\n");
+  for(int32_t n=0; n < iters; n++) {
+    // 1. Print logo
+    if(space_up > 0 || (space_up + n >= 0 && space_up + n < (int)logo->height)) {
+      for(uint32_t i=0; i < logo->width; i++) {
+        if(logo->art[logo_pos] == '$') {
+          if(logo->replace_blocks) logo_pos += 3;
+          else parse_print_color(art, lbuf, &logo_pos);
+        }
+        if(logo->replace_blocks && logo->art[logo_pos] != ' ') {
+          if(logo->art[logo_pos] == '#') printOut(lbuf, 1, "%s%c%s", logo->color_ascii[0], ' ', art->reset);
+          else if(logo->art[logo_pos] == '@') printOut(lbuf, 1, "%s%c%s", logo->color_ascii[1], ' ', art->reset);
+          else if(logo->art[logo_pos] == '%') printOut(lbuf, 1, "%s%c%s", logo->color_ascii[2], ' ', art->reset);
+          else printOut(lbuf, 1, "%c", logo->art[logo_pos]);
+        }
+        else
+          printOut(lbuf, 1, "%c", logo->art[logo_pos]);
+
+        logo_pos++;
+      }
+      printOut(lbuf, 0, "%s", art->reset);
+    }
+    else {
+      // If logo should not be printed, fill with spaces
+      printOut(lbuf, logo->width, "%*c", logo->width, ' ');
+    }
+
+    // 2. Print text
+    if(space_up < 0 || (n > space_up-1 && n < (int)logo->height - space_down)) {
+      attr_type = art->attributes[attr_to_print]->type;
+      attr_value = art->attributes[attr_to_print]->value;
+
+      // Print extension
+      if(attr_to_print > 0 && art->attributes[attr_to_print-1]->type == ATTRIBUTE_EXTENSIONS && ext_num != num_extensions) {
+        // Search for the extension to print
+        while(ext_to_print < ext_list_size && !((extensions_mask >> extension_list[ext_to_print].id) & 1U)) ext_to_print++;
+        if(ext_to_print == ext_list_size) {
+          printBug("print_ascii_riscv: Unable to find the extension to print");
+        }
+
+        printOut(lbuf, 3 + strlen(extension_list[ext_to_print].str), "%s - %s%s", logo->color_text[0], extension_list[ext_to_print].str, art->reset);
+        ext_num++;
+        ext_to_print++;
+      }
+      else {
+        attr_to_print++;
+        beg_space = 0;
+        space_right = 2 + 1 + (la - strlen(attribute_fields[attr_type]));
+
+        printOut(lbuf, beg_space + strlen(attribute_fields[attr_type]) + space_right + strlen(attr_value),
+                 "%*s%s%s%s%*s%s%s%s", beg_space, "", logo->color_text[0], attribute_fields[attr_type], art->reset, space_right, "", logo->color_text[1], attr_value, art->reset);
+      }
+    }
+    printOutLine(lbuf, art, termw);
+    printf("\n");
+  }
+  printf("\n");
+
+  free(lbuf->buf);
+  free(lbuf);
+}
+
+bool print_cpufetch_riscv(struct cpuInfo* cpu, STYLE s, struct color** cs, struct terminal* term) {
+  struct ascii* art = set_ascii(get_soc_vendor(cpu->soc), s);
+  if(art == NULL)
+    return false;
+
+  // Step 1. Retrieve attributes
+  char* uarch = get_str_uarch(cpu);
+  char* manufacturing_process = get_str_process(cpu->soc);
+  char* soc_name = get_soc_name(cpu->soc);
+  char* extensions = get_str_extensions(cpu);
+  char* max_frequency = get_str_freq(cpu->freq);
+  char* n_cores = get_str_topology(cpu, cpu->topo);
+  char* pp = get_str_peak_performance(cpu->peak_performance);
+
+  // Step 2. Set attributes
+  setAttribute(art, ATTRIBUTE_SOC, soc_name);
+  setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);
+  setAttribute(art, ATTRIBUTE_UARCH, uarch);
+  setAttribute(art, ATTRIBUTE_NCORES, n_cores);
+  setAttribute(art, ATTRIBUTE_FREQUENCY, max_frequency);
+  if(extensions != NULL) {
+    setAttribute(art, ATTRIBUTE_EXTENSIONS, extensions);
+  }
+  setAttribute(art, ATTRIBUTE_PEAK, pp);
+
+  // Step 3. Print output
+  const char** attribute_fields = ATTRIBUTE_FIELDS;
+  uint32_t longest_attribute = longest_attribute_length(art, attribute_fields);
+  uint32_t longest_field = longest_field_length(art, longest_attribute);
+  choose_ascii_art(art, cs, term, longest_field);
+
+  if(!ascii_fits_screen(term->w, *art->art, longest_field)) {
+    // Despite of choosing the smallest logo, the output does not fit
+    // Choose the shorter field names and recalculate the longest attr
+    attribute_fields = ATTRIBUTE_FIELDS_SHORT;
+    longest_attribute = longest_attribute_length(art, attribute_fields);
+  }
+
+  print_ascii_riscv(art, longest_attribute, term->w, attribute_fields, cpu->ext->mask);
+
+  return true;
+}
+#endif
+
+struct terminal* get_terminal_size(void) {
  struct terminal* term = emalloc(sizeof(struct terminal));

 #ifdef _WIN32
@@ -910,5 +1090,7 @@ bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct color** cs, bool show_f
  return print_cpufetch_ppc(cpu, s, cs, term, show_full_cpu_name);
 #elif ARCH_ARM
  return print_cpufetch_arm(cpu, s, cs, term);
+#elif ARCH_RISCV
+  return print_cpufetch_riscv(cpu, s, cs, term);
 #endif
 }
--- a/src/common/printer.h
+++ b/src/common/printer.h
@@ -11,6 +11,8 @@ typedef int STYLE;
  #include "../ppc/ppc.h"
 #elif ARCH_ARM
  #include "../arm/midr.h"
+#elif ARCH_RISCV
+  #include "../riscv/riscv.h"
 #endif

 //                              +-----------------------------------+-----------------------+
@@ -21,6 +23,8 @@ typedef int STYLE;
 #define COLOR_DEFAULT_AMD       "250,250,250:000,154,102:000,000,000:250,250,250:000,154,102"
 #define COLOR_DEFAULT_IBM       "092,119,172:092,119,172:000,000,000:240,240,240:092,119,172"
 #define COLOR_DEFAULT_ARM       "000,145,189:000,145,189:000,000,000:240,240,240:000,145,189"
+#define COLOR_DEFAULT_ROCKCHIP  "114,159,207:229,195,000:000,000,000:240,240,240:114,159,207"
+#define COLOR_DEFAULT_SIFIVE    "255,255,255:000,000,000:000,000,000:255,255,255:000,000,000"

 #ifdef ARCH_X86
 void print_levels(struct cpuInfo* cpu);
--- a/src/common/soc.c
+++ b/src/common/soc.c
@@ -0,0 +1,88 @@
+#include "soc.h"
+#ifdef ARCH_ARM
+  #include "../arm/socs.h"
+#elif ARCH_RISCV
+  #include "../riscv/socs.h"
+#endif
+#include "udev.h"
+#include "../common/global.h"
+
+#include <string.h>
+
+static char* soc_trademark_string[] = {
+  // ARM
+  [SOC_VENDOR_SNAPDRAGON] = "Snapdragon ",
+  [SOC_VENDOR_MEDIATEK]   = "MediaTek ",
+  [SOC_VENDOR_EXYNOS]     = "Exynos ",
+  [SOC_VENDOR_KIRIN]      = "Kirin ",
+  [SOC_VENDOR_BROADCOM]   = "Broadcom BCM",
+  [SOC_VENDOR_APPLE]      = "Apple ",
+  [SOC_VENDOR_ROCKCHIP]   = "Rockchip ",
+  // RISC-V
+  [SOC_VENDOR_SIFIVE]     = "SiFive ",
+  [SOC_VENDOR_STARFIVE]   = "StarFive ",
+  // ARM & RISC-V
+  [SOC_VENDOR_ALLWINNER]  = "Allwinner "
+};
+
+VENDOR get_soc_vendor(struct system_on_chip* soc) {
+  return soc->soc_vendor;
+}
+
+char* get_str_process(struct system_on_chip* soc) {
+  char* str;
+
+  if(soc->process == UNKNOWN) {
+    str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+    snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+  }
+  else {
+    str = emalloc(sizeof(char) * 5);
+    memset(str, 0, sizeof(char) * 5);
+    snprintf(str, 5, "%dnm", soc->process);
+  }
+  return str;
+}
+
+char* get_soc_name(struct system_on_chip* soc) {
+  if(soc->soc_model == SOC_MODEL_UNKNOWN)
+    return soc->raw_name;
+  return soc->soc_name;
+}
+
+void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process) {
+  soc->soc_model = soc_model;
+  soc->soc_vendor = get_soc_vendor_from_soc(soc_model);
+  soc->process = process;
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
+    printBug("fill_soc: soc->soc_vendor == SOC_VENDOR_UNKOWN");
+    // If we fall here there is a bug in socs.h
+    // Reset everything to avoid segfault
+    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+    soc->soc_model = SOC_MODEL_UNKNOWN;
+    soc->process = UNKNOWN;
+    soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+    snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+  }
+  else {
+    soc->process = process;
+    int len = strlen(soc_name) + strlen(soc_trademark_string[soc->soc_vendor]) + 1;
+    soc->soc_name = emalloc(sizeof(char) * len);
+    memset(soc->soc_name, 0, sizeof(char) * len);
+    sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);
+  }
+}
+
+bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
+  int len1 = strlen(raw_name);
+  int len2 = strlen(expected_name);
+  int len = min(len1, len2);
+
+  if(strncmp(raw_name, expected_name, len) != 0) {
+    return false;
+  }
+  else {
+    fill_soc(soc, soc_name, soc_model, process);
+    return true;
+  }
+}
--- a/src/common/soc.h
+++ b/src/common/soc.h
@@ -0,0 +1,52 @@
+#ifndef __SOC__
+#define __SOC__
+
+// NOTE:
+// soc.c/soc.h are used by
+// ARM and RISC-V backends
+
+#include "../common/cpu.h"
+#include <stdint.h>
+
+#define UNKNOWN -1
+
+typedef int32_t SOC;
+
+enum {
+  SOC_VENDOR_UNKNOWN,
+  // ARM
+  SOC_VENDOR_SNAPDRAGON,
+  SOC_VENDOR_MEDIATEK,
+  SOC_VENDOR_EXYNOS,
+  SOC_VENDOR_KIRIN,
+  SOC_VENDOR_BROADCOM,
+  SOC_VENDOR_APPLE,
+  SOC_VENDOR_ROCKCHIP,
+  // RISC-V
+  SOC_VENDOR_SIFIVE,
+  SOC_VENDOR_STARFIVE,
+  // ARM & RISC-V
+  SOC_VENDOR_ALLWINNER
+};
+
+struct system_on_chip {
+  SOC soc_model;
+  VENDOR soc_vendor;
+  int32_t process;
+  char* soc_name;
+  char* raw_name;
+};
+
+struct system_on_chip* get_soc(void);
+char* get_soc_name(struct system_on_chip* soc);
+VENDOR get_soc_vendor(struct system_on_chip* soc);
+bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process);
+char* get_str_process(struct system_on_chip* soc);
+void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process);
+
+#define SOC_START if (false) {}
+#define SOC_EQ(raw_name, expected_name, soc_name, soc_model, soc, process) \
+   else if (match_soc(soc, raw_name, expected_name, soc_name, soc_model, process)) return true;
+#define SOC_END else { return false; }
+
+#endif
--- a/src/common/udev.c
+++ b/src/common/udev.c
@@ -3,7 +3,7 @@
 #include "cpu.h"

 // https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
-int get_ncores_from_cpuinfo() {
+int get_ncores_from_cpuinfo(void) {
  // Examples:
  // 0-271
  // 0-7
@@ -129,6 +129,27 @@ long get_cache_size_from_file(char* path) {
  return ret * 1024;
 }

+char* get_field_from_cpuinfo(char* CPUINFO_FIELD) {
+  int filelen;
+  char* buf;
+  if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
+    printWarn("read_file: %s: %s:\n", _PATH_CPUINFO, strerror(errno));
+    return NULL;
+  }
+
+  char* tmp1 = strstr(buf, CPUINFO_FIELD);
+  if(tmp1 == NULL) return NULL;
+  tmp1 = tmp1 + strlen(CPUINFO_FIELD);
+  char* tmp2 = strstr(tmp1, "\n");
+
+  int strlen = (1 + (tmp2-tmp1));
+  char* hardware = emalloc(sizeof(char) * strlen);
+  memset(hardware, 0, sizeof(char) * strlen);
+  strncpy(hardware, tmp1, tmp2-tmp1);
+
+  return hardware;
+}
+
 long get_max_freq_from_file(uint32_t core) {
  char path[_PATH_FREQUENCY_MAX_LEN];
  sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MAX);
@@ -165,54 +186,105 @@ long get_l3_cache_size(uint32_t core) {
  return get_cache_size_from_file(path);
 }

-int get_num_caches_from_files(char** paths, int num_paths) {
-  int SHARED_MAP_MAX_LEN = 8 + 1;
+void add_shared_map(uint32_t** src, int src_idx, uint32_t** dst, int dst_idx, int n) {
+  for(int j=0; j < n; j++) {
+    dst[dst_idx][j] = src[src_idx][j];
+  }
+}
+
+bool maps_equal(uint32_t* map1, uint32_t* map2, int n) {
+  for(int i=0; i < n; i++) {
+    if(map1[i] != map2[i]) return false;
+  }
+  return true;
+}
+
+// Generic function to count the number of distinct
+// elements in the list of files passed in char** paths.
+// An element can be potentially anything.
+// We use this function to count:
+// - The number of caches
+// - The number of sockets
+int get_num_elements_from_files(char** paths, int num_paths) {
  int filelen;
  char* buf;
-  uint32_t* shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
+  char* tmpbuf;

-  // 1. Read cpu_shared_map from every core
+  // 1. Count the number of bitmasks per file
+  if((buf = read_file(paths[0], &filelen)) == NULL) {
+    printWarn("Could not open '%s'", paths[0]);
+    return -1;
+  }
+  int num_bitmasks = 1;
+  for(int i=0; buf[i]; i++) {
+    num_bitmasks += (buf[i] == ',');
+  }
+
+  // 2. Read map from every core
+  uint32_t** maps = emalloc(sizeof(uint32_t *) * num_paths);
  for(int i=0; i < num_paths; i++) {
+    maps[i] = emalloc(sizeof(uint32_t) * num_bitmasks);
+
    if((buf = read_file(paths[i], &filelen)) == NULL) {
      printWarn("Could not open '%s'", paths[i]);
      return -1;
    }

-    if(filelen > SHARED_MAP_MAX_LEN) {
-      printBug("Shared map length is %d while the max is be %d", filelen, SHARED_MAP_MAX_LEN);
-      return -1;
-    }
-
+    for(int j=0; j < num_bitmasks; j++) {
      char* end;
+      tmpbuf = emalloc(sizeof(char) * (strlen(buf) + 1));
+      char* commaend = strstr(buf, ",");
+      if(commaend == NULL) {
+        strcpy(tmpbuf, buf);
+      }
+      else {
+        strncpy(tmpbuf, buf, commaend-buf);
+      }
      errno = 0;
-    long ret = strtol(buf, &end, 16);
+      long ret = strtol(tmpbuf, &end, 16);
      if(errno != 0) {
-      printBug("strtol: %s", strerror(errno));
+        printf("strtol: %s", strerror(errno));
        free(buf);
        return -1;
      }

-    shared_maps[i] = (uint32_t) ret;
+      maps[i][j] = (uint32_t) ret;
+      buf = commaend + 1;
+      free(tmpbuf);
+    }
  }

-  // 2. Count number of different masks; this is the number of caches
-  int num_caches = 0;
+  // 2. Count number of different masks; this is the number of elements
+  int num_elements = 0;
  bool found = false;
-  uint32_t* unique_shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
-  for(int i=0; i < num_paths; i++) unique_shared_maps[i] = 0;
+  uint32_t** unique_maps = emalloc(sizeof(uint32_t *) * num_paths);
+  for(int i=0; i < num_paths; i++) {
+    unique_maps[i] = emalloc(sizeof(uint32_t) * num_bitmasks);
+    for(int j=0; j < num_bitmasks; j++) {
+      unique_maps[i][j] = 0;
+    }
+  }

  for(int i=0; i < num_paths; i++) {
    for(int j=0; j < num_paths && !found; j++) {
-      if(shared_maps[i] == unique_shared_maps[j]) found = true;
+      if(maps_equal(maps[i], unique_maps[j], num_bitmasks)) found = true;
    }
    if(!found) {
-      unique_shared_maps[num_caches] = shared_maps[i];
-      num_caches++;
+      add_shared_map(maps, i, unique_maps, num_elements, num_bitmasks);
+      num_elements++;
    }
    found = false;
  }

-  return num_caches;
+  return num_elements;
+}
+
+int get_num_caches_from_files(char** paths, int num_paths) {
+  return get_num_elements_from_files(paths, num_paths);
+}
+
+int get_num_sockets_from_files(char** paths, int num_paths) {
+  return get_num_elements_from_files(paths, num_paths);
 }

 int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level) {
@@ -241,3 +313,38 @@ int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level) {

  return ret;
 }
+
+int get_num_sockets_package_cpus(struct topology* topo) {
+  // Get number of sockets using
+  // /sys/devices/system/cpu/cpu*/topology/package_cpus
+
+  char** paths = emalloc(sizeof(char *) * topo->total_cores);
+
+  for(int i=0; i < topo->total_cores; i++) {
+    paths[i] = emalloc(sizeof(char) * _PATH_PACKAGE_MAX_LEN);
+    sprintf(paths[i], "%s%s/cpu%d%s",  _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, _PATH_TOPO_PACKAGE_CPUS);
+  }
+
+  int ret = get_num_sockets_from_files(paths, topo->total_cores);
+
+  for(int i=0; i < topo->total_cores; i++)
+    free(paths[i]);
+  free(paths);
+
+  return ret;
+}
+
+// Inspired in is_devtree_compatible from lscpu
+bool is_devtree_compatible(char* str) {
+  int filelen;
+  char* buf;
+  if((buf = read_file("/proc/device-tree/compatible", &filelen)) == NULL) {
+    return false;
+  }
+
+  char* tmp;
+  if((tmp = strstr(buf, str)) == NULL) {
+    return false;
+  }
+  return true;
+}
--- a/src/common/udev.h
+++ b/src/common/udev.h
@@ -12,6 +12,7 @@

 #include "cpu.h"

+#define _PATH_CPUINFO           "/proc/cpuinfo"
 #define _PATH_SYS_SYSTEM        "/sys/devices/system"
 #define _PATH_SYS_CPU           "/cpu"
 #define _PATH_FREQUENCY         "/cpufreq"
@@ -24,9 +25,11 @@
 #define _PATH_CACHE_SIZE        "/size"
 #define _PATH_CACHE_SHARED_MAP  "/shared_cpu_map"
 #define _PATH_CPUS_PRESENT      _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
+#define _PATH_TOPO_PACKAGE_CPUS "/topology/package_cpus"

 #define _PATH_FREQUENCY_MAX_LEN 100
 #define _PATH_CACHE_MAX_LEN     200
+#define _PATH_PACKAGE_MAX_LEN   200

 char* read_file(char* path, int* len);
 long get_max_freq_from_file(uint32_t core);
@@ -36,6 +39,9 @@ long get_l1d_cache_size(uint32_t core);
 long get_l2_cache_size(uint32_t core);
 long get_l3_cache_size(uint32_t core);
 int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level);
-int get_ncores_from_cpuinfo();
+int get_num_sockets_package_cpus(struct topology* topo);
+int get_ncores_from_cpuinfo(void);
+char* get_field_from_cpuinfo(char* CPUINFO_FIELD);
+bool is_devtree_compatible(char* str);

 #endif
--- a/src/ppc/ppc.c
+++ b/src/ppc/ppc.c
@@ -11,6 +11,17 @@
 #include "../common/udev.h"
 #include "../common/global.h"

+static char *hv_vendors_name[] = {
+  [HV_VENDOR_KVM]       = "KVM",
+  [HV_VENDOR_QEMU]      = "QEMU",
+  [HV_VENDOR_HYPERV]    = "Microsoft Hyper-V",
+  [HV_VENDOR_VMWARE]    = "VMware",
+  [HV_VENDOR_XEN]       = "Xen",
+  [HV_VENDOR_PARALLELS] = "Parallels",
+  [HV_VENDOR_PHYP]      = "pHyp",
+  [HV_VENDOR_INVALID]   = STRING_UNKNOWN
+};
+
 struct cache* get_cache_info(struct cpuInfo* cpu) {
  struct cache* cach = emalloc(sizeof(struct cache));
  init_cache_struct(cach);
@@ -63,12 +74,17 @@ struct topology* get_topology_info(struct cache* cach) {
    printWarn("fill_core_ids_from_sys failed, output may be incomplete/invalid");
    for(int i=0; i < topo->total_cores; i++) core_ids[i] = 0;
  }
+
  if(!fill_package_ids_from_sys(package_ids, topo->total_cores)) {
    printWarn("fill_package_ids_from_sys failed, output may be incomplete/invalid");
    for(int i=0; i < topo->total_cores; i++) package_ids[i] = 0;
+    // fill_package_ids_from_sys failed, use a
+    // more sophisticated wat to find the number of sockets
+    topo->sockets = get_num_sockets_package_cpus(topo);
  }
-
-  // 2. Socket detection
+  else {
+    // fill_package_ids_from_sys succeeded, use the
+    // traditional socket detection algorithm
    int *package_ids_count = emalloc(sizeof(int) * topo->total_cores);
    for(int i=0; i < topo->total_cores; i++) {
      package_ids_count[i] = 0;
@@ -81,6 +97,8 @@ struct topology* get_topology_info(struct cache* cach) {
        topo->sockets++;
      }
    }
+    free(package_ids_count);
+  }

  // 3. Physical cores detection
  int *core_ids_unified = emalloc(sizeof(int) * topo->total_cores);
@@ -105,13 +123,12 @@ struct topology* get_topology_info(struct cache* cach) {

  free(core_ids);
  free(package_ids);
-  free(package_ids_count);
  free(core_ids_unified);

  return topo;
 }

-static inline uint32_t mfpvr() {
+static inline uint32_t mfpvr(void) {
    uint32_t pvr;

    asm ("mfpvr %0"
@@ -123,12 +140,18 @@ struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
  return get_uarch_from_pvr(cpu->pvr);
 }

-struct frequency* get_frequency_info() {
+struct frequency* get_frequency_info(void) {
  struct frequency* freq = emalloc(sizeof(struct frequency));

  freq->max = get_max_freq_from_file(0);
  freq->base = get_min_freq_from_file(0);

+  if(freq->max == UNKNOWN_DATA) {
+    // If we are unable to find it in the
+    // standard path, try /proc/cpuinfo
+    freq->max = get_frequency_from_cpuinfo();
+  }
+
  return freq;
 }

@@ -158,7 +181,29 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t
  return flops;
 }

-struct cpuInfo* get_cpu_info() {
+struct hypervisor* get_hp_info(void) {
+  struct hypervisor* hv = emalloc(sizeof(struct hypervisor));
+  hv->present = false;
+
+  // Weird heuristic found in lscpu:
+  // https://github.com/util-linux/util-linux/blob/master/sys-utils/lscpu-virt.c
+  if(access("/proc" _PATH_DT_IBM_PARTIT_NAME, F_OK) == 0 &&
+     access("/proc" _PATH_DT_HMC_MANAGED, F_OK) == 0 &&
+     access("/proc" _PATH_DT_QEMU_WIDTH, F_OK) != 0) {
+    hv->present = true;
+    hv->hv_vendor = HV_VENDOR_PHYP;
+  }
+  else if(is_devtree_compatible("qemu,pseries")) {
+    hv->present = true;
+    hv->hv_vendor = HV_VENDOR_QEMU;
+  }
+
+  hv->hv_name = hv_vendors_name[hv->hv_vendor];
+
+  return hv;
+}
+
+struct cpuInfo* get_cpu_info(void) {
  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
  struct features* feat = emalloc(sizeof(struct features));
  cpu->feat = feat;
@@ -172,8 +217,11 @@ struct cpuInfo* get_cpu_info() {
  char* path = emalloc(sizeof(char) * (strlen(_PATH_DT) + strlen(_PATH_DT_PART) + 1));
  sprintf(path, "%s%s", _PATH_DT, _PATH_DT_PART);

-  cpu->cpu_name = read_file(path, &len);
+  if((cpu->cpu_name = read_file(path, &len)) == NULL) {
+    printWarn("Could not open '%s'", path);
+  }
  cpu->pvr = mfpvr();
+  cpu->hv = get_hp_info();
  cpu->arch = get_cpu_uarch(cpu);
  cpu->freq = get_frequency_info();
  cpu->topo = get_topology_info(cpu->cach);
--- a/src/ppc/ppc.h
+++ b/src/ppc/ppc.h
@@ -1,9 +1,9 @@
-#ifndef __POWERPC__
-#define __POWERPC__
+#ifndef __CPUFETCH_POWERPC__
+#define __CPUFETCH_POWERPC__

 #include "../common/cpu.h"

-struct cpuInfo* get_cpu_info();
+struct cpuInfo* get_cpu_info(void);
 char* get_str_altivec(struct cpuInfo* cpu);
 char* get_str_topology(struct topology* topo, bool dual_socket);
 void print_debug(struct cpuInfo* cpu);
--- a/src/ppc/uarch.c
+++ b/src/ppc/uarch.c
@@ -3,7 +3,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
-#include <sys/auxv.h>
 #include <errno.h>

 #include "uarch.h"
@@ -36,6 +35,7 @@ enum {
  UARCH_POWER7,
  UARCH_POWER7PLUS,
  UARCH_POWER8,
+  UARCH_POWER8_DD21,
  UARCH_POWER9,
  UARCH_POWER9_DD20,
  UARCH_POWER9_DD21,
@@ -85,6 +85,7 @@ void fill_uarch(struct uarch* arch, MICROARCH u) {
  FILL_UARCH(arch->uarch, UARCH_POWER7,      "POWER7",         45)
  FILL_UARCH(arch->uarch, UARCH_POWER7PLUS,  "POWER7+",        32)
  FILL_UARCH(arch->uarch, UARCH_POWER8,      "POWER8",         22)
+  FILL_UARCH(arch->uarch, UARCH_POWER8_DD21, "POWER8 (DD2.1)", 22)
  FILL_UARCH(arch->uarch, UARCH_POWER9,      "POWER9",         14)
  FILL_UARCH(arch->uarch, UARCH_POWER9_DD20, "POWER9 (DD2.0)", 14)
  FILL_UARCH(arch->uarch, UARCH_POWER9_DD21, "POWER9 (DD2.1)", 14)
@@ -101,7 +102,19 @@ void fill_uarch(struct uarch* arch, MICROARCH u) {
 }

 /*
- * PVR masks/values from arch/powerpc/kernel/cputable.c (Linux kernel)
+ * PVR masks/values from Linux kernel:
+ * - arch/powerpc/kernel/cputable.c            (kernel <= 6.0)
+ * - arch/powerpc/kernel/cpu_specs_book3s_64.h (kernel >= 6.1)
+ *
+ * In the kernel, there is a POWER8E identifier. In
+ * https://wiki.raptorcs.com/wiki/POWER8E it says it is
+ * actually DD2.1, while other POWER8 should be DD2.0.
+ * The last assumption does not seem to be correct according
+ * to https://openbenchmarking.org/s/POWER8NVL, which shows a
+ * POWER8NVL where kernel says it is DD1.0. We implement this
+ * to show only the uarch, not the revision, since it seems a bit
+ * redundant?
+ *
 * This list may be incorrect, incomplete or overly simplified,
 * specially in the case of 32 bit entries
 */
@@ -126,7 +139,7 @@ struct uarch* get_uarch_from_pvr(uint32_t pvr) {
  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000006, UARCH_POWER10)
  CHECK_UARCH(arch, pvr, 0xffff0000, 0x003f0000, UARCH_POWER7)
  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004A0000, UARCH_POWER7PLUS)
-  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004b0000, UARCH_POWER8)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004b0000, UARCH_POWER8_DD21)
  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004c0000, UARCH_POWER8)
  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004d0000, UARCH_POWER8)
  CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0200, UARCH_POWER9_DD20)
@@ -235,6 +248,7 @@ bool has_altivec(struct uarch* arch) {
    case UARCH_POWER7:
    case UARCH_POWER7PLUS:
    case UARCH_POWER8:
+    case UARCH_POWER8_DD21:
    case UARCH_POWER9:
    case UARCH_POWER9_DD20:
    case UARCH_POWER9_DD21:
--- a/src/ppc/udev.c
+++ b/src/ppc/udev.c
@@ -1,16 +1,19 @@
 #include <errno.h>

+#include "../common/udev.h"
 #include "../common/global.h"
 #include "udev.h"

 #define _PATH_TOPO_CORE_ID         "topology/core_id"
 #define _PATH_TOPO_PACKAGE_ID      "topology/physical_package_id"
+#define CPUINFO_FREQUENCY_STR      "clock\t\t: "

 bool fill_array_from_sys(int *core_ids, int total_cores, char* SYS_PATH) {
  int filelen;
  char* buf;
  char* end;
  char path[128];
+  memset(path, 0, 128);

  for(int i=0; i < total_cores; i++) {
    sprintf(path, "%s%s/cpu%d/%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, SYS_PATH);
@@ -36,5 +39,52 @@ bool fill_core_ids_from_sys(int *core_ids, int total_cores) {
 }

 bool fill_package_ids_from_sys(int* package_ids, int total_cores) {
-  return fill_array_from_sys(package_ids, total_cores, _PATH_TOPO_PACKAGE_ID);
+  bool status = fill_array_from_sys(package_ids, total_cores, _PATH_TOPO_PACKAGE_ID);
+  if(status) {
+    // fill_array_from_sys completed successfully, but we
+    // must to check the integrity of the package_ids array
+    for(int i=0; i < total_cores; i++) {
+      if(package_ids[i] == -1) {
+        printWarn("fill_package_ids_from_sys: package_ids[%d] = -1", i);
+        return false;
+      }
+      else if(package_ids[i] >= total_cores || package_ids[i] < 0) {
+        printBug("fill_package_ids_from_sys: package_ids[%d] = %d", i, package_ids[i]);
+        return false;
+      }
+    }
+
+    return true;
+  }
+  return false;
+}
+
+long get_frequency_from_cpuinfo(void) {
+  char* freq_str = get_field_from_cpuinfo(CPUINFO_FREQUENCY_STR);
+  if(freq_str == NULL) {
+    return UNKNOWN_DATA;
+  }
+  else {
+    // freq_str should be in the form XXXX.YYYYYYMHz
+    char* dot = strstr(freq_str, ".");
+    freq_str[dot-freq_str] = '\0';
+
+    char* end;
+    errno = 0;
+    long ret = strtol(freq_str, &end, 10);
+    if(errno != 0) {
+      printBug("strtol: %s", strerror(errno));
+      free(freq_str);
+      return UNKNOWN_DATA;
+    }
+
+    // We consider it an error if frequency is
+    // greater than 10 GHz or less than 100 MHz
+    if(ret > 10000 || ret <  100) {
+      printBug("Invalid data was read from file '%s': %ld\n", CPUINFO_FREQUENCY_STR, ret);
+      return UNKNOWN_DATA;
+    }
+
+    return ret;
+  }
 }
--- a/src/ppc/udev.h
+++ b/src/ppc/udev.h
@@ -4,8 +4,13 @@
 #include "../common/udev.h"
 #define _PATH_DT                  "/proc/device-tree/vpd/root-node-vpd@a000/enclosure@1e00/backplane@800/processor@1000"
 #define _PATH_DT_PART             "/part-number"
+#define _PATH_DT_IBM_PARTIT_NAME  "/device-tree/ibm,partition-name"
+#define _PATH_DT_HMC_MANAGED      "/device-tree/hmc-managed?"
+#define _PATH_DT_QEMU_WIDTH       "/device-tree/chosen/qemu,graphic-width"

 bool fill_core_ids_from_sys(int *core_ids, int total_cores);
 bool fill_package_ids_from_sys(int* package_ids, int total_cores);
+int get_num_sockets_package_cpus(struct topology* topo);
+long get_frequency_from_cpuinfo(void);

 #endif
--- a/src/riscv/riscv.c
+++ b/src/riscv/riscv.c
@@ -0,0 +1,120 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+
+#include "../common/global.h"
+#include "../common/udev.h"
+#include "udev.h"
+#include "uarch.h"
+#include "soc.h"
+
+struct frequency* get_frequency_info(uint32_t core) {
+  struct frequency* freq = emalloc(sizeof(struct frequency));
+
+  freq->base = UNKNOWN_DATA;
+  freq->max = get_max_freq_from_file(core);
+
+  return freq;
+}
+
+int64_t get_peak_performance(struct cpuInfo* cpu) {
+  //First check we have consistent data
+  if(get_freq(cpu->freq) == UNKNOWN_DATA) {
+    return -1;
+  }
+
+  int64_t flops = cpu->topo->total_cores * (get_freq(cpu->freq) * 1000000);
+  return flops;
+}
+
+struct extensions* get_extensions_from_str(char* str) {
+  struct extensions* ext = emalloc(sizeof(struct extensions));
+  ext->mask = 0;
+  ext->str = NULL;
+
+  if(str == NULL) {
+    return ext;
+  }
+
+  int len = sizeof(char) * (strlen(str)+1);
+  ext->str = emalloc(sizeof(char) * len);
+  memset(ext->str, 0, len);
+  strncpy(ext->str, str, sizeof(char) * len);
+
+  // Code inspired in Linux kernel:
+  // https://elixir.bootlin.com/linux/v6.2.10/source/arch/riscv/kernel/cpufeature.c
+  char* isa = str;
+  if (!strncmp(isa, "rv32", 4))
+    isa += 4;
+  else if (!strncmp(isa, "rv64", 4))
+    isa += 4;
+  else {
+    printBug("get_extensions_from_str: ISA string must start with rv64 or rv32");
+    return ext;
+  }
+
+  for(char* e = isa; *e != '\0'; e++) {
+    int n = *e - 'a';
+    ext->mask |= 1UL << n;
+  }
+
+  return ext;
+}
+
+struct cpuInfo* get_cpu_info(void) {
+  struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
+  //init_cpu_info(cpu);
+  struct topology* topo = emalloc(sizeof(struct topology));
+  topo->total_cores = get_ncores_from_cpuinfo();
+  topo->cach = NULL;
+  cpu->topo = topo;
+
+  char* cpuinfo_str = get_uarch_from_cpuinfo();
+  char* ext_str = get_extensions_from_cpuinfo();
+  cpu->hv = emalloc(sizeof(struct hypervisor));
+  cpu->hv->present = false;
+  cpu->ext = get_extensions_from_str(ext_str);
+  if(cpu->ext->str != NULL && cpu->ext->mask == 0) return NULL;
+  cpu->arch = get_uarch_from_cpuinfo_str(cpuinfo_str, cpu);
+  cpu->soc = get_soc();
+  cpu->freq = get_frequency_info(0);
+  cpu->peak_performance = get_peak_performance(cpu);
+
+  return cpu;
+}
+
+//TODO: Might be worth refactoring with other archs
+char* get_str_topology(struct cpuInfo* cpu, struct topology* topo) {
+  uint32_t size = 3+7+1;
+  char* string = emalloc(sizeof(char)*size);
+  snprintf(string, size, "%d cores", topo->total_cores);
+
+  return string;
+}
+
+char* get_str_extensions(struct cpuInfo* cpu) {
+  if(cpu->ext != NULL) {
+    return cpu->ext->str;
+  }
+  return NULL;
+}
+
+void print_debug(struct cpuInfo* cpu) {
+  printf("- soc: ");
+  if(cpu->soc->raw_name == NULL) {
+    printf("NULL\n");
+  }
+  else {
+    printf("'%s'\n", cpu->soc->raw_name);
+  }
+
+  printf("- uarch: ");
+  char* arch_cpuinfo_str = get_arch_cpuinfo_str(cpu);
+  if(arch_cpuinfo_str == NULL) {
+    printf("NULL\n");
+  }
+  else {
+    printf("'%s'\n", arch_cpuinfo_str);
+  }
+}
--- a/src/riscv/riscv.h
+++ b/src/riscv/riscv.h
@@ -0,0 +1,37 @@
+#ifndef __RISCV__
+#define __RISCV__
+
+#include "../common/cpu.h"
+
+struct extension {
+  int id;
+  char* str;
+};
+
+// https://en.wikichip.org/wiki/risc-v/standard_extensions
+// Included all except for G
+static const struct extension extension_list[] = {
+  { 'i' - 'a', "(I) Integer Instruction Set" },
+  { 'm' - 'a', "(M) Integer Multiplication and Division" },
+  { 'a' - 'a', "(A) Atomic Instructions" },
+  { 'f' - 'a', "(F) Single-Precision Floating-Point" },
+  { 'd' - 'a', "(D) Double-Precision Floating-Point" },
+  { 'q' - 'a', "(Q) Quad-Precision Floating-Point" },
+  { 'l' - 'a', "(L) Decimal Floating-Point" },
+  { 'c' - 'a', "(C) Compressed Instructions" },
+  { 'b' - 'a', "(B) Double-Precision Floating-Point" },
+  { 'j' - 'a', "(J) Dynamically Translated Languages" },
+  { 't' - 'a', "(T) Transactional Memory" },
+  { 'p' - 'a', "(P) Packed-SIMD Instructions" },
+  { 'v' - 'a', "(V) Vector Operations" },
+  { 'n' - 'a', "(N) User-Level Interrupts" },
+  { 'h' - 'a', "(H) Hypervisor" },
+  { 's' - 'a', "(S) Supervisor-level Instructions" }
+};
+
+struct cpuInfo* get_cpu_info(void);
+char* get_str_topology(struct cpuInfo* cpu, struct topology* topo);
+char* get_str_extensions(struct cpuInfo* cpu);
+void print_debug(struct cpuInfo* cpu);
+
+#endif
--- a/src/riscv/soc.c
+++ b/src/riscv/soc.c
@@ -0,0 +1,84 @@
+#include "soc.h"
+#include "socs.h"
+#include "udev.h"
+#include "../common/global.h"
+
+#include <string.h>
+
+bool match_sifive(char* soc_name, struct system_on_chip* soc) {
+  char* tmp = soc_name;
+
+  // Dont know if it makes sense in RISC-V
+  /*if((tmp = strstr(soc_name, "???")) == NULL)
+    return false;*/
+
+  //soc->soc_vendor = ???
+
+  SOC_START
+  SOC_EQ(tmp, "fu740", "Freedom U740",  SOC_SIFIVE_U740, soc, 40)
+  SOC_END
+}
+
+bool match_starfive(char* soc_name, struct system_on_chip* soc) {
+  SOC_START
+  SOC_EQ(soc_name, "jh7110#", "VisionFive 2",  SOC_STARFIVE_VF2, soc, 28) // https://blog.bitsofnetworks.org/benchmarking-risc-v-visionfive-2-vs-the-world.html
+  SOC_EQ(soc_name, "jh7110",  "VisionFive 2",  SOC_STARFIVE_VF2, soc, 28)
+  SOC_END
+}
+
+bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
+  SOC_START
+  SOC_EQ(soc_name, "sun20i-d1", "D1-H", SOC_ALLWINNER_D1H, soc, 22)
+  SOC_END
+}
+
+struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
+  char* raw_name = soc->raw_name;
+
+  if(match_starfive(raw_name, soc))
+    return soc;
+
+  if(match_allwinner(raw_name, soc))
+    return soc;
+
+  match_sifive(raw_name, soc);
+  return soc;
+}
+
+struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
+  char* tmp = get_hardware_from_devtree();
+
+  if(tmp != NULL) {
+    soc->raw_name = tmp;
+    return parse_soc_from_string(soc);
+  }
+
+  return soc;
+}
+
+struct system_on_chip* get_soc(void) {
+  struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
+  soc->raw_name = NULL;
+  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+  soc->soc_model = SOC_MODEL_UNKNOWN;
+  soc->process = UNKNOWN;
+
+  soc = guess_soc_from_devtree(soc);
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
+    if(soc->raw_name != NULL) {
+      printWarn("SoC detection failed using device tree: Found '%s' string", soc->raw_name);
+    }
+    else {
+      printWarn("SoC detection failed using device tree");
+    }
+  }
+
+  if(soc->soc_model == SOC_MODEL_UNKNOWN) {
+    // raw_name might not be NULL, but if we were unable to find
+    // the exact SoC, just print "Unkwnown"
+    soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+    snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+  }
+
+  return soc;
+}
--- a/src/riscv/soc.h
+++ b/src/riscv/soc.h
@@ -0,0 +1,10 @@
+#ifndef __SOC_RISCV__
+#define __SOC_RISCV__
+
+#include "../common/soc.h"
+#include "../common/cpu.h"
+#include <stdint.h>
+
+struct system_on_chip* get_soc(void);
+
+#endif
--- a/src/riscv/socs.h
+++ b/src/riscv/socs.h
@@ -0,0 +1,25 @@
+#ifndef __SOCS__
+#define __SOCS__
+
+#include "soc.h"
+
+// List of supported SOCs
+enum {
+  // SIFIVE
+  SOC_SIFIVE_U740,
+  // STARFIVE
+  SOC_STARFIVE_VF2,
+  // ALLWINNER
+  SOC_ALLWINNER_D1H,
+  // UNKNOWN
+  SOC_MODEL_UNKNOWN
+};
+
+inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
+  if(soc >= SOC_SIFIVE_U740 && soc <= SOC_SIFIVE_U740) return SOC_VENDOR_SIFIVE;
+  if(soc >= SOC_STARFIVE_VF2 && soc <= SOC_STARFIVE_VF2) return SOC_VENDOR_STARFIVE;
+  if(soc >= SOC_ALLWINNER_D1H && soc <= SOC_ALLWINNER_D1H) return SOC_VENDOR_ALLWINNER;
+  return SOC_VENDOR_UNKNOWN;
+}
+
+#endif
--- a/src/riscv/uarch.c
+++ b/src/riscv/uarch.c
@@ -0,0 +1,84 @@
+#include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "uarch.h"
+#include "../common/global.h"
+
+typedef uint32_t MICROARCH;
+
+struct uarch {
+  MICROARCH uarch;
+  char* uarch_str;
+  char* cpuinfo_str;
+};
+
+enum {
+  UARCH_UNKNOWN,
+  // SIFIVE
+  UARCH_U54,
+  UARCH_U74,
+  // THEAD
+  UARCH_C906,
+  UARCH_C910
+};
+
+#define UARCH_START if (false) {}
+#define CHECK_UARCH(arch, cpu, cpuinfo_str, uarch_str, str, uarch, vendor) \
+   else if (strcmp(cpuinfo_str, uarch_str) == 0) fill_uarch(arch, cpu, str, uarch, vendor);
+#define UARCH_END else { printBug("Unknown microarchitecture detected: uarch='%s'", cpuinfo_str); fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN); }
+
+void fill_uarch(struct uarch* arch, struct cpuInfo* cpu, char* str, MICROARCH u, VENDOR vendor) {
+  arch->uarch = u;
+  cpu->cpu_vendor = vendor;
+  arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1));
+  strcpy(arch->uarch_str, str);
+}
+
+// https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/riscv/cpus.yaml
+// SiFive: https://www.sifive.com/risc-v-core-ip
+// T-Head: https://www.t-head.cn/product/c906
+struct uarch* get_uarch_from_cpuinfo_str(char* cpuinfo_str, struct cpuInfo* cpu) {
+  struct uarch* arch = emalloc(sizeof(struct uarch));
+  arch->cpuinfo_str = cpuinfo_str;
+  if(cpuinfo_str == NULL) {
+    printWarn("get_uarch_from_cpuinfo: Unable to detect microarchitecture, cpuinfo_str is NULL");
+    fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN);
+    return arch;
+  }
+
+  // U74/U74-MC:
+  // SiFive says that U74-MC is "Multicore: four U74 cores and one S76 core" while
+  // U74 is "High performance Linux-capable processor". It's like U74-MC is somehow a small SoC containing
+  // the U74 and the S76? Then U74-MC is not a microarchitecture per se...
+  UARCH_START
+  CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,bullet0", "U74",         UARCH_U74, CPU_VENDOR_SIFIVE) // bullet0 is present in U740, which has U74
+  // CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,e5",      "XXXXXX",      UARCH_U74, CPU_VENDOR_SIFIVE)
+  // CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,e7",      "XXXXXX",      UARCH_U74, CPU_VENDOR_SIFIVE)
+  // CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,e71",     "XXXXXX",      UARCH_U74, CPU_VENDOR_SIFIVE)
+  // CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,rocket0", "XXXXXX",      UARCH_U74, CPU_VENDOR_SIFIVE)
+  // CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u5",      "XXXXXX",      UARCH_U74, CPU_VENDOR_SIFIVE)
+  CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u54",     "U54",         UARCH_U54,  CPU_VENDOR_SIFIVE)
+  // CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u7",      "XXXXXX",      UARCH_U74, CPU_VENDOR_SIFIVE)
+  CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u74",     "U74",         UARCH_U74,  CPU_VENDOR_SIFIVE)
+  CHECK_UARCH(arch, cpu, cpuinfo_str, "sifive,u74-mc",  "U74",         UARCH_U74,  CPU_VENDOR_SIFIVE)
+  CHECK_UARCH(arch, cpu, cpuinfo_str, "thead,c906",     "T-Head C906", UARCH_C906, CPU_VENDOR_THEAD)
+  CHECK_UARCH(arch, cpu, cpuinfo_str, "thead,c910",     "T-Head C910", UARCH_C910, CPU_VENDOR_THEAD)
+  UARCH_END
+
+  return arch;
+}
+
+char* get_str_uarch(struct cpuInfo* cpu) {
+  return cpu->arch->uarch_str;
+}
+
+char* get_arch_cpuinfo_str(struct cpuInfo* cpu) {
+  return cpu->arch->cpuinfo_str;
+}
+
+void free_uarch_struct(struct uarch* arch) {
+  free(arch->uarch_str);
+  free(arch);
+}
--- a/src/riscv/uarch.h
+++ b/src/riscv/uarch.h
@@ -0,0 +1,14 @@
+#ifndef __UARCH__
+#define __UARCH__
+
+#include <stdint.h>
+#include "riscv.h"
+
+struct uarch;
+
+char* get_arch_cpuinfo_str(struct cpuInfo* cpu);
+char* get_str_uarch(struct cpuInfo* cpu);
+void free_uarch_struct(struct uarch* arch);
+struct uarch* get_uarch_from_cpuinfo_str(char* cpuinfo_str, struct cpuInfo* cpu);
+
+#endif
--- a/src/riscv/udev.c
+++ b/src/riscv/udev.c
@@ -0,0 +1,91 @@
+#include <errno.h>
+#include <string.h>
+
+#include "../common/global.h"
+#include "udev.h"
+
+#define _PATH_DEVTREE          "/proc/device-tree/compatible"
+#define CPUINFO_UARCH_STR      "uarch\t\t: "
+#define CPUINFO_EXTENSIONS_STR "isa\t\t: "
+#define DEVTREE_HARDWARE_FIELD 0
+
+char* get_field_from_devtree(int DEVTREE_FIELD) {
+  int filelen;
+  char* buf;
+  if((buf = read_file(_PATH_DEVTREE, &filelen)) == NULL) {
+    printWarn("read_file: %s: %s", _PATH_DEVTREE, strerror(errno));
+    return NULL;
+  }
+
+  // Here we would use strstr to find the comma.
+  // However, the device-tree file may contain NULL
+  // bytes in the middle of the string, which would
+  // cause strstr to return NULL even when there might
+  // be an occurence after the NULL byte
+  //
+  // We iterate the string backwards to find the field
+  // in position n-DEVTREE_HARDWARE_FIELD where n
+  // is the number of fields.
+  int i=0;
+  char* tmp1 = buf+filelen-1;
+  do {
+    tmp1--;
+    if(*tmp1 == ',') i++;
+  } while(tmp1 != buf && i <= DEVTREE_FIELD);
+
+  if(tmp1 == buf) {
+    printWarn("get_field_from_devtree: Unable to find field %d", DEVTREE_FIELD);
+    return NULL;
+  }
+
+  tmp1++;
+  int strlen = filelen-(tmp1-buf);
+  char* hardware = emalloc(sizeof(char) * strlen);
+  memset(hardware, 0, sizeof(char) * strlen);
+  strncpy(hardware, tmp1, strlen-1);
+
+  return hardware;
+}
+
+char* parse_cpuinfo_field(char* field_str) {
+  int filelen;
+  char* buf;
+  if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
+    printWarn("read_file: %s: %s", _PATH_CPUINFO, strerror(errno));
+    return NULL;
+  }
+
+  char* tmp = strstr(buf, field_str);
+  if(tmp == NULL) {
+    printWarn("parse_cpuinfo_field: Unable to find field %s", field_str);
+    return NULL;
+  }
+
+  tmp += strlen(field_str);
+  char* end = strstr(tmp, "\n");
+
+  if(end == NULL) {
+    printWarn("parse_cpuinfo_field: Unable to find newline after field %s", field_str);
+    return NULL;
+  }
+
+  int ret_strlen = (end-tmp);
+  char* ret = emalloc(sizeof(char) * (ret_strlen+1));
+  memset(ret, 0, sizeof(char) * (ret_strlen+1));
+  strncpy(ret, tmp, ret_strlen);
+
+  return ret;
+}
+
+char* get_hardware_from_devtree(void) {
+  return get_field_from_devtree(DEVTREE_HARDWARE_FIELD);
+}
+
+char* get_uarch_from_cpuinfo(void) {
+  return parse_cpuinfo_field(CPUINFO_UARCH_STR);
+}
+
+char* get_extensions_from_cpuinfo(void) {
+  return parse_cpuinfo_field(CPUINFO_EXTENSIONS_STR);
+}
+
--- a/src/riscv/udev.h
+++ b/src/riscv/udev.h
@@ -0,0 +1,12 @@
+#ifndef __UDEV_RISCV__
+#define __UDEV_RISCV__
+
+#include "../common/udev.h"
+
+#define UNKNOWN -1
+
+char* get_hardware_from_devtree(void);
+char* get_uarch_from_cpuinfo(void);
+char* get_extensions_from_cpuinfo(void);
+
+#endif
--- a/src/x86/apic.c
+++ b/src/x86/apic.c
@@ -7,8 +7,6 @@
 #elif defined __FreeBSD__
  #include <sys/param.h>
  #include <sys/cpuset.h>
-#elif defined __APPLE__
-  #define UNUSED(x) (void)(x)
 #endif

 #include <stdlib.h>
@@ -102,6 +100,61 @@ bool bind_to_cpu(int cpu_id) {
 }
 #endif

+#ifdef __linux__
+int get_total_cores_module(int total_cores, int module) {
+  int total_modules = 2;
+  int32_t current_module_idx = -1;
+  bool end = false;
+  int32_t* core_types = emalloc(sizeof(uint32_t) * total_modules);
+  for(int i=0; i < total_modules; i++) core_types[i] = -1;
+  int cores_in_module = 0;
+  int i = 0;
+
+  // Get the original mask to restore it later
+  cpu_set_t original_mask;
+  if(sched_getaffinity(0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_getaffinity: %s", strerror(errno));
+    return false;
+  }
+
+  while(!end) {
+    if(!bind_to_cpu(i)) {
+      return -1;
+    }
+    uint32_t eax = 0x0000001A;
+    uint32_t ebx = 0;
+    uint32_t ecx = 0;
+    uint32_t edx = 0;
+    cpuid(&eax, &ebx, &ecx, &edx);
+    int32_t core_type = eax >> 24 & 0xFF;
+    bool found = false;
+
+    for(int j=0; j < total_modules && !found; j++) {
+      if(core_types[j] == core_type) found = true;
+    }
+    if(!found) {
+      current_module_idx++;
+      core_types[current_module_idx] = core_type;
+    }
+    if(current_module_idx == module) {
+      cores_in_module++;
+      if(i+1 == total_cores) end = true;
+    }
+    else if(cores_in_module > 0) end = true;
+    i++;
+  }
+
+  // Reset the original affinity
+  if (sched_setaffinity (0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_setaffinity: %s", strerror(errno));
+    return false;
+  }
+
+  //printf("Module %d has %d cores\n", module, cores_in_module);
+  return cores_in_module;
+}
+#endif
+
 bool fill_topo_masks_apic(struct topology* topo) {
  uint32_t eax = 0x00000001;
  uint32_t ebx = 0;
@@ -197,14 +250,14 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
  uint32_t max = 0;

  for(int i=0; i < topo->cach->max_cache_level; i++) {
-    for(int j=0; j < topo->total_cores; j++) {
+    for(int j=0; j < topo->total_cores_module; j++) {
      if(cache_id_apic[j][i] > max) max = cache_id_apic[j][i];
    }
  }

  max++;
-  if(max > (uint32_t) topo->total_cores) return max;
-  return topo->total_cores;
+  if(max > (uint32_t) topo->total_cores_module) return max;
+  return topo->total_cores_module;
 }

 bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
@@ -219,18 +272,18 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
  memset(apic_id, 0, sizeof(uint32_t) * size);

  // System topology
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
    sockets[apic_pkg[i]] = 1;
    smt[apic_smt[i]] = 1;
  }
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
    if(sockets[i] != 0)
      topo->sockets++;
    if(smt[i] != 0)
      topo->smt_available++;
  }

-  topo->logical_cores = topo->total_cores / topo->sockets;
+  topo->logical_cores = topo->total_cores_module / topo->sockets;
  topo->physical_cores = topo->logical_cores / topo->smt_available;

  // Cache topology
@@ -238,7 +291,7 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
    num_caches = 0;
    memset(apic_id, 0, sizeof(uint32_t) * size);

-    for(int c=0; c < topo->total_cores; c++) {
+    for(int c=0; c < topo->total_cores_module; c++) {
      apic_id[cache_id_apic[c][i]]++;
    }
    for(uint32_t c=0; c < size; c++) {
@@ -297,9 +350,10 @@ void add_apic_to_array(uint32_t apic, uint32_t* apic_ids, int n) {
  }
 }

-bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
+bool fill_apic_ids(uint32_t* apic_ids, int first_core, int n, bool x2apic_id) {
 #ifdef __APPLE__
  // macOS extremely dirty approach...
+  UNUSED(first_core);
  printf("cpufetch is computing APIC IDs, please wait...\n");
  bool end = false;
  uint32_t apic;
@@ -322,12 +376,12 @@ bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
  }
  #endif

-  for(int i=0; i < n; i++) {
+  for(int i=first_core; i < first_core+n; i++) {
    if(!bind_to_cpu(i)) {
      printErr("Failed binding the process to CPU %d", i);
      return false;
    }
-    apic_ids[i] = get_apic_id(x2apic_id);
+    apic_ids[i-first_core] = get_apic_id(x2apic_id);
  }

  #ifdef __linux__
@@ -344,12 +398,12 @@ bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {

 bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
  uint32_t apic_id;
-  uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
-  uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
+  uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores_module);
+  uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores_module);
  bool x2apic_id;

  if(cpu->maxLevels >= 0x0000000B) {
@@ -367,7 +421,7 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
    x2apic_id = false;
  }

-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
    cache_smt_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
    cache_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
  }
@@ -385,10 +439,10 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {

  get_cache_topology_from_apic(topo);

-  if(!fill_apic_ids(apic_ids, topo->total_cores, x2apic_id))
+  if(!fill_apic_ids(apic_ids, cpu->first_core_id, topo->total_cores_module, x2apic_id))
    return false;

-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
    apic_id = apic_ids[i];

    apic_pkg[i] = (apic_id & topo->apic->pkg_mask) >> topo->apic->pkg_mask_shift;
@@ -404,20 +458,19 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
  /* DEBUG
  for(int i=0; i < topo->cach->max_cache_level; i++) {
    printf("[CACH %1d]", i);
-    for(int j=0; j < topo->total_cores; j++)
+    for(int j=0; j < topo->total_cores_module; j++)
      printf("[%03d]", cache_id_apic[j][i]);
    printf("\n");
  }
-  for(int i=0; i < topo->total_cores; i++)
+  for(int i=0; i < topo->total_cores_module; i++)
    printf("[%2d] 0x%.8X\n", i, apic_pkg[i]);
  printf("\n");
-  for(int i=0; i < topo->total_cores; i++)
+  for(int i=0; i < topo->total_cores_module; i++)
    printf("[%2d] 0x%.8X\n", i, apic_core[i]);
  printf("\n");
-  for(int i=0; i < topo->total_cores; i++)
+  for(int i=0; i < topo->total_cores_module; i++)
    printf("[%2d] 0x%.8X\n", i, apic_smt[i]);*/

-
  bool ret = build_topo_from_apic(apic_pkg, apic_smt, cache_id_apic, topo);

  // Assumption: If we cant get smt_available, we assume it is equal to smt_supported...
@@ -429,7 +482,7 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
  free(apic_pkg);
  free(apic_core);
  free(apic_smt);
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
    free(cache_smt_id_apic[i]);
    free(cache_id_apic[i]);
  }
--- a/src/x86/apic.h
+++ b/src/x86/apic.h
@@ -21,4 +21,8 @@ uint32_t is_smt_enabled_amd(struct topology* topo);
 bool bind_to_cpu(int cpu_id);
 #endif

+#ifdef __linux__
+int get_total_cores_module(int total_cores, int module);
+#endif
+
 #endif
--- a/src/x86/cpuid.c
+++ b/src/x86/cpuid.c
@@ -30,6 +30,7 @@ static const char *hv_vendors_string[] = {
  [HV_VENDOR_VMWARE]    = "VMwareVMware",
  [HV_VENDOR_XEN]       = "XenVMMXenVMM",
  [HV_VENDOR_PARALLELS] = "lrpepyh vr",
+  [HV_VENDOR_PHYP]      = NULL
 };

 static char *hv_vendors_name[] = {
@@ -39,11 +40,10 @@ static char *hv_vendors_name[] = {
  [HV_VENDOR_VMWARE]    = "VMware",
  [HV_VENDOR_XEN]       = "Xen",
  [HV_VENDOR_PARALLELS] = "Parallels",
+  [HV_VENDOR_PHYP]      = "pHyp",
  [HV_VENDOR_INVALID]   = STRING_UNKNOWN
 };

-#define HYPERVISOR_NAME_MAX_LENGTH 17
-
 #define MASK 0xFF

 /*
@@ -70,7 +70,7 @@ void get_name_cpuid(char* name, uint32_t reg1, uint32_t reg2, uint32_t reg3) {
  name[c++] = (reg3>>24) & MASK;
 }

-char* get_str_cpu_name_internal() {
+char* get_str_cpu_name_internal(void) {
  uint32_t eax = 0;
  uint32_t ebx = 0;
  uint32_t ecx = 0;
@@ -179,7 +179,7 @@ struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
  return get_uarch_from_cpuid(cpu, eax, efamily, family, emodel, model, (int)stepping);
 }

-int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t max_freq, bool accurate_pp) {
+int64_t get_peak_performance(struct cpuInfo* cpu, bool accurate_pp) {
  /*
   * PP = PeakPerformance
   * SP = SinglePrecision
@@ -192,34 +192,42 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t
   * 16(If AVX512), 8(If AVX), 4(If SSE) *
   */

+  struct cpuInfo* ptr = cpu;
+  int64_t total_flops = 0;
+
+  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    struct topology* topo = ptr->topo;
+    int64_t max_freq = get_freq(ptr->freq);
+
    int64_t freq;
-#ifdef __linux__
+  #ifdef __linux__
    if(accurate_pp)
-    freq = measure_frequency(cpu);
+      freq = measure_frequency(ptr);
    else
      freq = max_freq;
-#else
+  #else
    // Silence compiler warning
    (void)(accurate_pp);
    freq = max_freq;
-#endif
+  #endif

    //First, check we have consistent data
    if(freq == UNKNOWN_DATA || topo->logical_cores == UNKNOWN_DATA) {
      return -1;
    }

-  struct features* feat = cpu->feat;
-  int vpus = get_number_of_vpus(cpu);
+    struct features* feat = ptr->feat;
+    int vpus = get_number_of_vpus(ptr);
    int64_t flops = topo->physical_cores * topo->sockets * (freq*1000000) * vpus;

    if(feat->FMA3 || feat->FMA4)
      flops = flops*2;

-  // Ice Lake has AVX512, but it has 1 VPU for AVX512, while
-  // it has 2 for AVX2. If this is a Ice Lake CPU, we are computing
-  // the peak performance supposing AVX2, not AVX512
-  if(feat->AVX512 && vpus_are_AVX512(cpu))
+    // NOTE:
+    // Some CPUs (Ice Lake, Zen 4) have AVX512, but they have only
+    // 1 VPU for AVX512, while they have 2 for AVX2. In such cases,
+    // we are computing the peak performance supposing AVX2, not AVX512
+    if(feat->AVX512 && vpus_are_AVX512(ptr))
      flops = flops*16;
    else if(feat->AVX || feat->AVX2)
      flops = flops*8;
@@ -228,10 +236,13 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t

    // See https://sites.utexas.edu/jdm4372/2018/01/22/a-peculiar-
    // throughput-limitation-on-intels-xeon-phi-x200-knights-landing/
-  if(is_knights_landing(cpu))
+    if(is_knights_landing(ptr))
      flops = flops * 6 / 7;

-  return flops;
+    total_flops += flops;
+  }
+
+  return total_flops;
 }

 struct hypervisor* get_hp_info(bool hv_present) {
@@ -250,6 +261,11 @@ struct hypervisor* get_hp_info(bool hv_present) {

  cpuid(&eax, &ebx, &ecx, &edx);

+  if(ebx == 0x0 && ecx == 0x0 && edx == 0x0) {
+    hv->hv_vendor = HV_VENDOR_INVALID;
+    printWarn("Hypervisor vendor is empty");
+  }
+  else {
    char name[13];
    memset(name, 0, 13);
    get_name_cpuid(name, ebx, ecx, edx);
@@ -258,7 +274,7 @@ struct hypervisor* get_hp_info(bool hv_present) {
    uint8_t len = sizeof(hv_vendors_string) / sizeof(hv_vendors_string[0]);

    for(uint8_t v=0; v < len && !found; v++) {
-    if(strcmp(hv_vendors_string[v], name) == 0) {
+      if(hv_vendors_string[v] != NULL && strcmp(hv_vendors_string[v], name) == 0) {
        hv->hv_vendor = v;
        found = true;
      }
@@ -266,7 +282,8 @@ struct hypervisor* get_hp_info(bool hv_present) {

    if(!found) {
      hv->hv_vendor = HV_VENDOR_INVALID;
-    printWarn("Unknown hypervisor vendor: %s", name);
+      printBug("Unknown hypervisor vendor: %s", name);
+    }
  }

  hv->hv_name = hv_vendors_name[hv->hv_vendor];
@@ -274,51 +291,19 @@ struct hypervisor* get_hp_info(bool hv_present) {
  return hv;
 }

-struct cpuInfo* get_cpu_info() {
-  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
-  struct features* feat = emalloc(sizeof(struct features));
-  cpu->feat = feat;
-  cpu->peak_performance = -1;
-  cpu->topo = NULL;
-  cpu->cach = NULL;
-
-  bool *ptr = &(feat->AES);
-  for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
-    *ptr = false;
-  }
-
+struct features* get_features_info(struct cpuInfo* cpu) {
  uint32_t eax = 0;
  uint32_t ebx = 0;
  uint32_t ecx = 0;
  uint32_t edx = 0;

-  //Get max cpuid level
-  cpuid(&eax, &ebx, &ecx, &edx);
-  cpu->maxLevels = eax;
+  struct features* feat = emalloc(sizeof(struct features));

-  //Fill vendor
-  char name[13];
-  memset(name,0,13);
-  get_name_cpuid(name, ebx, edx, ecx);
-
-  if(strcmp(CPU_VENDOR_INTEL_STRING,name) == 0)
-    cpu->cpu_vendor = CPU_VENDOR_INTEL;
-  else if (strcmp(CPU_VENDOR_AMD_STRING,name) == 0)
-    cpu->cpu_vendor = CPU_VENDOR_AMD;
-  else {
-    cpu->cpu_vendor = CPU_VENDOR_INVALID;
-    printErr("Unknown CPU vendor: %s", name);
-    return NULL;
+  bool *ptr = &(feat->AES);
+  for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
+    *ptr = false;
  }

-  //Get max extended level
-  eax = 0x80000000;
-  ebx = 0;
-  ecx = 0;
-  edx = 0;
-  cpuid(&eax, &ebx, &ecx, &edx);
-  cpu->maxExtendedLevels = eax;
-
  //Fill instructions support
  if (cpu->maxLevels >= 0x00000001){
    eax = 0x00000001;
@@ -373,6 +358,126 @@ struct cpuInfo* get_cpu_info() {
    printWarn("Can't read features information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000001, cpu->maxExtendedLevels);
  }

+  return feat;
+}
+
+bool set_cpu_module(int m, int total_modules, int32_t* first_core) {
+  if(total_modules > 1) {
+    #ifdef __APPLE__
+    UNUSED(m);
+    printBug("Hybrid architectures are not supported under macOS");
+    return false;
+    #else
+    // We have a hybrid architecture.
+    // 1. Find the first core from module m
+    int32_t core_id = -1;
+    int32_t currrent_module_idx = -1;
+    int32_t* core_types = emalloc(sizeof(uint32_t) * total_modules);
+    for(int i=0; i < total_modules; i++) core_types[i] = -1;
+    int i = 0;
+
+    while(core_id == -1) {
+      if(!bind_to_cpu(i)) {
+        return false;
+      }
+      uint32_t eax = 0x0000001A;
+      uint32_t ebx = 0;
+      uint32_t ecx = 0;
+      uint32_t edx = 0;
+      cpuid(&eax, &ebx, &ecx, &edx);
+      int32_t core_type = eax >> 24 & 0xFF;
+      bool found = false;
+
+      for(int j=0; j < total_modules && !found; j++) {
+        if(core_types[j] == core_type) found = true;
+      }
+      if(!found) {
+        currrent_module_idx++;
+        core_types[currrent_module_idx] = core_type;
+        if(currrent_module_idx == m) {
+          core_id = i;
+        }
+      }
+
+      i++;
+    }
+
+    *first_core = core_id;
+
+    //printf("Module %d: Core %d\n", m, core_id);
+    // 2. Now bind to that core
+    if(!bind_to_cpu(core_id)) {
+      return false;
+    }
+    #endif
+  }
+  else {
+    // This is a normal architecture
+    *first_core = 0;
+  }
+
+  return true;
+}
+
+int32_t get_core_type(void) {
+  uint32_t eax = 0x0000001A;
+  uint32_t ebx = 0;
+  uint32_t ecx = 0;
+  uint32_t edx = 0;
+
+  eax = 0x0000001A;
+  cpuid(&eax, &ebx, &ecx, &edx);
+
+  int32_t type = eax >> 24 & 0xFF;
+  if(type == 0x20) return CORE_TYPE_EFFICIENCY;
+  else if(type == 0x40) return CORE_TYPE_PERFORMANCE;
+  else {
+    printErr("Found invalid core type: 0x%.8X\n", type);
+    return CORE_TYPE_UNKNOWN;
+  }
+}
+
+struct cpuInfo* get_cpu_info(void) {
+  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
+  cpu->peak_performance = -1;
+  cpu->next_cpu = NULL;
+  cpu->topo = NULL;
+  cpu->cach = NULL;
+  cpu->feat = NULL;
+
+  uint32_t modules = 1;
+  uint32_t eax = 0;
+  uint32_t ebx = 0;
+  uint32_t ecx = 0;
+  uint32_t edx = 0;
+
+  //Get max cpuid level
+  cpuid(&eax, &ebx, &ecx, &edx);
+  cpu->maxLevels = eax;
+
+  //Fill vendor
+  char name[13];
+  memset(name,0,13);
+  get_name_cpuid(name, ebx, edx, ecx);
+
+  if(strcmp(CPU_VENDOR_INTEL_STRING,name) == 0)
+    cpu->cpu_vendor = CPU_VENDOR_INTEL;
+  else if (strcmp(CPU_VENDOR_AMD_STRING,name) == 0)
+    cpu->cpu_vendor = CPU_VENDOR_AMD;
+  else {
+    cpu->cpu_vendor = CPU_VENDOR_INVALID;
+    printErr("Unknown CPU vendor: %s", name);
+    return NULL;
+  }
+
+  //Get max extended level
+  eax = 0x80000000;
+  ebx = 0;
+  ecx = 0;
+  edx = 0;
+  cpuid(&eax, &ebx, &ecx, &edx);
+  cpu->maxExtendedLevels = eax;
+
  if (cpu->maxExtendedLevels >= 0x80000004){
    cpu->cpu_name = get_str_cpu_name_internal();
  }
@@ -389,19 +494,66 @@ struct cpuInfo* get_cpu_info() {
    cpu->topology_extensions = (ecx >> 22) & 1;
  }

+  cpu->hybrid_flag = false;
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL && cpu->maxLevels >= 0x00000007) {
+    eax = 0x00000007;
+    ecx = 0x00000000;
+    cpuid(&eax, &ebx, &ecx, &edx);
+    cpu->hybrid_flag = (edx >> 15) & 0x1;
+  }
+
+  if(cpu->hybrid_flag) modules = 2;
+
+  struct cpuInfo* ptr = cpu;
+  for(uint32_t i=0; i < modules; i++) {
+    int32_t first_core;
+    set_cpu_module(i, modules, &first_core);
+
+    if(i > 0) {
+      ptr->next_cpu = emalloc(sizeof(struct cpuInfo));
+      ptr = ptr->next_cpu;
+      ptr->next_cpu = NULL;
+      ptr->peak_performance = -1;
+      ptr->topo = NULL;
+      ptr->cach = NULL;
+      ptr->feat = NULL;
+      // We assume that this cores have the
+      // same cpuid capabilities
+      ptr->cpu_vendor = cpu->cpu_vendor;
+      ptr->maxLevels = cpu->maxLevels;
+      ptr->maxExtendedLevels = cpu->maxExtendedLevels;
+      ptr->hybrid_flag = cpu->hybrid_flag;
+    }
+
+    if(cpu->hybrid_flag) {
+      // Detect core type
+      eax = 0x0000001A;
+      cpuid(&eax, &ebx, &ecx, &edx);
+      ptr->core_type = get_core_type();
+    }
+    ptr->first_core_id = first_core;
+    ptr->feat = get_features_info(ptr);
+
    // If any field of the struct is NULL,
    // return inmideately, as further functions
    // require valid fields (cach, topo, etc)
-  cpu->arch = get_cpu_uarch(cpu);
-  cpu->freq = get_frequency_info(cpu);
+    ptr->arch = get_cpu_uarch(ptr);
+    ptr->freq = get_frequency_info(ptr);

-  cpu->cach = get_cache_info(cpu);
-  if(cpu->cach == NULL) return cpu;
+    ptr->cach = get_cache_info(ptr);
+    if(ptr->cach == NULL) return cpu;

-  cpu->topo = get_topology_info(cpu, cpu->cach);
+    if(cpu->hybrid_flag) {
+      ptr->topo = get_topology_info(ptr, ptr->cach, i);
+    }
+    else {
+      ptr->topo = get_topology_info(ptr, ptr->cach, -1);
+    }
    if(cpu->topo == NULL) return cpu;
+  }

-  cpu->peak_performance = get_peak_performance(cpu, cpu->topo, get_freq(cpu->freq), accurate_pp());
+  cpu->num_cpus = modules;
+  cpu->peak_performance = get_peak_performance(cpu, accurate_pp());

  return cpu;
 }
@@ -480,6 +632,7 @@ bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
  return true;
 }

+#ifdef __linux__
 void get_topology_from_udev(struct topology* topo) {
  // TODO: To be improved in the future
  topo->total_cores = get_ncores_from_cpuinfo();
@@ -489,10 +642,11 @@ void get_topology_from_udev(struct topology* topo) {
  topo->smt_supported = 1;
  topo->sockets = 1;
 }
+#endif

 // Main reference: https://software.intel.com/content/www/us/en/develop/articles/intel-64-architecture-processor-topology-enumeration.html
 // Very interesting resource: https://wiki.osdev.org/Detecting_CPU_Topology_(80x86)
-struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach) {
+struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int module) {
  struct topology* topo = emalloc(sizeof(struct topology));
  init_topology_struct(topo, cach);

@@ -516,6 +670,18 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach) {
    }
  #endif

+  if(cpu->hybrid_flag) {
+    #ifdef __linux__
+      topo->total_cores_module = get_total_cores_module(topo->total_cores, module);
+    #else
+      UNUSED(module);
+      topo->total_cores_module = topo->total_cores;
+    #endif
+  }
+  else {
+    topo->total_cores_module = topo->total_cores;
+  }
+
  switch(cpu->cpu_vendor) {
    case CPU_VENDOR_INTEL:
      if (cpu->maxLevels >= 0x00000004) {
@@ -919,17 +1085,37 @@ void print_debug(struct cpuInfo* cpu) {
  if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
    printf("- AMD topology extensions: %d\n", cpu->topology_extensions);
  }
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
+    printf("- Hybrid Flag: %d\n", cpu->hybrid_flag);
+  }
  printf("- CPUID dump: 0x%.8X\n", eax);

  free_cpuinfo_struct(cpu);
 }

-// TODO: Query HV and Xeon Phi levels
+void print_raw_level(uint32_t reg) {
+  uint32_t eax = reg;
+  uint32_t ebx = 0;
+  uint32_t ecx = 0;
+  uint32_t edx = 0;
+
+  cpuid(&eax, &ebx, &ecx, &edx);
+
+  printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
+}
+
+void print_raw_sublevel(uint32_t reg, uint32_t reg2) {
+  uint32_t eax = reg;
+  uint32_t ebx = 0;
+  uint32_t ecx = reg2;
+  uint32_t edx = 0;
+
+  cpuid(&eax, &ebx, &ecx, &edx);
+
+  printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
+}
+
 void print_raw(struct cpuInfo* cpu) {
-  uint32_t eax;
-  uint32_t ebx;
-  uint32_t ecx;
-  uint32_t edx;
  printf("%s\n\n", cpu->cpu_name);
  printf("  CPUID leaf sub   EAX        EBX        ECX        EDX       \n");
  printf("--------------------------------------------------------------\n");
@@ -944,66 +1130,40 @@ void print_raw(struct cpuInfo* cpu) {

    printf("CPU %d:\n", c);

+    // Standard levels
    for(uint32_t reg=0x00000000; reg <= cpu->maxLevels; reg++) {
      if(reg == 0x00000004) {
        for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) {
-          eax = reg;
-          ebx = 0;
-          ecx = reg2;
-          edx = 0;
-
-          cpuid(&eax, &ebx, &ecx, &edx);
-
-          printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
+          print_raw_sublevel(reg, reg2);
        }
      }
      else if(reg == 0x0000000B) {
        for(uint32_t reg2=0x00000000; reg2 < cpu->topo->smt_supported; reg2++) {
-          eax = reg;
-          ebx = 0;
-          ecx = reg2;
-          edx = 0;
-
-          cpuid(&eax, &ebx, &ecx, &edx);
-
-          printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
+          print_raw_sublevel(reg, reg2);
        }
      }
      else {
-        eax = reg;
-        ebx = 0;
-        ecx = 0;
-        edx = 0;
-
-        cpuid(&eax, &ebx, &ecx, &edx);
-
-        printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
+        print_raw_level(reg);
      }
    }
+
+    // Hypervisor levels
+    for(uint32_t reg=0x40000000; reg <= 0x40000006; reg++) {
+      print_raw_level(reg);
+    }
+
+    // Extended levels
    for(uint32_t reg=0x80000000; reg <= cpu->maxExtendedLevels; reg++) {
      if(reg == 0x8000001D) {
        for(uint32_t reg2=0x00000000; reg2 < cpu->cach->max_cache_level; reg2++) {
-          eax = reg;
-          ebx = 0;
-          ecx = reg2;
-          edx = 0;
-
-          cpuid(&eax, &ebx, &ecx, &edx);
-
-          printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, reg2, eax, ebx, ecx, edx);
+          print_raw_sublevel(reg, reg2);
        }
      }
      else {
-        eax = reg;
-        ebx = 0;
-        ecx = 0;
-        edx = 0;
-
-        cpuid(&eax, &ebx, &ecx, &edx);
-
-        printf("  0x%.8X 0x%.2X: 0x%.8X 0x%.8X 0x%.8X 0x%.8X\n", reg, 0x00, eax, ebx, ecx, edx);
+        print_raw_level(reg);
      }
    }
+
  }
 }

--- a/src/x86/cpuid.h
+++ b/src/x86/cpuid.h
@@ -3,10 +3,10 @@

 #include "../common/cpu.h"

-struct cpuInfo* get_cpu_info();
+struct cpuInfo* get_cpu_info(void);
 struct cache* get_cache_info(struct cpuInfo* cpu);
 struct frequency* get_frequency_info(struct cpuInfo* cpu);
-struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach);
+struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int module);

 char* get_str_avx(struct cpuInfo* cpu);
 char* get_str_sse(struct cpuInfo* cpu);
--- a/src/x86/freq/freq.h
+++ b/src/x86/freq/freq.h
@@ -3,6 +3,7 @@

 #include <stdint.h>
 #include "../../common/cpu.h"
+#include "../../common/global.h"

 #define MEASURE_TIME_SECONDS         5
 #define LOOP_ITERS           100000000
--- a/src/x86/freq/freq_avx.c
+++ b/src/x86/freq/freq_avx.c
@@ -10,7 +10,8 @@
 #include <stdint.h>
 #include "freq.h"

-void* compute_avx() {
+void* compute_avx(void * pthread_arg) {
+  UNUSED(pthread_arg);
  bool end = false;

  struct timeval begin, now;
--- a/src/x86/freq/freq_avx.h
+++ b/src/x86/freq/freq_avx.h
@@ -1,6 +1,6 @@
 #ifndef __FREQ_AVX__
 #define __FREQ_AVX__

-void* compute_avx();
+void* compute_avx(void * pthread_arg);

 #endif
--- a/src/x86/freq/freq_avx512.c
+++ b/src/x86/freq/freq_avx512.c
@@ -10,7 +10,8 @@
 #include <stdint.h>
 #include "freq.h"

-void* compute_avx512() {
+void* compute_avx512(void * pthread_arg) {
+  UNUSED(pthread_arg);
  bool end = false;

  struct timeval begin, now;
--- a/src/x86/freq/freq_avx512.h
+++ b/src/x86/freq/freq_avx512.h
@@ -1,6 +1,6 @@
 #ifndef __FREQ_AVX512__
 #define __FREQ_AVX512__

-void* compute_avx512();
+void* compute_avx512(void * pthread_arg);

 #endif
--- a/src/x86/freq/freq_nov.c
+++ b/src/x86/freq/freq_nov.c
@@ -10,7 +10,8 @@
 #include <stdint.h>
 #include "freq.h"

-void* compute_nov() {
+void* compute_nov(void * pthread_arg) {
+  UNUSED(pthread_arg);
  bool end = false;

  struct timeval begin, now;
--- a/src/x86/freq/freq_nov.h
+++ b/src/x86/freq/freq_nov.h
@@ -1,6 +1,6 @@
 #ifndef __FREQ_NO_VECTOR__
 #define __FREQ_NO_VECTOR__

-void* compute_nov();
+void* compute_nov(void * pthread_arg);

 #endif
--- a/src/x86/uarch.c
+++ b/src/x86/uarch.c
@@ -79,7 +79,7 @@ enum {
  UARCH_GOLDMONT_PLUS,
  UARCH_TREMONT,
  UARCH_LAKEMONT,
-  UARCH_COFFE_LAKE,
+  UARCH_COFFEE_LAKE,
  UARCH_ITANIUM,
  UARCH_KNIGHTS_FERRY,
  UARCH_KNIGHTS_CORNER,
@@ -91,6 +91,7 @@ enum {
  UARCH_ICE_LAKE,
  UARCH_TIGER_LAKE,
  UARCH_ALDER_LAKE,
+  UARCH_RAPTOR_LAKE,
  // AMD //
  UARCH_AM486,
  UARCH_AM5X86,
@@ -109,7 +110,9 @@ enum {
  UARCH_ZEN,
  UARCH_ZEN_PLUS,
  UARCH_ZEN2,
-  UARCH_ZEN3
+  UARCH_ZEN3,
+  UARCH_ZEN3_PLUS,
+  UARCH_ZEN4
 };

 struct uarch {
@@ -225,22 +228,23 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
  CHECK_UARCH(arch, 0,  6,  8, 12, NA, "Tiger Lake",      UARCH_TIGER_LAKE,       10) // instlatx64
  CHECK_UARCH(arch, 0,  6,  8, 13, NA, "Tiger Lake",      UARCH_TIGER_LAKE,       10) // instlatx64
  // CHECK_UARCH(arch, 0,  6,  8, 14,  9, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
-  CHECK_UARCH(arch, 0,  6,  8, 14, 10, "Kaby Lake",       UARCH_KABY_LAKE,        14) // wikichip
+  // CHECK_UARCH(arch, 0,  6,  8, 14, 10, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
  CHECK_UARCH(arch, 0,  6,  8, 14, 11, "Whiskey Lake",    UARCH_WHISKEY_LAKE,     14) // wikichip
  CHECK_UARCH(arch, 0,  6,  8, 14, 12, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
  CHECK_UARCH(arch, 0,  6,  9,  6, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
-  CHECK_UARCH(arch, 0,  6,  9,  7, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // wikichip
-  CHECK_UARCH(arch, 0,  6,  9, 10, NA, "Tremont",         UARCH_TREMONT,          10) // instlatx64
+  CHECK_UARCH(arch, 0,  6,  9,  7, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // instlatx64 (Alder Lake-S)
+  CHECK_UARCH(arch, 0,  6,  9, 10, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // instlatx64 (Alder Lake-P)
  CHECK_UARCH(arch, 0,  6,  9, 12, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
  CHECK_UARCH(arch, 0,  6,  9, 13, NA, "Sunny Cove",      UARCH_SUNNY_COVE,       10) // LX*
  CHECK_UARCH(arch, 0,  6,  9, 14,  9, "Kaby Lake",       UARCH_KABY_LAKE,        14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 10, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 11, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 12, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 13, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 10, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 11, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 12, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 13, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
  CHECK_UARCH(arch, 0,  6, 10,  5, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
  CHECK_UARCH(arch, 0,  6, 10,  6, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // instlatx64.atw.hu (i7-10710U)
  CHECK_UARCH(arch, 0,  6, 10,  7, NA, "Rocket Lake",     UARCH_ROCKET_LAKE,      14) // instlatx64.atw.hu (i7-11700K)
+  CHECK_UARCH(arch, 0,  6, 11,  7, NA, "Raptor Lake",     UARCH_RAPTOR_LAKE,      10) // instlatx64.atw.hu (i5-13600K)
  CHECK_UARCH(arch, 0, 11,  0,  0, NA, "Knights Ferry",   UARCH_KNIGHTS_FERRY,    45) // found only on en.wikichip.org
  CHECK_UARCH(arch, 0, 11,  0,  1, NA, "Knights Corner",  UARCH_KNIGHTS_CORNER,   22)
  CHECK_UARCH(arch, 0, 15,  0,  0, NA, "Willamette",      UARCH_WILLAMETTE,      180)
@@ -257,7 +261,7 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
  return arch;
 }

-// iNApired in Todd Allen's decode_uarch_amd
+// Inspired in Todd Allen's decode_uarch_amd
 struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
  struct uarch* arch = emalloc(sizeof(struct uarch));

@@ -358,9 +362,13 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
  CHECK_UARCH(arch,  8, 15,  6,  0, NA, "Zen 2",       UARCH_ZEN2,         7) // undocumented, geekbench.com example
  CHECK_UARCH(arch,  8, 15,  6,  8, NA, "Zen 2",       UARCH_ZEN2,         7) // found on instlatx64
  CHECK_UARCH(arch,  8, 15,  7,  1, NA, "Zen 2",       UARCH_ZEN2,         7) // samples from Steven Noonan and instlatx64
+  CHECK_UARCH(arch,  8, 15,  9,  0,  2, "Zen 2",       UARCH_ZEN2,         7) // Steam Deck (instlatx64)
  CHECK_UARCH(arch, 10, 15,  0,  1, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  1,  1, NA, "Zen 4",       UARCH_ZEN4,         5) // instlatx64
  CHECK_UARCH(arch, 10, 15,  2,  1, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  4,  4, NA, "Zen 3+",      UARCH_ZEN3_PLUS,    6) // instlatx64 (they say it is Zen3...)
  CHECK_UARCH(arch, 10, 15,  5,  0, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  6,  1,  2, "Zen 4",       UARCH_ZEN4,         5) // instlatx64
  UARCH_END

  return arch;
@@ -370,6 +378,7 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
  if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
    if(dump == 0x000806E9) {
      // It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
+      // See issue https://github.com/Dr-Noob/cpufetch/issues/122
      struct uarch* arch = emalloc(sizeof(struct uarch));

      if(strstr(cpu->cpu_name, "Y") != NULL) {
@@ -381,6 +390,23 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t

      return arch;
    }
+    else if (dump == 0x000806EA) {
+      // It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
+      // See issue https://github.com/Dr-Noob/cpufetch/issues/149
+      struct uarch* arch = emalloc(sizeof(struct uarch));
+
+      if(strstr(cpu->cpu_name, "i5-8250U") != NULL ||
+         strstr(cpu->cpu_name, "i5-8350U") != NULL ||
+         strstr(cpu->cpu_name, "i7-8550U") != NULL ||
+         strstr(cpu->cpu_name, "i7-8650U") != NULL) {
+        fill_uarch(arch, "Kaby Lake", UARCH_KABY_LAKE, 14);
+      }
+      else {
+        fill_uarch(arch, "Coffee Lake", UARCH_COFFEE_LAKE, 14);
+      }
+
+      return arch;
+    }
    return get_uarch_from_cpuid_intel(ef, f, em, m, s);
  }
  else
@@ -388,7 +414,9 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
 }

 bool vpus_are_AVX512(struct cpuInfo* cpu) {
-  return cpu->arch->uarch != UARCH_ICE_LAKE && cpu->arch->uarch != UARCH_TIGER_LAKE;
+  return cpu->arch->uarch != UARCH_ICE_LAKE &&
+         cpu->arch->uarch != UARCH_TIGER_LAKE &&
+         cpu->arch->uarch != UARCH_ZEN4;
 }

 bool is_knights_landing(struct cpuInfo* cpu) {
@@ -408,7 +436,7 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
      case UARCH_ROCKET_LAKE:
      case UARCH_AMBER_LAKE:
      case UARCH_WHISKEY_LAKE:
-      case UARCH_COFFE_LAKE:
+      case UARCH_COFFEE_LAKE:
      case UARCH_PALM_COVE:

      case UARCH_KNIGHTS_LANDING:
@@ -416,10 +444,14 @@ int get_number_of_vpus(struct cpuInfo* cpu) {

      case UARCH_ICE_LAKE:
      case UARCH_TIGER_LAKE:
+      case UARCH_ALDER_LAKE:
+      case UARCH_RAPTOR_LAKE:

      // AMD
      case UARCH_ZEN2:
      case UARCH_ZEN3:
+      case UARCH_ZEN3_PLUS:
+      case UARCH_ZEN4:
        return 2;
      default:
        return 1;
@@ -431,6 +463,7 @@ bool choose_new_intel_logo_uarch(struct cpuInfo* cpu) {
    case UARCH_ALDER_LAKE:
    case UARCH_ROCKET_LAKE:
    case UARCH_TIGER_LAKE:
+    case UARCH_RAPTOR_LAKE:
      return true;
    default:
      return false;
Author	SHA1	Message	Date
Dr-Noob	b3719dc216	[v1.04] Bump version	2023-05-06 11:37:32 +02:00
Dr-Noob	7a3fd539c3	[v1.03][X86] Fix compilation warning under Windows	2023-05-06 11:30:14 +02:00
Dr-Noob	f6bf00e33d	[v1.03][X86] Refactor --raw. Add support for printing HV level	2023-05-06 11:14:46 +02:00
Dr-Noob	985bd6f25f	[v1.03][X86] Do not consider an empty HV as a bug	2023-05-06 11:02:37 +02:00
Dr-Noob	f599613f5e	[v1.03] Reuse same _PATH_CPUINFO definition	2023-05-06 10:19:39 +02:00
Dr-Noob	8a8b1dffa8	[v1.03] Apply refactoring in src/common/udev.c	2023-05-06 10:06:16 +02:00
Dr-Noob	8e95828fb1	[v1.03][PPC] Read frequency from cpuinfo if the default method fails	2023-05-04 19:01:55 +02:00
Dr-Noob	93f733cb12	[v1.03][PPC] Small update in PowerPC uarch table	2023-05-04 18:59:03 +02:00
Dr-Noob	0397db2fd8	[v1.03][PPC] Implement hypervisor detection in PowerPC	2023-05-04 18:56:31 +02:00
Dr-Noob	ebe7312c9d	[v1.03][PPC] Fix bug where /sys/devices/system/cpu/cpu*/topology/physical_package_id contains -1 by adding a new way of finding the number of sockets. This happened in #178 and most probably in #153 too	2023-05-03 17:51:44 +02:00
Dr-Noob	8c72295f47	[v1.03] Add PPC integrity check	2023-04-27 22:35:56 +02:00
Dr-Noob	bec47a44a7	[v1.03] Update README (PPC/macOS support was proved in #167 )	2023-04-24 17:58:58 +02:00
Dr-Noob	de638aba50	[v1.03][x86] Fix Zen4 peak performance calculation	2023-04-24 17:47:42 +02:00
Dr-Noob	5be6f8bba0	[v1.03][x86] Add AMD 9004 Series CPUID	2023-04-22 08:20:35 +02:00
Dr-Noob	10d4f67cdb	[v1.03] Fixing commit `99fd108`	2023-04-13 17:50:49 +02:00
Dr-Noob	5dd6ab60cb	[v1.03] Lets follow the function prototype rules	2023-04-13 17:45:32 +02:00
Dr-Noob	99fd108d0f	[v1.03] Try detecting SoC with nvmem in last place (avoids usless work in Android)	2023-04-13 17:41:32 +02:00
Dr-Noob	f28f3ef70d	[v1.03] Avoid segmentation fault when a Rockchip SoC is not found in socs.h	2023-04-13 17:37:14 +02:00
Dr-Noob	89aadeead8	[v1.03] Add common soc.c/.h for both ARM and RISC-V	2023-04-13 17:15:32 +02:00
Dr-Noob	f58d76ccac	[v1.03] Update help option and perform some formatting adjustments	2023-04-13 16:24:47 +02:00
Dr-Noob	889fbf2d67	[v1.03][RISCV] Fix bug in Makefile and implement --debug option	2023-04-13 15:49:06 +02:00
Dr-Noob	91cc04c653	[v1.03][RISCV] Merge RISC-V branch into main	2023-04-13 15:28:42 +02:00
Dr-Noob	05744f4e40	[v1.03][RISCV] Add support for RISCV extensions	2023-04-12 18:55:56 +02:00
Dr-Noob	4405a262ca	[v1.03][RISCV] Add some more uarchs	2023-04-12 16:23:23 +02:00
Dr-Noob	9e9828d210	[v1.03][RISCV] Improve SiFive logo and add SiFive color scheme	2023-04-08 12:41:44 +02:00
Dr-Noob	65bad8721e	[v1.03][RISCV] Add short/long variants for SiFive and StarFive ascii arts and fix StarFive long logo	2023-04-08 11:51:20 +02:00
Dr-Noob	13e86d7f14	[v1.03][RISCV] Add preeliminary uarch detection	2023-04-07 16:19:43 +02:00
Dr-Noob	69dd47bab0	[v1.03][RISCV] Search backwards in device-tree string	2023-04-07 15:24:33 +02:00
Dr-Noob	0ef08ef53e	[v1.03][RISCV] Add basic Allwinner support	2023-04-07 10:37:59 +02:00
Dr-Noob	2b4e675800	[v1.03][ARM] Add more Rockchip SoCs (fix)	2023-04-03 15:10:58 +02:00
Dr-Noob	30a2493ad9	[v1.03][RISCV] Add basic StarFive support	2023-04-03 14:08:58 +02:00
Dr-Noob	a496f694a6	[v1.03][RISCV] Add SiFive ascii art	2023-04-03 13:25:51 +02:00
Dr-Noob	14819c350e	[v1.03][RISCV] Add basic SoC detection backend	2023-04-03 12:41:59 +02:00
Dr-Noob	9a69a7f58d	[v1.03][RISCV] Implementing basic skeleton for RISC-V backend	2023-04-01 16:46:54 +02:00
Dr-Noob	1f450b23a1	[v1.03][RISCV] Add support for compiling to RISC-V	2023-03-31 17:57:01 +02:00
Dr-Noob	cf77360d1b	[v1.03][ARM] Add more Rockchip SoCs	2023-03-25 13:11:31 +01:00
Dr-Noob	dfa321d4f4	[v1.03][ARM] Reworking Rockchip logo and colors	2023-03-25 12:56:36 +01:00
Dr-Noob	522a1c6ddd	[v1.03][ARM] Add Rockchip logo and colors	2023-03-25 12:44:10 +01:00
Dr-Noob	994dc0334d	[v1.03][ARM] Implement new Rockchip detection based on efuse0	2023-03-25 12:02:31 +01:00
Dr-Noob	ec9b88cc7c	[v1.03] Acknowledge Allwinner contributors support	2023-03-25 11:12:42 +01:00
Dr-Noob	c3b5dd0eb0	[v1.03][ARM] Experimental feature: Show vendor logo even when the exact SoC model cannot be determined	2023-03-25 11:00:43 +01:00
Dr-Noob	eaee997945	[v1.03][ARM] Show Unknown SoC if no exact model is found instead of showing the raw name	2023-03-25 10:47:17 +01:00
Dr-Noob	5dced25745	[v1.03][ARM] Added more Allwinner SIDs	2023-03-12 12:29:37 +01:00
Dr-Noob	dc69a9f8a6	[v1.03][ARM] Fix Allwinner H2+/H3 confusion	2023-03-11 16:26:02 +01:00
Dr-Noob	3b54f62d62	[v1.03][ARM] Use SID to improve Allwinner SoC detection. Should help with #173	2023-03-11 12:02:16 +01:00
Dr-Noob	3296dc960e	[v1.03][ARM] Add Snapd 730G detection as reported by #174	2023-02-11 19:06:58 +01:00
Dr-Noob	be600728d7	[v1.03][X86] Fix freq functions argument to comply with what pthread expects	2023-01-29 09:30:30 +01:00
Dr-Noob	6eb2357485	[v1.03] Add void to function declarations with no args. C99 Standard says in 6.7.5.3 that empty arguments are actually obsolescent - this commit fixes a warning in some compilers	2023-01-29 09:25:07 +01:00
Dr-Noob	b0354e28ff	[v1.03] Fix compilation error due to FILE identifier not being found	2023-01-29 09:17:54 +01:00
Dr-Noob	687459961d	[v1.03][X86] Fix ambiguity in Kaby/Coffee Lake classification as noted by #149	2023-01-28 09:06:24 +01:00
Dr-Noob	07e920896b	[v1.03] Print version when reporting an error or bug (implements #172 )	2023-01-18 22:30:05 +01:00
Dr-Noob	57f11f3eab	[v1.03] Print git hash and tag when printing version	2023-01-18 20:31:49 +01:00
Dr-Noob	2b8a942a98	[v1.03] Merge bugfix branch to include Snapd patch	2023-01-17 18:41:12 +01:00
Dr-Noob	f960a97477	[v1.02][ARM] Fix bug in previous commit	2023-01-17 18:06:11 +01:00
Dr-Noob	ba8bbdd252	[v1.03][X86] Add support for new Intel chips in uarch	2023-01-12 18:46:09 +01:00
Dr-Noob	2fc4896429	[v1.03] Remove useless comparaison	2023-01-06 15:17:39 +01:00
Dr-Noob	095bbfb784	[v1.03] Fix build in macOS	2023-01-06 12:19:06 +01:00
Dr-Noob	874f89051a	[v1.03] Fix build in PPC	2023-01-06 11:05:19 +01:00
Dr-Noob	22a80d817d	[v1.03] Fix compilation errors in Windows	2023-01-05 11:43:14 +01:00
Dr-Noob	49941b1717	[v1.03] Bump version	2023-01-05 11:17:49 +01:00
Dr-Noob	a4c0bb1aae	[v1.02] Merge Alder Lake into master branch	2023-01-05 11:17:16 +01:00
Dr-Noob	ea29507b62	[v1.02] Added basic support for Zen4	2022-12-03 16:29:53 +00:00
Dr-Noob	b2aa8194c6	[v1.02][x86] Detect and print core type in ADL	2022-12-02 21:25:30 +00:00
Dr-Noob	d879b06d08	[v1.02][x86] Fix printer for non hybrid architectures	2022-12-02 20:53:40 +00:00
Dr-Noob	6cc18027db	[v1.02][x86] ADL has a shared L3, not one L3 per core type	2022-12-02 20:39:49 +00:00
Dr-Noob	77510c260a	[v1.02][x86] Small fixes to hybrid core detection	2022-11-05 18:28:10 +00:00
Dr-Noob	1eb1a5246e	[v1.02][x86] Extending peakperf computation to hybid cores	2022-11-05 18:17:38 +00:00
Dr-Noob	cec91a1e4d	[v1.02][x86] Adding support printing Intel hybrid CPUs	2022-11-05 17:49:43 +00:00
Dr-Noob	ff5166ea2e	[v1.02][x86] Adding support for topology detection of hybrid cores	2022-11-05 17:48:20 +00:00
Dr-Noob	051d48b7d1	[v1.02][x86] Suport for detecting hybrid_flag	2022-10-20 20:49:10 +00:00
Dr-Noob	e91eef3e65	[v1.02][x86] Split feature detection into a separate function	2022-10-20 20:48:22 +00:00
Dr-Noob	195866aae3	[v1.02][ARM] Add new ARMv9 uarchs and new Snapd SoC	2022-10-09 17:36:23 +02:00
Dr-Noob	de24d86cd6	[v1.02] Extended get_num_caches_from_files to support maps with commas, should fix #152	2022-09-30 19:44:14 +02:00
Dr-Noob	4b1a087b64	[v1.02][ARM] Kirin SoCs seem to start with hi, not Hi, as reported in #157	2022-09-23 19:36:05 +02:00
Dr-Noob	7eb856ae84	[v1.02] Merge fixes from bugfix	2022-09-23 19:20:30 +02:00
Dr-Noob	65366abe04	[v1.02][ARM] Fixed wrong check for Apple CPU	2022-09-19 11:33:14 +02:00
Dr-Noob	190e5daace	[v1.02] Merge master and bugfix2 branches	2022-09-19 11:27:03 +02:00
Dr-Noob	9f7204d43d	[v1.02][ARM] Updating M1/M2 peak performance calculations according to the discussion in #155	2022-09-14 11:08:36 +02:00
Dr-Noob	87961144d2	[v1.02][X86] Add Zen3+ uarch	2022-09-09 09:02:26 +02:00
Dr-Noob	f4565cb937	[v1.02] Ignore extension warnings in ppc	2022-09-07 08:18:16 +02:00
Dr-Noob	61a1ad8a2b	[v1.02] Merge support for Apple M2	2022-09-06 08:12:44 +02:00
Dr-Noob	ecce0354e5	[v1.02][ARM] Fixed M2 bug, support for M2 should now be complete	2022-09-05 18:17:15 +02:00
Dr-Noob	a955451937	[v1.02][X86] Add Steam Deck CPU as requested in #147	2022-09-05 10:39:06 +02:00
Dr-Noob	db21931118	[v1.02][X86] Fix Coffee Lake spelling	2022-09-05 10:28:07 +02:00
Dr-Noob	71a9308bed	[v1.02][X86] Fixed uarch misclassification as noted by #149	2022-09-05 10:19:48 +02:00
Dr-Noob	dfec2a65d2	[v1.02][ARM] Experimental support for M2	2022-09-05 10:02:26 +02:00
Dr-Noob	b319b52952	[v1.02] Use a different name for ifdef; the other might be already defined!	2022-09-05 08:41:19 +02:00
Dr-Noob	758be60967	[v1.02] Remove wrong check in udev	2022-09-05 08:24:22 +02:00
Dr-Noob	52ba038527	[v1.02][ARM] Add support for M1 Ultra	2022-05-25 22:11:48 +01:00