[v1.03] Experimental fix to distinguish between Gen8/Gen8+ Snapdragon SoCs

src/arm/midr.c

@@ -242,7 +242,7 @@ struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) {
   cpu->num_cpus = sockets;
   cpu->hv = emalloc(sizeof(struct hypervisor));
   cpu->hv->present = false;
-  cpu->soc = get_soc();
+  cpu->soc = get_soc(cpu);
   cpu->peak_performance = get_peak_performance(cpu);
 
   return cpu;

src/arm/soc.c

@@ -3,6 +3,7 @@
 #include <string.h>
 #include <ctype.h>
 
+#include "uarch.h"
 #include "soc.h"
 #include "socs.h"
 #include "udev.h"
@@ -502,7 +503,18 @@ bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
   SOC_END
 }
 
-bool match_special(char* soc_name, struct system_on_chip* soc) {
+bool is_taro_sm8475(struct cpuInfo* cpu) {
+  // Check if X2 core has frequency greater
+  // than 3.0 GHz (plus version should have 3.2 GHz)
+  struct cpuInfo* ptr = cpu;
+  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    if(is_cortex_x2(ptr->arch)) return ptr->freq->max > 3100;
+  }
+  printBug("Unable to find Cortex-X2 when differentiating taro SoC");
+  return false;
+}
+
+bool match_special(char* soc_name, struct cpuInfo* cpu, struct system_on_chip* soc) {
   char* tmp;
 
   // Xiaomi hides Redmi Note 8/8T under "Qualcomm Technologies, Inc TRINKET"
@@ -517,13 +529,25 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
     return true;
   }
 
+  // Snapdragon 8 Gen 1/8+ Gen 1 reported as "taro"
+  if(strcmp(soc_name, "taro") == 0) {
+    // Is not possible to detect 8/8+ with soc_name only
+    if(is_taro_sm8475(cpu)) {
+      fill_soc(soc, "8+ Gen 1", SOC_SNAPD_SM8475, 4);
+    }
+    else {
+      fill_soc(soc, "8 Gen 1", SOC_SNAPD_SM8450, 4);
+    }
+    return true;
+  }
+
   return false;
 }
 
-struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
+struct system_on_chip* parse_soc_from_string(struct cpuInfo* cpu, struct system_on_chip* soc) {
   char* raw_name = soc->raw_name;
 
-  if(match_special(raw_name, soc))
+  if(match_special(raw_name, cpu, soc))
     return soc;
 
   if (match_qualcomm(raw_name, soc))
@@ -552,35 +576,35 @@ static inline int android_property_get(const char* key, char* value) {
   return __system_property_get(key, value);
 }
 
-void try_parse_soc_from_string(struct system_on_chip* soc, int soc_len, char* soc_str) {
+void try_parse_soc_from_string(struct cpuInfo* cpu, struct system_on_chip* soc, int soc_len, char* soc_str) {
   soc->raw_name = emalloc(sizeof(char) * (soc_len + 1));
   strncpy(soc->raw_name, soc_str, soc_len + 1);
   soc->raw_name[soc_len] = '\0';
   soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-  parse_soc_from_string(soc);
+  parse_soc_from_string(cpu, soc);
 }
 
-struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
+struct system_on_chip* guess_soc_from_android(struct cpuInfo* cpu, struct system_on_chip* soc) {
   char tmp[100];
   int property_len = 0;
 
   property_len = android_property_get("ro.mediatek.platform", (char *) &tmp);
   if(property_len > 0) {
-    try_parse_soc_from_string(soc, property_len, tmp);
+    try_parse_soc_from_string(cpu, soc, property_len, tmp);
     if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.mediatek.platform: %s", tmp);
     else return soc;
   }
 
   property_len = android_property_get("ro.product.board", (char *) &tmp);
   if(property_len > 0) {
-    try_parse_soc_from_string(soc, property_len, tmp);
+    try_parse_soc_from_string(cpu, soc, property_len, tmp);
     if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.product.board: %s", tmp);
     else return soc;
   }
 
   property_len = android_property_get("ro.board.platform", (char *) &tmp);
   if(property_len > 0) {
-    try_parse_soc_from_string(soc, property_len, tmp);
+    try_parse_soc_from_string(cpu, soc, property_len, tmp);
     if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.board.platform: %s", tmp);
     else return soc;
   }
@@ -589,12 +613,12 @@ struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
 }
 #endif
 
-struct system_on_chip* guess_soc_from_cpuinfo(struct system_on_chip* soc) {
+struct system_on_chip* guess_soc_from_cpuinfo(struct cpuInfo* cpu, struct system_on_chip* soc) {
   char* tmp = get_hardware_from_cpuinfo();
 
   if(tmp != NULL) {
     soc->raw_name = tmp;
-    return parse_soc_from_string(soc);
+    return parse_soc_from_string(cpu, soc);
   }
 
   return soc;
@@ -696,7 +720,7 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
 }
 #endif
 
-struct system_on_chip* get_soc() {
+struct system_on_chip* get_soc(struct cpuInfo* cpu) {
   struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
   soc->raw_name = NULL;
   soc->soc_vendor = SOC_VENDOR_UNKNOWN;
@@ -714,14 +738,14 @@ struct system_on_chip* get_soc() {
     }
   }
 
-  soc = guess_soc_from_cpuinfo(soc);
+  soc = guess_soc_from_cpuinfo(cpu, soc);
   if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
     if(soc->raw_name != NULL)
       printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);
     else
       printWarn("SoC detection failed using /proc/cpuinfo: No string found");
 #ifdef __ANDROID__
-    soc = guess_soc_from_android(soc);
+    soc = guess_soc_from_android(cpu, soc);
     if(soc->raw_name == NULL)
       printWarn("SoC detection failed using Android: No string found");
     else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN)

src/arm/soc.h

@@ -25,7 +25,7 @@ struct system_on_chip {
   char* raw_name;    
 };
 
-struct system_on_chip* get_soc();
+struct system_on_chip* get_soc(struct cpuInfo* cpu);
 char* get_soc_name(struct system_on_chip* soc);
 VENDOR get_soc_vendor(struct system_on_chip* soc);
 char* get_str_process(struct system_on_chip* soc);

src/arm/socs.h

@@ -252,6 +252,8 @@ enum {
   SOC_SNAPD_SM8250,
   SOC_SNAPD_SM8250_AB,
   SOC_SNAPD_SM8350,
+  SOC_SNAPD_SM8450,
+  SOC_SNAPD_SM8475,
   // APPLE
   SOC_APPLE_M1,
   SOC_APPLE_M1_PRO,
@@ -289,7 +291,7 @@ inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
   else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
   else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
   else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
-  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8350) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8475) return SOC_VENDOR_SNAPDRAGON;
   else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M2) return SOC_VENDOR_APPLE;
   else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
   return SOC_VENDOR_UNKNOWN;

src/arm/uarch.c

@@ -33,7 +33,8 @@ enum {
   ISA_ARMv8_2_A,
   ISA_ARMv8_3_A,
   ISA_ARMv8_4_A,
-  ISA_ARMv8_5_A
+  ISA_ARMv8_5_A,
+  ISA_ARMv9_A
 };
 
 enum {
@@ -65,7 +66,10 @@ enum {
   UARCH_CORTEX_A76,
   UARCH_CORTEX_A77,
   UARCH_CORTEX_A78,
+  UARCH_CORTEX_A510,
+  UARCH_CORTEX_A710,
   UARCH_CORTEX_X1,
+  UARCH_CORTEX_X2,
   UARCH_NEOVERSE_N1,
   UARCH_NEOVERSE_E1,
   UARCH_SCORPION,
@@ -136,7 +140,10 @@ static const ISA isas_uarch[] = {
   [UARCH_CORTEX_A76]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A77]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A78]   = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_A510]   = ISA_ARMv9_A,
+  [UARCH_CORTEX_A710]   = ISA_ARMv9_A,
   [UARCH_CORTEX_X1]    = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_X2]    = ISA_ARMv9_A,
   [UARCH_NEOVERSE_N1]  = ISA_ARMv8_2_A,
   [UARCH_NEOVERSE_E1]  = ISA_ARMv8_2_A,
   [UARCH_BRAHMA_B15]   = ISA_ARMv7_A,   // Same as Cortex-A15
@@ -178,7 +185,8 @@ static char* isas_string[] = {
   [ISA_ARMv8_2_A] = "ARMv8.2",
   [ISA_ARMv8_3_A] = "ARMv8.3",
   [ISA_ARMv8_4_A] = "ARMv8.4",
-  [ISA_ARMv8_5_A] = "ARMv8.5"
+  [ISA_ARMv8_5_A] = "ARMv8.5",
+  [ISA_ARMv9_A] = "ARMv9"
 };
 
 #define UARCH_START if (false) {}
@@ -248,6 +256,9 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78",            UARCH_CORTEX_A78,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1",             UARCH_CORTEX_X1,    CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD46, NA, NA, "Cortex‑A510",           UARCH_CORTEX_A510,  CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD47, NA, NA, "Cortex‑A710",           UARCH_CORTEX_A710,  CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD48, NA, NA, "Cortex-X2",             UARCH_CORTEX_X2,    CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1",           UARCH_NEOVERSE_E1,  CPU_VENDOR_ARM)
 
   CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15",            UARCH_BRAHMA_B15,   CPU_VENDOR_BROADCOM)
@@ -322,3 +333,7 @@ void free_uarch_struct(struct uarch* arch) {
   free(arch->uarch_str);
   free(arch);
 }
+
+bool is_cortex_x2(struct uarch* arch) {
+  return arch->uarch == UARCH_CORTEX_X2;
+}

src/arm/uarch.h

@@ -8,5 +8,6 @@
 struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu);
 char* get_str_uarch(struct cpuInfo* cpu);
 void free_uarch_struct(struct uarch* arch);
+bool is_cortex_x2(struct uarch* arch);
 
 #endif

src/common/cpu.c

@@ -16,8 +16,6 @@
   #include "../arm/uarch.h"
 #endif
 
-#define UNUSED(x) (void)(x)
-
 #define STRING_YES        "Yes"
 #define STRING_NO         "No"
 #define STRING_NONE       "None"

src/common/global.h

@@ -5,6 +5,7 @@
 #include <stddef.h>
 
 #define STRING_UNKNOWN "Unknown"
+#define UNUSED(x) (void)(x)
 
 void set_log_level(bool verbose);
 void printWarn(const char *fmt, ...);

src/common/printer.c

@@ -303,8 +303,6 @@ bool ascii_fits_screen(int termw, struct ascii_logo logo, int lf) {
 void replace_bgbyfg_color(struct ascii_logo* logo) {
   // Replace background by foreground color
   for(int i=0; i < 3; i++) {
-    if(logo->color_ascii[i] == NULL) break;
-
     if(strcmp(logo->color_ascii[i], C_BG_BLACK) == 0) strcpy(logo->color_ascii[i], C_FG_BLACK);
     else if(strcmp(logo->color_ascii[i], C_BG_RED) == 0) strcpy(logo->color_ascii[i], C_FG_RED);
     else if(strcmp(logo->color_ascii[i], C_BG_GREEN) == 0) strcpy(logo->color_ascii[i], C_FG_GREEN);
@@ -481,6 +479,7 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const ch
       attr_value = art->attributes[attr_to_print]->value;
       attr_to_print++;
 
+#ifdef ARCH_X86
       if(attr_type == ATTRIBUTE_L3) {
         add_space = false;
       }
@@ -489,6 +488,7 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const ch
         add_space = true;
       }
       else {
+#endif
         beg_space = 0;
         space_right = 2 + 1 + (la - strlen(attribute_fields[attr_type]));
         if(hybrid_architecture && add_space) {
@@ -498,7 +498,9 @@ void print_ascii_generic(struct ascii* art, uint32_t la, int32_t termw, const ch
 
         printOut(lbuf, beg_space + strlen(attribute_fields[attr_type]) + space_right + strlen(attr_value),
                  "%*s%s%s%s%*s%s%s%s", beg_space, "", logo->color_text[0], attribute_fields[attr_type], art->reset, space_right, "", logo->color_text[1], attr_value, art->reset);
+#ifdef ARCH_X86
       }
+#endif
     }
     printOutLine(lbuf, art, termw);
     printf("\n");
@@ -690,7 +692,7 @@ bool print_cpufetch_ppc(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
     longest_attribute = longest_attribute_length(art, attribute_fields);
   }
 
-  print_ascii_generic(art, longest_attribute, term->w, attribute_fields);
+  print_ascii_generic(art, longest_attribute, term->w, attribute_fields, false);
 
   return true;
 }

src/ppc/uarch.c

@@ -3,7 +3,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
-#include <sys/auxv.h>
 #include <errno.h>
 
 #include "uarch.h"

src/x86/apic.c

@@ -7,8 +7,6 @@
 #elif defined __FreeBSD__
   #include <sys/param.h>
   #include <sys/cpuset.h>
-#elif defined __APPLE__
-  #define UNUSED(x) (void)(x)
 #endif
 
 #include <stdlib.h>
@@ -102,6 +100,7 @@ bool bind_to_cpu(int cpu_id) {
 }
 #endif
 
+#ifdef __linux__
 int get_total_cores_module(int total_cores, int module) {
   int total_modules = 2;
   int32_t current_module_idx = -1;
@@ -154,6 +153,7 @@ int get_total_cores_module(int total_cores, int module) {
   //printf("Module %d has %d cores\n", module, cores_in_module);
   return cores_in_module;
 }
+#endif
 
 bool fill_topo_masks_apic(struct topology* topo) {
   uint32_t eax = 0x00000001;
@@ -353,6 +353,7 @@ void add_apic_to_array(uint32_t apic, uint32_t* apic_ids, int n) {
 bool fill_apic_ids(uint32_t* apic_ids, int first_core, int n, bool x2apic_id) {
 #ifdef __APPLE__
   // macOS extremely dirty approach...
+  UNUSED(first_core);
   printf("cpufetch is computing APIC IDs, please wait...\n");
   bool end = false;
   uint32_t apic;

src/x86/apic.h

@@ -21,6 +21,8 @@ uint32_t is_smt_enabled_amd(struct topology* topo);
 bool bind_to_cpu(int cpu_id);
 #endif
 
+#ifdef __linux__
 int get_total_cores_module(int total_cores, int module);
+#endif
 
 #endif

src/x86/cpuid.c

@@ -356,6 +356,11 @@ struct features* get_features_info(struct cpuInfo* cpu) {
 
 bool set_cpu_module(int m, int total_modules, int32_t* first_core) {
   if(total_modules > 1) {
+    #ifdef __APPLE__
+    UNUSED(m);
+    printBug("Hybrid architectures are not supported under macOS");
+    return false;
+    #else
     // We have a hybrid architecture.
     // 1. Find the first core from module m
     int32_t core_id = -1;
@@ -397,6 +402,11 @@ bool set_cpu_module(int m, int total_modules, int32_t* first_core) {
     if(!bind_to_cpu(core_id)) {
       return false;
     }
+    #endif
+  }
+  else {
+    // This is a normal architecture
+    *first_core = 0;
   }
 
   return true;
@@ -652,7 +662,12 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
   #endif
 
   if(cpu->hybrid_flag) {
+    #ifdef __linux__
       topo->total_cores_module = get_total_cores_module(topo->total_cores, module);
+    #else
+      UNUSED(module);
+      topo->total_cores_module = topo->total_cores;
+    #endif
   }
   else {
     topo->total_cores_module = topo->total_cores;

src/x86/uarch.c

@@ -91,6 +91,7 @@ enum {
   UARCH_ICE_LAKE,
   UARCH_TIGER_LAKE,
   UARCH_ALDER_LAKE,
+  UARCH_RAPTOR_LAKE,
   // AMD //
   UARCH_AM486,
   UARCH_AM5X86,
@@ -231,8 +232,8 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  6,  8, 14, 11, "Whiskey Lake",    UARCH_WHISKEY_LAKE,     14) // wikichip
   CHECK_UARCH(arch, 0,  6,  8, 14, 12, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
   CHECK_UARCH(arch, 0,  6,  9,  6, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
-  CHECK_UARCH(arch, 0,  6,  9,  7, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // wikichip
-  CHECK_UARCH(arch, 0,  6,  9, 10, NA, "Tremont",         UARCH_TREMONT,          10) // instlatx64
+  CHECK_UARCH(arch, 0,  6,  9,  7, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // instlatx64 (Alder Lake-S)
+  CHECK_UARCH(arch, 0,  6,  9, 10, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // instlatx64 (Alder Lake-P)
   CHECK_UARCH(arch, 0,  6,  9, 12, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
   CHECK_UARCH(arch, 0,  6,  9, 13, NA, "Sunny Cove",      UARCH_SUNNY_COVE,       10) // LX*
   CHECK_UARCH(arch, 0,  6,  9, 14,  9, "Kaby Lake",       UARCH_KABY_LAKE,        14)
@@ -243,6 +244,7 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  6, 10,  5, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
   CHECK_UARCH(arch, 0,  6, 10,  6, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // instlatx64.atw.hu (i7-10710U)
   CHECK_UARCH(arch, 0,  6, 10,  7, NA, "Rocket Lake",     UARCH_ROCKET_LAKE,      14) // instlatx64.atw.hu (i7-11700K)
+  CHECK_UARCH(arch, 0,  6, 11,  7, NA, "Raptor Lake",     UARCH_RAPTOR_LAKE,      10) // instlatx64.atw.hu (i5-13600K)
   CHECK_UARCH(arch, 0, 11,  0,  0, NA, "Knights Ferry",   UARCH_KNIGHTS_FERRY,    45) // found only on en.wikichip.org
   CHECK_UARCH(arch, 0, 11,  0,  1, NA, "Knights Corner",  UARCH_KNIGHTS_CORNER,   22)
   CHECK_UARCH(arch, 0, 15,  0,  0, NA, "Willamette",      UARCH_WILLAMETTE,      180)
@@ -422,6 +424,7 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
       case UARCH_ICE_LAKE:
       case UARCH_TIGER_LAKE:
       case UARCH_ALDER_LAKE:
+      case UARCH_RAPTOR_LAKE:
 
       // AMD
       case UARCH_ZEN2:
@@ -439,6 +442,7 @@ bool choose_new_intel_logo_uarch(struct cpuInfo* cpu) {
     case UARCH_ALDER_LAKE:
     case UARCH_ROCKET_LAKE:
     case UARCH_TIGER_LAKE:
+    case UARCH_RAPTOR_LAKE:
       return true;
     default:
       return false;