mirror of
https://github.com/Dr-Noob/cpufetch.git
synced 2026-03-24 23:40:39 +01:00
[v1.05][ARM] Properly implement SVE detection
This commit is contained in:
5
Makefile
5
Makefile
@@ -46,8 +46,6 @@ ifneq ($(OS),Windows_NT)
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SOURCE += $(SRC_COMMON)sysctl.c
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HEADERS += $(SRC_COMMON)sysctl.h
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endif
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SOURCE += $(SRC_DIR)sve_test.o
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else ifeq ($(arch), $(filter $(arch), riscv64 riscv32))
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SRC_DIR=src/riscv/
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SOURCE += $(COMMON_SRC) $(SRC_DIR)riscv.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
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@@ -93,9 +91,6 @@ freq_avx.o: Makefile $(SRC_DIR)freq/freq_avx.c $(SRC_DIR)freq/freq_avx.h $(SRC_D
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freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.h $(SRC_DIR)freq/freq.h
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$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -pthread $(SRC_DIR)freq/freq_avx512.c -o $@
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$(SRC_DIR)sve_test.o: Makefile $(SRC_DIR)sve_test.c
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$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -march=armv8-a+sve $(SRC_DIR)sve_test.c -o $@
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$(OUTPUT): Makefile $(SOURCE) $(HEADERS)
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ifeq ($(GIT_VERSION),"")
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$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
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@@ -142,6 +142,20 @@ void init_cpu_info(struct cpuInfo* cpu) {
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cpu->next_cpu = NULL;
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}
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// https://learn.arm.com/learning-paths/servers-and-cloud-computing/sve/sve_basics/#:~:text=Using%20a%20text%20editor%20of%20your%20choice%2C%20copy,svcntb%28%29%29%3B%20%7D%20This%20program%20prints%20the%20vector%20length
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static inline uint32_t sve_cntb(void) {
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uint32_t x0 = 0;
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#ifdef __ARM_FEATURE_SVE
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__asm volatile("cntb %0"
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: "=r"(x0));
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printf("cntb=%d\n", x0);
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#endif
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return x0;
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}
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// We assume all cpus share the same hardware
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// capabilities but I'm not sure it is always
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// true...
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@@ -168,6 +182,15 @@ struct features* get_features_info(void) {
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feat->SHA1 = hwcaps & HWCAP_SHA1;
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feat->SHA2 = hwcaps & HWCAP_SHA2;
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feat->NEON = hwcaps & HWCAP_ASIMD;
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feat->SVE = hwcaps & HWCAP_SVE;
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hwcaps = getauxval(AT_HWCAP2);
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if (errno == ENOENT) {
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printWarn("Unable to retrieve AT_HWCAP2 using getauxval");
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}
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else {
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feat->SVE2 = hwcaps & HWCAP2_SVE2;
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}
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}
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#else
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else {
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@@ -183,6 +206,8 @@ struct features* get_features_info(void) {
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feat->CRC32 = hwcaps & HWCAP2_CRC32;
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feat->SHA1 = hwcaps & HWCAP2_SHA1;
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feat->SHA2 = hwcaps & HWCAP2_SHA2;
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feat->SVE = false;
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feat->SVE2 = false;
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}
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#endif // ifdef __aarch64__
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#elif defined __APPLE__ || __MACH__
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@@ -192,8 +217,13 @@ struct features* get_features_info(void) {
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feat->SHA1 = true;
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feat->SHA2 = true;
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feat->NEON = true;
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feat->SVE = false;
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feat->SVE2 = false;
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#endif // ifdef __linux__
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if (feat->SVE || feat->SVE2)
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feat->cntb = sve_cntb();
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return feat;
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}
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@@ -430,7 +460,7 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
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char* get_str_features(struct cpuInfo* cpu) {
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struct features* feat = cpu->feat;
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uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,") + 1;
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uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,SVE,SVE2") + 1;
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uint32_t len = 0;
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char* string = ecalloc(max_len, sizeof(char));
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@@ -438,6 +468,14 @@ char* get_str_features(struct cpuInfo* cpu) {
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strcat(string, "NEON,");
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len += 5;
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}
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if(feat->SVE) {
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strcat(string, "SVE,");
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len += 4;
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}
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if(feat->SVE2) {
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strcat(string, "SVE2,");
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len += 5;
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}
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if(feat->SHA1) {
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strcat(string, "SHA1,");
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len += 5;
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@@ -11,7 +11,6 @@ char* get_str_features(struct cpuInfo* cpu);
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void print_debug(struct cpuInfo* cpu);
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void free_topo_struct(struct topology* topo);
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void SVE_exp(struct cpuInfo* cpu);
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// Code taken from cpuinfo (https://github.com/pytorch/cpuinfo/blob/master/src/arm/midr.h)
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#define CPUINFO_ARM_MIDR_IMPLEMENTER_MASK UINT32_C(0xFF000000)
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@@ -1,71 +0,0 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <assert.h>
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#include <stdbool.h>
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#include <errno.h>
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#ifdef __linux__
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#include <sys/auxv.h>
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#include <asm/hwcap.h>
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#include "../common/freq.h"
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#elif defined __APPLE__ || __MACH__
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#include "../common/sysctl.h"
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#endif
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#include "../common/global.h"
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#include "../common/soc.h"
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#include "../common/args.h"
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#include "udev.h"
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#include "midr.h"
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#include "uarch.h"
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// https://docs.kernel.org/arch/arm64/elf_hwcaps.html
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void check_for_SVE(void) {
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errno = 0;
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long hwcaps = getauxval(AT_HWCAP);
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if(errno == ENOENT) {
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printWarn("Unable to retrieve AT_HWCAP using getauxval");
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}
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if (hwcaps & HWCAP_SVE) printf("SVE: Yes\n");
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else printf("SVE: No\n");
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hwcaps = getauxval(AT_HWCAP2);
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if (hwcaps & HWCAP2_SVE2) printf("SVE2: Yes\n");
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else printf("SVE2: No\n");
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}
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#include <arm_sve.h>
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#ifndef __ARM_FEATURE_SVE
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#warning "Make sure to compile for SVE!"
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#endif
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// https://learn.arm.com/learning-paths/servers-and-cloud-computing/sve/sve_basics/#:~:text=Using%20a%20text%20editor%20of%20your%20choice%2C%20copy,svcntb%28%29%29%3B%20%7D%20This%20program%20prints%20the%20vector%20length
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void SVE_exp(struct cpuInfo* cpu) {
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check_for_SVE();
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uint32_t core = 4;
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if (!bind_to_cpu(core)) {
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printErr("Failed binding the process to CPU %d", core);
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return;
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}
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printf("[%d] SVE vector length is: %ld bytes\n", core, svcntb());
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core = 7;
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if (!bind_to_cpu(core)) {
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printErr("Failed binding the process to CPU %d", core);
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return;
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}
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printf("[%d] SVE vector length is: %ld bytes\n", core, svcntb());
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core = 0;
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if (!bind_to_cpu(core)) {
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printErr("Failed binding the process to CPU %d", core);
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return;
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}
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printf("[%d] SVE vector length is: %ld bytes\n", core, svcntb());
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}
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@@ -294,7 +294,10 @@ int get_vpus_width(struct cpuInfo* cpu) {
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case UARCH_NEOVERSE_V1:
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return 256;
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default:
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if(cpu->feat->NEON) {
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if (cpu->feat->SVE) {
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return cpu->feat->cntb * 8;
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}
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else if (cpu->feat->NEON) {
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if(is_ARMv8_or_newer(cpu)) {
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return 128;
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}
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@@ -124,6 +124,9 @@ struct features {
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bool SHA1;
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bool SHA2;
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bool CRC32;
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bool SVE;
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bool SVE2;
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uint32_t cntb;
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#endif
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};
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@@ -132,7 +132,6 @@ int main(int argc, char* argv[]) {
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}
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if(print_cpufetch(cpu, get_style(), get_colors(), show_full_cpu_name())) {
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SVE_exp(cpu);
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return EXIT_SUCCESS;
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}
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else {
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