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[v1.00] Temporary rename new Intel CPU uarch names

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Dr-Noob
2021-09-25 22:42:26 +02:00
parent 3928a9e3b6
commit 432b2d7c56
1 changed files with 9 additions and 9 deletions
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18
src/x86/uarch.c
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@@ -79,7 +79,6 @@ enum {
UARCH_GOLDMONT_PLUS,
UARCH_TREMONT,
UARCH_LAKEMONT,
UARCH_WILLOW_COVE,
UARCH_COFFE_LAKE,
UARCH_ITANIUM,
UARCH_KNIGHTS_FERRY,
@@ -89,6 +88,8 @@ enum {
UARCH_PRESCOTT,
UARCH_CEDAR_MILL,
UARCH_ITANIUM2,
UARCH_ICE_LAKE,
UARCH_TIGER_LAKE,
// AMD //
UARCH_AM486,
UARCH_AM5X86,
@@ -216,12 +217,12 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
CHECK_UARCH(arch, 0, 6, 7, 5, NA, "Airmont", UARCH_AIRMONT, 14) // no spec update; whispers & rumors
CHECK_UARCH(arch, 0, 6, 7, 10, NA, "Goldmont Plus", UARCH_GOLDMONT_PLUS, 14)
CHECK_UARCH(arch, 0, 6, 7, 13, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10) // no spec update; only MSR_CPUID_table* so far
CHECK_UARCH(arch, 0, 6, 7, 14, NA, "Sunny Cove", UARCH_SUNNY_COVE, 10)
CHECK_UARCH(arch, 0, 6, 7, 14, NA, "Ice Lake", UARCH_ICE_LAKE, 10)
CHECK_UARCH(arch, 0, 6, 8, 5, NA, "Knights Mill", UARCH_KNIGHTS_MILL, 14) // no spec update; only MSR_CPUID_table* so far
CHECK_UARCH(arch, 0, 6, 8, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
CHECK_UARCH(arch, 0, 6, 8, 10, NA, "Tremont", UARCH_TREMONT, 10) // no spec update; only geekbench.com example
CHECK_UARCH(arch, 0, 6, 8, 12, NA, "Willow Cove", UARCH_WILLOW_COVE, 10) // found only on en.wikichip.org
CHECK_UARCH(arch, 0, 6, 8, 13, NA, "Willow Cove", UARCH_WILLOW_COVE, 10) // LX*
CHECK_UARCH(arch, 0, 6, 8, 12, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64
CHECK_UARCH(arch, 0, 6, 8, 13, NA, "Tiger Lake", UARCH_TIGER_LAKE, 10) // instlatx64
CHECK_UARCH(arch, 0, 6, 8, 14, 9, "Amber Lake", UARCH_AMBER_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 8, 14, 10, "Kaby Lake", UARCH_KABY_LAKE, 14) // wikichip
CHECK_UARCH(arch, 0, 6, 8, 14, 11, "Whiskey Lake", UARCH_WHISKEY_LAKE, 14) // wikichip
@@ -371,9 +372,7 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f,
}
bool vpus_are_AVX512(struct cpuInfo* cpu) {
// TODO: This is actually wrong since ice_lake server probably have two
// AVX512 VPUs (we need to fetch the codename, not only the uarch!
return cpu->arch->uarch != UARCH_SUNNY_COVE;
return cpu->arch->uarch != UARCH_ICE_LAKE && cpu->arch->uarch != UARCH_TIGER_LAKE;
}
bool is_knights_landing(struct cpuInfo* cpu) {
@@ -399,7 +398,8 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
case UARCH_KNIGHTS_LANDING:
case UARCH_KNIGHTS_MILL:
case UARCH_SUNNY_COVE:
case UARCH_ICE_LAKE:
case UARCH_TIGER_LAKE:
// AMD
case UARCH_ZEN2:
@@ -413,7 +413,7 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
bool choose_new_intel_logo_uarch(struct cpuInfo* cpu) {
switch(cpu->arch->uarch) {
case UARCH_ROCKET_LAKE:
// TODO: case UARCH_TIGER_LAKE: missing?
case UARCH_TIGER_LAKE:
return true;
default:
return false;