[v1.03][RISCV] Add some more uarchs

This commit is contained in:
Dr-Noob
2023-04-12 16:23:23 +02:00
parent 9e9828d210
commit 4405a262ca
5 changed files with 28 additions and 5 deletions

View File

@@ -23,6 +23,7 @@ enum {
// ARCH_RISCV
CPU_VENDOR_RISCV,
CPU_VENDOR_SIFIVE,
CPU_VENDOR_THEAD,
// OTHERS
CPU_VENDOR_UNKNOWN,
CPU_VENDOR_INVALID

View File

@@ -934,7 +934,7 @@ bool print_cpufetch_riscv(struct cpuInfo* cpu, STYLE s, struct color** cs, struc
char* uarch = get_str_uarch(cpu);
char* manufacturing_process = get_str_process(cpu->soc);
char* soc_name = get_soc_name(cpu->soc);
char* features = get_str_features(cpu);
char* extensions = get_str_extensions(cpu);
char* max_frequency = get_str_freq(cpu->freq);
char* n_cores = get_str_topology(cpu, cpu->topo);