[v1.06][ARM] Added the right ARM version for Apple M2/M3 microarchitectures

src/arm/midr.c

@@ -412,6 +412,7 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
     cpu->peak_performance = get_peak_performance(cpu);
   }
   else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
+          cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2   ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
     fill_cpu_info_everest_sawtooth(cpu, pcores, ecores);

src/arm/soc.c

@@ -950,10 +950,9 @@ struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
     return soc;
   }
 
-  DT_START
   // The following are internal codenames of Asahi Linux
   // https://github.com/AsahiLinux/docs/wiki/Codenames
-  // https://github.com/Dr-Noob/cpufetch/issues/263
+  DT_START
   DT_EQ(dt, len, soc, "apple,t8103", "M1",       SOC_APPLE_M1,       5)
   DT_EQ(dt, len, soc, "apple,t6000", "M1 Pro",   SOC_APPLE_M1_PRO,   5)
   DT_EQ(dt, len, soc, "apple,t6001", "M1 Max",   SOC_APPLE_M1_MAX,   5)
@@ -966,9 +965,6 @@ struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
   DT_EQ(dt, len, soc, "apple,t6030", "M3 Pro",   SOC_APPLE_M3_PRO,   3)
   DT_EQ(dt, len, soc, "apple,t6031", "M3 Max",   SOC_APPLE_M3_MAX,   3)
   DT_EQ(dt, len, soc, "apple,t6034", "M3 Max",   SOC_APPLE_M3_MAX,   3)
-  // https://github.com/Dr-Noob/cpufetch/issues/261
-  // https://www.nxp.com/docs/en/fact-sheet/IMX8MPLUSFS.pdf
-  DT_EQ(dt, len, soc, "imx8mp-nitrogen8mp", "i.MX 8M Plus", SOC_NXP_IMX8MP, 14)
   DT_END(dt, len)
 }
 
@@ -1119,10 +1115,12 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
     }
   }
   else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
+          cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2   ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
           cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
     // Check M3 version
-    if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH) {
+    if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
+       cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2) {
       fill_soc(soc, "M3", SOC_APPLE_M3, 3);
     }
     else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO) {

src/arm/socs.h

@@ -382,8 +382,6 @@ enum {
   SOC_TEGRA_X1,
   // ALTRA
   SOC_AMPERE_ALTRA,
-  // NXP
-  SOC_NXP_IMX8MP,
   // UNKNOWN
   SOC_MODEL_UNKNOWN
 };
@@ -401,7 +399,6 @@ inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
   else if(soc >= SOC_GOOGLE_TENSOR && soc <= SOC_GOOGLE_TENSOR_G3) return SOC_VENDOR_GOOGLE;
   else if(soc >= SOC_TEGRA_X1 && soc <= SOC_TEGRA_X1) return SOC_VENDOR_NVIDIA;
   else if(soc >= SOC_AMPERE_ALTRA && soc <= SOC_AMPERE_ALTRA) return SOC_VENDOR_AMPERE;
-  else if(soc >= SOC_NXP_IMX8MP && soc <= SOC_NXP_IMX8MP) return SOC_VENDOR_NXP;
   return SOC_VENDOR_UNKNOWN;
 }
 

src/arm/uarch.c

@@ -33,6 +33,7 @@ enum {
   ISA_ARMv8_3_A,
   ISA_ARMv8_4_A,
   ISA_ARMv8_5_A,
+  ISA_ARMv8_6_A,
   ISA_ARMv9_A
 };
 
@@ -93,8 +94,10 @@ static const ISA isas_uarch[] = {
   [UARCH_EXYNOS_M5]    = ISA_ARMv8_2_A,
   [UARCH_ICESTORM]     = ISA_ARMv8_5_A, // https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/AArch64TargetParser.def
   [UARCH_FIRESTORM]    = ISA_ARMv8_5_A,
-  [UARCH_BLIZZARD]     = ISA_ARMv8_5_A, // Not confirmed
-  [UARCH_AVALANCHE]    = ISA_ARMv8_5_A,
+  [UARCH_BLIZZARD]     = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
+  [UARCH_AVALANCHE]    = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
+  [UARCH_SAWTOOTH]     = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
+  [UARCH_EVEREST]      = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
   [UARCH_PJ4]          = ISA_ARMv7_A,
   [UARCH_XIAOMI]       = ISA_ARMv8_A,
 };
@@ -112,6 +115,7 @@ static char* isas_string[] = {
   [ISA_ARMv8_3_A] = "ARMv8.3",
   [ISA_ARMv8_4_A] = "ARMv8.4",
   [ISA_ARMv8_5_A] = "ARMv8.5",
+  [ISA_ARMv8_6_A] = "ARMv8.6",
   [ISA_ARMv9_A] = "ARMv9"
 };
 
@@ -271,6 +275,7 @@ bool is_ARMv8_or_newer(struct cpuInfo* cpu) {
          cpu->arch->isa == ISA_ARMv8_3_A       ||
          cpu->arch->isa == ISA_ARMv8_4_A       ||
          cpu->arch->isa == ISA_ARMv8_5_A       ||
+         cpu->arch->isa == ISA_ARMv8_6_A       ||
          cpu->arch->isa == ISA_ARMv9_A;
 }
 

src/common/ascii.h

@@ -413,16 +413,6 @@ $C1  ##           ###                          ###   \
 $C1                                                  \
 $C1                                                  "
 
-#define ASCII_NXP \
-"$C1#####          # $C2#######      ####### $C3##########       \
-$C1#######        ## $C2#######    ####### $C3###############   \
-$C1##########     #### $C2######  ######  $C3###        ######  \
-$C1############   ##### $C2############ $C3#####         #####  \
-$C1#####  ####### #####  $C2########## $C3###################   \
-$C1#####     ######### $C2############## $C3###############     \
-$C1#####       ###### $C2######    ###### $C3####               \
-$C1#####         ## $C2######        ###### $C3##               "
-
 // --------------------- LONG LOGOS ------------------------- //
 #define ASCII_AMD_L \
 "$C1                                                              \
@@ -599,7 +589,6 @@ asciiL logo_starfive    = { ASCII_STARFIVE,    33, 17, false, {C_FG_WHITE},
 asciiL logo_sipeed      = { ASCII_SIPEED,      41, 16, true,  {C_BG_RED, C_BG_WHITE},                         {C_FG_RED,     C_FG_WHITE}   };
 asciiL logo_nvidia      = { ASCII_NVIDIA,      45, 19, false, {C_FG_GREEN, C_FG_WHITE},                       {C_FG_WHITE,   C_FG_GREEN}   };
 asciiL logo_ampere      = { ASCII_AMPERE,      50, 17, false, {C_FG_RED},                                     {C_FG_WHITE,   C_FG_RED}     };
-asciiL logo_nxp         = { ASCII_NXP,         55,  8, false, {C_FG_YELLOW, C_FG_CYAN, C_FG_GREEN},           {C_FG_CYAN,    C_FG_WHITE}   };
 
 // Long variants          | ----------------------------------------------------------------------------------------------------------------|
 asciiL logo_amd_l       = { ASCII_AMD_L,       62, 19, true,  {C_BG_WHITE, C_BG_GREEN},                       {C_FG_WHITE, C_FG_GREEN}     };

src/common/printer.c

@@ -391,8 +391,6 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
     art->art = &logo_rockchip;
   else if(art->vendor == SOC_VENDOR_AMPERE)
     art->art = &logo_ampere;
-  else if(art->vendor == SOC_VENDOR_NXP)
-    art->art = &logo_nxp;
   else if(art->vendor == SOC_VENDOR_NVIDIA)
     art->art = choose_ascii_art_aux(&logo_nvidia_l, &logo_nvidia, term, lf);
   else {

src/common/soc.c

@@ -22,7 +22,6 @@ static char* soc_trademark_string[] = {
   [SOC_VENDOR_GOOGLE]     = "Google ",
   [SOC_VENDOR_NVIDIA]     = "NVIDIA ",
   [SOC_VENDOR_AMPERE]     = "Ampere ",
-  [SOC_VENDOR_NXP]        = "NXP ",
   // RISC-V
   [SOC_VENDOR_SIFIVE]     = "SiFive ",
   [SOC_VENDOR_STARFIVE]   = "StarFive ",

src/common/soc.h

@@ -26,7 +26,6 @@ enum {
   SOC_VENDOR_GOOGLE,
   SOC_VENDOR_NVIDIA,
   SOC_VENDOR_AMPERE,
-  SOC_VENDOR_NXP,
   // RISC-V
   SOC_VENDOR_SIFIVE,
   SOC_VENDOR_STARFIVE,

src/common/sysctl.h

@@ -21,9 +21,12 @@
   #define CPUFAMILY_ARM_AVALANCHE_BLIZZARD 0xDA33D83D
 #endif
 // M3 / A16 / A17
-// https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
-// https://github.com/Dr-Noob/cpufetch/issues/210
+// M3:   https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
+// M3_2: https://github.com/Dr-Noob/cpufetch/issues/230
+// PRO:  https://github.com/Dr-Noob/cpufetch/issues/225
+// MAX:  https://github.com/Dr-Noob/cpufetch/issues/210
 #define CPUFAMILY_ARM_EVEREST_SAWTOOTH     0x8765EDEA
+#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_2   0xFA33415E
 #define CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO 0x5F4DEA93
 #define CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX 0x72015832