mirror of
https://github.com/Dr-Noob/cpufetch.git
synced 2026-03-25 16:00:39 +01:00
Compare commits
3 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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ae6c7f75ad | ||
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f84160f97e | ||
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e7ec4d492e |
53
Makefile
53
Makefile
@@ -13,27 +13,17 @@ COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_C
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||||
ifneq ($(OS),Windows_NT)
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||||
GIT_VERSION := "$(shell git describe --abbrev=4 --dirty --always --tags)"
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arch := $(shell uname -m)
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os := $(shell uname -s)
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||||
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ifeq ($(os), Linux)
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COMMON_SRC += $(SRC_COMMON)freq.c
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COMMON_HDR += $(SRC_COMMON)freq.h
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endif
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ifeq ($(arch), $(filter $(arch), x86_64 amd64 i386 i486 i586 i686))
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SRC_DIR=src/x86/
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SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
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HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h $(SRC_DIR)freq/freq.h
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||||
os := $(shell uname -s)
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ifeq ($(os), Linux)
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SOURCE += $(SRC_DIR)freq/freq.c freq_nov.o freq_avx.o freq_avx512.o
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HEADERS += $(SRC_DIR)freq/freq.h
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CFLAGS += -pthread
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endif
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||||
ifeq ($(os), FreeBSD)
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SOURCE += $(SRC_COMMON)sysctl.c
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HEADERS += $(SRC_COMMON)sysctl.h
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endif
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CFLAGS += -DARCH_X86 -std=c99 -fstack-protector-all
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else ifeq ($(arch), $(filter $(arch), ppc64le ppc64 ppcle ppc))
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SRC_DIR=src/ppc/
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||||
@@ -42,19 +32,14 @@ ifneq ($(OS),Windows_NT)
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CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all -Wno-language-extension-token
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else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
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SRC_DIR=src/arm/
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SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_COMMON)pci.c $(SRC_DIR)udev.c sve.o
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HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_COMMON)pci.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
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SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
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HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
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CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99 -fstack-protector-all
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# Check if the compiler supports -march=armv8-a+sve. We will use it (if supported) to compile SVE detection code later
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is_sve_flag_supported := $(shell $(CC) -march=armv8-a+sve -c $(SRC_DIR)sve.c -o sve_test.o 2> /dev/null && echo 'yes'; rm -f sve_test.o)
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ifeq ($(is_sve_flag_supported), yes)
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SVE_FLAGS += -march=armv8-a+sve
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||||
endif
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||||
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os := $(shell uname -s)
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ifeq ($(os), Darwin)
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SOURCE += $(SRC_COMMON)sysctl.c
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||||
HEADERS += $(SRC_COMMON)sysctl.h
|
||||
SOURCE += $(SRC_DIR)sysctl.c
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||||
HEADERS += $(SRC_DIR)sysctl.h
|
||||
endif
|
||||
else ifeq ($(arch), $(filter $(arch), riscv64 riscv32))
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SRC_DIR=src/riscv/
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@@ -70,27 +55,12 @@ $(error Aborting compilation)
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||||
|
||||
OUTPUT=cpufetch
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||||
else
|
||||
arch := $(shell cc -dumpmachine)
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arch := $(firstword $(subst -, ,$(arch)))
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||||
|
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ifeq ($(arch), $(filter $(arch), x86_64 amd64 i386 i486 i586 i686))
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||||
# Assume x86_64
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GIT_VERSION := ""
|
||||
SRC_DIR=src/x86/
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SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
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HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
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||||
CFLAGS += -DARCH_X86 -std=c99
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else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
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SRC_DIR=src/arm/
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SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_COMMON)soc.c $(SRC_DIR)soc.c $(SRC_COMMON)pci.c $(SRC_DIR)udev.c sve.o
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HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h $(SRC_COMMON)soc.h $(SRC_DIR)soc.h $(SRC_COMMON)pci.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
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CFLAGS += -DARCH_ARM -std=c99
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||||
else
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||||
# Error lines should not be tabulated because Makefile complains about it
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||||
$(warning Unsupported arch detected: $(arch). See https://github.com/Dr-Noob/cpufetch#1-support)
|
||||
$(warning If your architecture is supported but the compilation fails, please open an issue in https://github.com/Dr-Noob/cpufetch/issues)
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$(error Aborting compilation)
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||||
endif
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||||
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GIT_VERSION := ""
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||||
SANITY_FLAGS += -Wno-pedantic-ms-format
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||||
OUTPUT=cpufetch.exe
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endif
|
||||
@@ -116,9 +86,6 @@ freq_avx.o: Makefile $(SRC_DIR)freq/freq_avx.c $(SRC_DIR)freq/freq_avx.h $(SRC_D
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freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.h $(SRC_DIR)freq/freq.h
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$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -pthread $(SRC_DIR)freq/freq_avx512.c -o $@
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||||
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sve.o: Makefile $(SRC_DIR)sve.c $(SRC_DIR)sve.h
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||||
$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SVE_FLAGS) -c $(SRC_DIR)sve.c -o $@
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|
||||
$(OUTPUT): Makefile $(SOURCE) $(HEADERS)
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ifeq ($(GIT_VERSION),"")
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$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
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@@ -135,9 +102,9 @@ clean:
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install: $(OUTPUT)
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install -Dm755 "cpufetch" "$(DESTDIR)$(PREFIX)/bin/cpufetch"
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||||
install -Dm644 "LICENSE" "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
|
||||
install -Dm644 "cpufetch.1" "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1"
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install -Dm644 "cpufetch.1" "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"
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uninstall:
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||||
rm -f "$(DESTDIR)$(PREFIX)/bin/cpufetch"
|
||||
rm -f "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
|
||||
rm -f "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1"
|
||||
rm -f "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"
|
||||
|
||||
@@ -45,7 +45,6 @@ cpufetch is a command-line tool written in C that displays the CPU information i
|
||||
- [3.1 x86_64](#31-x86_64)
|
||||
- [3.2 ARM](#32-arm)
|
||||
- [3.3 PowerPC](#33-powerpc)
|
||||
- [3.4 RISC-V](#34-risc-v)
|
||||
- [4. Colors](#4-colors)
|
||||
- [4.1 Specifying a name](#41-specifying-a-name)
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||||
- [4.2 Specifying the colors in RGB format](#42-specifying-the-colors-in-rgb-format)
|
||||
@@ -63,7 +62,7 @@ cpufetch is a command-line tool written in C that displays the CPU information i
|
||||
| OS | x86_64 / x86 | ARM | RISC-V | PowerPC |
|
||||
|:-----------:|:------------------:|:------------------:|:------------------:|:------------------:|
|
||||
| GNU / Linux | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
|
||||
| Windows | :heavy_check_mark: | :heavy_check_mark: | :x: | :x: |
|
||||
| Windows | :heavy_check_mark: | :x: | :x: | :x: |
|
||||
| Android | :heavy_check_mark: | :heavy_check_mark: | :x: | :x: |
|
||||
| macOS | :heavy_check_mark: | :heavy_check_mark: | :x: | :heavy_check_mark: |
|
||||
| FreeBSD | :heavy_check_mark: | :x: | :x: | :x: |
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||||
@@ -121,11 +120,6 @@ make
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||||
<p align="center"><img width=90% src="pictures/ibm.png"></p>
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||||
<p align="center">Talos II</p>
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||||
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||||
## 3.4 RISC-V
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||||
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||||
<p align="center"><img width=80% src="pictures/starfive.png"></p>
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<p align="center">StarFive VisionFive 2</p>
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## 4. Colors
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By default, `cpufetch` will print the CPU logo with the system colorscheme. However, you can set a custom color scheme in two different ways:
|
||||
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||||
@@ -181,7 +175,6 @@ Thanks to the fellow contributors and interested people in the project. Special
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||||
- [mdoksa76](https://github.com/mdoksa76) and [exkc](https://github.com/exkc): Excellent ideas and feedback for supporting Allwinner SoCs.
|
||||
- [Sakura286](https://github.com/Sakura286), [exkc](https://github.com/exkc) and [Patola](https://github.com/Patola): Helped with RISC-V port with ssh access, ideas, testing, etc.
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||||
- [ThomasKaiser](https://github.com/ThomasKaiser): Very valuable feedback on improving ARM SoC detection (Apple, Allwinner, Rockchip).
|
||||
- [zerkerX](https://github.com/zerkerX): Helped with feedback for supporting old (e.g., Pentium III) Intel CPUs.
|
||||
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||||
## 8. cpufetch for GPUs (gpufetch)
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||||
See [gpufetch](https://github.com/Dr-Noob/gpufetch) project!
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||||
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||||
Binary file not shown.
|
Before Width: | Height: | Size: 42 KiB |
210
src/arm/midr.c
210
src/arm/midr.c
@@ -8,76 +8,15 @@
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||||
#ifdef __linux__
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#include <sys/auxv.h>
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#include <asm/hwcap.h>
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#include "../common/freq.h"
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#elif defined __APPLE__ || __MACH__
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#include "../common/sysctl.h"
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#elif defined _WIN32
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#define WIN32_LEAN_AND_MEAN
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#define NOMINMAX
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#include <windows.h>
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#include "sysctl.h"
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#endif
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||||
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#include "../common/global.h"
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#include "../common/soc.h"
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#include "../common/args.h"
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#include "udev.h"
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#include "midr.h"
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#include "uarch.h"
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#include "sve.h"
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||||
#if defined _WIN32
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||||
// Windows stores processor information in registery at:
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||||
// "HKEY_LOCAL_MACHINE\HARDWARE\DESCRIPTION\System\CentralProcessor"
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// Within this directory, each core will get its own folder with
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// registery entries named `CP ####` that map to ARM system registers.
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||||
// Ex. the MIDR register for core 0 is the `REG_QWORD` at:
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// "HKEY_LOCAL_MACHINE\HARDWARE\DESCRIPTION\System\CentralProcessor\0\CP 4000"
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||||
// The name of these `CP ####`-registers follow their register ID encoding in hexadecimal
|
||||
// (op0&1):op1:crn:crm:op2.
|
||||
// More registers can be found here:
|
||||
// https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers
|
||||
// Some important ones:
|
||||
// CP 4000: MIDR_EL1
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||||
// CP 4020: ID_AA64PFR0_EL1
|
||||
// CP 4021: ID_AA64PFR1_EL1
|
||||
// CP 4028: ID_AA64DFR0_EL1
|
||||
// CP 4029: ID_AA64DFR1_EL1
|
||||
// CP 402C: ID_AA64AFR0_EL1
|
||||
// CP 402D: ID_AA64AFR1_EL1
|
||||
// CP 4030: ID_AA64ISAR0_EL1
|
||||
// CP 4031: ID_AA64ISAR1_EL1
|
||||
// CP 4038: ID_AA64MMFR0_EL1
|
||||
// CP 4039: ID_AA64MMFR1_EL1
|
||||
// CP 403A: ID_AA64MMFR2_EL1
|
||||
|
||||
bool read_registry_hklm_int(char* path, char* name, void* value, bool is64) {
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DWORD value_len;
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int reg_type;
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if (is64) {
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||||
value_len = sizeof(int64_t);
|
||||
reg_type = RRF_RT_REG_QWORD;
|
||||
}
|
||||
else {
|
||||
value_len = sizeof(int32_t);
|
||||
reg_type = RRF_RT_REG_DWORD;
|
||||
}
|
||||
|
||||
if(RegGetValueA(HKEY_LOCAL_MACHINE, path, name, reg_type, NULL, value, &value_len) != ERROR_SUCCESS) {
|
||||
printBug("Error reading registry entry \"%s\\%s\"", path, name);
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool get_win32_core_info_int(uint32_t core_index, char* name, void* value, bool is64) {
|
||||
// path + digits
|
||||
uint32_t max_path_size = 45+3+1;
|
||||
char* path = ecalloc(sizeof(char) * max_path_size, sizeof(char));
|
||||
snprintf(path, max_path_size, "HARDWARE\\DESCRIPTION\\System\\CentralProcessor\\%u", core_index);
|
||||
return read_registry_hklm_int(path, name, value, is64);
|
||||
}
|
||||
#endif
|
||||
|
||||
bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
|
||||
return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
|
||||
@@ -100,17 +39,8 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
|
||||
struct frequency* get_frequency_info(uint32_t core) {
|
||||
struct frequency* freq = emalloc(sizeof(struct frequency));
|
||||
|
||||
freq->measured = false;
|
||||
freq->base = UNKNOWN_DATA;
|
||||
freq->max = get_max_freq_from_file(core);
|
||||
#ifdef __linux__
|
||||
if (freq->max == UNKNOWN_DATA || measure_max_frequency_flag()) {
|
||||
if (freq->max == UNKNOWN_DATA)
|
||||
printWarn("Unable to find max frequency from udev, measuring CPU frequency");
|
||||
freq->max = measure_max_frequency(core);
|
||||
freq->measured = true;
|
||||
}
|
||||
#endif
|
||||
|
||||
return freq;
|
||||
}
|
||||
@@ -227,17 +157,6 @@ struct features* get_features_info(void) {
|
||||
feat->SHA1 = hwcaps & HWCAP_SHA1;
|
||||
feat->SHA2 = hwcaps & HWCAP_SHA2;
|
||||
feat->NEON = hwcaps & HWCAP_ASIMD;
|
||||
feat->SVE = hwcaps & HWCAP_SVE;
|
||||
|
||||
hwcaps = getauxval(AT_HWCAP2);
|
||||
if (errno == ENOENT) {
|
||||
printWarn("Unable to retrieve AT_HWCAP2 using getauxval");
|
||||
}
|
||||
else {
|
||||
#ifdef HWCAP2_SVE2
|
||||
feat->SVE2 = hwcaps & HWCAP2_SVE2;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
#else
|
||||
else {
|
||||
@@ -253,8 +172,6 @@ struct features* get_features_info(void) {
|
||||
feat->CRC32 = hwcaps & HWCAP2_CRC32;
|
||||
feat->SHA1 = hwcaps & HWCAP2_SHA1;
|
||||
feat->SHA2 = hwcaps & HWCAP2_SHA2;
|
||||
feat->SVE = false;
|
||||
feat->SVE2 = false;
|
||||
}
|
||||
#endif // ifdef __aarch64__
|
||||
#elif defined __APPLE__ || __MACH__
|
||||
@@ -264,54 +181,8 @@ struct features* get_features_info(void) {
|
||||
feat->SHA1 = true;
|
||||
feat->SHA2 = true;
|
||||
feat->NEON = true;
|
||||
feat->SVE = false;
|
||||
feat->SVE2 = false;
|
||||
#elif defined _WIN32
|
||||
|
||||
// CP 4020 maps to the ID_AA64PFR0_EL1 register on Windows
|
||||
// https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/ID-AA64PFR0-EL1--AArch64-Processor-Feature-Register-0
|
||||
int64_t pfr0 = 0;
|
||||
if(!get_win32_core_info_int(0, "CP 4020", &pfr0, true)) {
|
||||
printWarn("Unable to retrieve PFR0 via registry");
|
||||
}
|
||||
else {
|
||||
// AdvSimd[23:20]
|
||||
// -1: Not available
|
||||
// 0: AdvSimd support
|
||||
// 1: AdvSimd support + FP16
|
||||
int8_t adv_simd = ((int64_t)(pfr0 << (60 - 20)) >> 60);
|
||||
feat->NEON = (adv_simd >= 0);
|
||||
|
||||
// SVE[35:32]
|
||||
feat->SVE = (pfr0 >> 32) & 0xF ? true : false;
|
||||
}
|
||||
|
||||
// Windoes does not expose a registry entry for the ID_AA64ZFR0_EL1 register
|
||||
// this would have mapped to "CP 4024".
|
||||
feat->SVE2 = false;
|
||||
|
||||
// CP 4030 maps to the ID_AA64ISAR0_EL1 register on Windows
|
||||
// https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/ID-AA64ISAR0-EL1--AArch64-Instruction-Set-Attribute-Register-0
|
||||
int64_t isar0 = 0;
|
||||
if(!get_win32_core_info_int(0, "CP 4030", &isar0, true)) {
|
||||
printWarn("Unable to retrieve ISAR0 via registry");
|
||||
}
|
||||
else {
|
||||
// AES[7:4]
|
||||
feat->AES = (isar0 >> 4) & 0xF ? true : false;
|
||||
// SHA1[11:8]
|
||||
feat->SHA1 = (isar0 >> 8) & 0xF ? true : false;
|
||||
// SHA2[15:12]
|
||||
feat->SHA2 = (isar0 >> 12) & 0xF ? true : false;
|
||||
// CRC32[19:16]
|
||||
feat->CRC32 = (isar0 >> 16) & 0xF ? true : false;
|
||||
}
|
||||
#endif // ifdef __linux__
|
||||
|
||||
if (feat->SVE || feat->SVE2) {
|
||||
feat->cntb = sve_cntb();
|
||||
}
|
||||
|
||||
return feat;
|
||||
}
|
||||
|
||||
@@ -512,7 +383,6 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
|
||||
cpu->peak_performance = get_peak_performance(cpu);
|
||||
}
|
||||
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2 ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
|
||||
fill_cpu_info_everest_sawtooth(cpu, pcores, ecores);
|
||||
@@ -526,68 +396,6 @@ struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
|
||||
|
||||
return cpu;
|
||||
}
|
||||
#elif defined _WIN32
|
||||
struct cpuInfo* get_cpu_info_windows(struct cpuInfo* cpu) {
|
||||
init_cpu_info(cpu);
|
||||
|
||||
SYSTEM_INFO sys_info;
|
||||
GetSystemInfo(&sys_info);
|
||||
int ncores = sys_info.dwNumberOfProcessors;
|
||||
|
||||
uint32_t* midr_array = emalloc(sizeof(uint32_t) * ncores);
|
||||
int32_t* freq_array = emalloc(sizeof(uint32_t) * ncores);
|
||||
uint32_t* ids_array = emalloc(sizeof(uint32_t) * ncores);
|
||||
for(int i=0; i < ncores; i++) {
|
||||
// Cast from 64 to 32 bit to be able to re-use the pre-existing
|
||||
// functions such as fill_ids_from_midr and cores_are_equal
|
||||
int64_t midr_64;
|
||||
if(!get_win32_core_info_int(i, "CP 4000", &midr_64, true)) {
|
||||
return NULL;
|
||||
}
|
||||
midr_array[i] = midr_64;
|
||||
if(!get_win32_core_info_int(i, "~MHz", &freq_array[i], false)) {
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t sockets = fill_ids_from_midr(midr_array, freq_array, ids_array, ncores);
|
||||
|
||||
struct cpuInfo* ptr = cpu;
|
||||
int midr_idx = 0;
|
||||
int tmp_midr_idx = 0;
|
||||
for(uint32_t i=0; i < sockets; i++) {
|
||||
if(i > 0) {
|
||||
ptr->next_cpu = emalloc(sizeof(struct cpuInfo));
|
||||
ptr = ptr->next_cpu;
|
||||
init_cpu_info(ptr);
|
||||
|
||||
tmp_midr_idx = midr_idx;
|
||||
while(cores_are_equal(midr_idx, tmp_midr_idx, midr_array, freq_array)) tmp_midr_idx++;
|
||||
midr_idx = tmp_midr_idx;
|
||||
}
|
||||
|
||||
ptr->midr = midr_array[midr_idx];
|
||||
ptr->arch = get_uarch_from_midr(ptr->midr, ptr);
|
||||
|
||||
ptr->feat = get_features_info();
|
||||
|
||||
ptr->freq = emalloc(sizeof(struct frequency));
|
||||
ptr->freq->measured = false;
|
||||
ptr->freq->base = freq_array[midr_idx];
|
||||
ptr->freq->max = UNKNOWN_DATA;
|
||||
|
||||
ptr->cach = get_cache_info(ptr);
|
||||
ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, freq_array, i, ncores);
|
||||
}
|
||||
|
||||
cpu->num_cpus = sockets;
|
||||
cpu->hv = emalloc(sizeof(struct hypervisor));
|
||||
cpu->hv->present = false;
|
||||
cpu->soc = get_soc(cpu);
|
||||
cpu->peak_performance = get_peak_performance(cpu);
|
||||
|
||||
return cpu;
|
||||
}
|
||||
#endif
|
||||
|
||||
struct cpuInfo* get_cpu_info(void) {
|
||||
@@ -598,8 +406,6 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
return get_cpu_info_linux(cpu);
|
||||
#elif defined __APPLE__ || __MACH__
|
||||
return get_cpu_info_mach(cpu);
|
||||
#elif defined _WIN32
|
||||
return get_cpu_info_windows(cpu);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -613,7 +419,7 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
|
||||
|
||||
char* get_str_features(struct cpuInfo* cpu) {
|
||||
struct features* feat = cpu->feat;
|
||||
uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,SVE,SVE2,") + 1;
|
||||
uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,") + 1;
|
||||
uint32_t len = 0;
|
||||
char* string = ecalloc(max_len, sizeof(char));
|
||||
|
||||
@@ -621,14 +427,6 @@ char* get_str_features(struct cpuInfo* cpu) {
|
||||
strcat(string, "NEON,");
|
||||
len += 5;
|
||||
}
|
||||
if(feat->SVE) {
|
||||
strcat(string, "SVE,");
|
||||
len += 4;
|
||||
}
|
||||
if(feat->SVE2) {
|
||||
strcat(string, "SVE2,");
|
||||
len += 5;
|
||||
}
|
||||
if(feat->SHA1) {
|
||||
strcat(string, "SHA1,");
|
||||
len += 5;
|
||||
@@ -678,10 +476,6 @@ void print_debug(struct cpuInfo* cpu) {
|
||||
}
|
||||
}
|
||||
|
||||
if (cpu->feat->SVE || cpu->feat->SVE2) {
|
||||
printf("- cntb: %d\n", (int) cpu->feat->cntb);
|
||||
}
|
||||
|
||||
#if defined(__APPLE__) || defined(__MACH__)
|
||||
printf("hw.cpufamily: 0x%.8X\n", get_sys_info_by_name("hw.cpufamily"));
|
||||
printf("hw.cpusubfamily: 0x%.8X\n", get_sys_info_by_name("hw.cpusubfamily"));
|
||||
|
||||
426
src/arm/soc.c
426
src/arm/soc.c
@@ -8,43 +8,15 @@
|
||||
#include "udev.h"
|
||||
#include "uarch.h"
|
||||
#include "../common/global.h"
|
||||
#include "../common/pci.h"
|
||||
|
||||
#if defined(__APPLE__) || defined(__MACH__)
|
||||
#include "../common/sysctl.h"
|
||||
#endif
|
||||
|
||||
#if defined(_WIN32)
|
||||
#define WIN32_LEAN_AND_MEAN
|
||||
#define NOMINMAX
|
||||
#include <windows.h>
|
||||
|
||||
// Gets a RRF_RT_REG_SZ-entry from the Windows registry, returning a newly allocated
|
||||
// string and its length
|
||||
bool read_registry_hklm_sz(char* path, char* value, char** string, LPDWORD length) {
|
||||
// First call to RegGetValueA gets the length of the string and determines how much
|
||||
// memory should be allocated for the new string
|
||||
if(RegGetValueA(HKEY_LOCAL_MACHINE, path, value, RRF_RT_REG_SZ, NULL, NULL, length) != ERROR_SUCCESS) {
|
||||
return false;
|
||||
}
|
||||
*string = ecalloc(*length, sizeof(char));
|
||||
// Second call actually writes the string data
|
||||
if(RegGetValueA(HKEY_LOCAL_MACHINE, path, value, RRF_RT_REG_SZ, NULL, *string, length) != ERROR_SUCCESS) {
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
#include "sysctl.h"
|
||||
#endif
|
||||
|
||||
#define NA -1
|
||||
#define min(a,b) (((a)<(b))?(a):(b))
|
||||
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
|
||||
|
||||
#define PROP_MTK_PLATFORM "ro.mediatek.platform"
|
||||
#define PROP_SOC_MODEL "ro.soc.model"
|
||||
#define PROP_PRODUCT_BOARD "ro.product.board"
|
||||
#define PROP_BOARD_PLATFORM "ro.board.platform"
|
||||
|
||||
static char* soc_rpi_string[] = {
|
||||
"BCM2835",
|
||||
"BCM2836",
|
||||
@@ -55,7 +27,8 @@ static char* soc_rpi_string[] = {
|
||||
|
||||
char* toupperstr(char* str) {
|
||||
int len = strlen(str) + 1;
|
||||
char* ret = ecalloc(len, sizeof(char));
|
||||
char* ret = emalloc(sizeof(char) * len);
|
||||
memset(ret, 0, sizeof(char) * len);
|
||||
|
||||
for(int i=0; i < len; i++) {
|
||||
ret[i] = toupper((unsigned char) str[i]);
|
||||
@@ -128,7 +101,7 @@ bool get_sunxisoc_from_sid(struct system_on_chip* soc, char* raw_name, uint32_t
|
||||
int index = 0;
|
||||
while(socFromSid[index].sid != 0x0) {
|
||||
if(socFromSid[index].sid == sid) {
|
||||
fill_soc(soc, socFromSid[index].soc.name, socFromSid[index].soc.model, socFromSid[index].soc.process);
|
||||
fill_soc(soc, socFromSid[index].soc.soc_name, socFromSid[index].soc.soc_model, socFromSid[index].soc.process);
|
||||
return true;
|
||||
}
|
||||
index++;
|
||||
@@ -154,24 +127,24 @@ bool match_broadcom(char* soc_name, struct system_on_chip* soc) {
|
||||
if((tmp = strstr(soc_name, "BCM")) == NULL)
|
||||
return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_BROADCOM;
|
||||
soc->soc_vendor = SOC_VENDOR_BROADCOM;
|
||||
|
||||
SOC_START
|
||||
SOC_EQ(tmp, "BCM2835", "BCM2835", SOC_BCM_2835, soc, 65)
|
||||
SOC_EQ(tmp, "BCM2836", "BCM2836", SOC_BCM_2836, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2837", "BCM2837", SOC_BCM_2837, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2837B0", "BCM2837B0", SOC_BCM_2837B0, soc, 40)
|
||||
SOC_EQ(tmp, "BCM21553", "BCM21553", SOC_BCM_21553, soc, 65)
|
||||
SOC_EQ(tmp, "BCM21553-Thunderbird", "BCM21553 Thunderbird", SOC_BCM_21553T, soc, 65)
|
||||
SOC_EQ(tmp, "BCM21663", "BCM21663", SOC_BCM_21663, soc, 40)
|
||||
SOC_EQ(tmp, "BCM21664", "BCM21664", SOC_BCM_21664, soc, 40)
|
||||
SOC_EQ(tmp, "BCM28155", "BCM28155", SOC_BCM_28155, soc, 40)
|
||||
SOC_EQ(tmp, "BCM23550", "BCM23550", SOC_BCM_23550, soc, 40)
|
||||
SOC_EQ(tmp, "BCM28145", "BCM28145", SOC_BCM_28145, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2157", "BCM2157", SOC_BCM_2157, soc, 65)
|
||||
SOC_EQ(tmp, "BCM21654", "BCM21654", SOC_BCM_21654, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2711", "BCM2711", SOC_BCM_2711, soc, 28)
|
||||
SOC_EQ(tmp, "BCM2712", "BCM2712", SOC_BCM_2712, soc, 16)
|
||||
SOC_EQ(tmp, "BCM2835", "2835", SOC_BCM_2835, soc, 65)
|
||||
SOC_EQ(tmp, "BCM2836", "2836", SOC_BCM_2836, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2837", "2837", SOC_BCM_2837, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2837B0", "2837B0", SOC_BCM_2837B0, soc, 40)
|
||||
SOC_EQ(tmp, "BCM21553", "21553", SOC_BCM_21553, soc, 65)
|
||||
SOC_EQ(tmp, "BCM21553-Thunderbird", "21553 Thunderbird", SOC_BCM_21553T, soc, 65)
|
||||
SOC_EQ(tmp, "BCM21663", "21663", SOC_BCM_21663, soc, 40)
|
||||
SOC_EQ(tmp, "BCM21664", "21664", SOC_BCM_21664, soc, 40)
|
||||
SOC_EQ(tmp, "BCM28155", "28155", SOC_BCM_28155, soc, 40)
|
||||
SOC_EQ(tmp, "BCM23550", "23550", SOC_BCM_23550, soc, 40)
|
||||
SOC_EQ(tmp, "BCM28145", "28145", SOC_BCM_28145, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2157", "2157", SOC_BCM_2157, soc, 65)
|
||||
SOC_EQ(tmp, "BCM21654", "21654", SOC_BCM_21654, soc, 40)
|
||||
SOC_EQ(tmp, "BCM2711", "2711", SOC_BCM_2711, soc, 28)
|
||||
SOC_EQ(tmp, "BCM2712", "2712", SOC_BCM_2712, soc, 16)
|
||||
SOC_END
|
||||
}
|
||||
|
||||
@@ -182,7 +155,7 @@ bool match_google(char* soc_name, struct system_on_chip* soc) {
|
||||
if((tmp = strstr(soc_name, "gs")) == NULL)
|
||||
return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_GOOGLE;
|
||||
soc->soc_vendor = SOC_VENDOR_GOOGLE;
|
||||
|
||||
SOC_START
|
||||
SOC_EQ(tmp, "gs101", "Tensor", SOC_GOOGLE_TENSOR, soc, 5)
|
||||
@@ -193,15 +166,13 @@ bool match_google(char* soc_name, struct system_on_chip* soc) {
|
||||
|
||||
// https://www.techinsights.com/
|
||||
// https://datasheetspdf.com/pdf-file/1316605/HiSilicon/Hi3660/1
|
||||
// https://github.com/Dr-Noob/cpufetch/issues/259
|
||||
bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
|
||||
char* tmp;
|
||||
|
||||
if((tmp = strstr(soc_name, "hi")) != NULL);
|
||||
else if((tmp = strstr(soc_name, "kirin")) != NULL);
|
||||
else return false;
|
||||
if((tmp = strstr(soc_name, "hi")) == NULL)
|
||||
return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_KIRIN;
|
||||
soc->soc_vendor = SOC_VENDOR_KIRIN;
|
||||
|
||||
SOC_START
|
||||
SOC_EQ(tmp, "hi3620GFC", "K3V2", SOC_HISILICON_3620, soc, 40)
|
||||
@@ -232,7 +203,6 @@ bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
|
||||
SOC_EQ(tmp, "hi3680", "980", SOC_HISILICON_3680, soc, 7)
|
||||
//SOC_EQ(tmp, "?", "985", SOC_KIRIN, soc, 7)
|
||||
SOC_EQ(tmp, "hi3690", "990", SOC_HISILICON_3690, soc, 7)
|
||||
SOC_EQ(tmp, "kirin9000s", "9000s", SOC_HISILICON_9000S,soc, 7)
|
||||
SOC_END
|
||||
}
|
||||
|
||||
@@ -243,7 +213,7 @@ bool match_exynos(char* soc_name, struct system_on_chip* soc) {
|
||||
else if((tmp = strstr(soc_name, "exynos")) != NULL);
|
||||
else return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_EXYNOS;
|
||||
soc->soc_vendor = SOC_VENDOR_EXYNOS;
|
||||
|
||||
// Because exynos are recently using "exynosXXXX" instead
|
||||
// of "universalXXXX" as codenames, SOC_EXY_EQ will check for
|
||||
@@ -303,24 +273,10 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
|
||||
if((tmp = strstr(soc_name_upper, "MT")) == NULL)
|
||||
return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_MEDIATEK;
|
||||
soc->soc_vendor = SOC_VENDOR_MEDIATEK;
|
||||
|
||||
SOC_START
|
||||
// TODO
|
||||
// Dimensity 6000 Series //
|
||||
// Dimensity 7000 Series //
|
||||
// Dimensity 8000 Series //
|
||||
// END TODO
|
||||
// Dimensity 9000 Series //
|
||||
SOC_EQ(tmp, "MT6983Z", "Dimensity 9000", SOC_MTK_MT6983Z, soc, 4)
|
||||
SOC_EQ(tmp, "MT8798Z/C","Dimensity 9000", SOC_MTK_MT8798ZC, soc, 4)
|
||||
SOC_EQ(tmp, "MT6983W", "Dimensity 9000+", SOC_MTK_MT6983W, soc, 4)
|
||||
SOC_EQ(tmp, "MT8798Z/T","Dimensity 9000+", SOC_MTK_MT8798ZT, soc, 4)
|
||||
SOC_EQ(tmp, "MT6985W", "Dimensity 9200+", SOC_MTK_MT6985W, soc, 4)
|
||||
SOC_EQ(tmp, "MT6985", "Dimensity 9200", SOC_MTK_MT6985, soc, 4)
|
||||
SOC_EQ(tmp, "MT6989", "Dimensity 9300", SOC_MTK_MT6989, soc, 4)
|
||||
SOC_EQ(tmp, "MT8796", "Dimensity 9300", SOC_MTK_MT8796, soc, 4)
|
||||
// Dimensity 1000 //
|
||||
// Dimensity //
|
||||
SOC_EQ(tmp, "MT6893Z", "Dimensity 1300", SOC_MTK_MT6893Z, soc, 6)
|
||||
SOC_EQ(tmp, "MT6893", "Dimensity 1200", SOC_MTK_MT6893, soc, 6)
|
||||
SOC_EQ(tmp, "MT6891", "Dimensity 1100", SOC_MTK_MT6891, soc, 6)
|
||||
@@ -330,21 +286,12 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
|
||||
SOC_EQ(tmp, "MT6885Z", "Dimensity 1000L", SOC_MTK_MT6885Z, soc, 7)
|
||||
SOC_EQ(tmp, "MT6889Z", "Dimensity 1000+", SOC_MTK_MT6889Z, soc, 7)
|
||||
SOC_EQ(tmp, "MT6883Z", "Dimensity 1000C", SOC_MTK_MT6883Z, soc, 7)
|
||||
// Dimensity 900
|
||||
SOC_EQ(tmp, "MT6877V/Z","Dimensity 900", SOC_MTK_MT6877VZ, soc, 6)
|
||||
SOC_EQ(tmp, "MT6877T" ,"Dimensity 920", SOC_MTK_MT6877T, soc, 6)
|
||||
SOC_EQ(tmp, "MT6855" ,"Dimensity 930", SOC_MTK_MT6855, soc, 6)
|
||||
// Dimensity 800
|
||||
SOC_EQ(tmp, "MT6873", "Dimensity 800", SOC_MTK_MT6873, soc, 7)
|
||||
SOC_EQ(tmp, "MT6853V/T","Dimensity 800U", SOC_MTK_MT6853VT, soc, 7)
|
||||
SOC_EQ(tmp, "MT6853T", "Dimensity 800U", SOC_MTK_MT6853T, soc, 7)
|
||||
SOC_EQ(tmp, "MT6833P", "Dimensity 810", SOC_MTK_MT6833P, soc, 6)
|
||||
SOC_EQ(tmp, "MT6833GP", "Dimensity 810", SOC_MTK_MT6833GP, soc, 6)
|
||||
SOC_EQ(tmp, "MT6833V", "Dimensity 810", SOC_MTK_MT6833V, soc, 6)
|
||||
SOC_EQ(tmp, "MT6875", "Dimensity 820", SOC_MTK_MT6875, soc, 7)
|
||||
// Dimensity 700
|
||||
SOC_EQ(tmp, "MT6833", "Dimensity 700", SOC_MTK_MT6833, soc, 7)
|
||||
SOC_EQ(tmp, "MT6853V", "Dimensity 720", SOC_MTK_MT6853, soc, 7)
|
||||
SOC_EQ(tmp, "MT6853", "Dimensity 720", SOC_MTK_MT6853, soc, 7)
|
||||
SOC_EQ(tmp, "MT6873", "Dimensity 800", SOC_MTK_MT6873, soc, 7)
|
||||
SOC_EQ(tmp, "MT6853V", "Dimensity 800U", SOC_MTK_MT6853V, soc, 7)
|
||||
SOC_EQ(tmp, "MT6833", "Dimensity 810", SOC_MTK_MT6833, soc, 6)
|
||||
SOC_EQ(tmp, "MT6875", "Dimensity 820", SOC_MTK_MT6875, soc, 7)
|
||||
// Helio //
|
||||
SOC_EQ(tmp, "MT6761D", "Helio A20", SOC_MTK_MT6761D, soc, 12)
|
||||
SOC_EQ(tmp, "MT6761", "Helio A22", SOC_MTK_MT6761, soc, 12)
|
||||
@@ -473,9 +420,6 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
|
||||
}
|
||||
|
||||
/*
|
||||
* Good sources:
|
||||
* https://www.geektopia.es/es/products/company/qualcomm/socs/
|
||||
*
|
||||
* APQ: Application Processor Qualcomm
|
||||
* MSM: Mobile Station Modem
|
||||
* In a APQXXXX or MSMXXXX, the second digit represents:
|
||||
@@ -509,7 +453,7 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
|
||||
else if((tmp = strstr(soc_name_upper, "QSD")) != NULL);
|
||||
else return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_SNAPDRAGON;
|
||||
soc->soc_vendor = SOC_VENDOR_SNAPDRAGON;
|
||||
|
||||
SOC_START
|
||||
// Snapdragon S1 //
|
||||
@@ -633,25 +577,6 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
|
||||
SOC_EQ(tmp, "SM8250-AB", "865+", SOC_SNAPD_SM8250_AB, soc, 7)
|
||||
SOC_EQ(tmp, "SM8350", "888", SOC_SNAPD_SM8350, soc, 5)
|
||||
SOC_EQ(tmp, "SM8350-AC", "888+", SOC_SNAPD_SM8350, soc, 5)
|
||||
// Snapdragon Gen 4 //
|
||||
SOC_EQ(tmp, "SM4375", "4 Gen 1", SOC_SNAPD_SM4375, soc, 6)
|
||||
SOC_EQ(tmp, "SM4450", "4 Gen 2", SOC_SNAPD_SM4450, soc, 4)
|
||||
SOC_EQ(tmp, "SM4635", "4s Gen 2", SOC_SNAPD_SM4635, soc, 4)
|
||||
// Snapdragon Gen 6 //
|
||||
SOC_EQ(tmp, "SM6375-AC", "6s Gen 3", SOC_SNAPD_SM6375_AC, soc, 6)
|
||||
SOC_EQ(tmp, "SM6450", "6 Gen 1", SOC_SNAPD_SM6450, soc, 4)
|
||||
// Snapdragon Gen 7 //
|
||||
SOC_EQ(tmp, "SM7435-AB", "7s Gen 2", SOC_SNAPD_SM7435_AB, soc, 4)
|
||||
SOC_EQ(tmp, "SM7450", "7 Gen 1", SOC_SNAPD_SM7450, soc, 4)
|
||||
SOC_EQ(tmp, "SM7475", "7+ Gen 2", SOC_SNAPD_SM7475, soc, 4)
|
||||
SOC_EQ(tmp, "SM7550-AB", "7 Gen 3", SOC_SNAPD_SM7550_AB, soc, 4)
|
||||
SOC_EQ(tmp, "SM7675-AB", "7+ Gen 3", SOC_SNAPD_SM7675_AB, soc, 4)
|
||||
// Snapdragon Gen 8 //
|
||||
SOC_EQ(tmp, "SM8450", "8 Gen 1", SOC_SNAPD_SM8450, soc, 4)
|
||||
SOC_EQ(tmp, "SM8475", "8+ Gen 1", SOC_SNAPD_SM8475, soc, 4)
|
||||
SOC_EQ(tmp, "SM8550-AB", "8 Gen 2", SOC_SNAPD_SM8550_AB, soc, 4)
|
||||
SOC_EQ(tmp, "SM8635", "8s Gen 3", SOC_SNAPD_SM8635, soc, 4)
|
||||
SOC_EQ(tmp, "SM8650-AB", "8 Gen 3", SOC_SNAPD_SM8650_AB, soc, 4)
|
||||
SOC_END
|
||||
}
|
||||
|
||||
@@ -662,7 +587,7 @@ bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
|
||||
if((tmp = strstr(soc_name, "sun")) == NULL)
|
||||
return false;
|
||||
|
||||
soc->vendor = SOC_VENDOR_ALLWINNER;
|
||||
soc->soc_vendor = SOC_VENDOR_ALLWINNER;
|
||||
|
||||
SOC_START
|
||||
// SoCs we can detect just with with the name
|
||||
@@ -698,37 +623,12 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
|
||||
return true;
|
||||
}
|
||||
|
||||
// New Snapdragon SoCs codenames
|
||||
// https://github.com/sm8450-mainline/fdt?tab=readme-ov-file#chipsets
|
||||
// https://github.com/Dr-Noob/cpufetch/issues/253
|
||||
if (strcmp(soc_name, "cape") == 0) {
|
||||
fill_soc(soc, "8+ Gen 1", SOC_SNAPD_SM8475, 4);
|
||||
return true;
|
||||
}
|
||||
|
||||
// Snapdragon 8 Gen 1 reported as "taro"
|
||||
if(strcmp(soc_name, "taro") == 0) {
|
||||
fill_soc(soc, "8 Gen 1", SOC_SNAPD_SM8450, 4);
|
||||
return true;
|
||||
}
|
||||
|
||||
if(strcmp(soc_name, "ukee") == 0) {
|
||||
fill_soc(soc, "7+ Gen 2", SOC_SNAPD_SM7475, 4);
|
||||
return true;
|
||||
}
|
||||
|
||||
if(strcmp(soc_name, "diwali") == 0) {
|
||||
fill_soc(soc, "7 Gen 1", SOC_SNAPD_SM7450, 4);
|
||||
return true;
|
||||
}
|
||||
|
||||
// parrot can be either SM7435 or SM6450, we need more data
|
||||
// to distingish between those two
|
||||
|
||||
if(strcmp(soc_name, "ravelin") == 0) {
|
||||
fill_soc(soc, "4 Gen 2", SOC_SNAPD_SM4450, 4);
|
||||
return true;
|
||||
}
|
||||
|
||||
// Google Pixel 6
|
||||
// https://github.com/Dr-Noob/cpufetch/issues/134
|
||||
if(strcmp(soc_name, "oriole") == 0) {
|
||||
@@ -786,7 +686,7 @@ void try_parse_soc_from_string(struct system_on_chip* soc, int soc_len, char* so
|
||||
soc->raw_name = emalloc(sizeof(char) * (soc_len + 1));
|
||||
strncpy(soc->raw_name, soc_str, soc_len + 1);
|
||||
soc->raw_name[soc_len] = '\0';
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
parse_soc_from_string(soc);
|
||||
}
|
||||
|
||||
@@ -794,34 +694,24 @@ struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
|
||||
char tmp[100];
|
||||
int property_len = 0;
|
||||
|
||||
property_len = android_property_get(PROP_MTK_PLATFORM, (char *) &tmp);
|
||||
property_len = android_property_get("ro.mediatek.platform", (char *) &tmp);
|
||||
if(property_len > 0) {
|
||||
try_parse_soc_from_string(soc, property_len, tmp);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_MTK_PLATFORM, tmp);
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.mediatek.platform: %s", tmp);
|
||||
else return soc;
|
||||
}
|
||||
|
||||
// https://github.com/Dr-Noob/cpufetch/issues/253
|
||||
// ro.soc.model might be more reliable than ro.product.board or
|
||||
// ro.board.platform, so try with it first
|
||||
property_len = android_property_get(PROP_SOC_MODEL, (char *) &tmp);
|
||||
property_len = android_property_get("ro.product.board", (char *) &tmp);
|
||||
if(property_len > 0) {
|
||||
try_parse_soc_from_string(soc, property_len, tmp);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_SOC_MODEL, tmp);
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.product.board: %s", tmp);
|
||||
else return soc;
|
||||
}
|
||||
|
||||
property_len = android_property_get(PROP_PRODUCT_BOARD, (char *) &tmp);
|
||||
property_len = android_property_get("ro.board.platform", (char *) &tmp);
|
||||
if(property_len > 0) {
|
||||
try_parse_soc_from_string(soc, property_len, tmp);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_PRODUCT_BOARD, tmp);
|
||||
else return soc;
|
||||
}
|
||||
|
||||
property_len = android_property_get(PROP_BOARD_PLATFORM, (char *) &tmp);
|
||||
if(property_len > 0) {
|
||||
try_parse_soc_from_string(soc, property_len, tmp);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property %s: %s", PROP_BOARD_PLATFORM, tmp);
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.board.platform: %s", tmp);
|
||||
else return soc;
|
||||
}
|
||||
|
||||
@@ -887,7 +777,7 @@ bool get_rk_soc_from_efuse(struct system_on_chip* soc, char* efuse) {
|
||||
int index = 0;
|
||||
while(socFromRK[index].rk_soc != 0x0) {
|
||||
if(socFromRK[index].rk_soc == rk_soc) {
|
||||
fill_soc(soc, socFromRK[index].soc.name, socFromRK[index].soc.model, socFromRK[index].soc.process);
|
||||
fill_soc(soc, socFromRK[index].soc.soc_name, socFromRK[index].soc.soc_model, socFromRK[index].soc.process);
|
||||
return true;
|
||||
}
|
||||
index++;
|
||||
@@ -934,7 +824,7 @@ struct system_on_chip* guess_soc_from_uarch(struct system_on_chip* soc, struct c
|
||||
int index = 0;
|
||||
while(socFromUarch[index].u != UARCH_UNKNOWN) {
|
||||
if(socFromUarch[index].u == get_uarch(arch)) {
|
||||
fill_soc(soc, socFromUarch[index].soc.name, socFromUarch[index].soc.model, socFromUarch[index].soc.process);
|
||||
fill_soc(soc, socFromUarch[index].soc.soc_name, socFromUarch[index].soc.soc_model, socFromUarch[index].soc.process);
|
||||
return soc;
|
||||
}
|
||||
index++;
|
||||
@@ -944,167 +834,6 @@ struct system_on_chip* guess_soc_from_uarch(struct system_on_chip* soc, struct c
|
||||
return soc;
|
||||
}
|
||||
|
||||
// Return the dt string without the NULL characters.
|
||||
char* get_dt_str(char* dt, int filelen) {
|
||||
char* dt_without_null = (char *) malloc(sizeof(char) * filelen);
|
||||
memcpy(dt_without_null, dt, filelen);
|
||||
|
||||
for (int i=0; i < filelen-1; i++) {
|
||||
if (dt_without_null[i] == '\0')
|
||||
dt_without_null[i] = ',';
|
||||
}
|
||||
return dt_without_null;
|
||||
}
|
||||
|
||||
bool match_dt(struct system_on_chip* soc, char* dt, int filelen, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
|
||||
// The /proc/device-tree/compatible file (passed by dt) uses NULL
|
||||
// to separate the strings, so we need to make an special case here
|
||||
// and iterate over the NULL characters, thus iterating over each
|
||||
// individual compatible strings.
|
||||
|
||||
if (strstr(dt, expected_name) != NULL) {
|
||||
fill_soc(soc, soc_name, soc_model, process);
|
||||
return true;
|
||||
}
|
||||
|
||||
char *compatible = dt;
|
||||
char *end_of_dt = dt + filelen;
|
||||
|
||||
while ((compatible = strchr(compatible, '\0')) != end_of_dt) {
|
||||
compatible++;
|
||||
if (strstr(compatible, expected_name) != NULL) {
|
||||
fill_soc(soc, soc_name, soc_model, process);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
#define DT_START if (false) {}
|
||||
#define DT_EQ(dt, filelen, soc, expected_name, soc_name, soc_model, process) \
|
||||
else if (match_dt(soc, dt, filelen, expected_name, soc_name, soc_model, process)) return soc;
|
||||
#define DT_END(dt, filelen) else { printWarn("guess_soc_from_devtree: No match found for '%s'", get_dt_str(dt, filelen)); return soc; }
|
||||
|
||||
// TODO: Move this to doc
|
||||
// The number of fields seems non-standard, so for now it seems wiser
|
||||
// to just get the entire string with all fields and just look for the
|
||||
// substring.
|
||||
// TODO: Implement this by going trough NULL-separated fields rather than
|
||||
// using strstr.
|
||||
// https://trac.gateworks.com/wiki/linux/devicetree
|
||||
struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
|
||||
int len;
|
||||
char* dt = get_devtree_compatible(&len);
|
||||
if (dt == NULL) {
|
||||
return soc;
|
||||
}
|
||||
|
||||
DT_START
|
||||
// The following are internal codenames of Asahi Linux
|
||||
// https://github.com/AsahiLinux/docs/wiki/Codenames
|
||||
// https://github.com/Dr-Noob/cpufetch/issues/263
|
||||
DT_EQ(dt, len, soc, "apple,t8103", "M1", SOC_APPLE_M1, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t6000", "M1 Pro", SOC_APPLE_M1_PRO, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t6001", "M1 Max", SOC_APPLE_M1_MAX, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t6002", "M1 Ultra", SOC_APPLE_M1_ULTRA, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t8112", "M2", SOC_APPLE_M2, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t6020", "M2 Pro", SOC_APPLE_M2_PRO, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t6021", "M2 Max", SOC_APPLE_M2_MAX, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t6022", "M2 Ultra", SOC_APPLE_M2_ULTRA, 5)
|
||||
DT_EQ(dt, len, soc, "apple,t8122", "M3", SOC_APPLE_M3, 3)
|
||||
DT_EQ(dt, len, soc, "apple,t6030", "M3 Pro", SOC_APPLE_M3_PRO, 3)
|
||||
DT_EQ(dt, len, soc, "apple,t6031", "M3 Max", SOC_APPLE_M3_MAX, 3)
|
||||
DT_EQ(dt, len, soc, "apple,t6034", "M3 Max", SOC_APPLE_M3_MAX, 3)
|
||||
// NVIDIA
|
||||
// https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm64/boot/dts/nvidia
|
||||
// https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm/boot/dts/nvidia
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra20", "Tegra 2", SOC_TEGRA_2, 40) // https://en.wikipedia.org/wiki/Tegra#Tegra_2
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra30", "Tegra 3", SOC_TEGRA_3, 40) // https://en.wikipedia.org/wiki/Tegra#Tegra_3
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra114", "Tegra 4", SOC_TEGRA_4, 28) // https://en.wikipedia.org/wiki/Tegra#Tegra_4
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra124", "Tegra K1", SOC_TEGRA_K1, 28) // https://en.wikipedia.org/wiki/Tegra#Tegra_K1
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra132", "Tegra K1", SOC_TEGRA_K1, 28) // https://en.wikipedia.org/wiki/Tegra#Tegra_K1
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra210", "Tegra X1", SOC_TEGRA_X1, 20) // https://en.wikipedia.org/wiki/Tegra#Tegra_X1
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra186", "Tegra X2", SOC_TEGRA_X2, 16) // https://en.wikipedia.org/wiki/Tegra#Tegra_X2
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra194", "Tegra Xavier", SOC_TEGRA_XAVIER, 12) // https://en.wikipedia.org/wiki/Tegra#Xavier
|
||||
DT_EQ(dt, len, soc, "nvidia,tegra234", "Tegra Orin", SOC_TEGRA_ORIN, 8) // https://www.phoronix.com/news/NVIDIA-Orin-Tegra234-Audio, https://github.com/Dr-Noob/cpufetch/issues/275, https://en.wikipedia.org/wiki/Tegra#Orin
|
||||
// Qualcomm now also in devtree...
|
||||
// TODO: Integrate this with SOC_EQ
|
||||
DT_EQ(dt, len, soc, "qcom,sc8280", "8cx Gen 3", SOC_SNAPD_SC8280XP, 5)
|
||||
// grep -oR -h --color -E '"fsl,.*' *.dtsi | sort | uniq | cut -d ',' -f1-2 | grep -v '-'
|
||||
// https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm64/boot/dts/freescale
|
||||
DT_EQ(dt, len, soc, "fsl,imx8qm", "i.MX 8QuadMax", SOC_NXP_IMX8QM, 28) // https://www.nxp.com/docs/en/fact-sheet/IMX8FAMFS.pdf
|
||||
DT_EQ(dt, len, soc, "fsl,imx8qp", "i.MX 8QuadPlus", SOC_NXP_IMX8QP, 28) // Actually not in dtsi, compatible string is just a guess
|
||||
DT_EQ(dt, len, soc, "fsl,imx8mp", "i.MX 8M Plus", SOC_NXP_IMX8MP, 14) // https://www.nxp.com/docs/en/fact-sheet/IMX8MPLUSFS.pdf https://github.com/Dr-Noob/cpufetch/issues/261
|
||||
DT_EQ(dt, len, soc, "fsl,imx8mn", "i.MX 8M Nano", SOC_NXP_IMX8MN, NA)
|
||||
DT_EQ(dt, len, soc, "fsl,imx8mm", "i.MX 8M Mini", SOC_NXP_IMX8MM, NA) // https://www.nxp.com/docs/en/fact-sheet/IMX8MMINIFS.pdf
|
||||
DT_EQ(dt, len, soc, "fsl,imx8dxp", "i.MX 8DualXPlus", SOC_NXP_IMX8DXP, NA)
|
||||
DT_EQ(dt, len, soc, "fsl,imx8qxp", "i.MX 8QuadXPlus", SOC_NXP_IMX8QXP, NA)
|
||||
DT_EQ(dt, len, soc, "fsl,imx93", "i.MX 93", SOC_NXP_IMX93, NA)
|
||||
// [1] https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm64/boot/dts/amlogic
|
||||
// [2] https://github.com/Dr-Noob/cpufetch/issues/268
|
||||
// [3] https://www.amlogic.com/#Products/393/index.html
|
||||
// [4] https://wikimovel.com
|
||||
// [5] https://wiki.postmarketos.org/wiki/Amlogic_S905W/S905D/S905X/S905L/S805X/S805Y/S905Z
|
||||
DT_EQ(dt, len, soc, "amlogic,a311d", "A311D", SOC_AMLOGIC_A311D, 12) // [1,2,3,4]
|
||||
DT_EQ(dt, len, soc, "amlogic,a311d2", "A311D2", SOC_AMLOGIC_A311D2, 12) // [1,4]
|
||||
DT_EQ(dt, len, soc, "amlogic,s905w", "S905W", SOC_AMLOGIC_S905W, 28) // [1,5]
|
||||
DT_EQ(dt, len, soc, "amlogic,s905d", "S905D", SOC_AMLOGIC_S905D, 28) // [1,5]
|
||||
DT_EQ(dt, len, soc, "amlogic,s905x", "S905X", SOC_AMLOGIC_S905X, 28) // [1,4,5]
|
||||
DT_EQ(dt, len, soc, "amlogic,s805x", "S805X", SOC_AMLOGIC_S805X, 28) // [1,5]
|
||||
// Marvell
|
||||
// https://elixir.bootlin.com/linux/v6.10.6/source/arch/arm64/boot/dts/marvell
|
||||
DT_EQ(dt, len, soc, "marvell,armada3700", "Armada 3700", SOC_MARVELL_A3700, 28) // http://wiki.espressobin.net/tiki-index.php?page=Armada+3700 (pdf), https://github.com/Dr-Noob/cpufetch/issues/279
|
||||
DT_EQ(dt, len, soc, "marvell,armada3710", "Armada 3710", SOC_MARVELL_A3710, 28) // https://gzhls.at/blob/ldb/2/7/4/2/6eacf9661c5a2d20c4d7cd3328ffba47bfd6.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,armada3720", "Armada 3720", SOC_MARVELL_A3720, 28) // https://gzhls.at/blob/ldb/2/7/4/2/6eacf9661c5a2d20c4d7cd3328ffba47bfd6.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,armada7200", "Armada 7200", SOC_MARVELL_A7200, 28) // Assuming same manufacturing process as 7400
|
||||
DT_EQ(dt, len, soc, "marvell,armada7400", "Armada 7400", SOC_MARVELL_A7400, 28) // https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-7040-product-brief-2017-12.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,armada8020", "Armada 8020", SOC_MARVELL_A8020, 28) // https://datasheet.datasheetarchive.com/originals/crawler/marvell.com/da7b6a997e49e9e93fa4b1f4cfbed71b.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,armada8040", "Armada 8040", SOC_MARVELL_A8040, 28) // https://www.verical.com/datasheet/marvell-technology-group-application-processors-and-soc-88f8040-a2-bvp4i160-6331367.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,cn9130", "CN9130", SOC_MARVELL_CN9130, NA) // https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-infrastructure-processors-octeon-tx2-cn913x-product-brief.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,cn9131", "CN9131", SOC_MARVELL_CN9131, NA) // https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-infrastructure-processors-octeon-tx2-cn913x-product-brief.pdf
|
||||
DT_EQ(dt, len, soc, "marvell,cn9132", "CN9132", SOC_MARVELL_CN9132, NA) // https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-infrastructure-processors-octeon-tx2-cn913x-product-brief.pdf
|
||||
DT_END(dt, len)
|
||||
}
|
||||
|
||||
struct system_on_chip* guess_soc_from_pci(struct system_on_chip* soc, struct cpuInfo* cpu) {
|
||||
struct pci_devices * pci = get_pci_devices();
|
||||
if (pci == NULL) {
|
||||
printWarn("guess_soc_from_pci: Unable to find suitable PCI devices");
|
||||
return soc;
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
struct system_on_chip soc;
|
||||
} pciToSoC;
|
||||
|
||||
pciToSoC socFromPCI[] = {
|
||||
{PCI_VENDOR_NVIDIA, PCI_DEVICE_TEGRA_X1, {SOC_TEGRA_X1, SOC_VENDOR_NVIDIA, 20, "Tegra X1", NULL} },
|
||||
// {PCI_VENDOR_NVIDIA, PCI_DEVICE_GH_200,{SOC_GH_200, SOC_VENDOR_NVIDIA, ?, "Grace Hopper", NULL} },
|
||||
{PCI_VENDOR_AMPERE, PCI_DEVICE_ALTRA, {SOC_AMPERE_ALTRA, SOC_VENDOR_AMPERE, 7, "Altra", NULL} }, // https://www.anandtech.com/show/15575/amperes-altra-80-core-n1-soc-for-hyperscalers-against-rome-and-xeon
|
||||
{0x0000, 0x0000, {UNKNOWN, SOC_VENDOR_UNKNOWN, -1, "", NULL} }
|
||||
};
|
||||
|
||||
int index = 0;
|
||||
while (socFromPCI[index].vendor_id != 0x0) {
|
||||
for (int i=0; i < pci->num_devices; i++) {
|
||||
struct pci_device * dev = pci->devices[i];
|
||||
|
||||
if (socFromPCI[index].vendor_id == dev->vendor_id &&
|
||||
socFromPCI[index].device_id == dev->device_id) {
|
||||
fill_soc(soc, socFromPCI[index].soc.name, socFromPCI[index].soc.model, socFromPCI[index].soc.process);
|
||||
return soc;
|
||||
}
|
||||
}
|
||||
index++;
|
||||
}
|
||||
|
||||
printWarn("guess_soc_from_pci: No PCI device matched the list");
|
||||
return soc;
|
||||
}
|
||||
|
||||
int hex2int(char c) {
|
||||
if (c >= '0' && c <= '9')
|
||||
return c - '0';
|
||||
@@ -1178,12 +907,12 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
|
||||
}
|
||||
else {
|
||||
printBug("Found invalid physical cpu number: %d", physicalcpu);
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
}
|
||||
else {
|
||||
printBugCheckRelease("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
}
|
||||
else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
|
||||
@@ -1205,21 +934,19 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
|
||||
}
|
||||
else {
|
||||
printBug("Found invalid physical cpu number: %d", physicalcpu);
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
}
|
||||
else {
|
||||
printBugCheckRelease("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
}
|
||||
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2 ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
|
||||
// Check M3 version
|
||||
if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
|
||||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_2) {
|
||||
if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH) {
|
||||
fill_soc(soc, "M3", SOC_APPLE_M3, 3);
|
||||
}
|
||||
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO) {
|
||||
@@ -1230,12 +957,12 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
|
||||
}
|
||||
else {
|
||||
printBugCheckRelease("Found invalid cpu_family: 0x%.8X", cpu_family);
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
}
|
||||
else {
|
||||
printBugCheckRelease("Found invalid cpu_family: 0x%.8X", cpu_family);
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
return soc;
|
||||
}
|
||||
@@ -1244,15 +971,15 @@ struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
|
||||
struct system_on_chip* get_soc(struct cpuInfo* cpu) {
|
||||
struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
|
||||
soc->raw_name = NULL;
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->model = SOC_MODEL_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_model = SOC_MODEL_UNKNOWN;
|
||||
soc->process = UNKNOWN;
|
||||
|
||||
#ifdef __linux__
|
||||
bool isRPi = is_raspberry_pi();
|
||||
if(isRPi) {
|
||||
soc = guess_soc_raspbery_pi(soc);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
printErr("[RPi] SoC detection failed using revision code, falling back to cpuinfo detection");
|
||||
}
|
||||
else {
|
||||
@@ -1261,7 +988,7 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
|
||||
}
|
||||
|
||||
soc = guess_soc_from_cpuinfo(soc);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
if(soc->raw_name != NULL) {
|
||||
printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);
|
||||
}
|
||||
@@ -1273,62 +1000,35 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
|
||||
if(soc->raw_name == NULL) {
|
||||
printWarn("SoC detection failed using Android: No string found");
|
||||
}
|
||||
else if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
printWarn("SoC detection failed using Android: Found '%s' string", soc->raw_name);
|
||||
}
|
||||
#endif // ifdef __ANDROID__
|
||||
// If previous steps failed, try with the device tree
|
||||
if (soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
soc = guess_soc_from_devtree(soc);
|
||||
}
|
||||
// If previous steps failed, try with nvmem
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
// If cpufinfo/Android (if available) detection fails, try with nvmem
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
soc = guess_soc_from_nvmem(soc);
|
||||
}
|
||||
// If previous steps failed, try infering it from the microarchitecture
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
// If everything else failed, try infering it from the microarchitecture
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
soc = guess_soc_from_uarch(soc, cpu);
|
||||
}
|
||||
// If previous steps failed, try infering it from the pci device id
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
soc = guess_soc_from_pci(soc, cpu);
|
||||
}
|
||||
}
|
||||
#elif defined __APPLE__ || __MACH__
|
||||
soc = guess_soc_apple(soc);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
printWarn("SoC detection failed using cpu_subfamily");
|
||||
}
|
||||
else {
|
||||
return soc;
|
||||
}
|
||||
#endif
|
||||
#endif // ifdef __linux__
|
||||
|
||||
#if defined _WIN32
|
||||
// Use the first core to determine the SoC
|
||||
char* processor_name_string = NULL;
|
||||
unsigned long processor_name_string_len = 0;
|
||||
if(!read_registry_hklm_sz("HARDWARE\\DESCRIPTION\\System\\CentralProcessor\\0", "ProcessorNameString", &processor_name_string, &processor_name_string_len)) {
|
||||
printWarn("Failed to aquire SoC name from registery");
|
||||
return soc;
|
||||
}
|
||||
|
||||
soc->name = processor_name_string;
|
||||
soc->raw_name = processor_name_string;
|
||||
soc->vendor = try_match_soc_vendor_name(processor_name_string);
|
||||
soc->model = SOC_MODEL_UNKNOWN;
|
||||
soc->process = UNKNOWN;
|
||||
|
||||
#else
|
||||
|
||||
if(soc->model == SOC_MODEL_UNKNOWN) {
|
||||
if(soc->soc_model == SOC_MODEL_UNKNOWN) {
|
||||
// raw_name might not be NULL, but if we were unable to find
|
||||
// the exact SoC, just print "Unkwnown"
|
||||
soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
|
||||
snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
return soc;
|
||||
}
|
||||
|
||||
@@ -29,7 +29,6 @@ enum {
|
||||
SOC_HISILICON_3670,
|
||||
SOC_HISILICON_3680,
|
||||
SOC_HISILICON_3690,
|
||||
SOC_HISILICON_9000S,
|
||||
// Kunpeng //
|
||||
SOC_KUNPENG_920,
|
||||
SOC_KUNPENG_930,
|
||||
@@ -192,22 +191,6 @@ enum {
|
||||
SOC_MTK_MT9950,
|
||||
SOC_MTK_MT9972,
|
||||
SOC_MTK_MT9982,
|
||||
SOC_MTK_MT6983Z,
|
||||
SOC_MTK_MT8798ZC,
|
||||
SOC_MTK_MT6983W,
|
||||
SOC_MTK_MT8798ZT,
|
||||
SOC_MTK_MT6985W,
|
||||
SOC_MTK_MT6985,
|
||||
SOC_MTK_MT6989,
|
||||
SOC_MTK_MT8796,
|
||||
SOC_MTK_MT6877VZ,
|
||||
SOC_MTK_MT6877T,
|
||||
SOC_MTK_MT6855,
|
||||
SOC_MTK_MT6853VT,
|
||||
SOC_MTK_MT6853T,
|
||||
SOC_MTK_MT6833P,
|
||||
SOC_MTK_MT6833GP,
|
||||
SOC_MTK_MT6833V,
|
||||
// Snapdragon //
|
||||
SOC_SNAPD_QSD8650,
|
||||
SOC_SNAPD_QSD8250,
|
||||
@@ -287,16 +270,11 @@ enum {
|
||||
SOC_SNAPD_SDM660,
|
||||
SOC_SNAPD_SM6115,
|
||||
SOC_SNAPD_SM6125,
|
||||
SOC_SNAPD_SM6375_AC,
|
||||
SOC_SNAPD_SM6450,
|
||||
SOC_SNAPD_SDM670,
|
||||
SOC_SNAPD_SM6150,
|
||||
SOC_SNAPD_SM6350,
|
||||
SOC_SNAPD_SDM710,
|
||||
SOC_SNAPD_SDM712,
|
||||
SOC_SNAPD_SM4375,
|
||||
SOC_SNAPD_SM4450,
|
||||
SOC_SNAPD_SM4635,
|
||||
SOC_SNAPD_SM7125,
|
||||
SOC_SNAPD_SM7150_AA,
|
||||
SOC_SNAPD_SM7150_AB,
|
||||
@@ -305,11 +283,6 @@ enum {
|
||||
SOC_SNAPD_SM7250_AA,
|
||||
SOC_SNAPD_SM7250_AB,
|
||||
SOC_SNAPD_SM7250_AC,
|
||||
SOC_SNAPD_SM7435_AB,
|
||||
SOC_SNAPD_SM7450,
|
||||
SOC_SNAPD_SM7475,
|
||||
SOC_SNAPD_SM7550_AB,
|
||||
SOC_SNAPD_SM7675_AB,
|
||||
SOC_SNAPD_MSM8974AA,
|
||||
SOC_SNAPD_MSM8974AB,
|
||||
SOC_SNAPD_MSM8974AC,
|
||||
@@ -330,11 +303,6 @@ enum {
|
||||
SOC_SNAPD_SM8250_AB,
|
||||
SOC_SNAPD_SM8350,
|
||||
SOC_SNAPD_SM8450,
|
||||
SOC_SNAPD_SM8475,
|
||||
SOC_SNAPD_SM8550_AB,
|
||||
SOC_SNAPD_SM8635,
|
||||
SOC_SNAPD_SM8650_AB,
|
||||
SOC_SNAPD_SC8280XP,
|
||||
// APPLE
|
||||
SOC_APPLE_M1,
|
||||
SOC_APPLE_M1_PRO,
|
||||
@@ -395,65 +363,21 @@ enum {
|
||||
SOC_GOOGLE_TENSOR,
|
||||
SOC_GOOGLE_TENSOR_G2,
|
||||
SOC_GOOGLE_TENSOR_G3,
|
||||
// NVIDIA,
|
||||
SOC_TEGRA_2,
|
||||
SOC_TEGRA_3,
|
||||
SOC_TEGRA_4,
|
||||
SOC_TEGRA_K1,
|
||||
SOC_TEGRA_K2,
|
||||
SOC_TEGRA_X1,
|
||||
SOC_TEGRA_X2,
|
||||
SOC_TEGRA_XAVIER,
|
||||
SOC_TEGRA_ORIN,
|
||||
// ALTRA
|
||||
SOC_AMPERE_ALTRA,
|
||||
// NXP
|
||||
SOC_NXP_IMX8QM,
|
||||
SOC_NXP_IMX8QP,
|
||||
SOC_NXP_IMX8MP,
|
||||
SOC_NXP_IMX8MN,
|
||||
SOC_NXP_IMX8MM,
|
||||
SOC_NXP_IMX8DXP,
|
||||
SOC_NXP_IMX8QXP,
|
||||
SOC_NXP_IMX93,
|
||||
// AMLOGIC
|
||||
SOC_AMLOGIC_A311D,
|
||||
SOC_AMLOGIC_A311D2,
|
||||
SOC_AMLOGIC_S905W,
|
||||
SOC_AMLOGIC_S905D,
|
||||
SOC_AMLOGIC_S905X,
|
||||
SOC_AMLOGIC_S805X,
|
||||
// MARVELL
|
||||
SOC_MARVELL_A3700,
|
||||
SOC_MARVELL_A3710,
|
||||
SOC_MARVELL_A3720,
|
||||
SOC_MARVELL_A7200,
|
||||
SOC_MARVELL_A7400,
|
||||
SOC_MARVELL_A8020,
|
||||
SOC_MARVELL_A8040,
|
||||
SOC_MARVELL_CN9130,
|
||||
SOC_MARVELL_CN9131,
|
||||
SOC_MARVELL_CN9132,
|
||||
// UNKNOWN
|
||||
SOC_MODEL_UNKNOWN
|
||||
};
|
||||
|
||||
inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
|
||||
if(soc >= SOC_BCM_2835 && soc <= SOC_BCM_2712) return SOC_VENDOR_BROADCOM;
|
||||
else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_9000S) return SOC_VENDOR_KIRIN;
|
||||
else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
|
||||
else if(soc >= SOC_KUNPENG_920 && soc <= SOC_KUNPENG_930) return SOC_VENDOR_KUNPENG;
|
||||
else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
|
||||
else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8796) return SOC_VENDOR_MEDIATEK;
|
||||
else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SC8280XP) return SOC_VENDOR_SNAPDRAGON;
|
||||
else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
|
||||
else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8450) return SOC_VENDOR_SNAPDRAGON;
|
||||
else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M3_MAX) return SOC_VENDOR_APPLE;
|
||||
else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
|
||||
else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588) return SOC_VENDOR_ROCKCHIP;
|
||||
else if(soc >= SOC_GOOGLE_TENSOR && soc <= SOC_GOOGLE_TENSOR_G3) return SOC_VENDOR_GOOGLE;
|
||||
else if(soc >= SOC_TEGRA_2 && soc <= SOC_TEGRA_ORIN) return SOC_VENDOR_NVIDIA;
|
||||
else if(soc >= SOC_AMPERE_ALTRA && soc <= SOC_AMPERE_ALTRA) return SOC_VENDOR_AMPERE;
|
||||
else if(soc >= SOC_NXP_IMX8QM && soc <= SOC_NXP_IMX93) return SOC_VENDOR_NXP;
|
||||
else if(soc >= SOC_AMLOGIC_A311D && soc <= SOC_AMLOGIC_S805X) return SOC_VENDOR_AMLOGIC;
|
||||
else if(soc >= SOC_MARVELL_A3700 && soc <= SOC_MARVELL_CN9132) return SOC_VENDOR_MARVELL;
|
||||
return SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
|
||||
|
||||
@@ -1,15 +0,0 @@
|
||||
#include <stdint.h>
|
||||
#include "../common/global.h"
|
||||
|
||||
// https://learn.arm.com/learning-paths/servers-and-cloud-computing/sve/sve_basics/#:~:text=Using%20a%20text%20editor%20of%20your%20choice%2C%20copy,svcntb%28%29%29%3B%20%7D%20This%20program%20prints%20the%20vector%20length
|
||||
uint64_t sve_cntb(void) {
|
||||
#ifdef __ARM_FEATURE_SVE
|
||||
uint64_t x0 = 0;
|
||||
__asm volatile("cntb %0"
|
||||
: "=r"(x0));
|
||||
return x0;
|
||||
#else
|
||||
printWarn("sve_cntb: Hardware supports SVE, but it was not enabled by the compiler");
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
@@ -1,6 +0,0 @@
|
||||
#ifndef __SVE_DETECTION__
|
||||
#define __SVE_DETECTION__
|
||||
|
||||
uint64_t sve_cntb(void);
|
||||
|
||||
#endif
|
||||
@@ -4,8 +4,8 @@
|
||||
#include <string.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include "global.h"
|
||||
#include "cpu.h"
|
||||
#include "../common/global.h"
|
||||
#include "../common/cpu.h"
|
||||
|
||||
uint32_t get_sys_info_by_name(char* name) {
|
||||
size_t size = 0;
|
||||
@@ -21,12 +21,9 @@
|
||||
#define CPUFAMILY_ARM_AVALANCHE_BLIZZARD 0xDA33D83D
|
||||
#endif
|
||||
// M3 / A16 / A17
|
||||
// M3: https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
|
||||
// M3_2: https://github.com/Dr-Noob/cpufetch/issues/230
|
||||
// PRO: https://github.com/Dr-Noob/cpufetch/issues/225
|
||||
// MAX: https://github.com/Dr-Noob/cpufetch/issues/210
|
||||
// https://ratfactor.com/zig/stdlib-browseable2/c/darwin.zig.html
|
||||
// https://github.com/Dr-Noob/cpufetch/issues/210
|
||||
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH 0x8765EDEA
|
||||
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_2 0xFA33415E
|
||||
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO 0x5F4DEA93
|
||||
#define CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX 0x72015832
|
||||
|
||||
@@ -43,14 +40,6 @@
|
||||
#define CPUSUBFAMILY_ARM_HC_HD 5
|
||||
#endif
|
||||
|
||||
// For alternative way to get CPU frequency on macOS and *BSD
|
||||
#ifdef __APPLE__
|
||||
#define CPUFREQUENCY_SYSCTL "hw.cpufrequency_max"
|
||||
#else
|
||||
// For FreeBSD, not sure about other *BSD
|
||||
#define CPUFREQUENCY_SYSCTL "dev.cpu.0.freq"
|
||||
#endif
|
||||
|
||||
uint32_t get_sys_info_by_name(char* name);
|
||||
|
||||
#endif
|
||||
@@ -33,9 +33,7 @@ enum {
|
||||
ISA_ARMv8_3_A,
|
||||
ISA_ARMv8_4_A,
|
||||
ISA_ARMv8_5_A,
|
||||
ISA_ARMv8_6_A,
|
||||
ISA_ARMv9_A,
|
||||
ISA_ARMv9_2_A
|
||||
ISA_ARMv9_A
|
||||
};
|
||||
|
||||
static const ISA isas_uarch[] = {
|
||||
@@ -63,32 +61,20 @@ static const ISA isas_uarch[] = {
|
||||
[UARCH_CORTEX_A76] = ISA_ARMv8_2_A,
|
||||
[UARCH_CORTEX_A77] = ISA_ARMv8_2_A,
|
||||
[UARCH_CORTEX_A78] = ISA_ARMv8_2_A,
|
||||
[UARCH_CORTEX_A78C] = ISA_ARMv8_2_A,
|
||||
[UARCH_CORTEX_A78AE] = ISA_ARMv8_2_A,
|
||||
[UARCH_CORTEX_A510] = ISA_ARMv9_A,
|
||||
[UARCH_CORTEX_A520] = ISA_ARMv9_2_A,
|
||||
[UARCH_CORTEX_A710] = ISA_ARMv9_A,
|
||||
[UARCH_CORTEX_A715] = ISA_ARMv9_A,
|
||||
[UARCH_CORTEX_A720] = ISA_ARMv9_2_A,
|
||||
[UARCH_CORTEX_A725] = ISA_ARMv9_2_A,
|
||||
[UARCH_CORTEX_X1] = ISA_ARMv8_2_A,
|
||||
[UARCH_CORTEX_X1C] = ISA_ARMv8_2_A, // Assuming same as X1
|
||||
[UARCH_CORTEX_X2] = ISA_ARMv9_A,
|
||||
[UARCH_CORTEX_X3] = ISA_ARMv9_A,
|
||||
[UARCH_CORTEX_X4] = ISA_ARMv9_2_A,
|
||||
[UARCH_CORTEX_X925] = ISA_ARMv9_2_A,
|
||||
[UARCH_NEOVERSE_N1] = ISA_ARMv8_2_A,
|
||||
[UARCH_NEOVERSE_N2] = ISA_ARMv9_A,
|
||||
[UARCH_NEOVERSE_E1] = ISA_ARMv8_2_A,
|
||||
[UARCH_NEOVERSE_V1] = ISA_ARMv8_4_A,
|
||||
[UARCH_NEOVERSE_V2] = ISA_ARMv9_A,
|
||||
[UARCH_NEOVERSE_V3] = ISA_ARMv9_2_A,
|
||||
[UARCH_BRAHMA_B15] = ISA_ARMv7_A, // Same as Cortex-A15
|
||||
[UARCH_BRAHMA_B53] = ISA_ARMv8_A, // Same as Cortex-A53
|
||||
[UARCH_THUNDERX] = ISA_ARMv8_A,
|
||||
[UARCH_THUNDERX2] = ISA_ARMv8_1_A,
|
||||
[UARCH_TAISHAN_V110] = ISA_ARMv8_2_A,
|
||||
[UARCH_TAISHAN_V120] = ISA_ARMv8_2_A, // Not confirmed
|
||||
[UARCH_TAISHAN_V200] = ISA_ARMv8_2_A, // Not confirmed
|
||||
[UARCH_DENVER] = ISA_ARMv8_A,
|
||||
[UARCH_DENVER2] = ISA_ARMv8_A,
|
||||
@@ -106,10 +92,8 @@ static const ISA isas_uarch[] = {
|
||||
[UARCH_EXYNOS_M5] = ISA_ARMv8_2_A,
|
||||
[UARCH_ICESTORM] = ISA_ARMv8_5_A, // https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/AArch64TargetParser.def
|
||||
[UARCH_FIRESTORM] = ISA_ARMv8_5_A,
|
||||
[UARCH_BLIZZARD] = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
|
||||
[UARCH_AVALANCHE] = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
|
||||
[UARCH_SAWTOOTH] = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
|
||||
[UARCH_EVEREST] = ISA_ARMv8_6_A, // https://github.com/llvm/llvm-project/blob/main/llvm/unittests/TargetParser/TargetParserTest.cpp
|
||||
[UARCH_BLIZZARD] = ISA_ARMv8_5_A, // Not confirmed
|
||||
[UARCH_AVALANCHE] = ISA_ARMv8_5_A,
|
||||
[UARCH_PJ4] = ISA_ARMv7_A,
|
||||
[UARCH_XIAOMI] = ISA_ARMv8_A,
|
||||
};
|
||||
@@ -127,9 +111,7 @@ static char* isas_string[] = {
|
||||
[ISA_ARMv8_3_A] = "ARMv8.3",
|
||||
[ISA_ARMv8_4_A] = "ARMv8.4",
|
||||
[ISA_ARMv8_5_A] = "ARMv8.5",
|
||||
[ISA_ARMv8_6_A] = "ARMv8.6",
|
||||
[ISA_ARMv9_A] = "ARMv9",
|
||||
[ISA_ARMv9_2_A] = "ARMv9.2",
|
||||
[ISA_ARMv9_A] = "ARMv9"
|
||||
};
|
||||
|
||||
#define UARCH_START if (false) {}
|
||||
@@ -201,24 +183,13 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76", UARCH_CORTEX_A76, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD40, NA, NA, "Neoverse V1", UARCH_NEOVERSE_V1, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78", UARCH_CORTEX_A78, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD42, NA, NA, "Cortex-A78AE", UARCH_CORTEX_A78AE, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1", UARCH_CORTEX_X1, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD46, NA, NA, "Cortex‑A510", UARCH_CORTEX_A510, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD47, NA, NA, "Cortex‑A710", UARCH_CORTEX_A710, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD48, NA, NA, "Cortex-X2", UARCH_CORTEX_X2, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD49, NA, NA, "Neoverse N2", UARCH_NEOVERSE_N2, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1", UARCH_NEOVERSE_E1, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD4B, NA, NA, "Cortex-A78C", UARCH_CORTEX_A78C, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD4C, NA, NA, "Cortex-X1C", UARCH_CORTEX_X1C, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD4D, NA, NA, "Cortex-A715", UARCH_CORTEX_A715, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD4E, NA, NA, "Cortex-X3", UARCH_CORTEX_X3, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD4F, NA, NA, "Neoverse V2", UARCH_NEOVERSE_V2, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD80, NA, NA, "Cortex-A520", UARCH_CORTEX_A520, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD81, NA, NA, "Cortex-A720", UARCH_CORTEX_A720, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD82, NA, NA, "Cortex-X4", UARCH_CORTEX_X4, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD84, NA, NA, "Neoverse V3", UARCH_NEOVERSE_V3, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD85, NA, NA, "Cortex-X925", UARCH_CORTEX_X925, CPU_VENDOR_ARM)
|
||||
CHECK_UARCH(arch, cpu, 'A', 0xD87, NA, NA, "Cortex-A725", UARCH_CORTEX_A725, CPU_VENDOR_ARM)
|
||||
|
||||
CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15", UARCH_BRAHMA_B15, CPU_VENDOR_BROADCOM)
|
||||
CHECK_UARCH(arch, cpu, 'B', 0x100, NA, NA, "Brahma B53", UARCH_BRAHMA_B53, CPU_VENDOR_BROADCOM)
|
||||
@@ -231,10 +202,8 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
|
||||
CHECK_UARCH(arch, cpu, 'C', 0x0AF, NA, NA, "ThunderX2 99XX", UARCH_THUNDERX2, CPU_VENDOR_CAVIUM)
|
||||
|
||||
CHECK_UARCH(arch, cpu, 'H', 0xD01, NA, NA, "TaiShan v110", UARCH_TAISHAN_V110, CPU_VENDOR_HUAWEI) // Kunpeng 920 series
|
||||
CHECK_UARCH(arch, cpu, 'H', 0xD02, 2, 2, "TaiShan v120", UARCH_TAISHAN_V120, CPU_VENDOR_HUAWEI) // Kiring 9000S Big cores (https://github.com/Dr-Noob/cpufetch/issues/259)
|
||||
CHECK_UARCH(arch, cpu, 'H', 0xD02, NA, NA, "TaiShan v200", UARCH_TAISHAN_V200, CPU_VENDOR_HUAWEI) // Kunpeng 930 series (found in openeuler: https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/XQCV7NX2UKRIUWUFKRF4PO3QENCOUFR3)
|
||||
CHECK_UARCH(arch, cpu, 'H', 0xD40, NA, NA, "Cortex-A76", UARCH_CORTEX_A76, CPU_VENDOR_ARM) // Kirin 980 Big/Medium cores -> Cortex-A76
|
||||
CHECK_UARCH(arch, cpu, 'H', 0xD42, NA, NA, "TaiShan v120", UARCH_TAISHAN_V120, CPU_VENDOR_HUAWEI) // Kiring 9000S Small Cores (https://github.com/Dr-Noob/cpufetch/issues/259)
|
||||
|
||||
CHECK_UARCH(arch, cpu, 'N', 0x000, NA, NA, "Denver", UARCH_DENVER, CPU_VENDOR_NVIDIA)
|
||||
CHECK_UARCH(arch, cpu, 'N', 0x003, NA, NA, "Denver2", UARCH_DENVER2, CPU_VENDOR_NVIDIA)
|
||||
@@ -276,8 +245,6 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
|
||||
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm", UARCH_ICESTORM, CPU_VENDOR_APPLE)
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm", UARCH_FIRESTORM, CPU_VENDOR_APPLE)
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x024, NA, NA, "Icestorm", UARCH_ICESTORM, CPU_VENDOR_APPLE) // https://github.com/Dr-Noob/cpufetch/issues/263
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x025, NA, NA, "Firestorm", UARCH_FIRESTORM, CPU_VENDOR_APPLE) // https://github.com/Dr-Noob/cpufetch/issues/263
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x030, NA, NA, "Blizzard", UARCH_BLIZZARD, CPU_VENDOR_APPLE)
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x031, NA, NA, "Avalanche", UARCH_AVALANCHE, CPU_VENDOR_APPLE)
|
||||
CHECK_UARCH(arch, cpu, 'a', 0x048, NA, NA, "Sawtooth", UARCH_SAWTOOTH, CPU_VENDOR_APPLE)
|
||||
@@ -292,7 +259,14 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
|
||||
}
|
||||
|
||||
bool is_ARMv8_or_newer(struct cpuInfo* cpu) {
|
||||
return cpu->arch->isa >= ISA_ARMv8_A;
|
||||
return cpu->arch->isa == ISA_ARMv8_A ||
|
||||
cpu->arch->isa == ISA_ARMv8_A_AArch32 ||
|
||||
cpu->arch->isa == ISA_ARMv8_1_A ||
|
||||
cpu->arch->isa == ISA_ARMv8_2_A ||
|
||||
cpu->arch->isa == ISA_ARMv8_3_A ||
|
||||
cpu->arch->isa == ISA_ARMv8_4_A ||
|
||||
cpu->arch->isa == ISA_ARMv8_5_A ||
|
||||
cpu->arch->isa == ISA_ARMv9_A;
|
||||
}
|
||||
|
||||
bool has_fma_support(struct cpuInfo* cpu) {
|
||||
@@ -305,17 +279,19 @@ int get_vpus_width(struct cpuInfo* cpu) {
|
||||
// If the CPU has NEON, width can be 64 or 128 [1].
|
||||
// In >= ARMv8, NEON are 128 bits width [2]
|
||||
// If the CPU has SVE/SVE2, width can be between 128-2048 [3],
|
||||
// so we get the exact value from cntb [4]
|
||||
// so we must check the exact width depending on
|
||||
// the exact chip (Neoverse V1 uses 256b implementations.)
|
||||
//
|
||||
// [1] https://en.wikipedia.org/wiki/ARM_architecture_family#Advanced_SIMD_(Neon)
|
||||
// [2] https://developer.arm.com/documentation/102474/0100/Fundamentals-of-Armv8-Neon-technology
|
||||
// [3] https://www.anandtech.com/show/16640/arm-announces-neoverse-v1-n2-platforms-cpus-cmn700-mesh/5
|
||||
// [4] https://developer.arm.com/documentation/ddi0596/2020-12/SVE-Instructions/CNTB--CNTD--CNTH--CNTW--Set-scalar-to-multiple-of-predicate-constraint-element-count-
|
||||
|
||||
if (cpu->feat->SVE && cpu->feat->cntb > 0) {
|
||||
return cpu->feat->cntb * 8;
|
||||
}
|
||||
else if (cpu->feat->NEON) {
|
||||
MICROARCH ua = cpu->arch->uarch;
|
||||
switch(ua) {
|
||||
case UARCH_NEOVERSE_V1:
|
||||
return 256;
|
||||
default:
|
||||
if(cpu->feat->NEON) {
|
||||
if(is_ARMv8_or_newer(cpu)) {
|
||||
return 128;
|
||||
}
|
||||
@@ -326,25 +302,20 @@ int get_vpus_width(struct cpuInfo* cpu) {
|
||||
else {
|
||||
return 32;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int get_number_of_vpus(struct cpuInfo* cpu) {
|
||||
MICROARCH ua = cpu->arch->uarch;
|
||||
|
||||
switch(ua) {
|
||||
case UARCH_CORTEX_X925: // [https://www.anandtech.com/show/21399/arm-unveils-2024-cpu-core-designs-cortex-x925-a725-and-a520-arm-v9-2-redefined-for-3nm-/2]
|
||||
return 6;
|
||||
case UARCH_EVEREST: // Just a guess, needs confirmation.
|
||||
case UARCH_FIRESTORM: // [https://dougallj.github.io/applecpu/firestorm-simd.html]
|
||||
case UARCH_AVALANCHE: // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
|
||||
case UARCH_CORTEX_X1: // [https://www.anandtech.com/show/15813/arm-cortex-a78-cortex-x1-cpu-ip-diverging/3]
|
||||
case UARCH_CORTEX_X1C: // Assuming same as X1
|
||||
case UARCH_CORTEX_X2: // [https://www.anandtech.com/show/16693/arm-announces-mobile-armv9-cpu-microarchitectures-cortexx2-cortexa710-cortexa510/2]
|
||||
case UARCH_CORTEX_X3: // [https://www.hwcooling.net/en/cortex-x3-the-new-fastest-arm-core-architecture-analysis: "The FPU and SIMD unit of the core still has four pipelines"]
|
||||
case UARCH_CORTEX_X4: // [https://www.anandtech.com/show/18871/arm-unveils-armv92-mobile-architecture-cortex-x4-a720-and-a520-64bit-exclusive/2]: "Cortex-X4: Out-of-Order Core"
|
||||
case UARCH_NEOVERSE_V1: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_v1]
|
||||
case UARCH_NEOVERSE_V2: // [https://chipsandcheese.com/2023/09/11/hot-chips-2023-arms-neoverse-v2/]
|
||||
case UARCH_NEOVERSE_V3: // Assuming same as V2
|
||||
return 4;
|
||||
case UARCH_SAWTOOTH: // Needs confirmation, rn this is the best we know: https://mastodon.social/@dougall/111118317031041336
|
||||
case UARCH_EXYNOS_M3: // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
|
||||
@@ -354,7 +325,6 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
|
||||
case UARCH_ICESTORM: // [https://dougallj.github.io/applecpu/icestorm-simd.html]
|
||||
case UARCH_BLIZZARD: // [https://en.wikipedia.org/wiki/Comparison_of_ARM_processors]
|
||||
case UARCH_TAISHAN_V110:// [https://www-file.huawei.com/-/media/corp2020/pdf/publications/huawei-research/2022/huawei-research-issue1-en.pdf]: "128-bit x 2 for single precision"
|
||||
case UARCH_TAISHAN_V120:// Not confirmed, asssuming same as v110
|
||||
case UARCH_TAISHAN_V200:// Not confirmed, asssuming same as v110
|
||||
case UARCH_CORTEX_A57: // [https://www.anandtech.com/show/8718/the-samsung-galaxy-note-4-exynos-review/5]
|
||||
case UARCH_CORTEX_A72: // [https://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2]
|
||||
@@ -363,22 +333,16 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
|
||||
case UARCH_CORTEX_A76: // [https://www.anandtech.com/show/12785/arm-cortex-a76-cpu-unveiled-7nm-powerhouse/3]
|
||||
case UARCH_CORTEX_A77: // [https://fuse.wikichip.org/news/2339/arm-unveils-cortex-a77-emphasizes-single-thread-performance]
|
||||
case UARCH_CORTEX_A78: // [https://fuse.wikichip.org/news/3536/arm-unveils-the-cortex-a78-when-less-is-more]
|
||||
case UARCH_CORTEX_A78C: // Assuming same as A78
|
||||
case UARCH_CORTEX_A78AE:// Assuming same as A78
|
||||
case UARCH_EXYNOS_M1: // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
|
||||
case UARCH_EXYNOS_M2: // [https://www.anandtech.com/show/12361/samsung-exynos-m3-architecture]
|
||||
case UARCH_NEOVERSE_N1: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_n1#Individual_Core]
|
||||
case UARCH_NEOVERSE_N2: // [https://chipsandcheese.com/2023/08/18/arms-neoverse-n2-cortex-a710-for-servers/]
|
||||
case UARCH_CORTEX_A710: // [https://chipsandcheese.com/2023/08/11/arms-cortex-a710-winning-by-default/]: Fig in Core Overview. Table in Instruction Scheduling and Execution
|
||||
case UARCH_CORTEX_A715: // [https://www.hwcooling.net/en/arm-introduces-new-cortex-a715-core-architecture-analysis/]: "the numbers of ALU and FPU execution units themselves >
|
||||
case UARCH_CORTEX_A720: // Assuming same as A715: https://www.anandtech.com/show/18871/arm-unveils-armv92-mobile-architecture-cortex-x4-a720-and-a520-64bit-exclusive/3
|
||||
case UARCH_CORTEX_A725: // Assuming same as A720
|
||||
return 2;
|
||||
case UARCH_NEOVERSE_E1: // [https://www.anandtech.com/show/13959/arm-announces-neoverse-n1-platform/5]
|
||||
// A510 is integrated as part of a Complex. Normally, each complex would incorporate two Cortex-A510 cores.
|
||||
// Each complex incorporates a single VPU with 2 ports, so for each A510 there is theoretically 1 port.
|
||||
case UARCH_CORTEX_A510: // [https://en.wikichip.org/wiki/arm_holdings/microarchitectures/cortex-a510#Vector_Processing_Unit_.28VPU.29]
|
||||
case UARCH_CORTEX_A520: // Assuming same as A50: https://www.anandtech.com/show/18871/arm-unveils-armv92-mobile-architecture-cortex-x4-a720-and-a520-64bit-exclusive/4
|
||||
return 1;
|
||||
default:
|
||||
// ARMv6
|
||||
|
||||
@@ -34,26 +34,15 @@ enum {
|
||||
UARCH_CORTEX_A76,
|
||||
UARCH_CORTEX_A77,
|
||||
UARCH_CORTEX_A78,
|
||||
UARCH_CORTEX_A78AE,
|
||||
UARCH_CORTEX_A78C,
|
||||
UARCH_CORTEX_A510,
|
||||
UARCH_CORTEX_A520,
|
||||
UARCH_CORTEX_A710,
|
||||
UARCH_CORTEX_A715,
|
||||
UARCH_CORTEX_A720,
|
||||
UARCH_CORTEX_A725,
|
||||
UARCH_CORTEX_X1,
|
||||
UARCH_CORTEX_X1C,
|
||||
UARCH_CORTEX_X2,
|
||||
UARCH_CORTEX_X3,
|
||||
UARCH_CORTEX_X4,
|
||||
UARCH_CORTEX_X925,
|
||||
UARCH_NEOVERSE_N1,
|
||||
UARCH_NEOVERSE_N2,
|
||||
UARCH_NEOVERSE_E1,
|
||||
UARCH_NEOVERSE_V1,
|
||||
UARCH_NEOVERSE_V2,
|
||||
UARCH_NEOVERSE_V3,
|
||||
UARCH_SCORPION,
|
||||
UARCH_KRAIT,
|
||||
UARCH_KYRO,
|
||||
@@ -94,9 +83,7 @@ enum {
|
||||
UARCH_BRAHMA_B15,
|
||||
UARCH_BRAHMA_B53,
|
||||
UARCH_XGENE, // Applied Micro X-Gene.
|
||||
// HUAWEI
|
||||
UARCH_TAISHAN_V110, // HiSilicon TaiShan v110
|
||||
UARCH_TAISHAN_V120, // HiSilicon TaiShan v120
|
||||
UARCH_TAISHAN_V200, // HiSilicon TaiShan v200
|
||||
// PHYTIUM
|
||||
UARCH_XIAOMI, // Not to be confused with Xiaomi Inc
|
||||
|
||||
@@ -28,7 +28,6 @@ struct args_struct {
|
||||
bool help_flag;
|
||||
bool raw_flag;
|
||||
bool accurate_pp;
|
||||
bool measure_max_frequency_flag;
|
||||
bool full_cpu_name_flag;
|
||||
bool logo_long;
|
||||
bool logo_short;
|
||||
@@ -51,7 +50,6 @@ const char args_chr[] = {
|
||||
/* [ARG_LOGO_INTEL_NEW] = */ 3,
|
||||
/* [ARG_LOGO_INTEL_OLD] = */ 4,
|
||||
/* [ARG_ACCURATE_PP] = */ 5,
|
||||
/* [ARG_MEASURE_MAX_FREQ] = */ 6,
|
||||
/* [ARG_DEBUG] = */ 'd',
|
||||
/* [ARG_VERBOSE] = */ 'v',
|
||||
/* [ARG_VERSION] = */ 'V',
|
||||
@@ -68,7 +66,6 @@ const char *args_str[] = {
|
||||
/* [ARG_LOGO_INTEL_NEW] = */ "logo-intel-new",
|
||||
/* [ARG_LOGO_INTEL_OLD] = */ "logo-intel-old",
|
||||
/* [ARG_ACCURATE_PP] = */ "accurate-pp",
|
||||
/* [ARG_MEASURE_MAX_FREQ] = */ "measure-max-freq",
|
||||
/* [ARG_DEBUG] = */ "debug",
|
||||
/* [ARG_VERBOSE] = */ "verbose",
|
||||
/* [ARG_VERSION] = */ "version",
|
||||
@@ -104,10 +101,6 @@ bool accurate_pp(void) {
|
||||
return args.accurate_pp;
|
||||
}
|
||||
|
||||
bool measure_max_frequency_flag(void) {
|
||||
return args.measure_max_frequency_flag;
|
||||
}
|
||||
|
||||
bool show_full_cpu_name(void) {
|
||||
return args.full_cpu_name_flag;
|
||||
}
|
||||
@@ -225,23 +218,16 @@ bool parse_color(char* optarg_str, struct color*** cs) {
|
||||
char* build_short_options(void) {
|
||||
const char *c = args_chr;
|
||||
int len = sizeof(args_chr) / sizeof(args_chr[0]);
|
||||
char* str = (char *) ecalloc(len*2 + 1, sizeof(char));
|
||||
char* str = (char *) emalloc(sizeof(char) * (len*2 + 1));
|
||||
memset(str, 0, sizeof(char) * (len*2 + 1));
|
||||
|
||||
#ifdef ARCH_X86
|
||||
sprintf(str, "%c:%c:%c%c%c%c%c%c%c%c%c%c%c%c",
|
||||
sprintf(str, "%c:%c:%c%c%c%c%c%c%c%c%c%c%c",
|
||||
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
|
||||
c[ARG_RAW], c[ARG_FULLCPUNAME],
|
||||
c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
|
||||
c[ARG_LOGO_INTEL_NEW], c[ARG_LOGO_INTEL_OLD],
|
||||
c[ARG_ACCURATE_PP], c[ARG_MEASURE_MAX_FREQ],
|
||||
c[ARG_DEBUG], c[ARG_VERBOSE],
|
||||
c[ARG_VERSION]);
|
||||
#elif ARCH_ARM
|
||||
sprintf(str, "%c:%c:%c%c%c%c%c%c%c",
|
||||
c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
|
||||
c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
|
||||
c[ARG_MEASURE_MAX_FREQ],
|
||||
c[ARG_DEBUG], c[ARG_VERBOSE],
|
||||
c[ARG_ACCURATE_PP], c[ARG_DEBUG], c[ARG_VERBOSE],
|
||||
c[ARG_VERSION]);
|
||||
#else
|
||||
sprintf(str, "%c:%c:%c%c%c%c%c%c",
|
||||
@@ -284,11 +270,8 @@ bool parse_args(int argc, char* argv[]) {
|
||||
{args_str[ARG_LOGO_INTEL_NEW], no_argument, 0, args_chr[ARG_LOGO_INTEL_NEW] },
|
||||
{args_str[ARG_LOGO_INTEL_OLD], no_argument, 0, args_chr[ARG_LOGO_INTEL_OLD] },
|
||||
{args_str[ARG_ACCURATE_PP], no_argument, 0, args_chr[ARG_ACCURATE_PP] },
|
||||
{args_str[ARG_MEASURE_MAX_FREQ], no_argument, 0, args_chr[ARG_MEASURE_MAX_FREQ] },
|
||||
{args_str[ARG_FULLCPUNAME], no_argument, 0, args_chr[ARG_FULLCPUNAME] },
|
||||
{args_str[ARG_RAW], no_argument, 0, args_chr[ARG_RAW] },
|
||||
#elif ARCH_ARM
|
||||
{args_str[ARG_MEASURE_MAX_FREQ], no_argument, 0, args_chr[ARG_MEASURE_MAX_FREQ] },
|
||||
#endif
|
||||
{args_str[ARG_LOGO_SHORT], no_argument, 0, args_chr[ARG_LOGO_SHORT] },
|
||||
{args_str[ARG_LOGO_LONG], no_argument, 0, args_chr[ARG_LOGO_LONG] },
|
||||
@@ -330,9 +313,6 @@ bool parse_args(int argc, char* argv[]) {
|
||||
else if(opt == args_chr[ARG_ACCURATE_PP]) {
|
||||
args.accurate_pp = true;
|
||||
}
|
||||
else if(opt == args_chr[ARG_MEASURE_MAX_FREQ]) {
|
||||
args.measure_max_frequency_flag = true;
|
||||
}
|
||||
else if(opt == args_chr[ARG_FULLCPUNAME]) {
|
||||
args.full_cpu_name_flag = true;
|
||||
}
|
||||
|
||||
@@ -29,7 +29,6 @@ enum {
|
||||
ARG_LOGO_INTEL_NEW,
|
||||
ARG_LOGO_INTEL_OLD,
|
||||
ARG_ACCURATE_PP,
|
||||
ARG_MEASURE_MAX_FREQ,
|
||||
ARG_DEBUG,
|
||||
ARG_VERBOSE,
|
||||
ARG_VERSION
|
||||
@@ -44,7 +43,6 @@ int max_arg_str_length(void);
|
||||
bool parse_args(int argc, char* argv[]);
|
||||
bool show_help(void);
|
||||
bool accurate_pp(void);
|
||||
bool measure_max_frequency_flag(void);
|
||||
bool show_full_cpu_name(void);
|
||||
bool show_logo_long(void);
|
||||
bool show_logo_short(void);
|
||||
|
||||
@@ -105,19 +105,6 @@ $C1 MMM :MMM NMM dMMK dMMX MMN \
|
||||
$C1 MMM :MMM NMM dMMMoo OMM0....:Nx. MMN \
|
||||
$C1 MMM :WWW XWW lONMM 'xXMMMMNOc MMN "
|
||||
|
||||
#define ASCII_HYGON \
|
||||
"$C1 \
|
||||
$C1 \
|
||||
$C1 \
|
||||
$C1 ## ## ## ## ###### ###### ## # \
|
||||
$C1 ##....## ## ## ## ## ## #### # \
|
||||
$C1 ######## ## ## ##. ## ## # #### \
|
||||
$C1 ## ## ## *######. ###### # ## \
|
||||
$C1 \
|
||||
$C1 \
|
||||
$C1 \
|
||||
$C1 "
|
||||
|
||||
#define ASCII_SNAPD \
|
||||
" $C1@@$C2######## \
|
||||
$C1@@@@@$C2########### \
|
||||
@@ -373,78 +360,6 @@ $C1##########@@@@@@@@@@@@@@@@############## \
|
||||
$C1######################################## \
|
||||
$C1 #################################### "
|
||||
|
||||
#define ASCII_NVIDIA \
|
||||
"$C1 'cccccccccccccccccccccccccc \
|
||||
$C1 ;oooooooooooooooooooooooool \
|
||||
$C1 .:::. .oooooooooooooooooool \
|
||||
$C1 .:cll; ,c:::. cooooooooooooool \
|
||||
$C1 ,clo' ;. oolc: ooooooooooool \
|
||||
$C1.cloo ;cclo . .olc. coooooooool \
|
||||
$C1oooo :lo, ;ll; looc :oooooooool \
|
||||
$C1 oooc ool. ;oooc;clol :looooooooool \
|
||||
$C1 :ooc ,ol; ;oooooo. .cloo; loool \
|
||||
$C1 ool; .olc. ,:lool .lool \
|
||||
$C1 ool:. ,::::ccloo. :clooool \
|
||||
$C1 oolc::. ':cclooooooool \
|
||||
$C1 ;oooooooooooooooooooooooool \
|
||||
$C1 \
|
||||
$C1 \
|
||||
$C2######. ## ## ## ###### ## ### \
|
||||
$C2## ## ## ## ## ## ## ## #: :# \
|
||||
$C2## ## ## ## ## ## ## ## ####### \
|
||||
$C2## ## ### ## ###### ## ## ## "
|
||||
|
||||
#define ASCII_AMPERE \
|
||||
"$C1 \
|
||||
$C1 \
|
||||
$C1 ## \
|
||||
$C1 #### \
|
||||
$C1 ### ## \
|
||||
$C1 ### ### \
|
||||
$C1 ### ### \
|
||||
$C1 ### ### \
|
||||
$C1 ## ### \
|
||||
$C1 ####### ### ### \
|
||||
$C1 ###### ## ###### ### \
|
||||
$C1 #### ### ######## \
|
||||
$C1 #### ### #### \
|
||||
$C1 ### ### #### \
|
||||
$C1 ## ### ### \
|
||||
$C1 \
|
||||
$C1 "
|
||||
|
||||
#define ASCII_NXP \
|
||||
"$C1##### # $C2####### ####### $C3########## \
|
||||
$C1####### ## $C2####### ####### $C3############### \
|
||||
$C1########## #### $C2###### ###### $C3### ###### \
|
||||
$C1############ ##### $C2############ $C3##### ##### \
|
||||
$C1##### ####### ##### $C2########## $C3################### \
|
||||
$C1##### ######### $C2############## $C3############### \
|
||||
$C1##### ###### $C2###### ###### $C3#### \
|
||||
$C1##### ## $C2###### ###### $C3## "
|
||||
|
||||
#define ASCII_AMLOGIC \
|
||||
"$C1 .#####. ### ### \
|
||||
$C1 ######## ### \
|
||||
$C1 ####..### ########## ### ### ##### ### ### \
|
||||
$C1 .## #. ### ## ## ## ### ## ## ## ## ### ## \
|
||||
$C1 #### #.# ### ## ## ## ### ## ## ## ## ### ## \
|
||||
$C1#########.### ## ## ## ## ### ###### ## ### \
|
||||
$C1 ### \
|
||||
$C1 ### "
|
||||
|
||||
#define ASCII_MARVELL \
|
||||
"$C1 ........... ........... \
|
||||
$C1 .### . .## . \
|
||||
$C1 .##### . #### . \
|
||||
$C1 ####### . ####### . \
|
||||
$C1 .#########__________. #########__________. \
|
||||
$C1 .###########|__________|#########|__________| \
|
||||
$C1 ############ ______############ __________ \
|
||||
$C1 .######### |__________|###### |__________| \
|
||||
$C1 ########### ___########### __________ \
|
||||
$C1.########## |__________| |__________| "
|
||||
|
||||
// --------------------- LONG LOGOS ------------------------- //
|
||||
#define ASCII_AMD_L \
|
||||
"$C1 \
|
||||
@@ -577,23 +492,6 @@ $C1 ###########. ############ \
|
||||
$C1 ################ \
|
||||
$C1 ####### "
|
||||
|
||||
#define ASCII_NVIDIA_L \
|
||||
"$C1 MMMMMMMMMMMMMMMMMMMMMMMMMMMMMM \
|
||||
$C1 MMMMMMMMMMMMMMMMMMMMMMMMMMMMMM \
|
||||
$C1 .:: 'MMMMMMMMMMMMMMMMMMMMMMMMM \
|
||||
$C1 ccllooo;:;. ;MMMMMMMMMMMMMMMMMM \
|
||||
$C1 cloc :ooollcc: :MMMMMMMMMMMMMMM \
|
||||
$C1 cloc :ccl; lolc, ;MMMMMMMMMMMM \
|
||||
$C1.cloo: :clo ;c: .ool; MMMMMMMMMMM \
|
||||
$C1 ooo: ooo :ool, .cloo. ;lMMMMMMMMMMM \
|
||||
$C1 ooo: ooc :ooooccooo. :MMMM lMMMMMMM \
|
||||
$C1 ooc. ool: :oooooo' ,cloo. MMMM \
|
||||
$C1 ool:. olc: .:cloo. :MMMM \
|
||||
$C1 olc, ;:::cccloo. :MMMMMMMM \
|
||||
$C1 olcc::; ,:ccloMMMMMMMMM \
|
||||
$C1 :......oMMMMMMMMMMMMMMMMMMMMMM \
|
||||
$C1 :lllMMMMMMMMMMMMMMMMMMMMMMMMMM "
|
||||
|
||||
typedef struct ascii_logo asciiL;
|
||||
|
||||
// +-----------------------------------------------------------------------------------------------------------------+
|
||||
@@ -602,7 +500,6 @@ typedef struct ascii_logo asciiL;
|
||||
asciiL logo_amd = { ASCII_AMD, 39, 15, false, {C_FG_WHITE, C_FG_GREEN}, {C_FG_WHITE, C_FG_GREEN} };
|
||||
asciiL logo_intel = { ASCII_INTEL, 48, 14, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} };
|
||||
asciiL logo_intel_new = { ASCII_INTEL_NEW, 51, 9, false, {C_FG_CYAN}, {C_FG_CYAN, C_FG_WHITE} };
|
||||
asciiL logo_hygon = { ASCII_HYGON, 51, 11, false, {C_FG_RED}, {C_FG_RED, C_FG_WHITE} };
|
||||
asciiL logo_snapd = { ASCII_SNAPD, 39, 16, false, {C_FG_RED, C_FG_WHITE}, {C_FG_RED, C_FG_WHITE} };
|
||||
asciiL logo_mtk = { ASCII_MTK, 59, 5, false, {C_FG_BLUE, C_FG_YELLOW}, {C_FG_BLUE, C_FG_YELLOW} };
|
||||
asciiL logo_exynos = { ASCII_EXYNOS, 22, 13, true, {C_BG_BLUE, C_FG_WHITE}, {C_FG_BLUE, C_FG_WHITE} };
|
||||
@@ -619,11 +516,6 @@ asciiL logo_riscv = { ASCII_RISCV, 63, 18, false, {C_FG_CYAN, C_FG_Y
|
||||
asciiL logo_sifive = { ASCII_SIFIVE, 48, 19, true, {C_BG_WHITE, C_BG_BLACK}, {C_FG_WHITE, C_FG_BLUE} };
|
||||
asciiL logo_starfive = { ASCII_STARFIVE, 33, 17, false, {C_FG_WHITE}, {C_FG_WHITE, C_FG_BLUE} };
|
||||
asciiL logo_sipeed = { ASCII_SIPEED, 41, 16, true, {C_BG_RED, C_BG_WHITE}, {C_FG_RED, C_FG_WHITE} };
|
||||
asciiL logo_nvidia = { ASCII_NVIDIA, 45, 19, false, {C_FG_GREEN, C_FG_WHITE}, {C_FG_WHITE, C_FG_GREEN} };
|
||||
asciiL logo_ampere = { ASCII_AMPERE, 50, 17, false, {C_FG_RED}, {C_FG_WHITE, C_FG_RED} };
|
||||
asciiL logo_nxp = { ASCII_NXP, 55, 8, false, {C_FG_YELLOW, C_FG_CYAN, C_FG_GREEN}, {C_FG_CYAN, C_FG_WHITE} };
|
||||
asciiL logo_amlogic = { ASCII_AMLOGIC, 58, 8, false, {C_FG_BLUE}, {C_FG_BLUE, C_FG_B_WHITE} };
|
||||
asciiL logo_marvell = { ASCII_MARVELL, 56, 10, false, {C_FG_B_BLACK}, {C_FG_B_BLACK, C_FG_B_WHITE} };
|
||||
|
||||
// Long variants | ----------------------------------------------------------------------------------------------------------------|
|
||||
asciiL logo_amd_l = { ASCII_AMD_L, 62, 19, true, {C_BG_WHITE, C_BG_GREEN}, {C_FG_WHITE, C_FG_GREEN} };
|
||||
@@ -633,7 +525,6 @@ asciiL logo_arm_l = { ASCII_ARM_L, 60, 8, true, {C_BG_CYAN},
|
||||
asciiL logo_ibm_l = { ASCII_IBM_L, 62, 13, true, {C_BG_CYAN, C_FG_WHITE}, {C_FG_CYAN, C_FG_WHITE} };
|
||||
asciiL logo_starfive_l = { ASCII_STARFIVE_L, 50, 22, false, {C_FG_WHITE}, {C_FG_WHITE, C_FG_BLUE} };
|
||||
asciiL logo_sifive_l = { ASCII_SIFIVE_L, 53, 21, true, {C_BG_WHITE, C_BG_BLACK}, {C_FG_WHITE, C_FG_CYAN} };
|
||||
asciiL logo_nvidia_l = { ASCII_NVIDIA_L, 50, 15, false, {C_FG_GREEN, C_FG_WHITE}, {C_FG_WHITE, C_FG_GREEN} };
|
||||
asciiL logo_unknown = { NULL, 0, 0, false, {COLOR_NONE}, {COLOR_NONE, COLOR_NONE} };
|
||||
|
||||
#endif
|
||||
|
||||
@@ -34,12 +34,6 @@ int64_t get_freq(struct frequency* freq) {
|
||||
return freq->max;
|
||||
}
|
||||
|
||||
#ifdef ARCH_X86
|
||||
int64_t get_freq_pp(struct frequency* freq) {
|
||||
return freq->max_pp;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(ARCH_X86) || defined(ARCH_PPC)
|
||||
char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname) {
|
||||
#ifdef ARCH_X86
|
||||
@@ -151,25 +145,17 @@ char* get_str_l3(struct cache* cach) {
|
||||
|
||||
char* get_str_freq(struct frequency* freq) {
|
||||
//Max 3 digits and 3 for '(M/G)Hz' plus 1 for '\0'
|
||||
uint32_t size = (1+5+1+3+1);
|
||||
uint32_t size = (5+1+3+1);
|
||||
assert(strlen(STRING_UNKNOWN)+1 <= size);
|
||||
char* string = ecalloc(size, sizeof(char));
|
||||
char* string = emalloc(sizeof(char)*size);
|
||||
memset(string, 0, sizeof(char)*size);
|
||||
|
||||
if(freq->max == UNKNOWN_DATA || freq->max < 0) {
|
||||
if(freq->max == UNKNOWN_DATA || freq->max < 0)
|
||||
snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN);
|
||||
}
|
||||
else if(freq->max >= 1000) {
|
||||
if (freq->measured)
|
||||
snprintf(string,size,"~%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000);
|
||||
else
|
||||
else if(freq->max >= 1000)
|
||||
snprintf(string,size,"%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000);
|
||||
}
|
||||
else {
|
||||
if (freq->measured)
|
||||
snprintf(string,size,"~%d "STRING_MEGAHERZ,freq->max);
|
||||
else
|
||||
snprintf(string,size,"%d "STRING_MEGAHERZ,freq->max);
|
||||
}
|
||||
|
||||
return string;
|
||||
}
|
||||
|
||||
@@ -8,7 +8,6 @@ enum {
|
||||
// ARCH_X86
|
||||
CPU_VENDOR_INTEL,
|
||||
CPU_VENDOR_AMD,
|
||||
CPU_VENDOR_HYGON,
|
||||
// ARCH_ARM
|
||||
CPU_VENDOR_ARM,
|
||||
CPU_VENDOR_APPLE,
|
||||
@@ -58,13 +57,6 @@ typedef int32_t VENDOR;
|
||||
struct frequency {
|
||||
int32_t base;
|
||||
int32_t max;
|
||||
// Indicates if max frequency was measured
|
||||
bool measured;
|
||||
#ifdef ARCH_X86
|
||||
// Max frequency when running vectorized code.
|
||||
// Used only for peak performance computation.
|
||||
int32_t max_pp;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct hypervisor {
|
||||
@@ -129,9 +121,6 @@ struct features {
|
||||
bool SHA1;
|
||||
bool SHA2;
|
||||
bool CRC32;
|
||||
bool SVE;
|
||||
bool SVE2;
|
||||
uint64_t cntb;
|
||||
#endif
|
||||
};
|
||||
|
||||
@@ -193,8 +182,6 @@ struct cpuInfo {
|
||||
#ifdef ARCH_X86
|
||||
// The index of the first core in the module
|
||||
uint32_t first_core_id;
|
||||
// The index of this module
|
||||
uint32_t module_id;
|
||||
#endif
|
||||
#endif
|
||||
};
|
||||
@@ -207,9 +194,6 @@ uint32_t get_nsockets(struct topology* topo);
|
||||
|
||||
VENDOR get_cpu_vendor(struct cpuInfo* cpu);
|
||||
int64_t get_freq(struct frequency* freq);
|
||||
#ifdef ARCH_X86
|
||||
int64_t get_freq_pp(struct frequency* freq);
|
||||
#endif
|
||||
|
||||
char* get_str_aes(struct cpuInfo* cpu);
|
||||
char* get_str_sha(struct cpuInfo* cpu);
|
||||
|
||||
@@ -1,195 +0,0 @@
|
||||
#ifdef __linux__
|
||||
|
||||
#define _GNU_SOURCE
|
||||
|
||||
#include <time.h>
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <errno.h>
|
||||
#include <unistd.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <linux/perf_event.h>
|
||||
|
||||
#include "global.h"
|
||||
#include "cpu.h"
|
||||
|
||||
static long
|
||||
perf_event_open(struct perf_event_attr *hw_event, pid_t pid,
|
||||
int cpu, int group_fd, unsigned long flags) {
|
||||
int ret;
|
||||
ret = syscall(__NR_perf_event_open, hw_event, pid, cpu,
|
||||
group_fd, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define INSERT_ASM_ONCE __asm volatile("nop");
|
||||
#define INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
INSERT_ASM_ONCE \
|
||||
|
||||
#define INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES \
|
||||
INSERT_ASM_10_TIMES
|
||||
|
||||
#define INSERT_ASM_1000_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
INSERT_ASM_100_TIMES \
|
||||
|
||||
void nop_function(uint64_t iters) {
|
||||
for (uint64_t i = 0; i < iters; i++) {
|
||||
INSERT_ASM_1000_TIMES
|
||||
INSERT_ASM_1000_TIMES
|
||||
INSERT_ASM_1000_TIMES
|
||||
INSERT_ASM_1000_TIMES
|
||||
}
|
||||
}
|
||||
|
||||
// Run the nop_function with the number of iterations specified and
|
||||
// measure both the time and number of cycles
|
||||
int measure_freq_iters(uint64_t iters, uint32_t core, double* freq) {
|
||||
clockid_t clock = CLOCK_PROCESS_CPUTIME_ID;
|
||||
struct timespec start, end;
|
||||
struct perf_event_attr pe;
|
||||
uint64_t cycles;
|
||||
int fd;
|
||||
int pid = 0;
|
||||
memset(&pe, 0, sizeof(struct perf_event_attr));
|
||||
pe.type = PERF_TYPE_HARDWARE;
|
||||
pe.size = sizeof(struct perf_event_attr);
|
||||
pe.config = PERF_COUNT_HW_CPU_CYCLES;
|
||||
pe.disabled = 1;
|
||||
pe.exclude_kernel = 1;
|
||||
pe.exclude_hv = 1;
|
||||
|
||||
fd = perf_event_open(&pe, pid, core, -1, 0);
|
||||
if (fd == -1) {
|
||||
perror("perf_event_open");
|
||||
if (errno == EPERM || errno == EACCES) {
|
||||
printErr("You may not have permission to collect stats.\n"\
|
||||
"Consider tweaking /proc/sys/kernel/perf_event_paranoid or running as root");
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (clock_gettime(clock, &start) == -1) {
|
||||
perror("clock_gettime");
|
||||
return -1;
|
||||
}
|
||||
if(ioctl(fd, PERF_EVENT_IOC_RESET, 0) == -1) {
|
||||
perror("ioctl");
|
||||
return -1;
|
||||
}
|
||||
if(ioctl(fd, PERF_EVENT_IOC_ENABLE, 0) == -1) {
|
||||
perror("ioctl");
|
||||
return -1;
|
||||
}
|
||||
|
||||
nop_function(iters);
|
||||
|
||||
ssize_t ret = read(fd, &cycles, sizeof(uint64_t));
|
||||
if (ret == -1) {
|
||||
perror("read");
|
||||
return -1;
|
||||
}
|
||||
if (ret != sizeof(uint64_t)) {
|
||||
printErr("Read returned %d, expected %d", ret, sizeof(uint64_t));
|
||||
return -1;
|
||||
}
|
||||
if(ioctl(fd, PERF_EVENT_IOC_DISABLE, 0) == -1) {
|
||||
perror("ioctl");
|
||||
return -1;
|
||||
}
|
||||
if (clock_gettime(clock, &end) == -1) {
|
||||
perror("clock_gettime");
|
||||
return -1;
|
||||
}
|
||||
|
||||
uint64_t nsecs = (end.tv_sec*1e9 + end.tv_nsec) - (start.tv_sec*1e9 + start.tv_nsec);
|
||||
uint64_t usecs = nsecs/1000;
|
||||
*freq = cycles/((double)usecs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Return a good number of iterations to run the nop_function in
|
||||
// order to get a precise measurement of the frequency without taking
|
||||
// too much time.
|
||||
uint64_t get_num_iters_from_freq(double frequency) {
|
||||
// Truncate to reduce variability
|
||||
uint64_t freq_trunc = ((uint64_t) frequency / 100) * 100;
|
||||
uint64_t osp_per_iter = 4 * 1000;
|
||||
|
||||
return freq_trunc * 1e7 * 1/osp_per_iter;
|
||||
}
|
||||
|
||||
// Differences between x86 measure_frequency and this measure_max_frequency:
|
||||
// - measure_frequency employs all cores simultaneously whereas
|
||||
// measure_max_frequency only employs 1.
|
||||
// - measure_frequency runs the computation and checks /proc/cpuinfo whereas
|
||||
// measure_max_frequency does not rely on /proc/cpuinfo and simply
|
||||
// counts cpu cycles to measure frequency.
|
||||
// - measure_frequency uses actual computation while measuring the frequency
|
||||
// whereas measure_max_frequency uses nop instructions. This makes the former
|
||||
// x86 dependant whereas the latter is architecture independant.
|
||||
int64_t measure_max_frequency(uint32_t core) {
|
||||
if (!bind_to_cpu(core)) {
|
||||
printErr("Failed binding the process to CPU %d", core);
|
||||
return UNKNOWN_DATA;
|
||||
}
|
||||
|
||||
// First, get very rough estimation of clock cycle to
|
||||
// compute a reasonable value for the iterations
|
||||
double estimation_freq, frequency;
|
||||
uint64_t iters = 100000;
|
||||
if (measure_freq_iters(iters, core, &estimation_freq) == -1)
|
||||
return UNKNOWN_DATA;
|
||||
|
||||
if (estimation_freq <= 0.0) {
|
||||
printErr("First frequency measurement yielded an invalid value: %f", estimation_freq);
|
||||
return UNKNOWN_DATA;
|
||||
}
|
||||
iters = get_num_iters_from_freq(estimation_freq);
|
||||
printWarn("Running frequency measurement with %ld iterations on core %d...", iters, core);
|
||||
|
||||
// Now perform actual measurement
|
||||
const char* frequency_banner = "cpufetch is measuring the max frequency...";
|
||||
printf("%s", frequency_banner);
|
||||
fflush(stdout);
|
||||
|
||||
if (measure_freq_iters(iters, core, &frequency) == -1)
|
||||
return UNKNOWN_DATA;
|
||||
|
||||
// Clean screen once measurement is finished
|
||||
printf("\r%*c\r", (int) strlen(frequency_banner), ' ');
|
||||
|
||||
// Discard last digit in the frequency, which should help providing
|
||||
// more reliable and predictable values.
|
||||
return (((int) frequency + 5)/10) * 10;
|
||||
}
|
||||
|
||||
#endif // #ifdef __linux__
|
||||
@@ -1,6 +0,0 @@
|
||||
#ifndef __COMMON_FREQ__
|
||||
#define __COMMON_FREQ__
|
||||
|
||||
int64_t measure_max_frequency(uint32_t core);
|
||||
|
||||
#endif
|
||||
@@ -1,14 +1,3 @@
|
||||
#ifdef _WIN32
|
||||
#define NOMINMAX
|
||||
#include <windows.h>
|
||||
#elif defined __linux__
|
||||
#define _GNU_SOURCE
|
||||
#include <sched.h>
|
||||
#elif defined __FreeBSD__
|
||||
#include <sys/param.h>
|
||||
#include <sys/cpuset.h>
|
||||
#endif
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
@@ -62,7 +51,7 @@
|
||||
#endif
|
||||
|
||||
#ifndef GIT_FULL_VERSION
|
||||
static const char* VERSION = "1.06";
|
||||
static const char* VERSION = "1.05";
|
||||
#endif
|
||||
|
||||
enum {
|
||||
@@ -210,34 +199,6 @@ void* erealloc(void *ptr, size_t size) {
|
||||
return newptr;
|
||||
}
|
||||
|
||||
#ifndef __APPLE__
|
||||
bool bind_to_cpu(int cpu_id) {
|
||||
#ifdef _WIN32
|
||||
HANDLE process = GetCurrentProcess();
|
||||
DWORD_PTR processAffinityMask = 1 << cpu_id;
|
||||
return SetProcessAffinityMask(process, processAffinityMask);
|
||||
#elif defined __linux__
|
||||
cpu_set_t currentCPU;
|
||||
CPU_ZERO(¤tCPU);
|
||||
CPU_SET(cpu_id, ¤tCPU);
|
||||
if (sched_setaffinity (0, sizeof(currentCPU), ¤tCPU) == -1) {
|
||||
printWarn("sched_setaffinity: %s", strerror(errno));
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
#elif defined __FreeBSD__
|
||||
cpuset_t currentCPU;
|
||||
CPU_ZERO(¤tCPU);
|
||||
CPU_SET(cpu_id, ¤tCPU);
|
||||
if(cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset_t), ¤tCPU) == -1) {
|
||||
printWarn("cpuset_setaffinity: %s", strerror(errno));
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
void print_version(FILE *restrict stream) {
|
||||
#ifdef GIT_FULL_VERSION
|
||||
fprintf(stream, "cpufetch %s (%s %s)\n", GIT_FULL_VERSION, OS_STR, ARCH_STR);
|
||||
|
||||
@@ -19,9 +19,6 @@ char *strremove(char *str, const char *sub);
|
||||
void* emalloc(size_t size);
|
||||
void* ecalloc(size_t nmemb, size_t size);
|
||||
void* erealloc(void *ptr, size_t size);
|
||||
#ifndef __APPLE__
|
||||
bool bind_to_cpu(int cpu_id);
|
||||
#endif
|
||||
void print_version(FILE *restrict stream);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -30,17 +30,11 @@ void print_help(char *argv[]) {
|
||||
#ifdef ARCH_X86
|
||||
#ifdef __linux__
|
||||
printf(" --%s %*s Compute the peak performance accurately (measure the CPU frequency instead of using the maximum)\n", t[ARG_ACCURATE_PP], (int) (max_len-strlen(t[ARG_ACCURATE_PP])), "");
|
||||
printf(" --%s %*s Measure the max CPU frequency instead of reading it\n", t[ARG_MEASURE_MAX_FREQ], (int) (max_len-strlen(t[ARG_MEASURE_MAX_FREQ])), "");
|
||||
#endif // __linux__
|
||||
#endif
|
||||
printf(" --%s %*s Show the old Intel logo\n", t[ARG_LOGO_INTEL_OLD], (int) (max_len-strlen(t[ARG_LOGO_INTEL_OLD])), "");
|
||||
printf(" --%s %*s Show the new Intel logo\n", t[ARG_LOGO_INTEL_NEW], (int) (max_len-strlen(t[ARG_LOGO_INTEL_NEW])), "");
|
||||
printf(" -%c, --%s %*s Show the full CPU name (do not abbreviate it)\n", c[ARG_FULLCPUNAME], t[ARG_FULLCPUNAME], (int) (max_len-strlen(t[ARG_FULLCPUNAME])), "");
|
||||
printf(" -%c, --%s %*s Print raw cpuid data (debug purposes)\n", c[ARG_RAW], t[ARG_RAW], (int) (max_len-strlen(t[ARG_RAW])), "");
|
||||
#endif // ARCH_X86
|
||||
#ifdef ARCH_ARM
|
||||
#ifdef __linux__
|
||||
printf(" --%s %*s Measure the max CPU frequency instead of reading it\n", t[ARG_MEASURE_MAX_FREQ], (int) (max_len-strlen(t[ARG_MEASURE_MAX_FREQ])), "");
|
||||
#endif
|
||||
#endif
|
||||
printf(" -%c, --%s %*s Print this help and exit\n", c[ARG_HELP], t[ARG_HELP], (int) (max_len-strlen(t[ARG_HELP])), "");
|
||||
printf(" -%c, --%s %*s Print cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");
|
||||
@@ -51,7 +45,7 @@ void print_help(char *argv[]) {
|
||||
printf(" * \"amd\": Use AMD color scheme \n");
|
||||
printf(" * \"ibm\", Use IBM color scheme \n");
|
||||
printf(" * \"arm\": Use ARM color scheme \n");
|
||||
printf(" * \"rockchip\": Use Rockchip color scheme \n");
|
||||
printf(" * \"rockchip\": Use ARM color scheme \n");
|
||||
printf(" * \"sifive\": Use SiFive color scheme \n");
|
||||
printf(" * custom: If the argument of --color does not match any of the previous strings, a custom scheme can be specified.\n");
|
||||
printf(" 5 colors must be given in RGB with the format: R,G,B:R,G,B:...\n");
|
||||
@@ -86,11 +80,6 @@ void print_help(char *argv[]) {
|
||||
printf(" --accurate-pp option, which will measure the AVX frequency and show a more precise estimation\n");
|
||||
printf(" (this option is only available in x86 architectures).\n");
|
||||
printf(" To precisely measure peak performance, see: https://github.com/Dr-Noob/peakperf\n");
|
||||
printf("\n");
|
||||
printf(" Both --accurate-pp and --measure-max-freq measure the actual frequency of the CPU. However,\n");
|
||||
printf(" they differ slightly. The former measures the max frequency while running vectorized SSE/AVX\n");
|
||||
printf(" instructions and it is thus x86 only, whereas the latter simply measures the max clock cycle\n");
|
||||
printf(" and is architecture independent.\n");
|
||||
}
|
||||
|
||||
int main(int argc, char* argv[]) {
|
||||
|
||||
133
src/common/pci.c
133
src/common/pci.c
@@ -1,133 +0,0 @@
|
||||
#define _GNU_SOURCE
|
||||
|
||||
#include <sys/stat.h>
|
||||
#include <dirent.h>
|
||||
|
||||
#include "udev.h"
|
||||
#include "global.h"
|
||||
#include "pci.h"
|
||||
|
||||
#ifndef PATH_MAX
|
||||
#define PATH_MAX 1024
|
||||
#endif
|
||||
|
||||
#define PCI_PATH "/sys/bus/pci/devices/"
|
||||
#define MAX_LENGTH_PCI_DIR_NAME 1024
|
||||
|
||||
// Return a list of PCI devices containing only
|
||||
// the sysfs path
|
||||
struct pci_devices * get_pci_paths(void) {
|
||||
DIR *dirp;
|
||||
|
||||
if ((dirp = opendir(PCI_PATH)) == NULL) {
|
||||
perror("opendir");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
struct dirent *dp;
|
||||
int numDirs = 0;
|
||||
errno = 0;
|
||||
|
||||
while ((dp = readdir(dirp)) != NULL) {
|
||||
if (strcmp(dp->d_name, ".") != 0 && strcmp(dp->d_name, "..") != 0)
|
||||
numDirs++;
|
||||
}
|
||||
if (errno != 0) {
|
||||
perror("readdir");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
rewinddir(dirp);
|
||||
|
||||
struct pci_devices * pci = emalloc(sizeof(struct pci_devices));
|
||||
pci->num_devices = numDirs;
|
||||
pci->devices = emalloc(sizeof(struct pci_device) * pci->num_devices);
|
||||
char * full_path = emalloc(PATH_MAX * sizeof(char));
|
||||
struct stat stbuf;
|
||||
int i = 0;
|
||||
|
||||
while ((dp = readdir(dirp)) != NULL) {
|
||||
if (strcmp(dp->d_name, ".") == 0 || strcmp(dp->d_name, "..") == 0)
|
||||
continue;
|
||||
|
||||
if (strlen(dp->d_name) > MAX_LENGTH_PCI_DIR_NAME) {
|
||||
printErr("Directory name is too long: %s", dp->d_name);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
memset(full_path, 0, PATH_MAX * sizeof(char));
|
||||
snprintf(full_path, min(strlen(PCI_PATH) + strlen(dp->d_name) + 1, PATH_MAX), "%s%s", PCI_PATH, dp->d_name);
|
||||
|
||||
if (stat(full_path, &stbuf) == -1) {
|
||||
perror("stat");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if ((stbuf.st_mode & S_IFMT) == S_IFDIR) {
|
||||
int strLen = min(MAX_LENGTH_PCI_DIR_NAME, strlen(dp->d_name)) + 1;
|
||||
pci->devices[i] = emalloc(sizeof(struct pci_device));
|
||||
pci->devices[i]->path = ecalloc(strLen, sizeof(char));
|
||||
strncpy(pci->devices[i]->path, dp->d_name, strLen);
|
||||
i++;
|
||||
}
|
||||
}
|
||||
if (errno != 0) {
|
||||
perror("readdir");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return pci;
|
||||
}
|
||||
|
||||
// For each PCI device in the list pci, fetch its vendor and
|
||||
// device id using sysfs (e.g., /sys/bus/pci/devices/XXX/{vendor/device})
|
||||
void populate_pci_devices(struct pci_devices * pci) {
|
||||
int filelen;
|
||||
char* buf;
|
||||
|
||||
for (int i=0; i < pci->num_devices; i++) {
|
||||
struct pci_device* dev = pci->devices[i];
|
||||
int path_size = strlen(PCI_PATH) + strlen(dev->path) + 2;
|
||||
|
||||
// Read vendor_id
|
||||
char *vendor_id_path = emalloc(sizeof(char) * (path_size + strlen("vendor") + 1));
|
||||
sprintf(vendor_id_path, "%s/%s/%s", PCI_PATH, dev->path, "vendor");
|
||||
|
||||
if ((buf = read_file(vendor_id_path, &filelen)) == NULL) {
|
||||
printWarn("read_file: %s: %s\n", vendor_id_path, strerror(errno));
|
||||
dev->vendor_id = 0;
|
||||
}
|
||||
else {
|
||||
dev->vendor_id = strtol(buf, NULL, 16);
|
||||
}
|
||||
|
||||
// Read device_id
|
||||
char *device_id_path = emalloc(sizeof(char) * (path_size + strlen("device") + 1));
|
||||
sprintf(device_id_path, "%s/%s/%s", PCI_PATH, dev->path, "device");
|
||||
|
||||
if ((buf = read_file(device_id_path, &filelen)) == NULL) {
|
||||
printWarn("read_file: %s: %s\n", device_id_path, strerror(errno));
|
||||
dev->device_id = 0;
|
||||
}
|
||||
else {
|
||||
dev->device_id = strtol(buf, NULL, 16);
|
||||
}
|
||||
|
||||
free(vendor_id_path);
|
||||
free(device_id_path);
|
||||
}
|
||||
}
|
||||
|
||||
// Return a list of PCI devices that could be used to infer the SoC.
|
||||
// The criteria to determine which devices are suitable for this task
|
||||
// is decided in filter_pci_devices.
|
||||
struct pci_devices * get_pci_devices(void) {
|
||||
struct pci_devices * pci = get_pci_paths();
|
||||
|
||||
if (pci == NULL)
|
||||
return NULL;
|
||||
|
||||
populate_pci_devices(pci);
|
||||
|
||||
return pci;
|
||||
}
|
||||
@@ -1,23 +0,0 @@
|
||||
#ifndef __PCI__
|
||||
#define __PCI__
|
||||
|
||||
#define PCI_VENDOR_NVIDIA 0x10de
|
||||
#define PCI_VENDOR_AMPERE 0x1def
|
||||
|
||||
#define PCI_DEVICE_TEGRA_X1 0x0faf
|
||||
#define PCI_DEVICE_ALTRA 0xe100
|
||||
|
||||
struct pci_device {
|
||||
char * path;
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
};
|
||||
|
||||
struct pci_devices {
|
||||
struct pci_device ** devices;
|
||||
int num_devices;
|
||||
};
|
||||
|
||||
struct pci_devices * get_pci_devices(void);
|
||||
|
||||
#endif
|
||||
@@ -61,7 +61,6 @@ enum {
|
||||
ATTRIBUTE_NCORES,
|
||||
ATTRIBUTE_NCORES_DUAL,
|
||||
#ifdef ARCH_X86
|
||||
ATTRIBUTE_SSE,
|
||||
ATTRIBUTE_AVX,
|
||||
ATTRIBUTE_FMA,
|
||||
#elif ARCH_PPC
|
||||
@@ -97,7 +96,6 @@ static const char* ATTRIBUTE_FIELDS [] = {
|
||||
"Cores:",
|
||||
"Cores (Total):",
|
||||
#ifdef ARCH_X86
|
||||
"SSE:",
|
||||
"AVX:",
|
||||
"FMA:",
|
||||
#elif ARCH_PPC
|
||||
@@ -133,7 +131,6 @@ static const char* ATTRIBUTE_FIELDS_SHORT [] = {
|
||||
"Cores:",
|
||||
"Cores (Total):",
|
||||
#ifdef ARCH_X86
|
||||
"SSE:",
|
||||
"AVX:",
|
||||
"FMA:",
|
||||
#elif ARCH_PPC
|
||||
@@ -360,9 +357,6 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
|
||||
else if(art->vendor == CPU_VENDOR_AMD) {
|
||||
art->art = choose_ascii_art_aux(&logo_amd_l, &logo_amd, term, lf);
|
||||
}
|
||||
else if(art->vendor == CPU_VENDOR_HYGON) {
|
||||
art->art = &logo_hygon;
|
||||
}
|
||||
else {
|
||||
art->art = &logo_unknown;
|
||||
}
|
||||
@@ -389,16 +383,6 @@ void choose_ascii_art(struct ascii* art, struct color** cs, struct terminal* ter
|
||||
art->art = &logo_allwinner;
|
||||
else if(art->vendor == SOC_VENDOR_ROCKCHIP)
|
||||
art->art = &logo_rockchip;
|
||||
else if(art->vendor == SOC_VENDOR_AMPERE)
|
||||
art->art = &logo_ampere;
|
||||
else if(art->vendor == SOC_VENDOR_NXP)
|
||||
art->art = &logo_nxp;
|
||||
else if(art->vendor == SOC_VENDOR_AMLOGIC)
|
||||
art->art = &logo_amlogic;
|
||||
else if(art->vendor == SOC_VENDOR_MARVELL)
|
||||
art->art = &logo_marvell;
|
||||
else if(art->vendor == SOC_VENDOR_NVIDIA)
|
||||
art->art = choose_ascii_art_aux(&logo_nvidia_l, &logo_nvidia, term, lf);
|
||||
else {
|
||||
art->art = choose_ascii_art_aux(&logo_arm_l, &logo_arm, term, lf);
|
||||
}
|
||||
@@ -605,7 +589,6 @@ bool print_cpufetch_x86(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
|
||||
for(int i = 0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
|
||||
char* max_frequency = get_str_freq(ptr->freq);
|
||||
char* avx = get_str_avx(ptr);
|
||||
char* sse = get_str_sse(ptr);
|
||||
char* fma = get_str_fma(ptr);
|
||||
char* cpu_num = emalloc(sizeof(char) * 9);
|
||||
|
||||
@@ -640,18 +623,8 @@ bool print_cpufetch_x86(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
|
||||
setAttribute(art, ATTRIBUTE_NCORES, n_cores);
|
||||
}
|
||||
}
|
||||
|
||||
// Show the most modern vector instructions.
|
||||
if (strcmp(avx, "No") == 0) {
|
||||
if (strcmp(sse, "No") != 0) {
|
||||
setAttribute(art, ATTRIBUTE_SSE, sse);
|
||||
}
|
||||
}
|
||||
else {
|
||||
setAttribute(art, ATTRIBUTE_AVX, avx);
|
||||
setAttribute(art, ATTRIBUTE_FMA, fma);
|
||||
}
|
||||
|
||||
if(l1i != NULL) setAttribute(art, ATTRIBUTE_L1i, l1i);
|
||||
if(l1d != NULL) setAttribute(art, ATTRIBUTE_L1d, l1d);
|
||||
if(l2 != NULL) setAttribute(art, ATTRIBUTE_L2, l2);
|
||||
@@ -887,13 +860,7 @@ bool print_cpufetch_arm(struct cpuInfo* cpu, STYLE s, struct color** cs, struct
|
||||
char* soc_name = get_soc_name(cpu->soc);
|
||||
char* features = get_str_features(cpu);
|
||||
setAttribute(art, ATTRIBUTE_SOC, soc_name);
|
||||
|
||||
// Currently no reliable way to identify the specific SoC on Windows
|
||||
// https://github.com/Dr-Noob/cpufetch/pull/273
|
||||
// Hide manufacturing process
|
||||
#if !defined(_WIN32)
|
||||
setAttribute(art, ATTRIBUTE_TECHNOLOGY, manufacturing_process);
|
||||
#endif
|
||||
|
||||
if(cpu->num_cpus == 1) {
|
||||
char* uarch = get_str_uarch(cpu);
|
||||
|
||||
@@ -16,15 +16,10 @@ static char* soc_trademark_string[] = {
|
||||
[SOC_VENDOR_EXYNOS] = "Exynos ",
|
||||
[SOC_VENDOR_KIRIN] = "Kirin ",
|
||||
[SOC_VENDOR_KUNPENG] = "Kunpeng ",
|
||||
[SOC_VENDOR_BROADCOM] = "Broadcom ",
|
||||
[SOC_VENDOR_BROADCOM] = "Broadcom BCM",
|
||||
[SOC_VENDOR_APPLE] = "Apple ",
|
||||
[SOC_VENDOR_ROCKCHIP] = "Rockchip ",
|
||||
[SOC_VENDOR_GOOGLE] = "Google ",
|
||||
[SOC_VENDOR_NVIDIA] = "NVIDIA ",
|
||||
[SOC_VENDOR_AMPERE] = "Ampere ",
|
||||
[SOC_VENDOR_NXP] = "NXP ",
|
||||
[SOC_VENDOR_AMLOGIC] = "Amlogic ",
|
||||
[SOC_VENDOR_MARVELL] = "Marvell",
|
||||
// RISC-V
|
||||
[SOC_VENDOR_SIFIVE] = "SiFive ",
|
||||
[SOC_VENDOR_STARFIVE] = "StarFive ",
|
||||
@@ -34,7 +29,7 @@ static char* soc_trademark_string[] = {
|
||||
};
|
||||
|
||||
VENDOR get_soc_vendor(struct system_on_chip* soc) {
|
||||
return soc->vendor;
|
||||
return soc->soc_vendor;
|
||||
}
|
||||
|
||||
char* get_str_process(struct system_on_chip* soc) {
|
||||
@@ -45,52 +40,42 @@ char* get_str_process(struct system_on_chip* soc) {
|
||||
snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
|
||||
}
|
||||
else {
|
||||
int max_process_len = 5 + 1;
|
||||
str = ecalloc(max_process_len, sizeof(char));
|
||||
snprintf(str, max_process_len, "%dnm", soc->process);
|
||||
str = emalloc(sizeof(char) * 5);
|
||||
memset(str, 0, sizeof(char) * 5);
|
||||
snprintf(str, 5, "%dnm", soc->process);
|
||||
}
|
||||
return str;
|
||||
}
|
||||
|
||||
char* get_soc_name(struct system_on_chip* soc) {
|
||||
if(soc->model == SOC_MODEL_UNKNOWN)
|
||||
if(soc->soc_model == SOC_MODEL_UNKNOWN)
|
||||
return soc->raw_name;
|
||||
return soc->name;
|
||||
return soc->soc_name;
|
||||
}
|
||||
|
||||
void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process) {
|
||||
soc->model = soc_model;
|
||||
soc->vendor = get_soc_vendor_from_soc(soc_model);
|
||||
soc->soc_model = soc_model;
|
||||
soc->soc_vendor = get_soc_vendor_from_soc(soc_model);
|
||||
soc->process = process;
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
printBug("fill_soc: soc->vendor == SOC_VENDOR_UNKOWN");
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
printBug("fill_soc: soc->soc_vendor == SOC_VENDOR_UNKOWN");
|
||||
// If we fall here there is a bug in socs.h
|
||||
// Reset everything to avoid segfault
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->model = SOC_MODEL_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_model = SOC_MODEL_UNKNOWN;
|
||||
soc->process = UNKNOWN;
|
||||
soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
|
||||
snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
|
||||
}
|
||||
else {
|
||||
int len = strlen(soc_name) + strlen(soc_trademark_string[soc->vendor]) + 1;
|
||||
soc->name = emalloc(sizeof(char) * len);
|
||||
sprintf(soc->name, "%s%s", soc_trademark_string[soc->vendor], soc_name);
|
||||
soc->process = process;
|
||||
int len = strlen(soc_name) + strlen(soc_trademark_string[soc->soc_vendor]) + 1;
|
||||
soc->soc_name = emalloc(sizeof(char) * len);
|
||||
memset(soc->soc_name, 0, sizeof(char) * len);
|
||||
sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef _WIN32
|
||||
VENDOR try_match_soc_vendor_name(char* vendor_name)
|
||||
{
|
||||
for(size_t i=1; i < sizeof(soc_trademark_string)/sizeof(soc_trademark_string[0]); i++) {
|
||||
if(strstr(vendor_name, soc_trademark_string[i]) != NULL) {
|
||||
return i;
|
||||
}
|
||||
}
|
||||
return SOC_VENDOR_UNKNOWN;
|
||||
}
|
||||
#endif
|
||||
|
||||
bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
|
||||
int len1 = strlen(raw_name);
|
||||
int len2 = strlen(expected_name);
|
||||
|
||||
@@ -24,11 +24,6 @@ enum {
|
||||
SOC_VENDOR_APPLE,
|
||||
SOC_VENDOR_ROCKCHIP,
|
||||
SOC_VENDOR_GOOGLE,
|
||||
SOC_VENDOR_NVIDIA,
|
||||
SOC_VENDOR_AMPERE,
|
||||
SOC_VENDOR_NXP,
|
||||
SOC_VENDOR_AMLOGIC,
|
||||
SOC_VENDOR_MARVELL,
|
||||
// RISC-V
|
||||
SOC_VENDOR_SIFIVE,
|
||||
SOC_VENDOR_STARFIVE,
|
||||
@@ -38,10 +33,10 @@ enum {
|
||||
};
|
||||
|
||||
struct system_on_chip {
|
||||
SOC model;
|
||||
VENDOR vendor;
|
||||
SOC soc_model;
|
||||
VENDOR soc_vendor;
|
||||
int32_t process;
|
||||
char* name;
|
||||
char* soc_name;
|
||||
char* raw_name;
|
||||
};
|
||||
|
||||
@@ -51,9 +46,6 @@ VENDOR get_soc_vendor(struct system_on_chip* soc);
|
||||
bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process);
|
||||
char* get_str_process(struct system_on_chip* soc);
|
||||
void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process);
|
||||
#ifdef _WIN32
|
||||
VENDOR try_match_soc_vendor_name(char* vendor_name);
|
||||
#endif
|
||||
|
||||
#define SOC_START if (false) {}
|
||||
#define SOC_EQ(raw_name, expected_name, soc_name, soc_model, soc, process) \
|
||||
|
||||
@@ -1,10 +1,7 @@
|
||||
#include "../common/global.h"
|
||||
#include "udev.h"
|
||||
#include "global.h"
|
||||
#include "cpu.h"
|
||||
|
||||
#define _PATH_DEVTREE "/proc/device-tree/compatible"
|
||||
|
||||
// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
|
||||
int get_ncores_from_cpuinfo(void) {
|
||||
// Examples:
|
||||
@@ -146,7 +143,8 @@ char* get_field_from_cpuinfo(char* CPUINFO_FIELD) {
|
||||
char* tmp2 = strstr(tmp1, "\n");
|
||||
|
||||
int strlen = (1 + (tmp2-tmp1));
|
||||
char* hardware = ecalloc(strlen, sizeof(char));
|
||||
char* hardware = emalloc(sizeof(char) * strlen);
|
||||
memset(hardware, 0, sizeof(char) * strlen);
|
||||
strncpy(hardware, tmp1, tmp2-tmp1);
|
||||
|
||||
return hardware;
|
||||
@@ -351,13 +349,3 @@ bool is_devtree_compatible(char* str) {
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
char* get_devtree_compatible(int *filelen) {
|
||||
char* buf;
|
||||
|
||||
if ((buf = read_file(_PATH_DEVTREE, filelen)) == NULL) {
|
||||
printWarn("read_file: %s: %s", _PATH_DEVTREE, strerror(errno));
|
||||
}
|
||||
|
||||
return buf;
|
||||
}
|
||||
|
||||
@@ -43,6 +43,5 @@ int get_num_sockets_package_cpus(struct topology* topo);
|
||||
int get_ncores_from_cpuinfo(void);
|
||||
char* get_field_from_cpuinfo(char* CPUINFO_FIELD);
|
||||
bool is_devtree_compatible(char* str);
|
||||
char* get_devtree_compatible(int *filelen);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -150,7 +150,6 @@ struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
|
||||
struct frequency* get_frequency_info(void) {
|
||||
struct frequency* freq = emalloc(sizeof(struct frequency));
|
||||
|
||||
freq->measured = false;
|
||||
freq->max = get_max_freq_from_file(0);
|
||||
freq->base = get_min_freq_from_file(0);
|
||||
|
||||
|
||||
@@ -76,7 +76,7 @@ void fill_uarch(struct uarch* arch, MICROARCH u) {
|
||||
FILL_UARCH(arch->uarch, UARCH_PPC603, "PowerPC 603", UNK) // varies
|
||||
FILL_UARCH(arch->uarch, UARCH_PPC440, "PowerPC 440", UNK)
|
||||
FILL_UARCH(arch->uarch, UARCH_PPC470, "PowerPC 470", 45) // strange...
|
||||
FILL_UARCH(arch->uarch, UARCH_ESPRESSO, "Espresso", 45) // https://en.wikipedia.org/wiki/PowerPC_7xx#Espresso, https://en.wikipedia.org/wiki/Espresso_(processor), https://github.com/Dr-Noob/cpufetch/issues/231
|
||||
FILL_UARCH(arch->uarch, UARCH_ESPRESSO, "Espresso", 45) // https://en.wikipedia.org/wiki/PowerPC_7xx#Espresso, https://en.wikipedia.org/wiki/Espresso_(processor)
|
||||
FILL_UARCH(arch->uarch, UARCH_PPC970, "PowerPC 970", 130)
|
||||
FILL_UARCH(arch->uarch, UARCH_PPC970FX, "PowerPC 970FX", 90)
|
||||
FILL_UARCH(arch->uarch, UARCH_PPC970MP, "PowerPC 970MP", 90)
|
||||
|
||||
@@ -13,7 +13,7 @@ bool fill_array_from_sys(int *core_ids, int total_cores, char* SYS_PATH) {
|
||||
char* buf;
|
||||
char* end;
|
||||
char path[128];
|
||||
memset(name, 0, sizeof(char) * 128);
|
||||
memset(path, 0, 128);
|
||||
|
||||
for(int i=0; i < total_cores; i++) {
|
||||
sprintf(path, "%s%s/cpu%d/%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, SYS_PATH);
|
||||
|
||||
@@ -19,7 +19,6 @@
|
||||
struct frequency* get_frequency_info(uint32_t core) {
|
||||
struct frequency* freq = emalloc(sizeof(struct frequency));
|
||||
|
||||
freq->measured = false;
|
||||
freq->base = UNKNOWN_DATA;
|
||||
freq->max = get_max_freq_from_file(core);
|
||||
|
||||
@@ -62,7 +61,6 @@ int parse_multi_letter_extension(struct extensions* ext, char* e) {
|
||||
SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM)
|
||||
SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE)
|
||||
SET_ISA_EXT_MAP("svnapot", RISCV_ISA_EXT_SVNAPOT)
|
||||
SET_ISA_EXT_MAP("zicbop", RISCV_ISA_EXT_ZICBOP)
|
||||
SET_ISA_EXT_MAP("zicboz", RISCV_ISA_EXT_ZICBOZ)
|
||||
SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA)
|
||||
SET_ISA_EXT_MAP("ssaia", RISCV_ISA_EXT_SSAIA)
|
||||
@@ -101,8 +99,9 @@ struct extensions* get_extensions_from_str(char* str) {
|
||||
return ext;
|
||||
}
|
||||
|
||||
int len = strlen(str);
|
||||
ext->str = ecalloc(len+1, sizeof(char));
|
||||
int len = sizeof(char) * (strlen(str)+1);
|
||||
ext->str = emalloc(sizeof(char) * len);
|
||||
memset(ext->str, 0, len);
|
||||
strncpy(ext->str, str, sizeof(char) * len);
|
||||
|
||||
// Code inspired in Linux kernel (riscv_fill_hwcap):
|
||||
|
||||
@@ -23,7 +23,6 @@ enum riscv_isa_ext_id {
|
||||
RISCV_ISA_EXT_ZICBOM,
|
||||
RISCV_ISA_EXT_ZIHINTPAUSE,
|
||||
RISCV_ISA_EXT_SVNAPOT,
|
||||
RISCV_ISA_EXT_ZICBOP,
|
||||
RISCV_ISA_EXT_ZICBOZ,
|
||||
RISCV_ISA_EXT_SMAIA,
|
||||
RISCV_ISA_EXT_SSAIA,
|
||||
@@ -38,7 +37,6 @@ enum riscv_isa_ext_id {
|
||||
|
||||
// https://five-embeddev.com/riscv-isa-manual/latest/preface.html#preface
|
||||
// https://en.wikichip.org/wiki/risc-v/standard_extensions
|
||||
// (Zicbop) https://github.com/riscv/riscv-CMOs/blob/master/cmobase/Zicbop.adoc
|
||||
// Included all except for G
|
||||
static const struct extension extension_list[] = {
|
||||
{ 'i' - 'a', "(I) Integer Instruction Set" },
|
||||
@@ -66,7 +64,6 @@ static const struct extension extension_list[] = {
|
||||
{ RISCV_ISA_EXT_ZIHINTPAUSE, "(Zihintpause) Pause Hint" },
|
||||
{ RISCV_ISA_EXT_SVNAPOT, "(Svnapot) Naturally Aligned Power of Two Pages" },
|
||||
{ RISCV_ISA_EXT_ZICBOZ, "(Zicboz) Cache Block Zero Operations" },
|
||||
{ RISCV_ISA_EXT_ZICBOP, "(Zicbop) Cache Block Prefetch Operations" },
|
||||
{ RISCV_ISA_EXT_SMAIA, "(Smaia) Advanced Interrupt Architecture" },
|
||||
{ RISCV_ISA_EXT_SSAIA, "(Ssaia) Advanced Interrupt Architecture" },
|
||||
{ RISCV_ISA_EXT_ZBA, "(Zba) Address Generation" },
|
||||
|
||||
@@ -12,7 +12,7 @@ bool match_sifive(char* soc_name, struct system_on_chip* soc) {
|
||||
/*if((tmp = strstr(soc_name, "???")) == NULL)
|
||||
return false;*/
|
||||
|
||||
//soc->vendor = ???
|
||||
//soc->soc_vendor = ???
|
||||
|
||||
SOC_START
|
||||
SOC_EQ(tmp, "fu740", "Freedom U740", SOC_SIFIVE_U740, soc, 40)
|
||||
@@ -68,12 +68,12 @@ struct system_on_chip* guess_soc_from_devtree(struct system_on_chip* soc) {
|
||||
struct system_on_chip* get_soc(struct cpuInfo* cpu) {
|
||||
struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
|
||||
soc->raw_name = NULL;
|
||||
soc->vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->model = SOC_MODEL_UNKNOWN;
|
||||
soc->soc_vendor = SOC_VENDOR_UNKNOWN;
|
||||
soc->soc_model = SOC_MODEL_UNKNOWN;
|
||||
soc->process = UNKNOWN;
|
||||
|
||||
soc = guess_soc_from_devtree(soc);
|
||||
if(soc->vendor == SOC_VENDOR_UNKNOWN) {
|
||||
if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
|
||||
if(soc->raw_name != NULL) {
|
||||
printWarn("SoC detection failed using device tree: Found '%s' string", soc->raw_name);
|
||||
}
|
||||
@@ -82,7 +82,7 @@ struct system_on_chip* get_soc(struct cpuInfo* cpu) {
|
||||
}
|
||||
}
|
||||
|
||||
if(soc->model == SOC_MODEL_UNKNOWN) {
|
||||
if(soc->soc_model == SOC_MODEL_UNKNOWN) {
|
||||
// raw_name might not be NULL, but if we were unable to find
|
||||
// the exact SoC, just print "Unkwnown"
|
||||
soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
|
||||
|
||||
@@ -40,7 +40,8 @@ char* get_field_from_devtree(int DEVTREE_FIELD) {
|
||||
|
||||
tmp1++;
|
||||
int strlen = filelen-(tmp1-buf);
|
||||
char* hardware = ecalloc(strlen, sizeof(char));
|
||||
char* hardware = emalloc(sizeof(char) * strlen);
|
||||
memset(hardware, 0, sizeof(char) * strlen);
|
||||
strncpy(hardware, tmp1, strlen-1);
|
||||
|
||||
return hardware;
|
||||
@@ -69,8 +70,9 @@ char* parse_cpuinfo_field(char* field_str) {
|
||||
}
|
||||
|
||||
int ret_strlen = (end-tmp);
|
||||
char* ret = ecalloc(ret_strlen+1, sizeof(char));
|
||||
strncpy(ret, tmp, sizeof(char) * ret_strlen);
|
||||
char* ret = emalloc(sizeof(char) * (ret_strlen+1));
|
||||
memset(ret, 0, sizeof(char) * (ret_strlen+1));
|
||||
strncpy(ret, tmp, ret_strlen);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -72,6 +72,34 @@ uint32_t get_apic_id(bool x2apic_id) {
|
||||
}
|
||||
}
|
||||
|
||||
#ifndef __APPLE__
|
||||
bool bind_to_cpu(int cpu_id) {
|
||||
#ifdef _WIN32
|
||||
HANDLE process = GetCurrentProcess();
|
||||
DWORD_PTR processAffinityMask = 1 << cpu_id;
|
||||
return SetProcessAffinityMask(process, processAffinityMask);
|
||||
#elif defined __linux__
|
||||
cpu_set_t currentCPU;
|
||||
CPU_ZERO(¤tCPU);
|
||||
CPU_SET(cpu_id, ¤tCPU);
|
||||
if (sched_setaffinity (0, sizeof(currentCPU), ¤tCPU) == -1) {
|
||||
printWarn("sched_setaffinity: %s", strerror(errno));
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
#elif defined __FreeBSD__
|
||||
cpuset_t currentCPU;
|
||||
CPU_ZERO(¤tCPU);
|
||||
CPU_SET(cpu_id, ¤tCPU);
|
||||
if(cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset_t), ¤tCPU) == -1) {
|
||||
printWarn("cpuset_setaffinity: %s", strerror(errno));
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __linux__
|
||||
int get_total_cores_module(int total_cores, int module) {
|
||||
int total_modules = 2;
|
||||
@@ -234,11 +262,15 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
|
||||
|
||||
bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
|
||||
uint32_t size = max_apic_id_size(cache_id_apic, topo);
|
||||
uint32_t* sockets = ecalloc(size, sizeof(uint32_t));
|
||||
uint32_t* smt = ecalloc(size, sizeof(uint32_t));
|
||||
uint32_t* apic_id = ecalloc(size, sizeof(uint32_t));
|
||||
uint32_t* sockets = emalloc(sizeof(uint32_t) * size);
|
||||
uint32_t* smt = emalloc(sizeof(uint32_t) * size);
|
||||
uint32_t* apic_id = emalloc(sizeof(uint32_t) * size);
|
||||
uint32_t num_caches = 0;
|
||||
|
||||
memset(sockets, 0, sizeof(uint32_t) * size);
|
||||
memset(smt, 0, sizeof(uint32_t) * size);
|
||||
memset(apic_id, 0, sizeof(uint32_t) * size);
|
||||
|
||||
// System topology
|
||||
for(int i=0; i < topo->total_cores_module; i++) {
|
||||
sockets[apic_pkg[i]] = 1;
|
||||
@@ -365,11 +397,6 @@ bool fill_apic_ids(uint32_t* apic_ids, int first_core, int n, bool x2apic_id) {
|
||||
}
|
||||
|
||||
bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
|
||||
if (topo->cach == NULL) {
|
||||
printWarn("get_topology_from_apic: cach is NULL");
|
||||
return false;
|
||||
}
|
||||
|
||||
uint32_t apic_id;
|
||||
uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores_module);
|
||||
uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores_module);
|
||||
|
||||
@@ -17,6 +17,10 @@ struct apic {
|
||||
bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo);
|
||||
uint32_t is_smt_enabled_amd(struct topology* topo);
|
||||
|
||||
#ifndef __APPLE__
|
||||
bool bind_to_cpu(int cpu_id);
|
||||
#endif
|
||||
|
||||
#ifdef __linux__
|
||||
int get_total_cores_module(int total_cores, int module);
|
||||
#endif
|
||||
|
||||
162
src/x86/cpuid.c
162
src/x86/cpuid.c
@@ -5,13 +5,6 @@
|
||||
#include "../common/udev.h"
|
||||
#include <unistd.h>
|
||||
#endif
|
||||
#if defined (__FreeBSD__) || defined (__APPLE__)
|
||||
#include "../common/sysctl.h"
|
||||
#endif
|
||||
|
||||
#ifdef __linux__
|
||||
#include "../common/freq.h"
|
||||
#endif
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
@@ -29,7 +22,6 @@
|
||||
|
||||
#define CPU_VENDOR_INTEL_STRING "GenuineIntel"
|
||||
#define CPU_VENDOR_AMD_STRING "AuthenticAMD"
|
||||
#define CPU_VENDOR_HYGON_STRING "HygonGenuine"
|
||||
|
||||
static const char *hv_vendors_string[] = {
|
||||
[HV_VENDOR_KVM] = "KVMKVMKVM",
|
||||
@@ -91,7 +83,8 @@ char* get_str_cpu_name_internal(void) {
|
||||
uint32_t edx = 0;
|
||||
uint32_t c = 0;
|
||||
|
||||
char * name = ecalloc(CPU_NAME_MAX_LENGTH, sizeof(char));
|
||||
char * name = emalloc(sizeof(char) * CPU_NAME_MAX_LENGTH);
|
||||
memset(name, 0, CPU_NAME_MAX_LENGTH);
|
||||
|
||||
for(int i=0; i < 3; i++) {
|
||||
eax = 0x80000002 + i;
|
||||
@@ -210,18 +203,22 @@ int64_t get_peak_performance(struct cpuInfo* cpu, bool accurate_pp) {
|
||||
|
||||
for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
|
||||
struct topology* topo = ptr->topo;
|
||||
int64_t freq = get_freq(ptr->freq);
|
||||
int64_t max_freq = get_freq(ptr->freq);
|
||||
|
||||
int64_t freq;
|
||||
#ifdef __linux__
|
||||
if(accurate_pp)
|
||||
freq = get_freq_pp(ptr->freq);
|
||||
freq = measure_frequency(ptr);
|
||||
else
|
||||
freq = max_freq;
|
||||
#else
|
||||
// Silence compiler warning
|
||||
(void)(accurate_pp);
|
||||
freq = max_freq;
|
||||
#endif
|
||||
|
||||
//First, check we have consistent data
|
||||
if(freq == UNKNOWN_DATA || topo == NULL || topo->logical_cores == UNKNOWN_DATA) {
|
||||
if(freq == UNKNOWN_DATA || topo->logical_cores == UNKNOWN_DATA) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
@@ -276,7 +273,7 @@ struct hypervisor* get_hp_info(bool hv_present) {
|
||||
}
|
||||
else {
|
||||
char name[13];
|
||||
memset(name, 0, sizeof(char) * 13);
|
||||
memset(name, 0, 13);
|
||||
get_name_cpuid(name, ebx, ecx, edx);
|
||||
|
||||
bool found = false;
|
||||
@@ -446,23 +443,6 @@ int32_t get_core_type(void) {
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __linux__
|
||||
// Gets the max frequency for estimating the peak performance,
|
||||
// filling in the passed cpuInfo parameter with this information.
|
||||
void fill_frequency_info_pp(struct cpuInfo* cpu) {
|
||||
int32_t unused;
|
||||
int32_t *max_freq_pp_vec = malloc(sizeof(int32_t) * cpu->num_cpus);
|
||||
struct cpuInfo* ptr = cpu;
|
||||
|
||||
for (uint32_t i=0; i < cpu->num_cpus; i++) {
|
||||
set_cpu_module(i, cpu->num_cpus, &unused);
|
||||
|
||||
ptr->freq->max_pp = measure_frequency(ptr, max_freq_pp_vec);
|
||||
ptr = ptr->next_cpu;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
struct cpuInfo* get_cpu_info(void) {
|
||||
struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
|
||||
cpu->peak_performance = -1;
|
||||
@@ -471,7 +451,7 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
cpu->cach = NULL;
|
||||
cpu->feat = NULL;
|
||||
|
||||
cpu->num_cpus = 1;
|
||||
uint32_t modules = 1;
|
||||
uint32_t eax = 0;
|
||||
uint32_t ebx = 0;
|
||||
uint32_t ecx = 0;
|
||||
@@ -483,15 +463,13 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
|
||||
//Fill vendor
|
||||
char name[13];
|
||||
memset(name, 0, sizeof(char) * 13);
|
||||
memset(name,0,13);
|
||||
get_name_cpuid(name, ebx, edx, ecx);
|
||||
|
||||
if(strcmp(CPU_VENDOR_INTEL_STRING,name) == 0)
|
||||
cpu->cpu_vendor = CPU_VENDOR_INTEL;
|
||||
else if (strcmp(CPU_VENDOR_AMD_STRING,name) == 0)
|
||||
cpu->cpu_vendor = CPU_VENDOR_AMD;
|
||||
else if (strcmp(CPU_VENDOR_HYGON_STRING,name) == 0)
|
||||
cpu->cpu_vendor = CPU_VENDOR_HYGON;
|
||||
else {
|
||||
cpu->cpu_vendor = CPU_VENDOR_INVALID;
|
||||
printErr("Unknown CPU vendor: %s", name);
|
||||
@@ -529,12 +507,12 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
cpu->hybrid_flag = (edx >> 15) & 0x1;
|
||||
}
|
||||
|
||||
if(cpu->hybrid_flag) cpu->num_cpus = 2;
|
||||
if(cpu->hybrid_flag) modules = 2;
|
||||
|
||||
struct cpuInfo* ptr = cpu;
|
||||
for(uint32_t i=0; i < cpu->num_cpus; i++) {
|
||||
for(uint32_t i=0; i < modules; i++) {
|
||||
int32_t first_core;
|
||||
set_cpu_module(i, cpu->num_cpus, &first_core);
|
||||
set_cpu_module(i, modules, &first_core);
|
||||
|
||||
if(i > 0) {
|
||||
ptr->next_cpu = emalloc(sizeof(struct cpuInfo));
|
||||
@@ -559,7 +537,6 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
ptr->core_type = get_core_type();
|
||||
}
|
||||
ptr->first_core_id = first_core;
|
||||
ptr->module_id = i;
|
||||
ptr->feat = get_features_info(ptr);
|
||||
|
||||
ptr->arch = get_cpu_uarch(ptr);
|
||||
@@ -570,7 +547,11 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
cpu->cpu_name = infer_cpu_name_from_uarch(cpu->arch);
|
||||
}
|
||||
|
||||
// If any field of the struct is NULL,
|
||||
// return early, as next functions
|
||||
// require non NULL fields in cach and topo
|
||||
ptr->cach = get_cache_info(ptr);
|
||||
if(ptr->cach == NULL) return cpu;
|
||||
|
||||
if(cpu->hybrid_flag) {
|
||||
ptr->topo = get_topology_info(ptr, ptr->cach, i);
|
||||
@@ -578,30 +559,16 @@ struct cpuInfo* get_cpu_info(void) {
|
||||
else {
|
||||
ptr->topo = get_topology_info(ptr, ptr->cach, -1);
|
||||
}
|
||||
|
||||
// If topo is NULL, return early, as get_peak_performance
|
||||
// requries non-NULL topology.
|
||||
if(ptr->topo == NULL) return cpu;
|
||||
if(cpu->topo == NULL) return cpu;
|
||||
}
|
||||
|
||||
#ifdef __linux__
|
||||
// If accurate_pp is requested, we need to get the max frequency
|
||||
// after fetching the topology for all CPU modules, since the topology
|
||||
// is required by fill_frequency_info_pp
|
||||
if (accurate_pp()) fill_frequency_info_pp(cpu);
|
||||
#endif
|
||||
|
||||
cpu->num_cpus = modules;
|
||||
cpu->peak_performance = get_peak_performance(cpu, accurate_pp());
|
||||
|
||||
return cpu;
|
||||
}
|
||||
|
||||
bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
|
||||
if (topo->cach == NULL) {
|
||||
printWarn("get_cache_topology_amd: cach is NULL");
|
||||
return false;
|
||||
}
|
||||
|
||||
if(cpu->maxExtendedLevels >= 0x8000001D && cpu->topology_extensions) {
|
||||
uint32_t i, eax, ebx, ecx, edx, num_sharing_cache, cache_type, cache_level;
|
||||
|
||||
@@ -677,17 +644,10 @@ bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
|
||||
|
||||
#ifdef __linux__
|
||||
void get_topology_from_udev(struct topology* topo) {
|
||||
topo->total_cores = get_ncores_from_cpuinfo();
|
||||
// TODO: To be improved in the future
|
||||
if (topo->total_cores == 1) {
|
||||
// We can assume it's a single core CPU
|
||||
topo->total_cores = get_ncores_from_cpuinfo();
|
||||
topo->logical_cores = topo->total_cores;
|
||||
topo->physical_cores = topo->total_cores;
|
||||
}
|
||||
else {
|
||||
topo->logical_cores = UNKNOWN_DATA;
|
||||
topo->physical_cores = UNKNOWN_DATA;
|
||||
}
|
||||
topo->smt_available = 1;
|
||||
topo->smt_supported = 1;
|
||||
topo->sockets = 1;
|
||||
@@ -732,31 +692,32 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
|
||||
topo->total_cores_module = topo->total_cores;
|
||||
}
|
||||
|
||||
bool toporet = false;
|
||||
switch(cpu->cpu_vendor) {
|
||||
case CPU_VENDOR_INTEL:
|
||||
if (cpu->maxLevels >= 0x00000004) {
|
||||
toporet = get_topology_from_apic(cpu, topo);
|
||||
}
|
||||
else {
|
||||
printWarn("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000004, cpu->maxLevels);
|
||||
}
|
||||
bool toporet = get_topology_from_apic(cpu, topo);
|
||||
if(!toporet) {
|
||||
#ifdef __linux__
|
||||
printWarn("Failed to retrieve topology from APIC, using udev...");
|
||||
printWarn("Failed to retrieve topology from APIC, using udev...\n");
|
||||
get_topology_from_udev(topo);
|
||||
#else
|
||||
if (cpu->maxLevels >= 0x00000004)
|
||||
printErr("Failed to retrieve topology from APIC, assumming default values...");
|
||||
printErr("Failed to retrieve topology from APIC, assumming default values...\n");
|
||||
topo->logical_cores = UNKNOWN_DATA;
|
||||
topo->physical_cores = UNKNOWN_DATA;
|
||||
topo->smt_available = 1;
|
||||
topo->smt_supported = 1;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else {
|
||||
printWarn("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000001, cpu->maxLevels);
|
||||
topo->physical_cores = 1;
|
||||
topo->logical_cores = 1;
|
||||
topo->smt_available = 1;
|
||||
topo->smt_supported = 1;
|
||||
}
|
||||
break;
|
||||
case CPU_VENDOR_AMD:
|
||||
case CPU_VENDOR_HYGON:
|
||||
if (cpu->maxExtendedLevels >= 0x80000008) {
|
||||
eax = 0x80000008;
|
||||
cpuid(&eax, &ebx, &ecx, &edx);
|
||||
@@ -773,15 +734,10 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int
|
||||
}
|
||||
}
|
||||
else {
|
||||
#ifdef __linux__
|
||||
printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X), using udev...", 0x80000008, cpu->maxExtendedLevels);
|
||||
get_topology_from_udev(topo);
|
||||
#else
|
||||
printWarn("Can't read topology information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000008, cpu->maxExtendedLevels);
|
||||
topo->physical_cores = 1;
|
||||
topo->logical_cores = 1;
|
||||
topo->smt_supported = 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
if (cpu->maxLevels >= 0x00000001) {
|
||||
@@ -958,27 +914,16 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
|
||||
|
||||
struct frequency* get_frequency_info(struct cpuInfo* cpu) {
|
||||
struct frequency* freq = emalloc(sizeof(struct frequency));
|
||||
freq->measured = false;
|
||||
|
||||
if(cpu->maxLevels < 0x00000016) {
|
||||
#if defined (_WIN32)
|
||||
#if defined (_WIN32) || defined (__APPLE__)
|
||||
printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
|
||||
freq->base = UNKNOWN_DATA;
|
||||
freq->max = UNKNOWN_DATA;
|
||||
#elif defined (__FreeBSD__) || defined (__APPLE__)
|
||||
printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X). Using sysctl", 0x00000016, cpu->maxLevels);
|
||||
uint32_t freq_hz = get_sys_info_by_name(CPUFREQUENCY_SYSCTL);
|
||||
if (freq_hz == 0) {
|
||||
printWarn("Read max CPU frequency from sysctl and got 0 MHz");
|
||||
freq->max = UNKNOWN_DATA;
|
||||
}
|
||||
|
||||
freq->base = UNKNOWN_DATA;
|
||||
freq->max = freq_hz;
|
||||
#else
|
||||
printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X). Using udev", 0x00000016, cpu->maxLevels);
|
||||
freq->base = UNKNOWN_DATA;
|
||||
freq->max = get_max_freq_from_file(cpu->first_core_id);
|
||||
freq->max = get_max_freq_from_file(0);
|
||||
|
||||
if(freq->max == 0) {
|
||||
printWarn("Read max CPU frequency from udev and got 0 MHz");
|
||||
@@ -1005,7 +950,7 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
|
||||
printWarn("Read max CPU frequency from CPUID and got 0 MHz");
|
||||
#ifdef __linux__
|
||||
printWarn("Using udev to detect frequency");
|
||||
freq->max = get_max_freq_from_file(cpu->first_core_id);
|
||||
freq->max = get_max_freq_from_file(0);
|
||||
|
||||
if(freq->max == 0) {
|
||||
printWarn("Read max CPU frequency from udev and got 0 MHz");
|
||||
@@ -1017,16 +962,6 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __linux__
|
||||
if (freq->max == UNKNOWN_DATA || measure_max_frequency_flag()) {
|
||||
if (freq->max == UNKNOWN_DATA)
|
||||
printWarn("All previous methods failed, measuring CPU frequency");
|
||||
freq->max = measure_max_frequency(cpu->first_core_id);
|
||||
freq->measured = true;
|
||||
}
|
||||
#endif
|
||||
|
||||
freq->max_pp = UNKNOWN_DATA;
|
||||
return freq;
|
||||
}
|
||||
|
||||
@@ -1048,33 +983,24 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
|
||||
string = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN) + 1));
|
||||
strcpy(string, STRING_UNKNOWN);
|
||||
}
|
||||
else {
|
||||
char cores_str[6];
|
||||
memset(cores_str, 0, sizeof(char) * 6);
|
||||
if (topo->physical_cores * topo_sockets > 1)
|
||||
strcpy(cores_str, "cores");
|
||||
else
|
||||
strcpy(cores_str, "core");
|
||||
|
||||
if(topo->smt_supported > 1) {
|
||||
else if(topo->smt_supported > 1) {
|
||||
// 4 for digits, 21 for ' cores (SMT disabled)' which is the longest possible output
|
||||
uint32_t max_size = 4+21+1;
|
||||
string = emalloc(sizeof(char) * max_size);
|
||||
|
||||
if(topo->smt_available > 1)
|
||||
snprintf(string, max_size, "%d %s (%d threads)", topo->physical_cores * topo_sockets, cores_str, topo->logical_cores * topo_sockets);
|
||||
snprintf(string, max_size, "%d cores (%d threads)", topo->physical_cores * topo_sockets, topo->logical_cores * topo_sockets);
|
||||
else {
|
||||
if(cpu->cpu_vendor == CPU_VENDOR_AMD)
|
||||
snprintf(string, max_size, "%d %s (SMT disabled)", topo->physical_cores * topo_sockets, cores_str);
|
||||
snprintf(string, max_size, "%d cores (SMT disabled)", topo->physical_cores * topo_sockets);
|
||||
else
|
||||
snprintf(string, max_size, "%d %s (HT disabled)", topo->physical_cores * topo_sockets, cores_str);
|
||||
snprintf(string, max_size, "%d cores (HT disabled)", topo->physical_cores * topo_sockets);
|
||||
}
|
||||
}
|
||||
else {
|
||||
uint32_t max_size = 4+7+1;
|
||||
string = emalloc(sizeof(char) * max_size);
|
||||
snprintf(string, max_size, "%d %s",topo->physical_cores * topo_sockets, cores_str);
|
||||
}
|
||||
snprintf(string, max_size, "%d cores",topo->physical_cores * topo_sockets);
|
||||
}
|
||||
|
||||
return string;
|
||||
@@ -1135,14 +1061,8 @@ char* get_str_sse(struct cpuInfo* cpu) {
|
||||
last+=SSE4_2_sl;
|
||||
}
|
||||
|
||||
if (last == 0) {
|
||||
snprintf(string, 2+1, "No");
|
||||
}
|
||||
else {
|
||||
//Purge last comma
|
||||
string[last-1] = '\0';
|
||||
}
|
||||
|
||||
return string;
|
||||
}
|
||||
|
||||
|
||||
@@ -21,12 +21,9 @@
|
||||
#define FREQ_VECTOR_SIZE 1<<16
|
||||
|
||||
struct freq_thread {
|
||||
// Inputs
|
||||
struct cpuInfo* cpu;
|
||||
bool end;
|
||||
bool measure;
|
||||
// Output
|
||||
int32_t *max_pp;
|
||||
double freq;
|
||||
};
|
||||
|
||||
double vector_average_harmonic(double* v, int len) {
|
||||
@@ -51,7 +48,6 @@ void* measure_freq(void *freq_ptr) {
|
||||
char* line = NULL;
|
||||
size_t len = 0;
|
||||
ssize_t read;
|
||||
struct cpuInfo* cpu = freq->cpu;
|
||||
|
||||
int v = 0;
|
||||
double* freq_vector = malloc(sizeof(double) * FREQ_VECTOR_SIZE);
|
||||
@@ -80,43 +76,18 @@ void* measure_freq(void *freq_ptr) {
|
||||
sleep_ms(500);
|
||||
}
|
||||
|
||||
if (cpu->hybrid_flag) {
|
||||
// We have an heterogeneous architecture. After measuring the
|
||||
// frequency for all cores, we now need to compute the average
|
||||
// independently for each CPU module.
|
||||
struct cpuInfo* ptr = cpu;
|
||||
double* freq_vector_ptr = freq_vector;
|
||||
|
||||
for (int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
|
||||
freq->max_pp[i] = vector_average_harmonic(freq_vector_ptr, ptr->topo->total_cores_module);
|
||||
printWarn("AVX2 measured freq=%d (module %d)", freq->max_pp[i], i);
|
||||
|
||||
freq_vector_ptr = freq_vector_ptr + ptr->topo->total_cores_module;
|
||||
}
|
||||
}
|
||||
else {
|
||||
freq->max_pp[0] = vector_average_harmonic(freq_vector, v);
|
||||
printWarn("AVX2 measured freq=%d\n", freq->max_pp[0]);
|
||||
}
|
||||
freq->freq = vector_average_harmonic(freq_vector, v);
|
||||
printWarn("AVX2 measured freq=%f\n", freq->freq);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec) {
|
||||
if (cpu->hybrid_flag && cpu->module_id > 0) {
|
||||
// We have a hybrid architecture and we have already
|
||||
// measured the frequency for this module in a previous
|
||||
// call to this function, so now just return it.
|
||||
return max_freq_pp_vec[cpu->module_id];
|
||||
}
|
||||
|
||||
int64_t measure_frequency(struct cpuInfo* cpu) {
|
||||
int ret;
|
||||
int num_spaces;
|
||||
struct freq_thread* freq_struct = malloc(sizeof(struct freq_thread));
|
||||
freq_struct->end = false;
|
||||
freq_struct->measure = false;
|
||||
freq_struct->cpu = cpu;
|
||||
freq_struct->max_pp = max_freq_pp_vec;
|
||||
|
||||
void* (*compute_function)(void*);
|
||||
|
||||
@@ -145,25 +116,8 @@ int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec) {
|
||||
}
|
||||
|
||||
pthread_t* compute_th = malloc(sizeof(pthread_t) * cpu->topo->total_cores);
|
||||
cpu_set_t cpus;
|
||||
pthread_attr_t attr;
|
||||
if ((ret = pthread_attr_init(&attr)) != 0) {
|
||||
printErr("pthread_attr_init: %s", strerror(ret));
|
||||
return -1;
|
||||
}
|
||||
|
||||
for(int i=0; i < cpu->topo->total_cores; i++) {
|
||||
// We might have called bind_to_cpu previously, binding the threads
|
||||
// to a specific core, so now we must make sure we run the new thread
|
||||
// on the correct core.
|
||||
CPU_ZERO(&cpus);
|
||||
CPU_SET(i, &cpus);
|
||||
if ((ret = pthread_attr_setaffinity_np(&attr, sizeof(cpu_set_t), &cpus)) != 0) {
|
||||
printErr("pthread_attr_setaffinity_np: %s", strerror(ret));
|
||||
return -1;
|
||||
}
|
||||
|
||||
ret = pthread_create(&compute_th[i], &attr, compute_function, NULL);
|
||||
ret = pthread_create(&compute_th[i], NULL, compute_function, NULL);
|
||||
|
||||
if(ret != 0) {
|
||||
fprintf(stderr, "Error creating thread\n");
|
||||
@@ -188,5 +142,5 @@ int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec) {
|
||||
}
|
||||
|
||||
printf("\r%*c", num_spaces, ' ');
|
||||
return max_freq_pp_vec[0];
|
||||
return freq_struct->freq;
|
||||
}
|
||||
|
||||
@@ -8,6 +8,6 @@
|
||||
#define MEASURE_TIME_SECONDS 5
|
||||
#define LOOP_ITERS 100000000
|
||||
|
||||
int32_t measure_frequency(struct cpuInfo* cpu, int32_t *max_freq_pp_vec);
|
||||
int64_t measure_frequency(struct cpuInfo* cpu);
|
||||
|
||||
#endif
|
||||
|
||||
125
src/x86/uarch.c
125
src/x86/uarch.c
@@ -47,10 +47,8 @@ typedef uint32_t MICROARCH;
|
||||
enum {
|
||||
UARCH_UNKNOWN,
|
||||
// INTEL //
|
||||
UARCH_I486,
|
||||
UARCH_P5,
|
||||
UARCH_P5_MMX,
|
||||
UARCH_P6_PRO,
|
||||
UARCH_P6_PENTIUM_II,
|
||||
UARCH_P6_PENTIUM_III,
|
||||
UARCH_DOTHAN,
|
||||
@@ -93,15 +91,12 @@ enum {
|
||||
UARCH_CEDAR_MILL,
|
||||
UARCH_ITANIUM2,
|
||||
UARCH_ICE_LAKE,
|
||||
UARCH_SAPPHIRE_RAPIDS,
|
||||
UARCH_TIGER_LAKE,
|
||||
UARCH_ALDER_LAKE,
|
||||
UARCH_RAPTOR_LAKE,
|
||||
// AMD //
|
||||
UARCH_AM486,
|
||||
UARCH_AM5X86,
|
||||
UARCH_SSA5,
|
||||
UARCH_K5,
|
||||
UARCH_K6,
|
||||
UARCH_K7,
|
||||
UARCH_K8,
|
||||
@@ -120,9 +115,7 @@ enum {
|
||||
UARCH_ZEN3,
|
||||
UARCH_ZEN3_PLUS,
|
||||
UARCH_ZEN4,
|
||||
UARCH_ZEN4C,
|
||||
UARCH_ZEN5,
|
||||
UARCH_ZEN5C,
|
||||
UARCH_ZEN4C
|
||||
};
|
||||
|
||||
struct uarch {
|
||||
@@ -156,30 +149,16 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
|
||||
// ------------------------------------------------------------------------------- //
|
||||
// EF F EM M S //
|
||||
UARCH_START
|
||||
CHECK_UARCH(arch, 0, 4, 0, 0, NA, "i80486DX", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 1, NA, "i80486DX-50", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 2, NA, "i80486SX", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 3, NA, "i80486DX2", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 4, NA, "i80486SL", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 5, NA, "i80486SX2", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 7, NA, "i80486DX2WB", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 8, NA, "i80486DX4", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 9, NA, "i80486DX4WB", UARCH_I486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 0, NA, "P5", UARCH_P5, 800)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 1, NA, "P5", UARCH_P5, 800)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 2, NA, "P54C", UARCH_P5, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 3, NA, "P24T (Overdrive)", UARCH_P5, 600) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 4, NA, "P55C (MMX)", UARCH_P5_MMX, 350) // https://www.cpu-world.com/CPUs/Pentium/TYPE-Pentium%20MMX.html
|
||||
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "P54C", UARCH_P5, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 8, NA, "Tillamook", UARCH_P5_MMX, 250) // http://instlatx64.atw.hu./
|
||||
CHECK_UARCH(arch, 0, 5, 0, 2, NA, "P5", UARCH_P5, UNK)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 3, NA, "P5", UARCH_P5, 600)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 4, NA, "P5 (MMX)", UARCH_P5_MMX, UNK)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "P5 (MMX)", UARCH_P5_MMX, UNK)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 8, NA, "P5 (MMX)", UARCH_P5_MMX, 250)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 9, 0, "Lakemont", UARCH_LAKEMONT, 32)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 9, NA, "P5 (MMX)", UARCH_P5_MMX, UNK)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 10, 0, "Lakemont", UARCH_LAKEMONT, 32)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 1, 1, "P6", UARCH_P6_PRO, UNK)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 1, 2, "P6", UARCH_P6_PRO, UNK)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 1, 6, "P6", UARCH_P6_PRO, 350)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 1, 7, "P6", UARCH_P6_PRO, 350)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 1, 9, "P6", UARCH_P6_PRO, 350)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 0, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK)
|
||||
CHECK_UARCH(arch, 0, 6, 0, 1, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK) // process depends on core
|
||||
CHECK_UARCH(arch, 0, 6, 0, 2, NA, "P6 (Pentium II)", UARCH_P6_PENTIUM_II, UNK)
|
||||
@@ -256,7 +235,6 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
|
||||
// CHECK_UARCH(arch, 0, 6, 8, 14, 10, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake R or Coffee Lake U)
|
||||
CHECK_UARCH(arch, 0, 6, 8, 14, 11, "Whiskey Lake", UARCH_WHISKEY_LAKE, 14) // wikichip
|
||||
CHECK_UARCH(arch, 0, 6, 8, 14, 12, "Comet Lake", UARCH_COMET_LAKE, 14) // wikichip
|
||||
CHECK_UARCH(arch, 0, 6, 8, 15, 8, "Sapphire Rapids", UARCH_SAPPHIRE_RAPIDS, 7) // wikichip
|
||||
CHECK_UARCH(arch, 0, 6, 9, 6, NA, "Tremont", UARCH_TREMONT, 10) // LX*
|
||||
CHECK_UARCH(arch, 0, 6, 9, 7, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-S)
|
||||
CHECK_UARCH(arch, 0, 6, 9, 10, NA, "Alder Lake", UARCH_ALDER_LAKE, 10) // instlatx64 (Alder Lake-P)
|
||||
@@ -301,16 +279,11 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
|
||||
// ----------------------------------------------------------------------------- //
|
||||
// EF F EM M S //
|
||||
UARCH_START
|
||||
CHECK_UARCH(arch, 0, 4, 0, 3, NA, "Am486DX2", UARCH_AM486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 7, NA, "Am486DX2WB", UARCH_AM486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 8, NA, "Am486DX4", UARCH_AM486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 9, NA, "Am486DX4WB", UARCH_AM486, UNK) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 14, NA, "Am5x86", UARCH_AM5X86, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 15, NA, "Am5x86WB", UARCH_AM5X86, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 0, NA, "SSA5 (K5)", UARCH_SSA5, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 1, NA, "K5", UARCH_K5, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 2, NA, "K5", UARCH_K5, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 5, 0, 3, NA, "K5", UARCH_K5, 350) // https://sandpile.org/x86/cpuid.htm#level_0000_0001h
|
||||
CHECK_UARCH(arch, 0, 4, 0, 3, NA, "Am486", UARCH_AM486, UNK)
|
||||
CHECK_UARCH(arch, 0, 4, 0, 7, NA, "Am486", UARCH_AM486, UNK)
|
||||
CHECK_UARCH(arch, 0, 4, 0, 8, NA, "Am486", UARCH_AM486, UNK)
|
||||
CHECK_UARCH(arch, 0, 4, 0, 9, NA, "Am486", UARCH_AM486, UNK)
|
||||
CHECK_UARCH(arch, 0, 4, NA, NA, NA, "Am5x86", UARCH_AM5X86, UNK)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 6, NA, "K6", UARCH_K6, 300)
|
||||
CHECK_UARCH(arch, 0, 5, 0, 7, NA, "K6", UARCH_K6, 250) // *p from sandpile.org
|
||||
CHECK_UARCH(arch, 0, 5, 0, 10, NA, "K7", UARCH_K7, 130) // Geode NX
|
||||
@@ -414,31 +387,6 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
|
||||
CHECK_UARCH(arch, 10, 15, 8, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300C)
|
||||
CHECK_UARCH(arch, 10, 15, 9, NA, NA, "Zen 4", UARCH_ZEN4, 5) // instlatx64 (AMD MI300A)
|
||||
CHECK_UARCH(arch, 10, 15, 10, NA, NA, "Zen 4c", UARCH_ZEN4C, 5) // instlatx64
|
||||
CHECK_UARCH(arch, 11, 15, 0, NA, NA, "Zen 5", UARCH_ZEN5, 4) // Turin/EPYC (instlatx64)
|
||||
CHECK_UARCH(arch, 11, 15, 1, NA, NA, "Zen 5c", UARCH_ZEN5C, 3) // Zen5c EPYC (instlatx64, https://en.wikipedia.org/wiki/Zen_5#cite_note-10)
|
||||
CHECK_UARCH(arch, 11, 15, 2, NA, NA, "Zen 5", UARCH_ZEN5, 4) // Strix Point (instlatx64)
|
||||
CHECK_UARCH(arch, 11, 15, 4, NA, NA, "Zen 5", UARCH_ZEN5, 4) // Granite Ridge (instlatx64)
|
||||
CHECK_UARCH(arch, 11, 15, 6, NA, NA, "Zen 5", UARCH_ZEN5, 4) // Krackan Point (instlatx64)
|
||||
CHECK_UARCH(arch, 11, 15, 7, NA, NA, "Zen 5", UARCH_ZEN5, 4) // Strix Halo (instlatx64)
|
||||
UARCH_END
|
||||
|
||||
return arch;
|
||||
}
|
||||
|
||||
struct uarch* get_uarch_from_cpuid_hygon(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
|
||||
struct uarch* arch = emalloc(sizeof(struct uarch));
|
||||
|
||||
// EF: Extended Family //
|
||||
// F: Family //
|
||||
// EM: Extended Model //
|
||||
// M: Model //
|
||||
// S: Stepping //
|
||||
// ----------------------------------------------------------------------------- //
|
||||
// EF F EM M S //
|
||||
UARCH_START
|
||||
// https://www.phoronix.com/news/Hygon-Dhyana-AMD-China-CPUs
|
||||
CHECK_UARCH(arch, 9, 15, 0, 1, NA, "Zen", UARCH_ZEN, UNK) // https://github.com/Dr-Noob/cpufetch/issues/244
|
||||
// CHECK_UARCH(arch, 9, 15, 0, 2, NA, "???", ?????????, UNK) // http://instlatx64.atw.hu/
|
||||
UARCH_END
|
||||
|
||||
return arch;
|
||||
@@ -488,16 +436,8 @@ struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t
|
||||
}
|
||||
return get_uarch_from_cpuid_intel(ef, f, em, m, s);
|
||||
}
|
||||
else if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
|
||||
else
|
||||
return get_uarch_from_cpuid_amd(ef, f, em, m, s);
|
||||
}
|
||||
else if(cpu->cpu_vendor == CPU_VENDOR_HYGON) {
|
||||
return get_uarch_from_cpuid_hygon(ef, f, em, m, s);
|
||||
}
|
||||
else {
|
||||
printBug("Invalid CPU vendor: %d", cpu->cpu_vendor);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
// If we cannot get the CPU name from CPUID, try to infer it from uarch
|
||||
@@ -512,42 +452,16 @@ char* infer_cpu_name_from_uarch(struct uarch* arch) {
|
||||
|
||||
char *str = NULL;
|
||||
|
||||
switch (arch->uarch) {
|
||||
// Intel
|
||||
case UARCH_I486:
|
||||
str = "Intel 486";
|
||||
break;
|
||||
case UARCH_P5:
|
||||
if (arch->uarch == UARCH_P5)
|
||||
str = "Intel Pentium";
|
||||
break;
|
||||
case UARCH_P5_MMX:
|
||||
else if (arch->uarch == UARCH_P5_MMX)
|
||||
str = "Intel Pentium MMX";
|
||||
break;
|
||||
case UARCH_P6_PRO:
|
||||
str = "Intel Pentium Pro";
|
||||
break;
|
||||
case UARCH_P6_PENTIUM_II:
|
||||
else if (arch->uarch == UARCH_P6_PENTIUM_II)
|
||||
str = "Intel Pentium II";
|
||||
break;
|
||||
case UARCH_P6_PENTIUM_III:
|
||||
else if (arch->uarch == UARCH_P6_PENTIUM_III)
|
||||
str = "Intel Pentium III";
|
||||
break;
|
||||
|
||||
// AMD
|
||||
case UARCH_AM486:
|
||||
str = "AMD 486";
|
||||
break;
|
||||
case UARCH_AM5X86:
|
||||
str = "AMD 5x86";
|
||||
break;
|
||||
case UARCH_SSA5:
|
||||
str = "AMD 5k86";
|
||||
break;
|
||||
|
||||
default:
|
||||
else
|
||||
printErr("Unable to find name from uarch: %d", arch->uarch);
|
||||
break;
|
||||
}
|
||||
|
||||
if (str == NULL) {
|
||||
cpu_name = ecalloc(strlen(STRING_UNKNOWN) + 1, sizeof(char));
|
||||
@@ -562,8 +476,6 @@ char* infer_cpu_name_from_uarch(struct uarch* arch) {
|
||||
}
|
||||
|
||||
bool vpus_are_AVX512(struct cpuInfo* cpu) {
|
||||
// Zen5 actually has 2 x AVX512 units
|
||||
// https://www.anandtech.com/show/21469/amd-details-ryzen-ai-300-series-for-mobile-strix-point-with-rdna-35-igpu-xdna-2-npu
|
||||
return cpu->arch->uarch != UARCH_ICE_LAKE &&
|
||||
cpu->arch->uarch != UARCH_TIGER_LAKE &&
|
||||
cpu->arch->uarch != UARCH_ZEN4 &&
|
||||
@@ -593,7 +505,6 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
|
||||
case UARCH_KNIGHTS_LANDING:
|
||||
case UARCH_KNIGHTS_MILL:
|
||||
|
||||
case UARCH_SAPPHIRE_RAPIDS:
|
||||
case UARCH_ICE_LAKE:
|
||||
case UARCH_TIGER_LAKE:
|
||||
case UARCH_ALDER_LAKE:
|
||||
@@ -605,8 +516,6 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
|
||||
case UARCH_ZEN3_PLUS:
|
||||
case UARCH_ZEN4:
|
||||
case UARCH_ZEN4C:
|
||||
case UARCH_ZEN5:
|
||||
case UARCH_ZEN5C:
|
||||
return 2;
|
||||
default:
|
||||
return 1;
|
||||
|
||||
Reference in New Issue
Block a user