[v1.03] Experimental fix to distinguish between Gen8/Gen8+ Snapdragon SoCs

.github/workflows/lockdown.yml

@@ -3,7 +3,7 @@ name: 'Disable PR in cpufetch'
 on:
   issues:
     types: opened
-  pull_request:
+  pull_request_target:
     types: opened
 
 permissions:

.gitignore

@@ -1 +1,2 @@
 cpufetch
+*.o

LICENSE

@@ -1,21 +1,339 @@
-MIT License
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 2, June 1991
 
-Copyright (c) 2018 Dr-Noob
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
 
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Makefile

@@ -1,6 +1,6 @@
 CC ?= gcc
 
-CFLAGS+=-Wall -Wextra -pedantic -fstack-protector-all -pedantic
+CFLAGS+=-Wall -Wextra -pedantic
 SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith
 
 PREFIX ?= /usr
@@ -12,22 +12,39 @@ COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_C
 
 ifneq ($(OS),Windows_NT)
 	arch := $(shell uname -m)
-	ifeq ($(arch), $(filter $(arch), x86_64 amd64 i686))
+	ifeq ($(arch), $(filter $(arch), x86_64 amd64 i386 i486 i586 i686))
 		SRC_DIR=src/x86/
 		SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
-		HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
-		CFLAGS += -DARCH_X86 -std=c99
+		HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h $(SRC_DIR)freq/freq.h
+
+                os := $(shell uname -s)
+                ifeq ($(os), Linux)
+			SOURCE += $(SRC_DIR)freq/freq.c freq_nov.o freq_avx.o freq_avx512.o
+			HEADERS += $(SRC_DIR)freq/freq.h
+			CFLAGS += -pthread
+                endif
+		CFLAGS += -DARCH_X86 -std=c99 -fstack-protector-all
 	else ifeq ($(arch), $(filter $(arch), ppc64le ppc64 ppcle ppc))
 		SRC_DIR=src/ppc/
 		SOURCE += $(COMMON_SRC) $(SRC_DIR)ppc.c $(SRC_DIR)uarch.c $(SRC_DIR)udev.c
 		HEADERS += $(COMMON_HDR) $(SRC_DIR)ppc.h $(SRC_DIR)uarch.h  $(SRC_DIR)udev.c
-		CFLAGS += -DARCH_PPC -std=gnu99
-	else
-		# Assume ARM
+		CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all -Wno-language-extension-token
+	else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
 		SRC_DIR=src/arm/
 		SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
 		HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h  $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
-		CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99
+		CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99 -fstack-protector-all
+
+		os := $(shell uname -s)
+		ifeq ($(os), Darwin)
+			SOURCE += $(SRC_DIR)sysctl.c
+			HEADERS += $(SRC_DIR)sysctl.h
+		endif
+	else
+		# Error lines should not be tabulated because Makefile complains about it
+$(warning Unsupported arch detected: $(arch). See https://github.com/Dr-Noob/cpufetch#1-support)
+$(warning If your architecture is supported but the compilation fails, please open an issue in https://github.com/Dr-Noob/cpufetch/issues)
+$(error Aborting compilation)
 	endif
 
 	OUTPUT=cpufetch
@@ -36,23 +53,32 @@ else
 	SRC_DIR=src/x86/
 	SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
 	HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
-	CFLAGS += -DARCH_X86
-	SANITY_FLAGS += -Wno-pedantic-ms-format -std=c99
+	CFLAGS += -DARCH_X86 -std=c99
+	SANITY_FLAGS += -Wno-pedantic-ms-format
 	OUTPUT=cpufetch.exe
 endif
 
-all: CFLAGS += -O3
+all: CFLAGS += -O2
 all: $(OUTPUT)
 
 debug: CFLAGS += -g -O0
 debug: $(OUTPUT)
 
-static: CFLAGS += -static -O3
+static: CFLAGS += -static -O2
 static: $(OUTPUT)
 
-strict: CFLAGS += -O3 -Werror -fsanitize=undefined -D_FORTIFY_SOURCE=2
+strict: CFLAGS += -O2 -Werror -fsanitize=undefined -D_FORTIFY_SOURCE=2
 strict: $(OUTPUT)
 
+freq_nov.o: Makefile $(SRC_DIR)freq/freq_nov.c $(SRC_DIR)freq/freq_nov.h $(SRC_DIR)freq/freq.h
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -pthread $(SRC_DIR)freq/freq_nov.c -o $@
+
+freq_avx.o: Makefile $(SRC_DIR)freq/freq_avx.c $(SRC_DIR)freq/freq_avx.h $(SRC_DIR)freq/freq.h
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx -pthread $(SRC_DIR)freq/freq_avx.c -o $@
+
+freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.h $(SRC_DIR)freq/freq.h
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -pthread $(SRC_DIR)freq/freq_avx512.c -o $@
+
 $(OUTPUT): Makefile $(SOURCE) $(HEADERS)
 	$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
 
@@ -60,7 +86,7 @@ run: $(OUTPUT)
 	./$(OUTPUT)
 
 clean:
-	@rm -f $(OUTPUT)
+	@rm -f $(OUTPUT) *.o
 
 install: $(OUTPUT)
 	install -Dm755 "cpufetch"   "$(DESTDIR)$(PREFIX)/bin/cpufetch"

README.md

@@ -1,20 +1,35 @@
 <p align="center"><img width=50% src="./pictures/cpufetch.png"></p>
 
-<div align="center">
-
-![GitHub tag (latest by date)](https://img.shields.io/github/v/tag/Dr-Noob/cpufetch?label=cpufetch)
-[![GitHub Repo stars](https://img.shields.io/github/stars/Dr-Noob/cpufetch?color=4CC61F)](https://github.com/Dr-Noob/cpufetch/stargazers)
-[![GitHub issues](https://img.shields.io/github/issues/Dr-Noob/cpufetch)](https://github.com/Dr-Noob/cpufetch/issues)
-[![Packaging status](https://repology.org/badge/tiny-repos/cpufetch.svg)](https://repology.org/project/cpufetch/versions)
-[![License](https://img.shields.io/github/license/Dr-Noob/cpufetch?color=orange)](https://github.com/Dr-Noob/cpufetch/blob/master/LICENSE)
-
 <h4 align="center">Simple yet fancy CPU architecture fetching tool</h4>
-&nbsp;
 
-![cpu1](pictures/i9.png)
+<p align="center"> </p>
 
+<div align="center">
+  <img height="22px" src="https://img.shields.io/github/v/tag/Dr-Noob/cpufetch?label=cpufetch&style=flat-square">
+  <a href="https://github.com/Dr-Noob/cpufetch/stargazers">
+    <img height="22px" src="https://img.shields.io/github/stars/Dr-Noob/cpufetch?color=4CC61F&style=flat-square">
+  </a>
+  <a href="https://github.com/Dr-Noob/cpufetch/issues">
+    <img height="22px" src="https://img.shields.io/github/issues/Dr-Noob/cpufetch?style=flat-square">
+  </a>
+  <a href="https://github.com/Dr-Noob/cpufetch/blob/master/README.md#1-support">
+    <img height="22px" src="pictures/os-shield.jpg">
+  </a>
+  <a href="https://github.com/Dr-Noob/cpufetch/blob/master/LICENSE">
+    <img height="22px" src="https://img.shields.io/github/license/Dr-Noob/cpufetch?color=orange&style=flat-square">
+  </a>
 </div>
 
+<p align="center"> </p>
+
+<p align="center">
+cpufetch is a command-line tool written in C that displays the CPU information in a clean and beautiful way
+</p>
+
+<p align="center">
+<img width=80% src="./pictures/examples.gif">
+</p>
+
 # Table of contents
 <!-- UPDATE with: doctoc --notitle README.md -->
 <!-- START doctoc generated TOC please keep comment here to allow auto update -->
@@ -24,43 +39,46 @@
 - [1. Support](#1-support)
 - [2. Installation](#2-installation)
   - [2.1 Installing from a package](#21-installing-from-a-package)
-  - [2.2 Building from source (Linux/Windows/macOS)](#22-building-from-source-linuxwindowsmacos)
+  - [2.2 Building from source](#22-building-from-source)
   - [2.3 Android](#23-android)
 - [3. Examples](#3-examples)
-  - [3.1 x86_64 CPUs](#31-x86_64-cpus)
-  - [3.2 ARM CPUs](#32-arm-cpus)
-- [4. Colors and style](#4-colors-and-style)
+  - [3.1 x86_64](#31-x86_64)
+  - [3.2 ARM](#32-arm)
+  - [3.3 PowerPC](#33-powerpc)
+- [4. Colors](#4-colors)
+  - [4.1 Specifying a name](#41-specifying-a-name)
+  - [4.2 Specifying the colors in RGB format](#42-specifying-the-colors-in-rgb-format)
 - [5. Implementation](#5-implementation)
 - [6. Bugs or improvements](#6-bugs-or-improvements)
 - [7. Acknowledgements](#7-acknowledgements)
+- [8. cpufetch for GPUs (gpufetch)](#8-cpufetch-for-gpus-gpufetch)
 
 <!-- END doctoc generated TOC please keep comment here to allow auto update -->
 
-# 1. Support
+## 1. Support
 
-cpufetch supports the following architectures:
-- x86 / x86_64
-- ARM
-- PowerPC
+| OS          | x86_64 / x86       | ARM                | PowerPC            |
+|:-----------:|:------------------:|:------------------:|:------------------:|
+| GNU / Linux | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
+| Windows     | :heavy_check_mark: | :x:                | :x:                |
+| Android     | :heavy_check_mark: | :heavy_check_mark: | :x:                |
+| macOS       | :heavy_check_mark: | :heavy_check_mark: | :x:                |
+| FreeBSD     | :heavy_check_mark: | :x:                | :x:                |
 
-| OS        | x86_64 / x86              | ARM                | PowerPC            | Notes             |
-|:---------:|:------------------------:|:-------------------:|:------------------:|:----------:|
-| GNU/Linux | :heavy_check_mark:        | :heavy_check_mark: | :heavy_check_mark: | Best support      |
-| Windows   | :heavy_check_mark:        | :x:                | :x:                | Some information may be missing. <br> Colors will be used if supported |
-| Android   | :heavy_exclamation_mark:  | :heavy_check_mark: | :x:                | Some information may be missing. <br> Not tested under x86_64 |
-| macOS     | :heavy_check_mark:        | :x:                | :x:                | Some information may be missing. <br> Apple M1 support may be added <br> in the future (see [#47](https://github.com/Dr-Noob/cpufetch/issues/47))|
-| FreeBSD   | :heavy_check_mark:        | :x:                | :x:                | Some information may be missing.  |
+**NOTES:**
+- Colors will be used in Windows only if the terminal supports it.
+- Support in macOS ARM is limited to Apple M1 only
 
-# 2. Installation
-## 2.1 Installing from a package
+## 2. Installation
+### 2.1 Installing from a package
 Choose the right package for your operating system:
 
 [![Packaging status](https://repology.org/badge/vertical-allrepos/cpufetch.svg)](https://repology.org/project/cpufetch/versions)
 
 If there is no available package for your OS, you can download the cpufetch binary from [the releases page](https://github.com/Dr-Noob/cpufetch/releases), or [build cpufetch from source](#22-building-from-source-linuxwindowsmacos) (see below).
 
-## 2.2 Building from source (Linux/Windows/macOS)
-Just clone the repo and use `make` to compile it
+### 2.2 Building from source
+You will need a C compiler (e.g, `gcc`) and `make` to compile `cpufetch`. Just clone the repo and run `make`:
 
 ```
 git clone https://github.com/Dr-Noob/cpufetch
@@ -69,9 +87,7 @@ make
 ./cpufetch
 ```
 
-The Makefile is designed to work on Linux, Windows and macOS.
-
-## 2.3 Android
+### 2.3 Android
 1. Install `termux` app (terminal emulator)
 2. Run `pkg install -y git make clang` inside termux.
 3. Build from source normally:
@@ -80,40 +96,65 @@ The Makefile is designed to work on Linux, Windows and macOS.
   - make
   - ./cpufetch
 
-# 3. Examples
-Here are more examples of how `cpufetch` looks on different CPUs.
+## 3. Examples
+### 3.1 x86_64
 
-## 3.1 x86_64 CPUs
+<p align="center"><img width=90% src="pictures/epyc.png"></p>
+<p align="center">AMD EPYC HPC server</p>
+<p align="center"><img width=90% src="pictures/cascade_lake.jpg"></p>
+<p align="center">Intel Xeon HPC server</p>
 
-![cpu2](pictures/epyc.png)
+### 3.2 ARM
 
-![cpu3](pictures/cascade_lake.png)
+<p align="center">
+<img width=45% src="pictures/exynos.jpg">
+&nbsp;
+<img width=45% src="pictures/snapd.png">
+</p>
+<p align="center">Samsung Galaxy S8 (left) Xiaomi Redmi Note 7 (right)</p>
 
-## 3.2 ARM CPUs
+### 3.3 PowerPC
 
-![cpu4](pictures/exynos.png)
+<p align="center"><img width=90% src="pictures/ibm.png"></p>
+<p align="center">Talos II</p>
 
-![cpu5](pictures/snapdragon.png)
+## 4. Colors
+By default, `cpufetch` will print the CPU logo with the system colorscheme. However, you can set a custom color scheme in two different ways:
 
-# 4. Colors and style
-By default, `cpufetch` will print the CPU art with the system colorscheme. However, you can always set a custom color scheme, either
-specifying Intel or AMD, or specifying the colors in RGB format:
+### 4.1 Specifying a name
+
+ By specifying a name, cpufetch will use the specific colors of each manufacture. Valid values are:
+
+- intel
+- intel-new
+- amd
+- ibm
+- arm
 
 ```
 ./cpufetch --color intel (default color for Intel)
-./cpufetch --color amd (default color for AMD)
-./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200 (example)
 ```
 
-In the case of setting the colors using RGB, 4 colors must be given in with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to CPU art color (2 colors) and for the text colors (following 2). Thus, you can customize all the colors.
+### 4.2 Specifying the colors in RGB format
 
-# 5. Implementation
-See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/doc/README.md).
+5 colors must be given in RGB with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to the CPU logo color (first 3 colors) and for the text colors (following 2).
 
-# 6. Bugs or improvements
-See [cpufetch contributing guidelines](https://github.com/Dr-Noob/cpufetch/CONTRIBUTING.md)
+```
+./cpufetch --color 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200
+```
 
-# 7. Acknowledgements
-Special thanks to [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI). They tested `cpufetch` in its beginnings in many different CPUs they have access to, which made it easier to debug and check the correctness of `cpufetch`.
+## 5. Implementation
+See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/tree/master/doc).
 
-Special thanks too to the fellow contributors and interested people in the project!
+## 6. Bugs or improvements
+See [cpufetch contributing guidelines](https://github.com/Dr-Noob/cpufetch/blob/master/CONTRIBUTING.md).
+
+## 7. Acknowledgements
+Thanks to the fellow contributors and interested people in the project. Special thanks to:
+- [Gonzalocl](https://github.com/Gonzalocl), [OdnetninI](https://github.com/OdnetninI): Tested cpufetch in the earlier versions of the project in many different CPUs.
+- [Kyngo](https://github.com/Kyngo): Tested cpufetch in the Apple M1 CPU.
+- [avollmerhaus](https://github.com/avollmerhaus): Gave me ssh acess to a PowerPC machine, allowing me to develop the PowerPC port.
+- [bbonev](https://github.com/bbonev), [stephan-cr](https://github.com/stephan-cr): Reviewed the source code.
+
+## 8. cpufetch for GPUs (gpufetch)
+See [gpufetch](https://github.com/Dr-Noob/gpufetch) project!

cpufetch.1

@@ -1,35 +1,51 @@
-.\" DO NOT MODIFY THIS FILE!  It was generated by help2man 1.48.2.
-.TH CPUFETCH "1" "June 2021" "cpufetch v0.97 (x86_64 build)" "User Commands"
+.\" DO NOT MODIFY THIS FILE!  It was generated by help2man 1.48.3. It was also manually adapted to look correctly
+.\" help2man -N -n "Simple yet fancy CPU architecture fetching tool" ./cpufetch > cpufetch.1
+.TH CPUFETCH "1" "September 2021" "cpufetch v1.00 (Linux x86_64 build)" "User Commands"
 .SH NAME
 cpufetch \- Simple yet fancy CPU architecture fetching tool
 .SH SYNOPSIS
 .B cpufetch
 [\fI\,OPTION\/\fR]...
 .SH DESCRIPTION
-Print detailed information about the CPU architecture. cpufetch displays information like the number of cores, microarchitecture, frequency, cache and peak performance. The program supports x86, x86_64 and ARM architectures and runs on GNU/Linux, Windows, Android and macOS (see https://github.com/Dr-Noob/cpufetch#1-support for more information)
+cpufetch is a command-line tool written in C that displays the CPU information in a clean and beautiful way
 .SH OPTIONS
 .TP
 \fB\-c\fR, \fB\-\-color\fR
 Set the color scheme (by default, cpufetch uses the system color scheme)
 .TP
 \fB\-s\fR, \fB\-\-style\fR
-Set the style of CPU art
+Set the style of CPU logo
 .TP
 \fB\-d\fR, \fB\-\-debug\fR
-Prints CPU model and cpuid levels (debug purposes)
+Print CPU model and cpuid levels (debug purposes)
+.TP
+\fB\-\-logo\-short\fR
+Show the short version of the logo
+.TP
+\fB\-\-logo\-long\fR
+Show the long version of the logo
 .TP
 \fB\-v\fR, \fB\-\-verbose\fR
-Prints extra information (if available) about how cpufetch tried fetching information
+Print extra information (if available) about how cpufetch tried fetching information
+.TP
+\fB\-\-logo\-intel\-old\fR
+Show the old Intel logo
+.TP
+\fB\-\-logo\-intel\-new\fR
+Show the new Intel logo
+.TP
+\fB\-F\fR, \fB\-\-full\-cpu\-name\fR
+Show the full CPU name (do not abbreviate it)
 .TP
 \fB\-r\fR, \fB\-\-raw\fR
-Prints raw cpuid data
+Print raw cpuid data (debug purposes)
 .TP
 \fB\-h\fR, \fB\-\-help\fR
-Prints this help and exit
+Print this help and exit
 .TP
 \fB\-V\fR, \fB\-\-version\fR
-Prints cpufetch version and exit
-.SH "COLORS:"
+Print cpufetch version and exit
+.SH COLORS
 .TP
 * "intel":
 Use Intel default color scheme
@@ -37,16 +53,15 @@ Use Intel default color scheme
 * "amd":
 Use AMD default color scheme
 .TP
-* "ibm":
+* "ibm",
 Use IBM default color scheme
 .TP
 * "arm":
 Use ARM default color scheme
 .TP
 * custom:
-If color argument do not match "intel", "amd" or "arm", a custom scheme can be specified.
-4 colors must be given in RGB with the format: R,G,B:R,G,B:...The first 2 colors are the CPU art color and the next 2 colors are the text colors
-.SH "STYLES:"
+If the argument of \fB\-\-color\fR does not match any of the previous strings, a custom scheme can be specified. 5 colors must be given in RGB with the format: R,G,B:R,G,B:...The first 3 colors are the CPU art color and the next 2 colors are the text colors
+.SH STYLES
 .TP
 * "fancy":
 Default style
@@ -56,18 +71,21 @@ Old cpufetch style
 .TP
 * "legacy":
 Fallback style for terminals that do not support colors
-.SH "EXAMPLES:"
+.SH LOGOS
+.TP
+cpufetch will try to adapt the logo size and the text to the terminal width. When the output (logo and text) is wider than the terminal width, cpufetch will print a smaller version of the logo (if it exists). This behavior can be overridden by \fB\-\-logo\-short\fR  and \fB\-\-logo\-long\fR, which always sets the logo size as specified by the user, even if it is too big. After the logo selection (either automatically or set by the user), cpufetch will check again if the output fits in the terminal. If not, it will use a shorter name for the fields (the left part of the text). If, after all of this, the output still does not fit, cpufetch will cut the text and will only print the text until there is no space left in each line 
+.SH EXAMPLES
+.TP
 Run cpufetch with Intel color scheme:
-.PP
+.IP
 \&./cpufetch \fB\-\-color\fR intel
-.PP
+.TP
 Run cpufetch with a custom color scheme:
-.PP
-\&./cpufetch \fB\-\-color\fR 239,90,45:210,200,200:100,200,45:0,200,200
-.SH "BUGS:"
+.IP
+\&./cpufetch \fB\-\-color\fR 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200
+.SH BUGS
+.TP
 Report bugs to https://github.com/Dr\-Noob/cpufetch/issues
-.SH "NOTE:"
-Peak performance information is NOT accurate. cpufetch computes peak performance using the max frequency. However, to properly compute peak performance, you need to know the frequency of the CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU. For peak performance measurement see peakperf (https://github.com/Dr\-Noob/peakperf)
-.SH "AUTHOR:"
-Dr-Noob (https://github.com/Dr-Noob)
-
+.SH NOTE
+.TP
+Peak performance information is NOT accurate. cpufetch computes peak performance using the max frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the CPU running AVX code. This value is not be fetched by cpufetch since it depends on each specific CPU. To correctly measure peak performance, see: https://github.com/Dr\-Noob/peakperf

doc/DOCUMENTATION_ARM.md

@@ -11,7 +11,7 @@ Microarchitecture information is acquired from the Main ID Register (MIDR) [[2](
 - `CPU part`
 - `CPU revision`
 
-The MIDR register can be built with this information. Another posible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1`
+The MIDR register can be built with this information. Another possible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1`
 
 With the MIDR available, the approach is the same as the one used in x86_64 architectures. cpufetch has a file that acts like a database that tries to match the MIDR register with the specific CPU microarchitecture.
 

src/arm/midr.c

@@ -4,8 +4,13 @@
 #include <assert.h>
 #include <stdbool.h>
 #include <errno.h>
-#include <sys/auxv.h>
-#include <asm/hwcap.h>
+
+#ifdef __linux__
+  #include <sys/auxv.h>
+  #include <asm/hwcap.h>
+#elif defined __APPLE__ || __MACH__
+  #include "sysctl.h"
+#endif
 
 #include "../common/global.h"
 #include "udev.h"
@@ -13,6 +18,10 @@
 #include "uarch.h"
 #include "soc.h"
 
+bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
+  return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
+}
+
 struct cache* get_cache_info(struct cpuInfo* cpu) {
   struct cache* cach = emalloc(sizeof(struct cache));
   init_cache_struct(cach);
@@ -30,13 +39,13 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
 struct frequency* get_frequency_info(uint32_t core) {
   struct frequency* freq = emalloc(sizeof(struct frequency));
 
-  freq->base = UNKNOWN_FREQ;
+  freq->base = UNKNOWN_DATA;
   freq->max = get_max_freq_from_file(core);
 
   return freq;
 }
 
-struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint32_t* midr_array, int socket_idx, int ncores) {
+struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint32_t* midr_array, int32_t* freq_array, int socket_idx, int ncores) {
   struct topology* topo = emalloc(sizeof(struct topology));
   init_topology_struct(topo, cach);
 
@@ -46,7 +55,7 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint
   int cores_in_socket = 0;
 
   while(socket_idx + 1 > sockets_seen) {
-    if(midr_array[first_core_idx] == midr_array[currrent_core_idx] && currrent_core_idx < ncores) {
+    if(currrent_core_idx < ncores && cores_are_equal(first_core_idx, currrent_core_idx, midr_array, freq_array)) {
       currrent_core_idx++;
       cores_in_socket++;
     }
@@ -66,26 +75,33 @@ int64_t get_peak_performance(struct cpuInfo* cpu) {
 
   //First check we have consistent data
   for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
-    if(get_freq(ptr->freq) == UNKNOWN_FREQ) {
+    if(get_freq(ptr->freq) == UNKNOWN_DATA) {
       return -1;
     }
   }
 
   int64_t flops = 0;
-
   ptr = cpu;
+
+  if(cpu->soc->soc_vendor == SOC_VENDOR_APPLE) {
+    // Special case for M1/M2
+    // First we find the E cores, then the P
+    // M1 have 2 (E cores) or 4 (P cores) FMA units
+    // Source: https://dougallj.github.io/applecpu/firestorm-simd.html
+    flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000) * 2 * 4 * 2;
+    ptr = ptr->next_cpu;
+    flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000) * 2 * 4 * 4;
+  }
+  else {
     for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
       flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000);
     }
     if(cpu->feat->NEON) flops = flops * 4;
+  }
 
   return flops;
 }
 
-bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
-  return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
-}
-
 uint32_t fill_ids_from_midr(uint32_t* midr_array, int32_t* freq_array, uint32_t* ids_array, int len) {
   uint32_t latest_id = 0;
   bool found;
@@ -132,6 +148,7 @@ struct features* get_features_info() {
     *ptr = false;
   }
 
+#ifdef __linux__
   errno = 0;
   long hwcaps = getauxval(AT_HWCAP);
 
@@ -161,15 +178,22 @@ struct features* get_features_info() {
     feat->SHA1 = hwcaps & HWCAP2_SHA1;
     feat->SHA2 = hwcaps & HWCAP2_SHA2;
   }
-#endif
+#endif // ifdef __aarch64__
+#elif defined __APPLE__ || __MACH__
+  // Must be M1
+  feat->AES = true;
+  feat->CRC32 = true;
+  feat->SHA1 = true;
+  feat->SHA2 = true;
+  feat->NEON = true;
+#endif  // ifdef __linux__
 
   return feat;
 }
 
-struct cpuInfo* get_cpu_info() {
-  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
+#ifdef __linux__
+struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) {
   init_cpu_info(cpu);
-
   int ncores = get_ncores_from_cpuinfo();
   bool success = false;
   int32_t* freq_array = emalloc(sizeof(uint32_t) * ncores);
@@ -185,7 +209,7 @@ struct cpuInfo* get_cpu_info() {
     }
 
     freq_array[i] = get_max_freq_from_file(i);
-    if(freq_array[i] == UNKNOWN_FREQ) {
+    if(freq_array[i] == UNKNOWN_DATA) {
       printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i);
       freq_array[i] = freq_array[0];
     }
@@ -212,18 +236,152 @@ struct cpuInfo* get_cpu_info() {
     ptr->feat = get_features_info();
     ptr->freq = get_frequency_info(midr_idx);
     ptr->cach = get_cache_info(ptr);
-    ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, i, ncores);
+    ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, freq_array, i, ncores);
   }
 
   cpu->num_cpus = sockets;
   cpu->hv = emalloc(sizeof(struct hypervisor));
   cpu->hv->present = false;
-  cpu->soc = get_soc();
+  cpu->soc = get_soc(cpu);
   cpu->peak_performance = get_peak_performance(cpu);
 
   return cpu;
 }
 
+#elif defined __APPLE__ || __MACH__
+void fill_cpu_info_firestorm_icestorm(struct cpuInfo* cpu, uint32_t pcores, uint32_t ecores) {
+  // 1. Fill ICESTORM
+  struct cpuInfo* ice = cpu;
+
+  ice->midr = MIDR_APPLE_M1_ICESTORM;
+  ice->arch = get_uarch_from_midr(ice->midr, ice);
+  ice->cach = get_cache_info(ice);
+  ice->feat = get_features_info();
+  ice->topo = malloc(sizeof(struct topology));
+  ice->topo->cach = ice->cach;
+  ice->topo->total_cores = ecores;
+  ice->freq = malloc(sizeof(struct frequency));
+  ice->freq->base = UNKNOWN_DATA;
+  ice->freq->max = 2064;
+  ice->hv = malloc(sizeof(struct hypervisor));
+  ice->hv->present = false;
+  ice->next_cpu = malloc(sizeof(struct cpuInfo));
+
+  // 2. Fill FIRESTORM
+  struct cpuInfo* fire = ice->next_cpu;
+  fire->midr = MIDR_APPLE_M1_FIRESTORM;
+  fire->arch = get_uarch_from_midr(fire->midr, fire);
+  fire->cach = get_cache_info(fire);
+  fire->feat = get_features_info();
+  fire->topo = malloc(sizeof(struct topology));
+  fire->topo->cach = fire->cach;
+  fire->topo->total_cores = pcores;
+  fire->freq = malloc(sizeof(struct frequency));
+  fire->freq->base = UNKNOWN_DATA;
+  fire->freq->max = 3200;
+  fire->hv = malloc(sizeof(struct hypervisor));
+  fire->hv->present = false;
+  fire->next_cpu = NULL;
+}
+
+void fill_cpu_info_avalanche_blizzard(struct cpuInfo* cpu, uint32_t pcores, uint32_t ecores) {
+  // 1. Fill BLIZZARD
+  struct cpuInfo* bli = cpu;
+
+  bli->midr = MIDR_APPLE_M2_BLIZZARD;
+  bli->arch = get_uarch_from_midr(bli->midr, bli);
+  bli->cach = get_cache_info(bli);
+  bli->feat = get_features_info();
+  bli->topo = malloc(sizeof(struct topology));
+  bli->topo->cach = bli->cach;
+  bli->topo->total_cores = pcores;
+  bli->freq = malloc(sizeof(struct frequency));
+  bli->freq->base = UNKNOWN_DATA;
+  bli->freq->max = 2800;
+  bli->hv = malloc(sizeof(struct hypervisor));
+  bli->hv->present = false;
+  bli->next_cpu = malloc(sizeof(struct cpuInfo));
+
+  // 2. Fill AVALANCHE
+  struct cpuInfo* ava = bli->next_cpu;
+  ava->midr = MIDR_APPLE_M2_AVALANCHE;
+  ava->arch = get_uarch_from_midr(ava->midr, ava);
+  ava->cach = get_cache_info(ava);
+  ava->feat = get_features_info();
+  ava->topo = malloc(sizeof(struct topology));
+  ava->topo->cach = ava->cach;
+  ava->topo->total_cores = ecores;
+  ava->freq = malloc(sizeof(struct frequency));
+  ava->freq->base = UNKNOWN_DATA;
+  ava->freq->max = 3500;
+  ava->hv = malloc(sizeof(struct hypervisor));
+  ava->hv->present = false;
+  ava->next_cpu = NULL;
+}
+
+struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
+  uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");
+
+  // Manually fill the cpuInfo assuming that
+  // the CPU is an Apple M1/M2
+  if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
+    cpu->num_cpus = 2;
+    // Now detect the M1 version
+    uint32_t cpu_subfamily = get_sys_info_by_name("hw.cpusubfamily");
+    if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
+      // Apple M1
+      fill_cpu_info_firestorm_icestorm(cpu, 4, 4);
+    }
+    else if(cpu_subfamily == CPUSUBFAMILY_ARM_HS || cpu_subfamily == CPUSUBFAMILY_ARM_HC_HD) {
+      // Apple M1 Pro/Max/Ultra. Detect number of cores
+      uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
+      if(physicalcpu == 20) {
+        // M1 Ultra
+        fill_cpu_info_firestorm_icestorm(cpu, 16, 4);
+      }
+      else if(physicalcpu == 8 || physicalcpu == 10) {
+        // M1 Pro/Max
+        fill_cpu_info_firestorm_icestorm(cpu, physicalcpu-2, 2);
+      }
+      else {
+        printBug("Found invalid physical cpu number: %d", physicalcpu);
+        return NULL;
+      }
+    }
+    else {
+      printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
+      return NULL;
+    }
+    cpu->soc = get_soc();
+    cpu->peak_performance = get_peak_performance(cpu);
+  }
+  else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
+    // Just the "normal" M2 exists for now
+    cpu->num_cpus = 2;
+    fill_cpu_info_avalanche_blizzard(cpu, 4, 4);
+    cpu->soc = get_soc();
+    cpu->peak_performance = get_peak_performance(cpu);
+  }
+  else {
+    printBug("Found invalid cpu_family: 0x%.8X", cpu_family);
+    return NULL;
+  }
+
+  return cpu;
+}
+#endif
+
+struct cpuInfo* get_cpu_info() {
+  struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
+  init_cpu_info(cpu);
+
+  #ifdef __linux__
+    return get_cpu_info_linux(cpu);
+  #elif defined __APPLE__ || __MACH__
+    return get_cpu_info_mach(cpu);
+  #endif
+}
+
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket) {
   uint32_t size = 3+7+1;
   char*  string = emalloc(sizeof(char)*size);
@@ -234,8 +392,9 @@ char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_soc
 
 char* get_str_features(struct cpuInfo* cpu) {
   struct features* feat = cpu->feat;
-  char* string = emalloc(sizeof(char) * 25);
+  uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,") + 1;
   uint32_t len = 0;
+  char* string = ecalloc(max_len, sizeof(char));
 
   if(feat->NEON) {
     strcat(string, "NEON,");
@@ -281,7 +440,7 @@ void print_debug(struct cpuInfo* cpu) {
     else {
       printf("0x%.8X ", midr);
     }
-    if(freq == UNKNOWN_FREQ) {
+    if(freq == UNKNOWN_DATA) {
       printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i);
       printf("%ld MHz\n", get_max_freq_from_file(0));
     }

src/arm/soc.c

@@ -3,11 +3,16 @@
 #include <string.h>
 #include <ctype.h>
 
+#include "uarch.h"
 #include "soc.h"
 #include "socs.h"
 #include "udev.h"
 #include "../common/global.h"
 
+#if defined(__APPLE__) || defined(__MACH__)
+  #include "sysctl.h"
+#endif
+
 #define min(a,b) (((a)<(b))?(a):(b))
 #define ARRAY_SIZE(arr)     (sizeof(arr) / sizeof((arr)[0]))
 
@@ -17,6 +22,8 @@ static char* soc_trademark_string[] = {
   [SOC_VENDOR_EXYNOS]     = "Exynos ",
   [SOC_VENDOR_KIRIN]      = "Kirin ",
   [SOC_VENDOR_BROADCOM]   = "Broadcom BCM",
+  [SOC_VENDOR_APPLE]      = "Apple ",
+  [SOC_VENDOR_ALLWINNER]  = "Allwinner "
 };
 
 static char* soc_rpi_string[] = {
@@ -37,10 +44,10 @@ void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t
 }
 
 bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
-  if(strlen(raw_name) > strlen(expected_name))
-    return false;
+  int len1 = strlen(raw_name);
+  int len2 = strlen(expected_name);
+  int len = min(len1, len2);
 
-  int len = strlen(raw_name);
   if(strncmp(raw_name, expected_name, len) != 0) {
     return false;
   }
@@ -105,11 +112,11 @@ bool match_broadcom(char* soc_name, struct system_on_chip* soc) {
 bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
   char* tmp;
 
-  if((tmp = strstr(soc_name, "Hi")) == NULL)
+  if((tmp = strstr(soc_name, "hi")) == NULL)
     return false;
 
   SOC_START
-  SOC_EQ(tmp, "Hi3620GFC",  "K3V2",  SOC_HISILICON_3620, soc, 40)
+  SOC_EQ(tmp, "hi3620GFC",  "K3V2",  SOC_HISILICON_3620, soc, 40)
   //SOC_EQ(tmp, "?",        "K3V2E", SOC_KIRIN, soc,  ?)
   //SOC_EQ(tmp, "?",        "620",   SOC_KIRIN, soc, 28)
   //SOC_EQ(tmp, "?",        "650",   SOC_KIRIN, soc, 16)
@@ -125,18 +132,18 @@ bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
   //SOC_EQ(tmp, "?",        "9000E", SOC_KIRIN, soc,  5)
   //SOC_EQ(tmp, "?",        "910",   SOC_KIRIN, soc, 28)
   //SOC_EQ(tmp, "?",        "910T",  SOC_KIRIN, soc, 28)
-  SOC_EQ(tmp, "Hi3630",     "920",   SOC_HISILICON_3630, soc, 28)
+  SOC_EQ(tmp, "hi3630",     "920",   SOC_HISILICON_3630, soc, 28)
   //SOC_EQ(tmp, "?",        "925",   SOC_KIRIN, soc, 28)
   //SOC_EQ(tmp, "?",        "930",   SOC_KIRIN, soc, ?)
   //SOC_EQ(tmp, "?",        "935",   SOC_KIRIN, soc, ?)
-  SOC_EQ(tmp, "Hi3650",     "950",   SOC_HISILICON_3650, soc, 16)
+  SOC_EQ(tmp, "hi3650",     "950",   SOC_HISILICON_3650, soc, 16)
   //SOC_EQ(tmp, "?",        "955",   SOC_KIRIN, soc, ?)
-  SOC_EQ(tmp, "Hi3660",     "960",   SOC_HISILICON_3660, soc, 16)
+  SOC_EQ(tmp, "hi3660",     "960",   SOC_HISILICON_3660, soc, 16)
   //SOC_EQ(tmp, "?",        "960S",  SOC_KIRIN, soc, 16)
-  SOC_EQ(tmp, "Hi3670",     "970",   SOC_HISILICON_3670, soc, 10)
-  SOC_EQ(tmp, "Hi3680",     "980",   SOC_HISILICON_3680, soc,  7)
+  SOC_EQ(tmp, "hi3670",     "970",   SOC_HISILICON_3670, soc, 10)
+  SOC_EQ(tmp, "hi3680",     "980",   SOC_HISILICON_3680, soc,  7)
   //SOC_EQ(tmp, "?",        "985",   SOC_KIRIN, soc,  7)
-  SOC_EQ(tmp, "Hi3690",     "990",   SOC_HISILICON_3690, soc,  7)
+  SOC_EQ(tmp, "hi3690",     "990",   SOC_HISILICON_3690, soc,  7)
   SOC_END
 }
 
@@ -196,12 +203,15 @@ bool match_exynos(char* soc_name, struct system_on_chip* soc) {
 
 bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
   char* tmp;
+  char* soc_name_upper = toupperstr(soc_name);
 
-  if((tmp = strstr(soc_name, "MT")) == NULL)
+  if((tmp = strstr(soc_name_upper, "MT")) == NULL)
     return false;
 
   SOC_START
   // Dimensity //
+  SOC_EQ(tmp, "MT6893",   "Dimensity 1200",  SOC_MTK_MT6893,   soc, 6)
+  SOC_EQ(tmp, "MT6891",   "Dimensity 1100",  SOC_MTK_MT6891,   soc, 6)
   SOC_EQ(tmp, "MT6889",   "Dimensity 1000",  SOC_MTK_MT6889,   soc, 7)
   SOC_EQ(tmp, "MT6885Z",  "Dimensity 1000L", SOC_MTK_MT6885Z,  soc, 7)
   //SOC_EQ(tmp, "?",      "Dimensity 700",   SOC_MTK_,         soc, 7)
@@ -369,7 +379,7 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "MSM8625Q",       "200",       SOC_SNAPD_MSM8625Q,       soc, 45)
   SOC_EQ(tmp, "MSM8208",        "208",       SOC_SNAPD_MSM8208,        soc, 28)
   SOC_EQ(tmp, "MSM8905",        "205",       SOC_SNAPD_MSM8905,        soc, 28)
-  SOC_EQ(tmp, "MSM8909",        "210 / 212", SOC_SNAPD_MSM8909,        soc, 28) // In the future, we can differenciate them using frequency
+  SOC_EQ(tmp, "MSM8909",        "210 / 212", SOC_SNAPD_MSM8909,        soc, 28) // In the future, we can differentiate them using frequency
   SOC_EQ(tmp, "QM215",          "215",       SOC_SNAPD_QM215,          soc, 28)
   // Snapdragon 4XX //
   SOC_EQ(tmp, "APQ8028",        "400",       SOC_SNAPD_APQ8028,        soc, 28)
@@ -446,10 +456,65 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "SM8250",         "865",       SOC_SNAPD_SM8250,         soc,  7)
   SOC_EQ(tmp, "SM8250-AB",      "865+",      SOC_SNAPD_SM8250_AB,      soc,  7)
   SOC_EQ(tmp, "SM8350",         "888",       SOC_SNAPD_SM8350,         soc,  5)
+  SOC_EQ(tmp, "SM8350-AC",      "888+",      SOC_SNAPD_SM8350,         soc,  5)
   SOC_END
 }
 
-bool match_special(char* soc_name, struct system_on_chip* soc) {
+// https://linux-sunxi.org/Allwinner_SoC_Family
+bool match_allwinner(char* soc_name, struct system_on_chip* soc) {
+  char* tmp;
+
+  if((tmp = strstr(soc_name, "sun")) == NULL)
+    return false;
+
+  SOC_START
+  // A series 32 bits
+  SOC_EQ(tmp, "sun4i", "A10",   SOC_ALLWINNER_A10,  soc, 55)
+  SOC_EQ(tmp, "sun5i", "A13",   SOC_ALLWINNER_A13,  soc, 55)
+  SOC_EQ(tmp, "sun5i", "A10s",  SOC_ALLWINNER_A10S, soc, 55)
+  SOC_EQ(tmp, "sun7i", "A20",   SOC_ALLWINNER_A20,  soc, 40)
+  SOC_EQ(tmp, "sun8i", "A23",   SOC_ALLWINNER_A23,  soc, 40)
+  SOC_EQ(tmp, "sun6i", "A31",   SOC_ALLWINNER_A31,  soc, 40)
+  SOC_EQ(tmp, "sun6i", "A31s",  SOC_ALLWINNER_A31S, soc, 40)
+  SOC_EQ(tmp, "sun8i", "A33",   SOC_ALLWINNER_A33,  soc, 40)
+  SOC_EQ(tmp, "sun8i", "A40",   SOC_ALLWINNER_A40,  soc, 40)
+  SOC_EQ(tmp, "sun8i", "A50",   SOC_ALLWINNER_A50,  soc, 28)
+  SOC_EQ(tmp, "sun9i", "A80",   SOC_ALLWINNER_A80,  soc, 28)
+  SOC_EQ(tmp, "sun8i", "A83T",  SOC_ALLWINNER_A83T, soc, 28)
+
+  // H series 32 bits
+  SOC_EQ(tmp, "sun8i", "H2+",   SOC_ALLWINNER_HZP,  soc, 40)
+  SOC_EQ(tmp, "sun8i", "H3",    SOC_ALLWINNER_H3,   soc, 40)
+  SOC_EQ(tmp, "sun8i", "H8",    SOC_ALLWINNER_H8,   soc, 28)
+
+  // H series 64 bits
+  SOC_EQ(tmp, "sun50i", "H5",   SOC_ALLWINNER_H5,   soc, 40)
+  SOC_EQ(tmp, "sun50i", "H6",   SOC_ALLWINNER_H6,   soc, 28)
+  SOC_EQ(tmp, "sun50i", "H616", SOC_ALLWINNER_H616, soc, 28)
+
+  // R series 32 bits
+  SOC_EQ(tmp, "sun5i", "R8",    SOC_ALLWINNER_R8,   soc, 55)
+  SOC_EQ(tmp, "sun8i", "R16",   SOC_ALLWINNER_R16,  soc, 40)
+  SOC_EQ(tmp, "sun8i", "R40",   SOC_ALLWINNER_R40,  soc, 40)
+  SOC_EQ(tmp, "sun8i", "R58",   SOC_ALLWINNER_R58,  soc, 28)
+
+  // R series  64 bits
+  SOC_EQ(tmp, "sun50i", "R329", SOC_ALLWINNER_R328, soc, 28)
+  SOC_END
+}
+
+bool is_taro_sm8475(struct cpuInfo* cpu) {
+  // Check if X2 core has frequency greater
+  // than 3.0 GHz (plus version should have 3.2 GHz)
+  struct cpuInfo* ptr = cpu;
+  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    if(is_cortex_x2(ptr->arch)) return ptr->freq->max > 3100;
+  }
+  printBug("Unable to find Cortex-X2 when differentiating taro SoC");
+  return false;
+}
+
+bool match_special(char* soc_name, struct cpuInfo* cpu, struct system_on_chip* soc) {
   char* tmp;
 
   // Xiaomi hides Redmi Note 8/8T under "Qualcomm Technologies, Inc TRINKET"
@@ -464,13 +529,25 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
     return true;
   }
 
+  // Snapdragon 8 Gen 1/8+ Gen 1 reported as "taro"
+  if(strcmp(soc_name, "taro") == 0) {
+    // Is not possible to detect 8/8+ with soc_name only
+    if(is_taro_sm8475(cpu)) {
+      fill_soc(soc, "8+ Gen 1", SOC_SNAPD_SM8475, 4);
+    }
+    else {
+      fill_soc(soc, "8 Gen 1", SOC_SNAPD_SM8450, 4);
+    }
+    return true;
+  }
+
   return false;
 }
 
-struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
+struct system_on_chip* parse_soc_from_string(struct cpuInfo* cpu, struct system_on_chip* soc) {
   char* raw_name = soc->raw_name;
 
-  if(match_special(raw_name, soc))
+  if(match_special(raw_name, cpu, soc))
     return soc;
 
   if (match_qualcomm(raw_name, soc))
@@ -485,8 +562,10 @@ struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
   if(match_hisilicon(raw_name, soc))
     return soc;
 
-  match_broadcom(raw_name, soc);
+  if(match_allwinner(raw_name, soc))
+    return soc;
 
+  match_broadcom(raw_name, soc);
   return soc;
 }
 
@@ -497,38 +576,49 @@ static inline int android_property_get(const char* key, char* value) {
   return __system_property_get(key, value);
 }
 
-struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
+void try_parse_soc_from_string(struct cpuInfo* cpu, struct system_on_chip* soc, int soc_len, char* soc_str) {
+  soc->raw_name = emalloc(sizeof(char) * (soc_len + 1));
+  strncpy(soc->raw_name, soc_str, soc_len + 1);
+  soc->raw_name[soc_len] = '\0';
+  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+  parse_soc_from_string(cpu, soc);
+}
+
+struct system_on_chip* guess_soc_from_android(struct cpuInfo* cpu, struct system_on_chip* soc) {
   char tmp[100];
   int property_len = 0;
 
   property_len = android_property_get("ro.mediatek.platform", (char *) &tmp);
   if(property_len > 0) {
-    soc->raw_name = emalloc(sizeof(char) * (property_len + 1));
-    strncpy(soc->raw_name, tmp, property_len + 1);
-    soc->raw_name[property_len] = '\0';
-    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-    return parse_soc_from_string(soc);
+    try_parse_soc_from_string(cpu, soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.mediatek.platform: %s", tmp);
+    else return soc;
   }
 
   property_len = android_property_get("ro.product.board", (char *) &tmp);
   if(property_len > 0) {
-    soc->raw_name = emalloc(sizeof(char) * (property_len + 1));
-    strncpy(soc->raw_name, tmp, property_len + 1);
-    soc->raw_name[property_len] = '\0';
-    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-    return parse_soc_from_string(soc);
+    try_parse_soc_from_string(cpu, soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.product.board: %s", tmp);
+    else return soc;
+  }
+
+  property_len = android_property_get("ro.board.platform", (char *) &tmp);
+  if(property_len > 0) {
+    try_parse_soc_from_string(cpu, soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.board.platform: %s", tmp);
+    else return soc;
   }
 
   return soc;
 }
 #endif
 
-struct system_on_chip* guess_soc_from_cpuinfo(struct system_on_chip* soc) {
+struct system_on_chip* guess_soc_from_cpuinfo(struct cpuInfo* cpu, struct system_on_chip* soc) {
   char* tmp = get_hardware_from_cpuinfo();
 
   if(tmp != NULL) {
     soc->raw_name = tmp;
-    return parse_soc_from_string(soc);
+    return parse_soc_from_string(cpu, soc);
   }
 
   return soc;
@@ -580,12 +670,63 @@ struct system_on_chip* guess_soc_raspbery_pi(struct system_on_chip* soc) {
   return soc;
 }
 
-struct system_on_chip* get_soc() {
+#if defined(__APPLE__) || defined(__MACH__)
+struct system_on_chip* guess_soc_apple(struct system_on_chip* soc) {
+  uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");
+  uint32_t cpu_subfamily = get_sys_info_by_name("hw.cpusubfamily");
+
+  if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
+    // Check M1 version
+    if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
+      fill_soc(soc, "M1", SOC_APPLE_M1, 5);
+    }
+    else if(cpu_subfamily == CPUSUBFAMILY_ARM_HS) {
+      fill_soc(soc, "M1 Pro", SOC_APPLE_M1_PRO, 5);
+    }
+    else if(cpu_subfamily == CPUSUBFAMILY_ARM_HC_HD) {
+      // Could be M1 Max or M1 Ultra (2x M1 Max)
+      uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
+      if(physicalcpu == 20) {
+        fill_soc(soc, "M1 Ultra", SOC_APPLE_M1_ULTRA, 5);
+      }
+      else if(physicalcpu == 10) {
+        fill_soc(soc, "M1 Max", SOC_APPLE_M1_MAX, 5);
+      }
+      else {
+        printBug("Found invalid physical cpu number: %d", physicalcpu);
+        soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+      }
+    }
+    else {
+      printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+    }
+  }
+  else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
+    // Check M2 version
+    if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
+      fill_soc(soc, "M2", SOC_APPLE_M2, 5);
+    }
+    else {
+      printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
+      soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+    }
+  }
+  else {
+    printBug("Found invalid cpu_family: 0x%.8X", cpu_family);
+    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+  }
+  return soc;
+}
+#endif
+
+struct system_on_chip* get_soc(struct cpuInfo* cpu) {
   struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
   soc->raw_name = NULL;
   soc->soc_vendor = SOC_VENDOR_UNKNOWN;
   soc->process = UNKNOWN;
 
+#ifdef __linux__
   bool isRPi = is_raspberry_pi();
   if(isRPi) {
     soc = guess_soc_raspbery_pi(soc);
@@ -597,20 +738,29 @@ struct system_on_chip* get_soc() {
     }
   }
 
-  soc = guess_soc_from_cpuinfo(soc);
+  soc = guess_soc_from_cpuinfo(cpu, soc);
   if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
     if(soc->raw_name != NULL)
       printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);
     else
       printWarn("SoC detection failed using /proc/cpuinfo: No string found");
 #ifdef __ANDROID__
-    soc = guess_soc_from_android(soc);
+    soc = guess_soc_from_android(cpu, soc);
     if(soc->raw_name == NULL)
       printWarn("SoC detection failed using Android: No string found");
     else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN)
       printWarn("SoC detection failed using Android: Found '%s' string", soc->raw_name);
-#endif
+#endif // ifdef __ANDROID__
   }
+#elif defined __APPLE__ || __MACH__
+  soc = guess_soc_apple(soc);
+  if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
+    printWarn("SoC detection failed using cpu_subfamily");
+  }
+  else {
+    return soc;
+  }
+#endif // ifdef __linux__
 
   if(soc->raw_name == NULL) {
     soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));

src/arm/soc.h

@@ -12,7 +12,9 @@ enum {
   SOC_VENDOR_MEDIATEK,
   SOC_VENDOR_EXYNOS,
   SOC_VENDOR_KIRIN,
-  SOC_VENDOR_BROADCOM
+  SOC_VENDOR_BROADCOM,
+  SOC_VENDOR_APPLE,
+  SOC_VENDOR_ALLWINNER
 };
 
 struct system_on_chip {
@@ -23,7 +25,7 @@ struct system_on_chip {
   char* raw_name;    
 };
 
-struct system_on_chip* get_soc();
+struct system_on_chip* get_soc(struct cpuInfo* cpu);
 char* get_soc_name(struct system_on_chip* soc);
 VENDOR get_soc_vendor(struct system_on_chip* soc);
 char* get_str_process(struct system_on_chip* soc);

src/arm/socs.h

@@ -63,6 +63,8 @@ enum {
   SOC_EXYNOS_980,
   SOC_EXYNOS_880,
   // Mediatek //
+  SOC_MTK_MT6893,
+  SOC_MTK_MT6891,
   SOC_MTK_MT6889,
   SOC_MTK_MT6885Z,
   SOC_MTK_MT6853,
@@ -250,14 +252,48 @@ enum {
   SOC_SNAPD_SM8250,
   SOC_SNAPD_SM8250_AB,
   SOC_SNAPD_SM8350,
+  SOC_SNAPD_SM8450,
+  SOC_SNAPD_SM8475,
+  // APPLE
+  SOC_APPLE_M1,
+  SOC_APPLE_M1_PRO,
+  SOC_APPLE_M1_MAX,
+  SOC_APPLE_M1_ULTRA,
+  SOC_APPLE_M2,
+  // ALLWINNER
+  SOC_ALLWINNER_A10,
+  SOC_ALLWINNER_A13,
+  SOC_ALLWINNER_A10S,
+  SOC_ALLWINNER_A20,
+  SOC_ALLWINNER_A23,
+  SOC_ALLWINNER_A31,
+  SOC_ALLWINNER_A31S,
+  SOC_ALLWINNER_A33,
+  SOC_ALLWINNER_A40,
+  SOC_ALLWINNER_A50,
+  SOC_ALLWINNER_A80,
+  SOC_ALLWINNER_A83T,
+  SOC_ALLWINNER_HZP,
+  SOC_ALLWINNER_H3,
+  SOC_ALLWINNER_H8,
+  SOC_ALLWINNER_H5,
+  SOC_ALLWINNER_H6,
+  SOC_ALLWINNER_H616,
+  SOC_ALLWINNER_R8,
+  SOC_ALLWINNER_R16,
+  SOC_ALLWINNER_R40,
+  SOC_ALLWINNER_R58,
+  SOC_ALLWINNER_R328
 };
 
 inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
   if(soc >= SOC_BCM_2835 && soc <= SOC_BCM_21654) return SOC_VENDOR_BROADCOM;
   else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
   else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
-  else if(soc >= SOC_MTK_MT6889 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
-  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8350) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
+  else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8475) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M2) return SOC_VENDOR_APPLE;
+  else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
   return SOC_VENDOR_UNKNOWN;
 }
 

src/arm/sysctl.c

@@ -0,0 +1,25 @@
+#include <sys/types.h>
+#include <sys/sysctl.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
+#include "../common/global.h"
+#include "../common/cpu.h"
+
+uint32_t get_sys_info_by_name(char* name) {
+  size_t size = 0;
+  uint32_t ret = 0;
+
+  if (sysctlbyname(name, NULL, &size, NULL, 0) != 0) {
+    printWarn("sysctlbyname(%s) failed: %s", name, strerror(errno));
+  }
+  else if (size == sizeof(uint32_t)) {
+    sysctlbyname(name, &ret, &size, NULL, 0);
+  }
+  else {
+    printWarn("sysctl does not support non-integer lookup for '%s'", name);
+  }
+
+  return ret;
+}

src/arm/sysctl.h

@@ -0,0 +1,36 @@
+#ifndef __SYSCTL__
+#define __SYSCTL__
+
+// From Linux kernel: arch/arm64/include/asm/cputype.h
+#define MIDR_APPLE_M1_ICESTORM  0x610F0220
+#define MIDR_APPLE_M1_FIRESTORM 0x610F0230
+// Kernel does not include those, so I just assume that
+// APPLE_CPU_PART_M2_BLIZZARD=0x30,M2_AVALANCHE=0x31
+#define MIDR_APPLE_M2_BLIZZARD  0x610F0300
+#define MIDR_APPLE_M2_AVALANCHE 0x610F0310
+
+// M1 / A14
+#ifndef CPUFAMILY_ARM_FIRESTORM_ICESTORM
+  #define CPUFAMILY_ARM_FIRESTORM_ICESTORM 0x1B588BB3
+#endif
+// M2 / A15
+#ifndef CPUFAMILY_ARM_AVALANCHE_BLIZZARD
+  #define CPUFAMILY_ARM_AVALANCHE_BLIZZARD 0xDA33D83D
+#endif
+
+// For detecting different M1 types
+// NOTE: Could also be achieved detecting different
+// MIDR values (e.g., APPLE_CPU_PART_M1_ICESTORM_PRO)
+#ifndef CPUSUBFAMILY_ARM_HG
+  #define CPUSUBFAMILY_ARM_HG 2
+#endif
+#ifndef CPUSUBFAMILY_ARM_HS
+  #define CPUSUBFAMILY_ARM_HS 4
+#endif
+#ifndef CPUSUBFAMILY_ARM_HC_HD
+  #define CPUSUBFAMILY_ARM_HC_HD 5
+#endif
+
+uint32_t get_sys_info_by_name(char* name);
+
+#endif

src/arm/uarch.c

@@ -32,6 +32,9 @@ enum {
   ISA_ARMv8_1_A,
   ISA_ARMv8_2_A,
   ISA_ARMv8_3_A,
+  ISA_ARMv8_4_A,
+  ISA_ARMv8_5_A,
+  ISA_ARMv9_A
 };
 
 enum {
@@ -63,6 +66,10 @@ enum {
   UARCH_CORTEX_A76,
   UARCH_CORTEX_A77,
   UARCH_CORTEX_A78,
+  UARCH_CORTEX_A510,
+  UARCH_CORTEX_A710,
+  UARCH_CORTEX_X1,
+  UARCH_CORTEX_X2,
   UARCH_NEOVERSE_N1,
   UARCH_NEOVERSE_E1,
   UARCH_SCORPION,
@@ -91,6 +98,10 @@ enum {
   UARCH_TEMPEST,    // Apple A12 processor (big cores).
   UARCH_LIGHTNING,  // Apple A13 processor (big cores).
   UARCH_THUNDER,    // Apple A13 processor (little cores).
+  UARCH_ICESTORM,   // Apple M1 processor (little cores).
+  UARCH_FIRESTORM,  // Apple M1 processor (big cores).
+  UARCH_BLIZZARD,   // Apple M2 processor (little cores).
+  UARCH_AVALANCHE,  // Apple M2 processor (big cores).
   // CAVIUM
   UARCH_THUNDERX,   // Cavium ThunderX
   UARCH_THUNDERX2,  //  Cavium ThunderX2 (originally Broadcom Vulkan).
@@ -99,7 +110,9 @@ enum {
   UARCH_BRAHMA_B15,
   UARCH_BRAHMA_B53,
   UARCH_XGENE,        // Applied Micro X-Gene.
-  UARCH_TAISHAN_V110  // HiSilicon TaiShan v110 (Huawei Kunpeng 920 series processors).
+  UARCH_TAISHAN_V110, // HiSilicon TaiShan v110 (Huawei Kunpeng 920 series processors).
+  // PHYTIUM
+  UARCH_XIAOMI,       // Not to be confused with Xiaomi Inc
 };
 
 static const ISA isas_uarch[] = {
@@ -127,6 +140,10 @@ static const ISA isas_uarch[] = {
   [UARCH_CORTEX_A76]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A77]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A78]   = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_A510]   = ISA_ARMv9_A,
+  [UARCH_CORTEX_A710]   = ISA_ARMv9_A,
+  [UARCH_CORTEX_X1]    = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_X2]    = ISA_ARMv9_A,
   [UARCH_NEOVERSE_N1]  = ISA_ARMv8_2_A,
   [UARCH_NEOVERSE_E1]  = ISA_ARMv8_2_A,
   [UARCH_BRAHMA_B15]   = ISA_ARMv7_A,   // Same as Cortex-A15
@@ -148,7 +165,12 @@ static const ISA isas_uarch[] = {
   [UARCH_EXYNOS_M3]    = ISA_ARMv8_A,
   [UARCH_EXYNOS_M4]    = ISA_ARMv8_2_A,
   [UARCH_EXYNOS_M5]    = ISA_ARMv8_2_A,
+  [UARCH_ICESTORM]     = ISA_ARMv8_5_A, // https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/Support/AArch64TargetParser.def
+  [UARCH_FIRESTORM]    = ISA_ARMv8_5_A,
+  [UARCH_BLIZZARD]     = ISA_ARMv8_5_A, // Not confirmed
+  [UARCH_AVALANCHE]    = ISA_ARMv8_5_A,
   [UARCH_PJ4]          = ISA_ARMv7_A,
+  [UARCH_XIAOMI]       = ISA_ARMv8_A,
 };
 
 static char* isas_string[] = {
@@ -162,6 +184,9 @@ static char* isas_string[] = {
   [ISA_ARMv8_1_A] = "ARMv8.1",
   [ISA_ARMv8_2_A] = "ARMv8.2",
   [ISA_ARMv8_3_A] = "ARMv8.3",
+  [ISA_ARMv8_4_A] = "ARMv8.4",
+  [ISA_ARMv8_5_A] = "ARMv8.5",
+  [ISA_ARMv9_A] = "ARMv9"
 };
 
 #define UARCH_START if (false) {}
@@ -230,6 +255,10 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'A', 0xD0D, NA, NA, "Cortex-A77",            UARCH_CORTEX_A77,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78",            UARCH_CORTEX_A78,   CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1",             UARCH_CORTEX_X1,    CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD46, NA, NA, "Cortex‑A510",           UARCH_CORTEX_A510,  CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD47, NA, NA, "Cortex‑A710",           UARCH_CORTEX_A710,  CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD48, NA, NA, "Cortex-X2",             UARCH_CORTEX_X2,    CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1",           UARCH_NEOVERSE_E1,  CPU_VENDOR_ARM)
 
   CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15",            UARCH_BRAHMA_B15,   CPU_VENDOR_BROADCOM)
@@ -280,6 +309,14 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'S', 0x003, 1,  NA, "Exynos M4",             UARCH_EXYNOS_M4,    CPU_VENDOR_SAMSUNG)   // Exynos 9820
   CHECK_UARCH(arch, cpu, 'S', 0x004, 1,  NA, "Exynos M5",             UARCH_EXYNOS_M5,    CPU_VENDOR_SAMSUNG)   // Exynos 9820 (this one looks wrong at uarch.c ...)
 
+  CHECK_UARCH(arch, cpu, 'p', 0x663, 1,  NA, "Xiaomi",                UARCH_XIAOMI,       CPU_VENDOR_PHYTIUM)   // From a fellow contributor (https://github.com/Dr-Noob/cpufetch/issues/125)
+                                                                                                                // Also interesting: https://en.wikipedia.org/wiki/FeiTeng_(processor)
+
+  CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm",              UARCH_ICESTORM,     CPU_VENDOR_APPLE)
+  CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm",             UARCH_FIRESTORM,    CPU_VENDOR_APPLE)
+  CHECK_UARCH(arch, cpu, 'a', 0x030, NA, NA, "Blizzard",              UARCH_BLIZZARD,     CPU_VENDOR_APPLE)
+  CHECK_UARCH(arch, cpu, 'a', 0x031, NA, NA, "Avalanche",             UARCH_AVALANCHE,    CPU_VENDOR_APPLE)
+
   CHECK_UARCH(arch, cpu, 'V', 0x581, NA, NA, "PJ4",                   UARCH_PJ4,          CPU_VENDOR_MARVELL)
   CHECK_UARCH(arch, cpu, 'V', 0x584, NA, NA, "PJ4B-MP",               UARCH_PJ4,          CPU_VENDOR_MARVELL)
 
@@ -296,3 +333,7 @@ void free_uarch_struct(struct uarch* arch) {
   free(arch->uarch_str);
   free(arch);
 }
+
+bool is_cortex_x2(struct uarch* arch) {
+  return arch->uarch == UARCH_CORTEX_X2;
+}

src/arm/uarch.h

@@ -8,5 +8,6 @@
 struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu);
 char* get_str_uarch(struct cpuInfo* cpu);
 void free_uarch_struct(struct uarch* arch);
+bool is_cortex_x2(struct uarch* arch);
 
 #endif

src/arm/udev.c

@@ -3,7 +3,6 @@
 #include "midr.h"
 
 #define _PATH_DEVICETREE_MODEL       "/sys/firmware/devicetree/base/model"
-#define _PATH_CPUS_PRESENT           _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
 #define _PATH_CPUINFO                "/proc/cpuinfo"
 //#define _PATH_CPUINFO                "cpuinfo_debug"
 
@@ -17,48 +16,6 @@
 
 #define CPUINFO_CPU_STRING "processor"
 
-// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
-int get_ncores_from_cpuinfo() {
-  // Examples:
-  // 0-271
-  // 0-7
-  // 0
-
-  int filelen;
-  char* buf;
-  if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
-    printWarn("read_file: %s: %s\n", _PATH_CPUS_PRESENT, strerror(errno));
-    return UNKNOWN;
-  }
-
-  int ncores;
-  char* tmp1;
-  if((tmp1 = strstr(buf, "-")) == NULL) {
-    // file contains no - character, we assume that it contains 0,
-    // which means that the CPU contains only one core
-    return 1;
-  }
-  else {
-    tmp1++;
-  }
-  char* tmp2 = strstr(buf, "\n");
-  char ncores_str[filelen];
-  memset(ncores_str, 0, sizeof(char) * filelen);
-  memcpy(ncores_str, tmp1, tmp2-tmp1);
-
-  char* end;
-  errno = 0;
-  ncores = strtol(ncores_str, &end, 10) + 1;
-  if(errno != 0) {
-    printWarn("strtol: %s:\n", strerror(errno));
-    return UNKNOWN;
-  }
-
-  free(buf);
-
-  return ncores;
-}
-
 long parse_cpuinfo_field(char* buf, char* field_str, int field_base) {
   char* tmp = strstr(buf, field_str);
   if(tmp == NULL) return -1;

src/common/args.c

@@ -5,9 +5,10 @@
 #include "args.h"
 #include "global.h"
 
-#define NUM_COLORS      4
+#define NUM_COLORS      5
 
 #define COLOR_STR_INTEL     "intel"
+#define COLOR_STR_INTEL_NEW "intel-new"
 #define COLOR_STR_AMD       "amd"
 #define COLOR_STR_IBM       "ibm"
 #define COLOR_STR_ARM       "arm"
@@ -24,6 +25,12 @@ struct args_struct {
   bool debug_flag;
   bool help_flag;
   bool raw_flag;
+  bool accurate_pp;
+  bool full_cpu_name_flag;
+  bool logo_long;
+  bool logo_short;
+  bool logo_intel_new;
+  bool logo_intel_old;
   bool verbose_flag;
   bool version_flag;
   STYLE style;
@@ -31,23 +38,35 @@ struct args_struct {
 };
 
 const char args_chr[] = {
-  /* [ARG_CHAR_STYLE]   = */ 's',
-  /* [ARG_CHAR_COLOR]   = */ 'c',
-  /* [ARG_CHAR_HELP]    = */ 'h',
-  /* [ARG_CHAR_RAW]     = */ 'r',
-  /* [ARG_CHAR_DEBUG]   = */ 'd',
-  /* [ARG_CHAR_VERBOSE] = */ 'v',
-  /* [ARG_CHAR_VERSION] = */ 'V',
+  /* [ARG_STYLE]          = */ 's',
+  /* [ARG_COLOR]          = */ 'c',
+  /* [ARG_HELP]           = */ 'h',
+  /* [ARG_RAW]            = */ 'r',
+  /* [ARG_FULLCPUNAME]    = */ 'F',
+  /* [ARG_LOGO_LONG]      = */ 1,
+  /* [ARG_LOGO_SHORT]     = */ 2,
+  /* [ARG_LOGO_INTEL_NEW] = */ 3,
+  /* [ARG_LOGO_INTEL_OLD] = */ 4,
+  /* [ARG_ACCURATE_PP]    = */ 5,
+  /* [ARG_DEBUG]          = */ 'd',
+  /* [ARG_VERBOSE]        = */ 'v',
+  /* [ARG_VERSION]        = */ 'V',
 };
 
 const char *args_str[] = {
-  /* [ARG_CHAR_STYLE]   = */ "style",
-  /* [ARG_CHAR_COLOR]   = */ "color",
-  /* [ARG_CHAR_HELP]    = */ "help",
-  /* [ARG_CHAR_RAW]     = */ "raw",
-  /* [ARG_CHAR_DEBUG]   = */ "debug",
-  /* [ARG_CHAR_VERBOSE] = */ "verbose",
-  /* [ARG_CHAR_VERSION] = */ "version",
+  /* [ARG_STYLE]          = */ "style",
+  /* [ARG_COLOR]          = */ "color",
+  /* [ARG_HELP]           = */ "help",
+  /* [ARG_RAW]            = */ "raw",
+  /* [ARG_FULLCPUNAME]    = */ "full-cpu-name",
+  /* [ARG_LOGO_LONG]      = */ "logo-long",
+  /* [ARG_LOGO_SHORT]     = */ "logo-short",
+  /* [ARG_LOGO_INTEL_NEW] = */ "logo-intel-new",
+  /* [ARG_LOGO_INTEL_OLD] = */ "logo-intel-old",
+  /* [ARG_ACCURATE_PP]    = */ "accurate-pp",
+  /* [ARG_DEBUG]          = */ "debug",
+  /* [ARG_VERBOSE]        = */ "verbose",
+  /* [ARG_VERSION]        = */ "version",
 };
 
 static struct args_struct args;
@@ -76,6 +95,30 @@ bool show_raw() {
   return args.raw_flag;
 }
 
+bool accurate_pp() {
+  return args.accurate_pp;
+}
+
+bool show_full_cpu_name() {
+  return args.full_cpu_name_flag;
+}
+
+bool show_logo_long() {
+  return args.logo_long;
+}
+
+bool show_logo_short() {
+  return args.logo_short;
+}
+
+bool show_logo_intel_new() {
+  return args.logo_intel_new;
+}
+
+bool show_logo_intel_old() {
+  return args.logo_intel_old;
+}
+
 bool verbose_enabled() {
   return args.verbose_flag;
 }
@@ -121,6 +164,7 @@ bool parse_color(char* optarg_str, struct color*** cs) {
   bool free_ptr = true;
 
   if(strcmp(optarg_str, COLOR_STR_INTEL) == 0) color_to_copy = COLOR_DEFAULT_INTEL;
+  else if(strcmp(optarg_str, COLOR_STR_INTEL_NEW) == 0) color_to_copy = COLOR_DEFAULT_INTEL_NEW;
   else if(strcmp(optarg_str, COLOR_STR_AMD) == 0) color_to_copy = COLOR_DEFAULT_AMD;
   else if(strcmp(optarg_str, COLOR_STR_IBM) == 0) color_to_copy = COLOR_DEFAULT_IBM;
   else if(strcmp(optarg_str, COLOR_STR_ARM) == 0) color_to_copy = COLOR_DEFAULT_ARM;
@@ -134,14 +178,16 @@ bool parse_color(char* optarg_str, struct color*** cs) {
     strcpy(str_to_parse, color_to_copy);
   }
 
-  ret = sscanf(str_to_parse, "%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d",
+  ret = sscanf(str_to_parse, "%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d",
                &c[0]->R, &c[0]->G, &c[0]->B,
                &c[1]->R, &c[1]->G, &c[1]->B,
                &c[2]->R, &c[2]->G, &c[2]->B,
-               &c[3]->R, &c[3]->G, &c[3]->B);
+               &c[3]->R, &c[3]->G, &c[3]->B,
+               &c[4]->R, &c[4]->G, &c[4]->B);
 
-  if(ret != 12) {
-    printErr("Expected to read 12 values for color but read %d", ret);
+  int expected_colors = 3 * NUM_COLORS;
+  if(ret != expected_colors) {
+    printErr("Expected to read %d values for color but read %d", expected_colors, ret);
     return false;
   }
 
@@ -172,13 +218,19 @@ char* build_short_options() {
   memset(str, 0, sizeof(char) * (len*2 + 1));
 
 #ifdef ARCH_X86
-  sprintf(str, "%c:%c:%c%c%c%c%c",
-  c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP], c[ARG_RAW],
-  c[ARG_DEBUG], c[ARG_VERBOSE], c[ARG_VERSION]);
-#else
-  sprintf(str, "%c:%c:%c%c%c%c",
+  sprintf(str, "%c:%c:%c%c%c%c%c%c%c%c%c%c%c",
   c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
-  c[ARG_DEBUG], c[ARG_VERBOSE], c[ARG_VERSION]);
+  c[ARG_RAW], c[ARG_FULLCPUNAME],
+  c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
+  c[ARG_LOGO_INTEL_NEW], c[ARG_LOGO_INTEL_OLD],
+  c[ARG_ACCURATE_PP], c[ARG_DEBUG], c[ARG_VERBOSE],
+  c[ARG_VERSION]);
+#else
+  sprintf(str, "%c:%c:%c%c%c%c%c%c",
+  c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
+  c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
+  c[ARG_DEBUG], c[ARG_VERBOSE],
+  c[ARG_VERSION]);
 #endif
 
   return str;
@@ -191,19 +243,34 @@ bool parse_args(int argc, char* argv[]) {
 
   bool color_flag = false;
   args.debug_flag = false;
+  args.accurate_pp = false;
+  args.full_cpu_name_flag = false;
   args.raw_flag = false;
   args.verbose_flag = false;
+  args.logo_long = false;
+  args.logo_short = false;
+  args.logo_intel_new = false;
+  args.logo_intel_old = false;
   args.help_flag = false;
   args.style = STYLE_EMPTY;
   args.colors = NULL;
 
+  // Temporary enable verbose level to allow printing warnings inside parse_args
+  set_log_level(true);
+
   const struct option long_options[] = {
     {args_str[ARG_STYLE],          required_argument, 0, args_chr[ARG_STYLE]          },
     {args_str[ARG_COLOR],          required_argument, 0, args_chr[ARG_COLOR]          },
     {args_str[ARG_HELP],           no_argument,       0, args_chr[ARG_HELP]           },
 #ifdef ARCH_X86
+    {args_str[ARG_LOGO_INTEL_NEW], no_argument,       0, args_chr[ARG_LOGO_INTEL_NEW] },
+    {args_str[ARG_LOGO_INTEL_OLD], no_argument,       0, args_chr[ARG_LOGO_INTEL_OLD] },
+    {args_str[ARG_ACCURATE_PP],    no_argument,       0, args_chr[ARG_ACCURATE_PP]    },
+    {args_str[ARG_FULLCPUNAME],    no_argument,       0, args_chr[ARG_FULLCPUNAME]    },
     {args_str[ARG_RAW],            no_argument,       0, args_chr[ARG_RAW]            },
 #endif
+    {args_str[ARG_LOGO_SHORT],     no_argument,       0, args_chr[ARG_LOGO_SHORT]     },
+    {args_str[ARG_LOGO_LONG],      no_argument,       0, args_chr[ARG_LOGO_LONG]      },
     {args_str[ARG_DEBUG],          no_argument,       0, args_chr[ARG_DEBUG]          },
     {args_str[ARG_VERBOSE],        no_argument,       0, args_chr[ARG_VERBOSE]        },
     {args_str[ARG_VERSION],        no_argument,       0, args_chr[ARG_VERSION]        },
@@ -235,11 +302,28 @@ bool parse_args(int argc, char* argv[]) {
         printErr("Invalid style '%s'",optarg);
         return false;
       }
-      break;
     }
     else if(opt == args_chr[ARG_HELP]) {
       args.help_flag  = true;
     }
+    else if(opt == args_chr[ARG_ACCURATE_PP]) {
+       args.accurate_pp = true;
+    }
+    else if(opt == args_chr[ARG_FULLCPUNAME]) {
+       args.full_cpu_name_flag = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_SHORT]) {
+       args.logo_short = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_LONG]) {
+       args.logo_long = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_INTEL_NEW]) {
+       args.logo_intel_new = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_INTEL_OLD]) {
+       args.logo_intel_old = true;
+    }
     else if(opt == args_chr[ARG_RAW]) {
        args.raw_flag  = true;
     }
@@ -266,10 +350,27 @@ bool parse_args(int argc, char* argv[]) {
     args.help_flag  = true;
   }
 
-  if((args.help_flag + args.version_flag + color_flag) > 1) {
-    printWarn("You should specify just one option");
+  if(args.logo_intel_new && args.logo_intel_old) {
+    printWarn("%s and %s cannot be specified together", args_str[ARG_LOGO_INTEL_NEW], args_str[ARG_LOGO_INTEL_OLD]);
+    args.logo_intel_new = false;
+    args.logo_intel_old = false;
+  }
+
+  if(args.logo_short && args.logo_long) {
+    printWarn("%s and %s cannot be specified together", args_str[ARG_LOGO_SHORT], args_str[ARG_LOGO_LONG]);
+    args.logo_short = false;
+    args.logo_long = false;
+  }
+
+#if defined(ARCH_X86) && ! defined(__linux__)
+  if(args.accurate_pp) {
+    printWarn("%s option is valid only in Linux x86_64", args_str[ARG_ACCURATE_PP]);
     args.help_flag  = true;
   }
+#endif
+
+  // Leave log level untouched after returning
+  set_log_level(false);
 
   return true;
 }

src/common/args.h

@@ -13,7 +13,6 @@ struct color {
 enum {
   STYLE_EMPTY,
   STYLE_FANCY,
-  STYLE_WILD,
   STYLE_RETRO,
   STYLE_LEGACY,
   STYLE_INVALID
@@ -24,6 +23,12 @@ enum {
   ARG_COLOR,
   ARG_HELP,
   ARG_RAW,
+  ARG_FULLCPUNAME,
+  ARG_LOGO_LONG,
+  ARG_LOGO_SHORT,
+  ARG_LOGO_INTEL_NEW,
+  ARG_LOGO_INTEL_OLD,
+  ARG_ACCURATE_PP,
   ARG_DEBUG,
   ARG_VERBOSE,
   ARG_VERSION
@@ -37,6 +42,12 @@ extern const char *args_str[];
 int max_arg_str_length();
 bool parse_args(int argc, char* argv[]);
 bool show_help();
+bool accurate_pp();
+bool show_full_cpu_name();
+bool show_logo_long();
+bool show_logo_short();
+bool show_logo_intel_new();
+bool show_logo_intel_old();
 bool show_raw();
 bool show_debug();
 bool show_version();

src/common/ascii.h

@@ -1,232 +1,349 @@
 #ifndef __ASCII__
 #define __ASCII__
 
-#define NUMBER_OF_LINES   19
-#define LINE_SIZE         62
+#define COLOR_NONE     ""
+#define C_FG_BLACK     "\x1b[30;1m"
+#define C_FG_RED       "\x1b[31;1m"
+#define C_FG_GREEN     "\x1b[32;1m"
+#define C_FG_YELLOW    "\x1b[33;1m"
+#define C_FG_BLUE      "\x1b[34;1m"
+#define C_FG_MAGENTA   "\x1b[35;1m"
+#define C_FG_CYAN      "\x1b[36;1m"
+#define C_FG_WHITE     "\x1b[37;1m"
+#define C_BG_BLACK     "\x1b[40;1m"
+#define C_BG_RED       "\x1b[41;1m"
+#define C_BG_GREEN     "\x1b[42;1m"
+#define C_BG_YELLOW    "\x1b[43;1m"
+#define C_BG_BLUE      "\x1b[44;1m"
+#define C_BG_MAGENTA   "\x1b[45;1m"
+#define C_BG_CYAN      "\x1b[46;1m"
+#define C_BG_WHITE     "\x1b[47;1m"
+#define C_FG_B_BLACK   "\x1b[90;1m"
+#define C_FG_B_RED     "\x1b[91;1m"
+#define C_FG_B_GREEN   "\x1b[92;1m"
+#define C_FG_B_YELLOW  "\x1b[93;1m"
+#define C_FG_B_BLUE    "\x1b[94;1m"
+#define C_FG_B_MAGENTA "\x1b[95;1m"
+#define C_FG_B_CYAN    "\x1b[96;1m"
+#define C_FG_B_WHITE   "\x1b[97;1m"
+#define COLOR_RESET    "\x1b[m"
 
-#define AMD_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-     @@@@      @@@       @@@   @@@@@@@@        ############   \
-    @@@@@@     @@@@@   @@@@@   @@@    @@@        ##########   \
-   @@@  @@@    @@@@@@@@@@@@@   @@@      @@      #     #####   \
-  @@@    @@@   @@@  @@@  @@@   @@@      @@    ###     #####   \
- @@@@@@@@@@@@  @@@       @@@   @@@    @@@    #########  ###   \
- @@@      @@@  @@@       @@@   @@@@@@@@@     ########    ##   \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
-
-#define INTEL_ASCII \
-"                              ################                \
-                      #######                #######          \
-                 ####                              ####       \
-             ###                                     ####     \
-        ###                                             ###   \
-        ###                                             ###   \
-     #                    ###                ###        ###   \
-   ##   ###   #########   ######   ######    ###        ###   \
-  ##    ###   ###    ###  ###    ####  ####  ###        ###   \
- ##     ###   ###    ###  ###    ###    ###  ###       ###    \
-##      ###   ###    ###  ###    ##########  ###     ####     \
-##      ###   ###    ###  ###    ###         ###   #####      \
-##       ##   ###    ###   #####  #########   ##  ###         \
-###                                                           \
- ###                                                          \
- ####                                        ####             \
-   #####                               ##########             \
-     ##########               ################                \
-         ###############################                      "
-                                                             
-#define SNAPDRAGON_ASCII \
-"                                                              \
-                     @@########                               \
-                  @@@@@###########                            \
-            @@  @@@@@#################                        \
-          @@@@@@@@@@####################                      \
-         @@@@@@@@@@@@#####################                    \
-        @@@@@@@@@@@@@@@####################                   \
-        @@@@@@@@@@@@@@@@@###################                  \
-        @@@@@@@@@@@@@@@@@@@@################                  \
-           @@@@@@@@@@@@@@@@@@@@#############                  \
-              @@@@@@@@@@@@@@@@@@############                  \
-       @          @@@@@@@@@@@@@@@###########                  \
-        @@@@@       @@@@@@@@@@@@@##########                   \
-         @@@@@@@@@   @@@@@@@@@@@@########                     \
-           @@@@@@@@@  @@@@@@@@@@#######                       \
-              @@@@@@@@@@@@@@@@#######                         \
-                  @@@@###########                             \
-                                                              \
-                                                              "
-                                                             
-#define MEDIATEK_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-      ##  ## ######  ######  #     ### @@@@@@ @@@@@@ @@  @@   \
-     ### ### #       #    #  #    ####   @@   @      @@ @@    \
-    ######## # ###   #    #  #   ## ##   @@   @ @@@  @@@@     \
-   ## ### ## #       #    #  #  ##  ##   @@   @      @@ @@    \
-  ##  ##  ## ######  #####   # ##   ##   @@   @@@@@@ @@  @@   \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
-
-#define EXYNOS_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                         ##  ##  ##                           \
-                           ##  ##                             \
-                             ##                               \
-                           ##  ##                             \
-                         ##  ##  ##                           \
-                                                              \
-                         SAMSUNG                              \
-                         Exynos                               \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
-                                                              
-#define KIRIN_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                   #######                    \
-       #####             ####################                 \
-          ######################################              \
-            #######################################           \
-               #######################################        \
-                 ##############################               \
-                ##########################                    \
-             #########################                        \
-           ########################                           \
-        ########################                              \
-     #########################                                \
-   #########################                                  \
-                                                              \
-                                                              "                                                                                                                           
-                                                              
-#define BROADCOM_ASCII \
-"                                                              \
-                    ################                          \
-               ##########################                     \
-            ################################                  \
-          ################@@@@################                \
-         ################@@@@@@################               \
-        #################@@@@@@#################              \
-       #################@@@@@@@@#################             \
-       #################@@@@@@@@#################             \
-       ################@@@@##@@@@################             \
-       ################@@@@##@@@@################             \
-       ###############@@@@####@@@@###############             \
-        @@@@@@@@@@####@@@@####@@@@####@@@@@@@@@@              \
-         ######@@@@@@@@@@######@@@@@@@@@@######               \
-           ##################################                 \
-             ##############################                   \
-                ########################                      \
-                    ###############                           \
-                                                              "
-                                                                                                              
-#define ARM_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-      ############     ##########   ####  ######  ########    \
-   ###############     #########    #######################   \
-  ####        ####     ####         #####   #######   #####   \
- ####         ####     ####         ####     #####     ####   \
- ####         ####     ####         ####     ####      ####   \
-  ####       #####     ####         ####     ####      ####   \
-   ###############     ####         ####     ####      ####   \
-    ########  ####     ####         ####     ####      ####   \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "                                                                                                               
-
-// jp2a --height=17 ibm.jpg
-#define IBM_ASCII \
-"                                                              \
-                                                              \
-                                                              \
- ############ ################   ##########        ########## \
-                                                              \
- ############ ################## ############    ############ \
-                                                              \
-    ######       ######    ######    ####################     \
-                                                              \
-    ######       ##############      ####################     \
-                                                              \
-    ######       ######    ######    #####  ######  #####     \
-                                                              \
- ############ ################## #########   ####   ######### \
-                                                              \
- ############ ################   #########    ##    ######### \
-                                                              \
-                                                              \
-                                                              "
-
-
-#define UNKNOWN_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
-                                                             
-static const char* ASCII_ARRAY [] = {
-  AMD_ASCII,
-  INTEL_ASCII,
-  ARM_ASCII,
-  SNAPDRAGON_ASCII,
-  MEDIATEK_ASCII,
-  EXYNOS_ASCII,
-  KIRIN_ASCII,
-  BROADCOM_ASCII,
-  IBM_ASCII,
-  UNKNOWN_ASCII
+struct ascii_logo {
+  char* art;
+  uint32_t width;
+  uint32_t height;
+  bool replace_blocks;
+  char color_ascii[3][100];
+  char color_text[2][100];
 };
 
+/*
+ * ASCII logos brief documentation
+ * ----------------------------------------------------
+ * C1, C2, ...: ColorN, gets replaced by printer.c with
+ *              the color in ascii_logo->color_ascii[N]
+ * CR:          Color reset, gets replaced by the reset
+ *              color by printer.c
+ *
+ * Logos with replace_blocks=true are replaced by character
+ * blocks (actually, spaces with background color), so
+ * the color in the structure must be C_BG_XXX. When
+ * replace_blocks is true, the characters '#' are replaced
+ * by spaces printed with color_ascii[0], and '@' are
+ * printed with color_ascii[1]. If replace_blocks=true,
+ * color format specified in ASCIIs ($C1, $C2) are ignored.
+ *
+ * In any case, '$' is a illegal character to be used in
+ * the ascii logos because it is used to parse colors
+ *
+ * LONG_LOGOS will be printed only if the fit in the screen,
+ * otherwise SHORT_LOGOS will be used
+ */
+
+// SHORT LOGOS //
+#define ASCII_AMD \
+"$C2          '###############             \
+$C2             ,#############            \
+$C2                      .####            \
+$C2              #.      .####            \
+$C2            :##.      .####            \
+$C2           :###.      .####            \
+$C2           #########.   :##            \
+$C2           #######.       ;            \
+$C1                                       \
+$C1    ###     ###      ###   #######     \
+$C1   ## ##    #####  #####   ##     ##   \
+$C1  ##   ##   ### #### ###   ##      ##  \
+$C1 #########  ###  ##  ###   ##      ##  \
+$C1##       ## ###      ###   ##     ##   \
+$C1##       ## ###      ###   #######     "
+
+#define ASCII_INTEL \
+"$C1                   .#################.          \
+$C1              .####                   ####.     \
+$C1          .##                             ###   \
+$C1       ##                          :##     ###  \
+$C1    #                ##            :##      ##  \
+$C1  ##   ##  ######.   ####  ######  :##      ##  \
+$C1 ##    ##  ##:  ##:  ##   ##   ### :##     ###  \
+$C1##     ##  ##:  ##:  ##  :######## :##    ##    \
+$C1##     ##  ##:  ##:  ##   ##.   .  :## ####     \
+$C1##      #  ##:  ##:  ####  #####:   ##          \
+$C1 ##                                             \
+$C1  ###.                         ..o####.         \
+$C1   ######oo...         ..oo#######              \
+$C1          o###############o                     "
+
+#define ASCII_INTEL_NEW \
+"$C1  MMM                 oddl                   MMN   \
+$C1  MMM                 dMMN                   MMN   \
+$C1  ...  ....   ...     dMMM..      .cc.       NMN   \
+$C1  MMM  :MMMdWMMMMMX.  dMMMMM,  .XMMMMMMNo    MMN   \
+$C1  MMM  :MMMp    dMMM  dMMX   .NMW      WMN.  MMN   \
+$C1  MMM  :MMM      WMM  dMMK   kMMXooooooNMMx  MMN   \
+$C1  MMM  :MMM      NMM  dMMK   dMMX            MMN   \
+$C1  MMM  :MMM      NMM  dMMMoo  OMM0....:Nx.   MMN   \
+$C1  MMM  :WWW      XWW   lONMM   'xXMMMMNOc    MMN   "
+
+#define ASCII_SNAPD \
+"              $C1@@$C2########               \
+           $C1@@@@@$C2###########            \
+     $C1@@  @@@@@$C2#################        \
+   $C1@@@@@@@@@@$C2####################      \
+  $C1@@@@@@@@@@@@$C2#####################    \
+ $C1@@@@@@@@@@@@@@@$C2####################   \
+ $C1@@@@@@@@@@@@@@@@@$C2###################  \
+ $C1@@@@@@@@@@@@@@@@@@@@$C2################  \
+    $C1@@@@@@@@@@@@@@@@@@@@$C2#############  \
+       $C1@@@@@@@@@@@@@@@@@@$C2############  \
+$C1@          @@@@@@@@@@@@@@@$C2###########  \
+ $C1@@@@@       @@@@@@@@@@@@@$C2##########   \
+  $C1@@@@@@@@@   @@@@@@@@@@@@$C2########     \
+    $C1@@@@@@@@@  @@@@@@@@@@$C2#######       \
+       $C1@@@@@@@@@@@@@@@@$C2#######         \
+           $C1@@@@$C2###########             "
+
+#define ASCII_MTK \
+"$C1    ##  ## ######  ######  #     ### $C2@@@@@@ @@@@@@ @@  @@  \
+$C1   ### ### #       #    #  #    ####   $C2@@   @      @@ @@   \
+$C1  ######## # ###   #    #  #   ## ##   $C2@@   @ @@@  @@@@    \
+$C1 ## ### ## #       #    #  #  ##  ##   $C2@@   @      @@ @@   \
+$C1##  ##  ## ######  #####   # ##   ##   $C2@@   @@@@@@ @@  @@  "
+
+#define ASCII_EXYNOS \
+"$C2                      \
+$C2                      \
+$C2                      \
+     $C1##$CR  $C1##$CR  $C1##$CR       \
+       $C1##$CR  $C1##$CR         \
+         $C1##$CR           \
+       $C1##$CR  $C1##$CR         \
+     $C1##$CR  $C1##$CR  $C1##$CR       \
+$C2                      \
+$C2     SAMSUNG          \
+$C2     Exynos           \
+$C2                      \
+$C2                      "
+
+#define ASCII_KIRIN \
+"$C1                                #######              \
+$C1    #####             ####################           \
+$C1       ######################################        \
+$C1         #######################################     \
+$C1            #######################################  \
+$C1              ##############################         \
+$C1             ##########################              \
+$C1          #########################                  \
+$C1        ########################                     \
+$C1     ########################                        \
+$C1  #########################                          \
+$C1#########################                            "
+
+#define ASCII_BROADCOM \
+"$C2                                            \
+$C2             ################               \
+$C2        ##########################          \
+$C2     ################################       \
+$C2   ################$C1@@@@$C2################     \
+$C2  ################$C1@@@@@@$C2################    \
+$C2 #################$C1@@@@@@$C2#################   \
+$C2#################$C1@@@@@@@@$C2#################  \
+$C2#################$C1@@@@@@@@$C2#################  \
+$C2################$C1@@@@$C2##$C1@@@@$C2################  \
+$C2################$C1@@@@$C2##$C1@@@@$C2################  \
+$C2###############$C1@@@@$C2####$C1@@@@$C2###############  \
+$C1 @@@@@@@@@@$C2####$C1@@@@$C2####$C1@@@@$C2####$C1@@@@@@@@@@   \
+$C2  ######$C1@@@@@@@@@@$C2######$C1@@@@@@@@@@$C2######    \
+$C2    ##################################      \
+$C2      ##############################        \
+$C2         ########################           \
+$C2             ###############                \
+$C2                                            "
+
+#define ASCII_ARM \
+"$C1   #####  ##   # #####  ## ####  ######   \
+$C1 ###    ####   ###      ####  ###   ###   \
+$C1###       ##   ###      ###    ##    ###  \
+$C1 ###    ####   ###      ###    ##    ###  \
+$C1  ######  ##   ###      ###    ##    ###  "
+
+#define ASCII_IBM \
+"$C1######## ##########   ######       ###### \
+$C1######## ###########  #######     ####### \
+$C1  ####     ###   ####   ######   ######   \
+$C1  ####     ###   ###    ####### #######   \
+$C1  ####     ########     ###############   \
+$C1  ####     ###   ###    #### ##### ####   \
+$C1  ####     ###   ####   ####  ###  ####   \
+$C1######## ###########  ######   #   ###### \
+$C1######## ##########   ######       ###### "
+
+// inspired by the neofetch mac logo
+#define ASCII_APPLE \
+"$C1                   .\"c.         \
+$C1                 ,xNMM.         \
+$C1                .lMM\"           \
+$C1                MM*             \
+$C1     .;loddo;:.   olloddol;.    \
+$C1   cKMMMMMMMMMMNWMMMMMMMMMMM0:  \
+$C1 .KMMMMMMMMMMMMMMMMMMMMMMMW*    \
+$C1 XMMMMMMMMMMMMMMMMMMMMMMMX.     \
+$C1;MMMMMMMMMMMMMMMMMMMMMMMM:      \
+$C1:MMMMMMMMMMMMMMMMMMMMMMMM:      \
+$C1.MMMMMMMMMMMMMMMMMMMMMMMMX.     \
+$C1 kMMMMMMMMMMMMMMMMMMMMMMMMWd.   \
+$C1 'XMMMMMMMMMMMMMMMMMMMMMMMMMMk  \
+$C1  'XMMMMMMMMMMMMMMMMMMMMMMMMK.  \
+$C1    kMMMMMMMMMMMMMMMMMMMMMMd    \
+$C1     'KMMMMMMMWXXWMMMMMMMk.     \
+$C1       \"cooc\"*    \"*coo'\"       "
+
+#define ASCII_ALLWINNER \
+"$C1                                               \
+$C1                #################              \
+$C1          .########             #####    ####  \
+$C1       ######                        #######   \
+$C1    #####.    ##             ..##     ####.    \
+$C1  .####      ####          #####     ####      \
+$C1 ####       ## ###          ###.   #####  .    \
+$C1####       ##   ## ####   .###### ####*   .    \
+$C1###       ##  ##.###  ## #### .######          \
+$C1###      #.##     ###  #####   #####    .      \
+$C1###     ###        ### .###     ###    .       \
+$C1 #### ###          ####             #.         \
+$C1   ####                          #*            \
+$C1      #####                 ##.                \
+$C1            ###########.                       \
+$C1                                               "
+
+// --------------------- LONG LOGOS ------------------------- //
+#define ASCII_AMD_L \
+"$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1     @@@@      @@@       @@@   @@@@@@@@      $C2  ############   \
+$C1    @@@@@@     @@@@@   @@@@@   @@@    @@@    $C2    ##########   \
+$C1   @@@  @@@    @@@@@@@@@@@@@   @@@      @@   $C2   #     #####   \
+$C1  @@@    @@@   @@@  @@@  @@@   @@@      @@   $C2 ###     #####   \
+$C1 @@@@@@@@@@@@  @@@       @@@   @@@    @@@    $C2#########  ###   \
+$C1 @@@      @@@  @@@       @@@   @@@@@@@@@     $C2########    ##   \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              "
+
+#define ASCII_INTEL_L \
+"$C1                               ###############@               \
+$C1                       ######@                ######@         \
+$C1                  ###@                              ###@      \
+$C1              ##@                                     ###@    \
+$C1         ##@                                             ##@  \
+$C1         ##@                                             ##@  \
+$C1      @                    ##@                ##@        ##@  \
+$C1    #@   ##@   ########@   #####@   #####@    ##@        ##@  \
+$C1   #@    ##@   ##@    ##@  ##@    ###@  ###@  ##@        ##@  \
+$C1  #@     ##@   ##@    ##@  ##@    ##@    ##@  ##@       ##@   \
+$C1 #@      ##@   ##@    ##@  ##@    #########@  ##@     ###@    \
+$C1 #@      ##@   ##@    ##@  ##@    ##@         ##@   ####@     \
+$C1 #@       #@   ##@    ##@   ####@  ########@   #@  ##@        \
+$C1 ##@                                                          \
+$C1  ##@                                                         \
+$C1  ###@                                        ###@            \
+$C1    ####@                               #########@            \
+$C1      #########@               ###############@               \
+$C1          ##############################@                     "
+
+#define ASCII_INTEL_L_NEW \
+" ####################################################### \
+ ####################################################### \
+ ####%%%#################@@@#####################@@@#### \
+ ####%%%#################@@@#####################@@@#### \
+ ########################@@@#####################@@@#### \
+ ####@@@##@@@#@@@@@@@####@@@@@@####@@@@@@@@@#####@@@#### \
+ ####@@@##@@@@@@@@@@@@###@@@@@@##@@@@#####@@@@###@@@#### \
+ ####@@@##@@@@#####@@@@##@@@####@@@@#######@@@@##@@@#### \
+ ####@@@##@@@#######@@@##@@@####@@@@@@@@@@@@@@@##@@@#### \
+ ####@@@##@@@#######@@@##@@@####@@@@#############@@@#### \
+ ####@@@##@@@#######@@@##@@@@@@##@@@@#####@@@@###@@@#### \
+ ####@@@##@@@#######@@@###@@@@@####@@@@@@@@@#####@@@#### \
+ ####################################################### \
+ ####################################################### "
+
+#define ASCII_ARM_L \
+"$C1     ############    ##########   ####  #######  ########   \
+$C1  ###############    #########    ########################  \
+$C1 ####        ####    ####         #####   ########   #####  \
+$C1####         ####    ####         ####     ######     ####  \
+$C1####         ####    ####         ####      ####      ####  \
+$C1 ####       #####    ####         ####      ####      ####  \
+$C1  ###############    ####         ####      ####      ####  \
+$C1   ########  ####    ####         ####      ####      ####  "
+
+#define ASCII_IBM_L \
+"$C1 ############ ################   ##########        ########## \
+$C1                                                              \
+$C1 ############ ################## ############    ############ \
+$C1                                                              \
+$C1    ######       ######    ######    ####################     \
+$C1                                                              \
+$C1    ######       ##############      ####################     \
+$C1                                                              \
+$C1    ######       ######    ######    #####  ######  #####     \
+$C1                                                              \
+$C1 ############ ################## #########   ####   ######### \
+$C1                                                              \
+$C1 ############ ################   #########    ##    ######### "
+
+typedef struct ascii_logo asciiL;
+
+//                        ------------------------------------------------------------------------------------------------------+
+//                        | LOGO             | W | H | REPLACE | COLORS LOGO (>0 && <10)          | COLORS TEXT (=2)            |
+//                        ------------------------------------------------------------------------------------------------------+
+asciiL logo_amd         = { ASCII_AMD,         39, 15, false, {C_FG_WHITE, C_FG_GREEN},           {C_FG_WHITE,   C_FG_GREEN}   };
+asciiL logo_intel       = { ASCII_INTEL,       48, 14, false, {C_FG_CYAN},                        {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_intel_new   = { ASCII_INTEL_NEW,   51,  9, false, {C_FG_CYAN},                        {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_snapd       = { ASCII_SNAPD,       39, 16, false, {C_FG_RED, C_FG_WHITE},             {C_FG_RED,     C_FG_WHITE}   };
+asciiL logo_mtk         = { ASCII_MTK,         59,  5, false, {C_FG_BLUE, C_FG_YELLOW},           {C_FG_BLUE,    C_FG_YELLOW}  };
+asciiL logo_exynos      = { ASCII_EXYNOS,      22, 13, true,  {C_BG_BLUE, C_FG_WHITE},            {C_FG_BLUE,    C_FG_WHITE}   };
+asciiL logo_kirin       = { ASCII_KIRIN,       53, 12, false, {C_FG_RED},                         {C_FG_WHITE,   C_FG_RED}     };
+asciiL logo_broadcom    = { ASCII_BROADCOM,    44, 19, false, {C_FG_WHITE, C_FG_RED},             {C_FG_WHITE,   C_FG_RED}     };
+asciiL logo_arm         = { ASCII_ARM,         42,  5, false, {C_FG_CYAN},                        {C_FG_WHITE,   C_FG_CYAN}    };
+asciiL logo_ibm         = { ASCII_IBM,         42,  9, false, {C_FG_CYAN, C_FG_WHITE},            {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_apple       = { ASCII_APPLE,       32, 17, false, {C_FG_WHITE},                       {C_FG_CYAN,    C_FG_B_WHITE} };
+asciiL logo_allwinner   = { ASCII_ALLWINNER,   47, 16, false, {C_FG_CYAN},                        {C_FG_B_BLACK, C_FG_B_CYAN } };
+
+// Long variants          | ----------------------------------------------------------------------------------------------------|
+asciiL logo_amd_l       = { ASCII_AMD_L,       62, 19, true,  {C_BG_WHITE, C_BG_GREEN},           {C_FG_WHITE, C_FG_GREEN}     };
+asciiL logo_intel_l     = { ASCII_INTEL_L,     62, 19, true,  {C_BG_CYAN, C_BG_WHITE},            {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_intel_l_new = { ASCII_INTEL_L_NEW, 57, 14, true,  {C_BG_CYAN, C_BG_WHITE, C_BG_BLUE}, {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_arm_l       = { ASCII_ARM_L,       60,  8, true,  {C_BG_CYAN},                        {C_FG_WHITE, C_FG_CYAN}      };
+asciiL logo_ibm_l       = { ASCII_IBM_L,       62, 13, true,  {C_BG_CYAN, C_FG_WHITE},            {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_unknown     = { NULL,               0,  0, false, {COLOR_NONE},                       {COLOR_NONE, COLOR_NONE}     };
+
 #endif

src/common/cpu.c

@@ -33,7 +33,14 @@ int64_t get_freq(struct frequency* freq) {
 }
 
 #if defined(ARCH_X86) || defined(ARCH_PPC)
-char* get_str_cpu_name(struct cpuInfo* cpu) {
+char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname) {
+  #ifdef ARCH_X86
+  if(!fcpuname) {
+    return get_str_cpu_name_abbreviated(cpu);
+  }
+  #elif ARCH_PPC
+  UNUSED(fcpuname);
+  #endif
   return cpu->cpu_name;
 }
 
@@ -141,7 +148,7 @@ char* get_str_freq(struct frequency* freq) {
   char* string = emalloc(sizeof(char)*size);
   memset(string, 0, sizeof(char)*size);
 
-  if(freq->max == UNKNOWN_FREQ || freq->max < 0)
+  if(freq->max == UNKNOWN_DATA || freq->max < 0)
     snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN);
   else if(freq->max >= 1000)
     snprintf(string,size,"%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000);

src/common/cpu.h

@@ -10,6 +10,7 @@ enum {
   CPU_VENDOR_AMD,
 // ARCH_ARM
   CPU_VENDOR_ARM,
+  CPU_VENDOR_APPLE,
   CPU_VENDOR_BROADCOM,
   CPU_VENDOR_CAVIUM,
   CPU_VENDOR_NVIDIA,
@@ -18,6 +19,7 @@ enum {
   CPU_VENDOR_HUAWUEI,
   CPU_VENDOR_SAMSUNG,
   CPU_VENDOR_MARVELL,
+  CPU_VENDOR_PHYTIUM,
 // OTHERS
   CPU_VENDOR_UNKNOWN,
   CPU_VENDOR_INVALID
@@ -33,7 +35,13 @@ enum {
   HV_VENDOR_INVALID
 };
 
-#define UNKNOWN_FREQ -1
+enum {
+  CORE_TYPE_EFFICIENCY,
+  CORE_TYPE_PERFORMANCE,
+  CORE_TYPE_UNKNOWN
+};
+
+#define UNKNOWN_DATA -1
 #define CPU_NAME_MAX_LENGTH 64
 
 typedef int32_t VENDOR;
@@ -70,12 +78,13 @@ struct topology {
   int32_t total_cores;  
   struct cache* cach;
 #if defined(ARCH_X86) || defined(ARCH_PPC)
-  uint32_t physical_cores;
-  uint32_t logical_cores;
+  int32_t physical_cores;
+  int32_t logical_cores;
   uint32_t sockets;
   uint32_t smt_supported; // Number of SMT that CPU supports (equal to smt_available if SMT is enabled)
 #ifdef ARCH_X86
   uint32_t smt_available; // Number of SMT that is currently enabled
+  int32_t total_cores_module; // Total cores in the current module (only makes sense in hybrid archs, like ADL)
   struct apic* apic;
 #endif
 #endif
@@ -129,6 +138,10 @@ struct cpuInfo {
   uint32_t maxExtendedLevels;
   // Topology Extensions (AMD only)
   bool topology_extensions;
+  // Hybrid Flag (Intel only)
+  bool hybrid_flag;
+  // Core Type (P/E)
+  uint32_t core_type;
 #elif ARCH_PPC
   uint32_t pvr;
 #elif ARCH_ARM
@@ -138,16 +151,23 @@ struct cpuInfo {
 
 #ifdef ARCH_ARM
   struct system_on_chip* soc;
+#endif
+
+#if defined(ARCH_X86) || defined(ARCH_ARM)
   // If SoC contains more than one CPU and they
   // are different, the others will be stored in
   // the next_cpu field
   struct cpuInfo* next_cpu;
   uint8_t num_cpus;
+#ifdef ARCH_X86
+  // The index of the first core in the module
+  uint32_t first_core_id;
+#endif
 #endif
 };
 
 #if defined(ARCH_X86) || defined(ARCH_PPC)
-char* get_str_cpu_name(struct cpuInfo* cpu);
+char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname);
 char* get_str_sockets(struct topology* topo);
 uint32_t get_nsockets(struct topology* topo);
 #endif

src/common/global.c

@@ -58,9 +58,9 @@ void printBug(const char *fmt, ...) {
   va_end(args);
   fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
 #if defined(ARCH_X86) || defined(ARCH_PPC)
-  fprintf(stderr,"Please, create a new issue with this error message and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
+  fprintf(stderr, "Please, create a new issue with this error message, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
 #elif ARCH_ARM
-  fprintf(stderr,"Please, create a new issue with this error message, your smartphone/computer model and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
+  fprintf(stderr, "Please, create a new issue with this error message, your smartphone/computer model, the output of 'cpufetch --verbose' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
 #endif
 }
 
@@ -73,6 +73,23 @@ int max(int a, int b) {
   return a > b ? a : b;
 }
 
+int min(int a, int b) {
+  return a < b ? a : b;
+}
+
+char *strremove(char *str, const char *sub) {
+  char *p, *q, *r;
+  if (*sub && (q = r = strstr(str, sub)) != NULL) {
+    size_t len = strlen(sub);
+    while ((r = strstr(p = r + len, sub)) != NULL) {
+      memmove(q, p, r - p);
+      q += r - p;
+    }
+    memmove(q, p, strlen(p) + 1);
+  }
+  return str;
+}
+
 void* emalloc(size_t size) {
   void* ptr = malloc(size);
 
@@ -94,3 +111,15 @@ void* ecalloc(size_t nmemb, size_t size) {
 
   return ptr;
 }
+
+void* erealloc(void *ptr, size_t size) {
+  void* newptr = realloc(ptr, size);
+
+  if(newptr == NULL) {
+    printErr("realloc failed: %s", strerror(errno));
+    exit(1);
+  }
+
+  return newptr;
+}
+

src/common/global.h

@@ -5,13 +5,17 @@
 #include <stddef.h>
 
 #define STRING_UNKNOWN "Unknown"
+#define UNUSED(x) (void)(x)
 
 void set_log_level(bool verbose);
 void printWarn(const char *fmt, ...);
 void printErr(const char *fmt, ...);
 void printBug(const char *fmt, ...);
+int min(int a, int b);
 int max(int a, int b);
+char *strremove(char *str, const char *sub);
 void* emalloc(size_t size);
 void* ecalloc(size_t nmemb, size_t size);
+void* erealloc(void *ptr, size_t size);
 
 #endif

src/common/main.c

@@ -33,7 +33,7 @@
   static const char* OS_STR = "Unknown OS";
 #endif
 
-static const char* VERSION = "0.99";
+static const char* VERSION = "1.03";
 
 void print_help(char *argv[]) {
   const char **t = args_str;
@@ -43,49 +43,67 @@ void print_help(char *argv[]) {
   printf("Usage: %s [OPTION]...\n", argv[0]);
   printf("Simple yet fancy CPU architecture fetching tool\n\n");
 
-  printf("Options: \n");
+  printf("OPTIONS: \n");
   printf("  -%c, --%s %*s Set the color scheme (by default, cpufetch uses the system color scheme)\n", c[ARG_COLOR], t[ARG_COLOR], (int) (max_len-strlen(t[ARG_COLOR])), "");
-  printf("  -%c, --%s %*s Set the style of CPU art\n", c[ARG_STYLE], t[ARG_STYLE], (int) (max_len-strlen(t[ARG_STYLE])), "");
+  printf("  -%c, --%s %*s Set the style of CPU logo\n", c[ARG_STYLE], t[ARG_STYLE], (int) (max_len-strlen(t[ARG_STYLE])), "");
 #ifdef ARCH_X86
-  printf("  -%c, --%s %*s Prints CPU model and cpuid levels (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
+  printf("  -%c, --%s %*s Print CPU model and cpuid levels (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
+#elif ARCH_PPC
+  printf("  -%c, --%s %*s Print PVR register (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
 #elif ARCH_ARM
-  printf("  -%c, --%s %*s Prints main ID register values for all cores (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
+  printf("  -%c, --%s %*s Print main ID register values (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
 #endif
-  printf("  -%c, --%s %*s Prints extra information (if available) about how cpufetch tried fetching information\n", c[ARG_VERBOSE], t[ARG_VERBOSE], (int) (max_len-strlen(t[ARG_VERBOSE])), "");
+  printf("      --%s %*s Show the short version of the logo\n", t[ARG_LOGO_SHORT], (int) (max_len-strlen(t[ARG_LOGO_SHORT])), "");
+  printf("      --%s %*s Show the long version of the logo\n", t[ARG_LOGO_LONG], (int) (max_len-strlen(t[ARG_LOGO_LONG])), "");
+  printf("  -%c, --%s %*s Print extra information (if available) about how cpufetch tried fetching information\n", c[ARG_VERBOSE], t[ARG_VERBOSE], (int) (max_len-strlen(t[ARG_VERBOSE])), "");
 #ifdef ARCH_X86
-  printf("  -%c, --%s %*s Prints raw cpuid data\n", c[ARG_RAW], t[ARG_RAW], (int) (max_len-strlen(t[ARG_RAW])), "");
+#ifdef __linux__
+  printf("      --%s %*s Compute the peak performance accurately (measure the CPU frequency instead of using the maximum)\n", t[ARG_ACCURATE_PP], (int) (max_len-strlen(t[ARG_ACCURATE_PP])), "");
 #endif
-  printf("  -%c, --%s %*s Prints this help and exit\n", c[ARG_HELP], t[ARG_HELP], (int) (max_len-strlen(t[ARG_HELP])), "");
-  printf("  -%c, --%s %*s Prints cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");
+  printf("      --%s %*s Show the old Intel logo\n", t[ARG_LOGO_INTEL_OLD], (int) (max_len-strlen(t[ARG_LOGO_INTEL_OLD])), "");
+  printf("      --%s %*s Show the new Intel logo\n", t[ARG_LOGO_INTEL_NEW], (int) (max_len-strlen(t[ARG_LOGO_INTEL_NEW])), "");
+  printf("  -%c, --%s %*s Show the full CPU name (do not abbreviate it)\n", c[ARG_FULLCPUNAME], t[ARG_FULLCPUNAME], (int) (max_len-strlen(t[ARG_FULLCPUNAME])), "");
+  printf("  -%c, --%s %*s Print raw cpuid data (debug purposes)\n", c[ARG_RAW], t[ARG_RAW], (int) (max_len-strlen(t[ARG_RAW])), "");
+#endif
+  printf("  -%c, --%s %*s Print this help and exit\n", c[ARG_HELP], t[ARG_HELP], (int) (max_len-strlen(t[ARG_HELP])), "");
+  printf("  -%c, --%s %*s Print cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");
 
   printf("\nCOLORS: \n");
   printf("  * \"intel\":     Use Intel default color scheme \n");
   printf("  * \"amd\":       Use AMD default color scheme \n");
   printf("  * \"ibm\",       Use IBM default color scheme \n");
   printf("  * \"arm\":       Use ARM default color scheme \n");
-  printf("  * custom:      If color argument do not match \"intel\", \"amd\", \"ibm\" or \"arm\", a custom scheme can be specified.\n");
-  printf("                 4 colors must be given in RGB with the format: R,G,B:R,G,B:...\n");
-  printf("                 The first 2 colors are the CPU art color and the next 2 colors are the text colors\n");
+  printf("  * custom:      If the argument of --color does not match any of the previous strings, a custom scheme can be specified.\n");
+  printf("                 5 colors must be given in RGB with the format: R,G,B:R,G,B:...\n");
+  printf("                 The first 3 colors are the CPU art color and the next 2 colors are the text colors\n");
 
   printf("\nSTYLES: \n");
   printf("  * \"fancy\":     Default style\n");
   printf("  * \"retro\":     Old cpufetch style\n");
   printf("  * \"legacy\":    Fallback style for terminals that do not support colors\n");
 
+  printf("\nLOGOS: \n");
+  printf("    cpufetch will try to adapt the logo size and the text to the terminal width. When the output (logo and text) is wider than\n");
+  printf("    the terminal width, cpufetch will print a smaller version of the logo (if it exists). This behavior can be overridden by\n");
+  printf("    --logo-short  and --logo-long, which always sets the logo size as specified by the user, even if it is too big. After the\n");
+  printf("    logo selection (either automatically or set by the user), cpufetch will check again if the output fits in the terminal.\n");
+  printf("    If not, it will use a shorter name for the fields (the left part of the text). If, after all of this, the output still does\n");
+  printf("    not fit, cpufetch will cut the text and will only print the text until there is no space left in each line\n");
+
   printf("\nEXAMPLES: \n");
   printf("    Run cpufetch with Intel color scheme:\n");
   printf("      ./cpufetch --color intel\n");
   printf("    Run cpufetch with a custom color scheme:\n");
-  printf("    ./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200\n");
+  printf("      ./cpufetch --color 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200\n");
 
   printf("\nBUGS: \n");
   printf("    Report bugs to https://github.com/Dr-Noob/cpufetch/issues\n");
 
   printf("\nNOTE: \n");
   printf("    Peak performance information is NOT accurate. cpufetch computes peak performance using the max\n");
-  printf("    frequency. However, to properly compute peak performance, you need to know the frequency of the\n");
-  printf("    CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU.\n");
-  printf("    For peak performance measurement see: https://github.com/Dr-Noob/peakperf\n");
+  printf("    frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the\n");
+  printf("    CPU running AVX code. This value is not be fetched by cpufetch since it depends on each specific CPU.\n");
+  printf("    To correctly measure peak performance, see: https://github.com/Dr-Noob/peakperf\n");
 }
 
 void print_version() {
@@ -118,6 +136,7 @@ int main(int argc, char* argv[]) {
     return EXIT_SUCCESS;
   }
 
+  // TODO: This should be moved to the end of args.c
   if(show_raw()) {
   #ifdef ARCH_X86
     print_version();
@@ -129,7 +148,7 @@ int main(int argc, char* argv[]) {
   #endif
   }
 
-  if(print_cpufetch(cpu, get_style(), get_colors()))
+  if(print_cpufetch(cpu, get_style(), get_colors(), show_full_cpu_name()))
     return EXIT_SUCCESS;
   else
     return EXIT_FAILURE;

src/common/printer.h

@@ -13,15 +13,19 @@ typedef int STYLE;
   #include "../arm/midr.h"
 #endif
 
-#define COLOR_DEFAULT_INTEL "15,125,194:230,230,230:40,150,220:230,230,230"
-#define COLOR_DEFAULT_AMD   "250,250,250:0,154,102:250,250,250:0,154,102"
-#define COLOR_DEFAULT_IBM   "92,119,172:92,119,172:240,240,240:92,119,172"
-#define COLOR_DEFAULT_ARM   "0,145,189:0,145,189:240,240,240:0,145,189"
+//                              +-----------------------------------+-----------------------+
+//                              | Color logo                        | Color text            |
+//                              | Color 1   | Color 2   | Color 3   | Color 1   | Color 2   |
+#define COLOR_DEFAULT_INTEL     "015,125,194:230,230,230:000,000,000:040,150,220:230,230,230"
+#define COLOR_DEFAULT_INTEL_NEW "030,204,251:250,250,250:000,104,181:230,230,230:030,204,251"
+#define COLOR_DEFAULT_AMD       "250,250,250:000,154,102:000,000,000:250,250,250:000,154,102"
+#define COLOR_DEFAULT_IBM       "092,119,172:092,119,172:000,000,000:240,240,240:092,119,172"
+#define COLOR_DEFAULT_ARM       "000,145,189:000,145,189:000,000,000:240,240,240:000,145,189"
 
 #ifdef ARCH_X86
 void print_levels(struct cpuInfo* cpu);
 #endif
 
-bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct color** cs);
+bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct color** cs, bool fcpuname);
 
 #endif

src/common/udev.c

@@ -2,6 +2,48 @@
 #include "global.h"
 #include "cpu.h"
 
+// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
+int get_ncores_from_cpuinfo() {
+  // Examples:
+  // 0-271
+  // 0-7
+  // 0
+
+  int filelen;
+  char* buf;
+  if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
+    printWarn("read_file: %s: %s\n", _PATH_CPUS_PRESENT, strerror(errno));
+    return -1;
+  }
+
+  int ncores;
+  char* tmp1;
+  if((tmp1 = strstr(buf, "-")) == NULL) {
+    // file contains no - character, we assume that it contains 0,
+    // which means that the CPU contains only one core
+    return 1;
+  }
+  else {
+    tmp1++;
+  }
+  char* tmp2 = strstr(buf, "\n");
+  char ncores_str[filelen];
+  memset(ncores_str, 0, sizeof(char) * filelen);
+  memcpy(ncores_str, tmp1, tmp2-tmp1);
+
+  char* end;
+  errno = 0;
+  ncores = strtol(ncores_str, &end, 10) + 1;
+  if(errno != 0) {
+    printWarn("strtol: %s:\n", strerror(errno));
+    return -1;
+  }
+
+  free(buf);
+
+  return ncores;
+}
+
 char* read_file(char* path, int* len) {
   int fd = open(path, O_RDONLY);
 
@@ -12,13 +54,18 @@ char* read_file(char* path, int* len) {
   //File exists, read it
   int bytes_read = 0;
   int offset = 0;
-  int block = 128;
-  char* buf = emalloc(sizeof(char)*DEFAULT_FILE_SIZE);
-  memset(buf, 0, sizeof(char)*DEFAULT_FILE_SIZE);
+  int block = 1024;
+  int buf_size = block * 4;
+  char* buf = emalloc(sizeof(char) * buf_size);
 
-  while (  (bytes_read = read(fd, buf+offset, block)) > 0 ) {
+  while ((bytes_read = read(fd, buf+offset, block)) > 0) {
     offset += bytes_read;
+    if(offset + block > buf_size) {
+      buf = erealloc(buf, sizeof(char) * (buf_size + block));
+      buf_size += block;
     }
+  }
+  buf[offset] = '\0';
 
   if (close(fd) == -1) {
     return NULL;
@@ -33,7 +80,7 @@ long get_freq_from_file(char* path) {
   char* buf;
   if((buf = read_file(path, &filelen)) == NULL) {
     printWarn("Could not open '%s'", path);
-    return UNKNOWN_FREQ;
+    return UNKNOWN_DATA;
   }
 
   char* end;
@@ -42,7 +89,7 @@ long get_freq_from_file(char* path) {
   if(errno != 0) {
     printBug("strtol: %s", strerror(errno));
     free(buf);
-    return UNKNOWN_FREQ;
+    return UNKNOWN_DATA;
   }
 
   // We will be getting the frequency in KHz
@@ -50,7 +97,7 @@ long get_freq_from_file(char* path) {
   // greater than 10 GHz or less than 100 MHz
   if(ret > 10000 * 1000 || ret <  100 * 1000) {
     printBug("Invalid data was read from file '%s': %ld\n", path, ret);
-    return UNKNOWN_FREQ;
+    return UNKNOWN_DATA;
   }
 
   free(buf);
@@ -118,48 +165,85 @@ long get_l3_cache_size(uint32_t core) {
   return get_cache_size_from_file(path);
 }
 
+void add_shared_map(uint32_t** src, int src_idx, uint32_t** dst, int dst_idx, int n) {
+  for(int j=0; j < n; j++) {
+    dst[dst_idx][j] = src[src_idx][j];
+  }
+}
+
+bool maps_equal(uint32_t* map1, uint32_t* map2, int n) {
+  for(int i=0; i < n; i++) {
+    if(map1[i] != map2[i]) return false;
+  }
+  return true;
+}
+
 int get_num_caches_from_files(char** paths, int num_paths) {
-  int SHARED_MAP_MAX_LEN = 8 + 1;
   int filelen;
   char* buf;
-  uint32_t* shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
+  char* tmpbuf;
 
-  // 1. Read cpu_shared_map from every core
+  // 1. Count the number of bitmasks per file
+  if((buf = read_file(paths[0], &filelen)) == NULL) {
+    printWarn("Could not open '%s'", paths[0]);
+    return -1;
+  }
+  int num_bitmasks = 1;
+  for(int i=0; buf[i]; i++) {
+    num_bitmasks += (buf[i] == ',');
+  }
+
+  // 2. Read cpu_shared_map from every core
+  uint32_t** shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
   for(int i=0; i < num_paths; i++) {
+    shared_maps[i] = emalloc(sizeof(uint32_t) * num_bitmasks);
+
     if((buf = read_file(paths[i], &filelen)) == NULL) {
       printWarn("Could not open '%s'", paths[i]);
       return -1;
     }
 
-    if(filelen > SHARED_MAP_MAX_LEN) {
-      printBug("Shared map length is %d while the max is be %d", filelen, SHARED_MAP_MAX_LEN);
-      return -1;
-    }
-
+    for(int j=0; j < num_bitmasks; j++) {
       char* end;
+      tmpbuf = emalloc(sizeof(char) * (strlen(buf) + 1));
+      char* commaend = strstr(buf, ",");
+      if(commaend == NULL) {
+        strcpy(tmpbuf, buf);
+      }
+      else {
+        strncpy(tmpbuf, buf, commaend-buf);
+      }
       errno = 0;
-    long ret = strtol(buf, &end, 16);
+      long ret = strtol(tmpbuf, &end, 16);
       if(errno != 0) {
-      printBug("strtol: %s", strerror(errno));
+        printf("strtol: %s", strerror(errno));
         free(buf);
         return -1;
       }
 
-    shared_maps[i] = (uint32_t) ret;
+      shared_maps[i][j] = (uint32_t) ret;
+      buf = commaend + 1;
+      free(tmpbuf);
+    }
   }
 
   // 2. Count number of different masks; this is the number of caches
   int num_caches = 0;
   bool found = false;
-  uint32_t* unique_shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
-  for(int i=0; i < num_paths; i++) unique_shared_maps[i] = 0;
+  uint32_t** unique_shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
+  for(int i=0; i < num_paths; i++) {
+    unique_shared_maps[i] = emalloc(sizeof(uint32_t) * num_bitmasks);
+    for(int j=0; j < num_bitmasks; j++) {
+      unique_shared_maps[i][j] = 0;
+    }
+  }
 
   for(int i=0; i < num_paths; i++) {
     for(int j=0; j < num_paths && !found; j++) {
-      if(shared_maps[i] == unique_shared_maps[j]) found = true;
+      if(maps_equal(shared_maps[i], unique_shared_maps[j], num_bitmasks)) found = true;
     }
     if(!found) {
-      unique_shared_maps[num_caches] = shared_maps[i];
+      add_shared_map(shared_maps, i, unique_shared_maps, num_caches, num_bitmasks);
       num_caches++;
     }
     found = false;

src/common/udev.h

@@ -23,10 +23,10 @@
 #define _PATH_CACHE_L3          "/cache/index3"
 #define _PATH_CACHE_SIZE        "/size"
 #define _PATH_CACHE_SHARED_MAP  "/shared_cpu_map"
+#define _PATH_CPUS_PRESENT           _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
 
 #define _PATH_FREQUENCY_MAX_LEN 100
 #define _PATH_CACHE_MAX_LEN     200
-#define DEFAULT_FILE_SIZE       4096
 
 char* read_file(char* path, int* len);
 long get_max_freq_from_file(uint32_t core);
@@ -36,5 +36,6 @@ long get_l1d_cache_size(uint32_t core);
 long get_l2_cache_size(uint32_t core);
 long get_l3_cache_size(uint32_t core);
 int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level);
+int get_ncores_from_cpuinfo();
 
 #endif

src/ppc/ppc.c

@@ -139,7 +139,7 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t
    */
 
   //First check we have consistent data
-  if(freq == UNKNOWN_FREQ) {
+  if(freq == UNKNOWN_DATA) {
     return -1;
   }
 
@@ -181,9 +181,6 @@ struct cpuInfo* get_cpu_info() {
   feat->altivec = has_altivec(cpu->arch);
   cpu->peak_performance = get_peak_performance(cpu, cpu->topo, get_freq(cpu->freq));
 
-  if(cpu->cach == NULL || cpu->topo == NULL) {
-    return NULL;
-  }
   return cpu;
 }
 

src/ppc/ppc.h

@@ -1,5 +1,5 @@
-#ifndef __POWERPC__
-#define __POWERPC__
+#ifndef __CPUFETCH_POWERPC__
+#define __CPUFETCH_POWERPC__
 
 #include "../common/cpu.h"
 

src/ppc/uarch.c

@@ -3,7 +3,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
-#include <sys/auxv.h>
 #include <errno.h>
 
 #include "uarch.h"

src/x86/apic.c

@@ -7,8 +7,6 @@
 #elif defined __FreeBSD__
   #include <sys/param.h>
   #include <sys/cpuset.h>
-#elif defined __APPLE__
-  #define UNUSED(x) (void)(x)
 #endif
 
 #include <stdlib.h>
@@ -102,6 +100,61 @@ bool bind_to_cpu(int cpu_id) {
 }
 #endif
 
+#ifdef __linux__
+int get_total_cores_module(int total_cores, int module) {
+  int total_modules = 2;
+  int32_t current_module_idx = -1;
+  bool end = false;
+  int32_t* core_types = emalloc(sizeof(uint32_t) * total_modules);
+  for(int i=0; i < total_modules; i++) core_types[i] = -1;
+  int cores_in_module = 0;
+  int i = 0;
+
+  // Get the original mask to restore it later
+  cpu_set_t original_mask;
+  if(sched_getaffinity(0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_getaffinity: %s", strerror(errno));
+    return false;
+  }
+
+  while(!end) {
+    if(!bind_to_cpu(i)) {
+      return -1;
+    }
+    uint32_t eax = 0x0000001A;
+    uint32_t ebx = 0;
+    uint32_t ecx = 0;
+    uint32_t edx = 0;
+    cpuid(&eax, &ebx, &ecx, &edx);
+    int32_t core_type = eax >> 24 & 0xFF;
+    bool found = false;
+
+    for(int j=0; j < total_modules && !found; j++) {
+      if(core_types[j] == core_type) found = true;
+    }
+    if(!found) {
+      current_module_idx++;
+      core_types[current_module_idx] = core_type;
+    }
+    if(current_module_idx == module) {
+      cores_in_module++;
+      if(i+1 == total_cores) end = true;
+    }
+    else if(cores_in_module > 0) end = true;
+    i++;
+  }
+
+  // Reset the original affinity
+  if (sched_setaffinity (0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_setaffinity: %s", strerror(errno));
+    return false;
+  }
+
+  //printf("Module %d has %d cores\n", module, cores_in_module);
+  return cores_in_module;
+}
+#endif
+
 bool fill_topo_masks_apic(struct topology* topo) {
   uint32_t eax = 0x00000001;
   uint32_t ebx = 0;
@@ -197,14 +250,14 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
   uint32_t max = 0;
 
   for(int i=0; i < topo->cach->max_cache_level; i++) {
-    for(int j=0; j < topo->total_cores; j++) {
+    for(int j=0; j < topo->total_cores_module; j++) {
       if(cache_id_apic[j][i] > max) max = cache_id_apic[j][i];
     }
   }
 
   max++;
-  if(max > (uint32_t) topo->total_cores) return max;
-  return topo->total_cores;
+  if(max > (uint32_t) topo->total_cores_module) return max;
+  return topo->total_cores_module;
 }
 
 bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
@@ -219,18 +272,18 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
   memset(apic_id, 0, sizeof(uint32_t) * size);
 
   // System topology
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
     sockets[apic_pkg[i]] = 1;
     smt[apic_smt[i]] = 1;
   }
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
     if(sockets[i] != 0)
       topo->sockets++;
     if(smt[i] != 0)
       topo->smt_available++;
   }
 
-  topo->logical_cores = topo->total_cores / topo->sockets;
+  topo->logical_cores = topo->total_cores_module / topo->sockets;
   topo->physical_cores = topo->logical_cores / topo->smt_available;
 
   // Cache topology
@@ -238,7 +291,7 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
     num_caches = 0;
     memset(apic_id, 0, sizeof(uint32_t) * size);
 
-    for(int c=0; c < topo->total_cores; c++) {
+    for(int c=0; c < topo->total_cores_module; c++) {
       apic_id[cache_id_apic[c][i]]++;
     }
     for(uint32_t c=0; c < size; c++) {
@@ -297,9 +350,10 @@ void add_apic_to_array(uint32_t apic, uint32_t* apic_ids, int n) {
   }
 }
 
-bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
+bool fill_apic_ids(uint32_t* apic_ids, int first_core, int n, bool x2apic_id) {
 #ifdef __APPLE__
   // macOS extremely dirty approach...
+  UNUSED(first_core);
   printf("cpufetch is computing APIC IDs, please wait...\n");
   bool end = false;
   uint32_t apic;
@@ -313,25 +367,43 @@ bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
     usleep(1000);
   }
 #else
-  for(int i=0; i < n; i++) {
-    if(!bind_to_cpu(i)) {
-      printErr("Failed binding to CPU %d", i);
+  #ifdef __linux__
+  // In Linux we reset the affinity; first we get the original mask
+  cpu_set_t original_mask;
+  if(sched_getaffinity(0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_getaffinity: %s", strerror(errno));
     return false;
   }
-    apic_ids[i] = get_apic_id(x2apic_id);
+  #endif
+
+  for(int i=first_core; i < first_core+n; i++) {
+    if(!bind_to_cpu(i)) {
+      printErr("Failed binding the process to CPU %d", i);
+      return false;
     }
+    apic_ids[i-first_core] = get_apic_id(x2apic_id);
+  }
+
+  #ifdef __linux__
+  // With the original mask previosly retrieved, we reset the affinity
+  if (sched_setaffinity (0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_setaffinity: %s", strerror(errno));
+    return false;
+  }
+  #endif
 #endif
+
   return true;
 }
 
 bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
   uint32_t apic_id;
-  uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
-  uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
+  uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores_module);
+  uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores_module);
+  uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores_module);
   bool x2apic_id;
 
   if(cpu->maxLevels >= 0x0000000B) {
@@ -349,7 +421,7 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
     x2apic_id = false;
   }
 
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
     cache_smt_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
     cache_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
   }
@@ -367,10 +439,10 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
 
   get_cache_topology_from_apic(topo);
 
-  if(!fill_apic_ids(apic_ids, topo->total_cores, x2apic_id))
+  if(!fill_apic_ids(apic_ids, cpu->first_core_id, topo->total_cores_module, x2apic_id))
     return false;
 
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
     apic_id = apic_ids[i];
 
     apic_pkg[i] = (apic_id & topo->apic->pkg_mask) >> topo->apic->pkg_mask_shift;
@@ -386,20 +458,19 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
   /* DEBUG
   for(int i=0; i < topo->cach->max_cache_level; i++) {
     printf("[CACH %1d]", i);
-    for(int j=0; j < topo->total_cores; j++)
+    for(int j=0; j < topo->total_cores_module; j++)
       printf("[%03d]", cache_id_apic[j][i]);
     printf("\n");
   }
-  for(int i=0; i < topo->total_cores; i++)
+  for(int i=0; i < topo->total_cores_module; i++)
     printf("[%2d] 0x%.8X\n", i, apic_pkg[i]);
   printf("\n");
-  for(int i=0; i < topo->total_cores; i++)
+  for(int i=0; i < topo->total_cores_module; i++)
     printf("[%2d] 0x%.8X\n", i, apic_core[i]);
   printf("\n");
-  for(int i=0; i < topo->total_cores; i++)
+  for(int i=0; i < topo->total_cores_module; i++)
     printf("[%2d] 0x%.8X\n", i, apic_smt[i]);*/
 
-
   bool ret = build_topo_from_apic(apic_pkg, apic_smt, cache_id_apic, topo);
 
   // Assumption: If we cant get smt_available, we assume it is equal to smt_supported...
@@ -411,7 +482,7 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
   free(apic_pkg);
   free(apic_core);
   free(apic_smt);
-  for(int i=0; i < topo->total_cores; i++) {
+  for(int i=0; i < topo->total_cores_module; i++) {
     free(cache_smt_id_apic[i]);
     free(cache_id_apic[i]);
   }

src/x86/apic.h

@@ -21,4 +21,8 @@ uint32_t is_smt_enabled_amd(struct topology* topo);
 bool bind_to_cpu(int cpu_id);
 #endif
 
+#ifdef __linux__
+int get_total_cores_module(int total_cores, int module);
+#endif
+
 #endif

src/x86/cpuid.c

@@ -15,8 +15,10 @@
 #include "cpuid.h"
 #include "cpuid_asm.h"
 #include "../common/global.h"
+#include "../common/args.h"
 #include "apic.h"
 #include "uarch.h"
+#include "freq/freq.h"
 
 #define CPU_VENDOR_INTEL_STRING "GenuineIntel"
 #define CPU_VENDOR_AMD_STRING   "AuthenticAMD"
@@ -116,6 +118,50 @@ char* get_str_cpu_name_internal() {
   return name;
 }
 
+bool abbreviate_intel_cpu_name(char** name) {
+  char* old_name = *name;
+  char* new_name = ecalloc(strlen(old_name) + 1, sizeof(char));
+
+  char* old_name_ptr = old_name;
+  char* new_name_ptr = new_name;
+  char* aux_ptr = NULL;
+
+  // 1. Remove "(R)"
+  old_name_ptr = strstr(old_name_ptr, "Intel(R)");
+  if(old_name_ptr == NULL) return false;
+  strcpy(new_name_ptr, "Intel");
+  new_name_ptr += strlen("Intel");
+  old_name_ptr += strlen("Intel(R)");
+
+  // 2. Remove "(R)" or "(TM)"
+  aux_ptr = strstr(old_name_ptr, "(");
+  if(aux_ptr == NULL) return false;
+  strncpy(new_name_ptr, old_name_ptr, aux_ptr-old_name_ptr);
+
+  new_name_ptr += aux_ptr-old_name_ptr;
+  strcpy(new_name_ptr, " ");
+  new_name_ptr++;
+  old_name_ptr = strstr(aux_ptr, ")");
+  if(old_name_ptr == NULL) return false;
+  old_name_ptr++;
+  while(*old_name_ptr == ' ') old_name_ptr++;
+
+  // 3. Copy the CPU name
+  aux_ptr = strstr(old_name_ptr, "@");
+  if(aux_ptr == NULL) return false;
+  strncpy(new_name_ptr, old_name_ptr, (aux_ptr-1)-old_name_ptr);
+
+  // 4. Remove dummy strings in Intel CPU names
+  strremove(new_name, " CPU");
+  strremove(new_name, " Dual");
+  strremove(new_name, " 0");
+
+  free(old_name);
+  *name = new_name;
+
+  return true;
+}
+
 struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
   uint32_t eax = 0x00000001;
   uint32_t ebx = 0;
@@ -130,10 +176,10 @@ struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
   uint32_t family = (eax >> 8) & 0xF;
   uint32_t efamily = (eax >> 20) & 0xFF;
 
-  return get_uarch_from_cpuid(cpu, efamily, family, emodel, model, (int)stepping);
+  return get_uarch_from_cpuid(cpu, eax, efamily, family, emodel, model, (int)stepping);
 }
 
-int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq) {
+int64_t get_peak_performance(struct cpuInfo* cpu, bool accurate_pp) {
   /*
    * PP = PeakPerformance
    * SP = SinglePrecision
@@ -146,13 +192,32 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t
    * 16(If AVX512), 8(If AVX), 4(If SSE) *
    */
 
+  struct cpuInfo* ptr = cpu;
+  int64_t total_flops = 0;
+
+  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    struct topology* topo = ptr->topo;
+    int64_t max_freq = get_freq(ptr->freq);
+
+    int64_t freq;
+  #ifdef __linux__
+    if(accurate_pp)
+      freq = measure_frequency(ptr);
+    else
+      freq = max_freq;
+  #else
+    // Silence compiler warning
+    (void)(accurate_pp);
+    freq = max_freq;
+  #endif
+
     //First, check we have consistent data
-  if(freq == UNKNOWN_FREQ) {
+    if(freq == UNKNOWN_DATA || topo->logical_cores == UNKNOWN_DATA) {
       return -1;
     }
 
-  struct features* feat = cpu->feat;
-  int vpus = get_number_of_vpus(cpu);
+    struct features* feat = ptr->feat;
+    int vpus = get_number_of_vpus(ptr);
     int64_t flops = topo->physical_cores * topo->sockets * (freq*1000000) * vpus;
 
     if(feat->FMA3 || feat->FMA4)
@@ -161,7 +226,7 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t
     // Ice Lake has AVX512, but it has 1 VPU for AVX512, while
     // it has 2 for AVX2. If this is a Ice Lake CPU, we are computing
     // the peak performance supposing AVX2, not AVX512
-  if(feat->AVX512 && vpus_are_AVX512(cpu))
+    if(feat->AVX512 && vpus_are_AVX512(ptr))
       flops = flops*16;
     else if(feat->AVX || feat->AVX2)
       flops = flops*8;
@@ -170,10 +235,13 @@ int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t
 
     // See https://sites.utexas.edu/jdm4372/2018/01/22/a-peculiar-
     // throughput-limitation-on-intels-xeon-phi-x200-knights-landing/
-  if(is_knights_landing(cpu))
+    if(is_knights_landing(ptr))
       flops = flops * 6 / 7;
 
-  return flops;
+    total_flops += flops;
+  }
+
+  return total_flops;
 }
 
 struct hypervisor* get_hp_info(bool hv_present) {
@@ -216,48 +284,19 @@ struct hypervisor* get_hp_info(bool hv_present) {
   return hv;
 }
 
-struct cpuInfo* get_cpu_info() {
-  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
-  struct features* feat = emalloc(sizeof(struct features));
-  cpu->feat = feat;
-
-  bool *ptr = &(feat->AES);
-  for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
-    *ptr = false;
-  }
-
+struct features* get_features_info(struct cpuInfo* cpu) {
   uint32_t eax = 0;
   uint32_t ebx = 0;
   uint32_t ecx = 0;
   uint32_t edx = 0;
 
-  //Get max cpuid level
-  cpuid(&eax, &ebx, &ecx, &edx);
-  cpu->maxLevels = eax;
+  struct features* feat = emalloc(sizeof(struct features));
 
-  //Fill vendor
-  char name[13];
-  memset(name,0,13);
-  get_name_cpuid(name, ebx, edx, ecx);
-
-  if(strcmp(CPU_VENDOR_INTEL_STRING,name) == 0)
-    cpu->cpu_vendor = CPU_VENDOR_INTEL;
-  else if (strcmp(CPU_VENDOR_AMD_STRING,name) == 0)
-    cpu->cpu_vendor = CPU_VENDOR_AMD;
-  else {
-    cpu->cpu_vendor = CPU_VENDOR_INVALID;
-    printErr("Unknown CPU vendor: %s", name);
-    return NULL;
+  bool *ptr = &(feat->AES);
+  for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
+    *ptr = false;
   }
 
-  //Get max extended level
-  eax = 0x80000000;
-  ebx = 0;
-  ecx = 0;
-  edx = 0;
-  cpuid(&eax, &ebx, &ecx, &edx);
-  cpu->maxExtendedLevels = eax;
-
   //Fill instructions support
   if (cpu->maxLevels >= 0x00000001){
     eax = 0x00000001;
@@ -312,6 +351,126 @@ struct cpuInfo* get_cpu_info() {
     printWarn("Can't read features information from cpuid (needed extended level is 0x%.8X, max is 0x%.8X)", 0x80000001, cpu->maxExtendedLevels);
   }
 
+  return feat;
+}
+
+bool set_cpu_module(int m, int total_modules, int32_t* first_core) {
+  if(total_modules > 1) {
+    #ifdef __APPLE__
+    UNUSED(m);
+    printBug("Hybrid architectures are not supported under macOS");
+    return false;
+    #else
+    // We have a hybrid architecture.
+    // 1. Find the first core from module m
+    int32_t core_id = -1;
+    int32_t currrent_module_idx = -1;
+    int32_t* core_types = emalloc(sizeof(uint32_t) * total_modules);
+    for(int i=0; i < total_modules; i++) core_types[i] = -1;
+    int i = 0;
+
+    while(core_id == -1) {
+      if(!bind_to_cpu(i)) {
+        return false;
+      }
+      uint32_t eax = 0x0000001A;
+      uint32_t ebx = 0;
+      uint32_t ecx = 0;
+      uint32_t edx = 0;
+      cpuid(&eax, &ebx, &ecx, &edx);
+      int32_t core_type = eax >> 24 & 0xFF;
+      bool found = false;
+
+      for(int j=0; j < total_modules && !found; j++) {
+        if(core_types[j] == core_type) found = true;
+      }
+      if(!found) {
+        currrent_module_idx++;
+        core_types[currrent_module_idx] = core_type;
+        if(currrent_module_idx == m) {
+          core_id = i;
+        }
+      }
+
+      i++;
+    }
+
+    *first_core = core_id;
+
+    //printf("Module %d: Core %d\n", m, core_id);
+    // 2. Now bind to that core
+    if(!bind_to_cpu(core_id)) {
+      return false;
+    }
+    #endif
+  }
+  else {
+    // This is a normal architecture
+    *first_core = 0;
+  }
+
+  return true;
+}
+
+int32_t get_core_type() {
+  uint32_t eax = 0x0000001A;
+  uint32_t ebx = 0;
+  uint32_t ecx = 0;
+  uint32_t edx = 0;
+
+  eax = 0x0000001A;
+  cpuid(&eax, &ebx, &ecx, &edx);
+
+  int32_t type = eax >> 24 & 0xFF;
+  if(type == 0x20) return CORE_TYPE_EFFICIENCY;
+  else if(type == 0x40) return CORE_TYPE_PERFORMANCE;
+  else {
+    printErr("Found invalid core type: 0x%.8X\n", type);
+    return CORE_TYPE_UNKNOWN;
+  }
+}
+
+struct cpuInfo* get_cpu_info() {
+  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
+  cpu->peak_performance = -1;
+  cpu->next_cpu = NULL;
+  cpu->topo = NULL;
+  cpu->cach = NULL;
+  cpu->feat = NULL;
+
+  uint32_t modules = 1;
+  uint32_t eax = 0;
+  uint32_t ebx = 0;
+  uint32_t ecx = 0;
+  uint32_t edx = 0;
+
+  //Get max cpuid level
+  cpuid(&eax, &ebx, &ecx, &edx);
+  cpu->maxLevels = eax;
+
+  //Fill vendor
+  char name[13];
+  memset(name,0,13);
+  get_name_cpuid(name, ebx, edx, ecx);
+
+  if(strcmp(CPU_VENDOR_INTEL_STRING,name) == 0)
+    cpu->cpu_vendor = CPU_VENDOR_INTEL;
+  else if (strcmp(CPU_VENDOR_AMD_STRING,name) == 0)
+    cpu->cpu_vendor = CPU_VENDOR_AMD;
+  else {
+    cpu->cpu_vendor = CPU_VENDOR_INVALID;
+    printErr("Unknown CPU vendor: %s", name);
+    return NULL;
+  }
+
+  //Get max extended level
+  eax = 0x80000000;
+  ebx = 0;
+  ecx = 0;
+  edx = 0;
+  cpuid(&eax, &ebx, &ecx, &edx);
+  cpu->maxExtendedLevels = eax;
+
   if (cpu->maxExtendedLevels >= 0x80000004){
     cpu->cpu_name = get_str_cpu_name_internal();
   }
@@ -328,15 +487,67 @@ struct cpuInfo* get_cpu_info() {
     cpu->topology_extensions = (ecx >> 22) & 1;
   }
 
-  cpu->arch = get_cpu_uarch(cpu);
-  cpu->freq = get_frequency_info(cpu);
-  cpu->cach = get_cache_info(cpu);
-  cpu->topo = get_topology_info(cpu, cpu->cach);
-  cpu->peak_performance = get_peak_performance(cpu, cpu->topo, get_freq(cpu->freq));
-
-  if(cpu->cach == NULL || cpu->topo == NULL) {
-    return NULL;
+  cpu->hybrid_flag = false;
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL && cpu->maxLevels >= 0x00000007) {
+    eax = 0x00000007;
+    ecx = 0x00000000;
+    cpuid(&eax, &ebx, &ecx, &edx);
+    cpu->hybrid_flag = (edx >> 15) & 0x1;
   }
+
+  if(cpu->hybrid_flag) modules = 2;
+
+  struct cpuInfo* ptr = cpu;
+  for(uint32_t i=0; i < modules; i++) {
+    int32_t first_core;
+    set_cpu_module(i, modules, &first_core);
+
+    if(i > 0) {
+      ptr->next_cpu = emalloc(sizeof(struct cpuInfo));
+      ptr = ptr->next_cpu;
+      ptr->next_cpu = NULL;
+      ptr->peak_performance = -1;
+      ptr->topo = NULL;
+      ptr->cach = NULL;
+      ptr->feat = NULL;
+      // We assume that this cores have the
+      // same cpuid capabilities
+      ptr->cpu_vendor = cpu->cpu_vendor;
+      ptr->maxLevels = cpu->maxLevels;
+      ptr->maxExtendedLevels = cpu->maxExtendedLevels;
+      ptr->hybrid_flag = cpu->hybrid_flag;
+    }
+
+    if(cpu->hybrid_flag) {
+      // Detect core type
+      eax = 0x0000001A;
+      cpuid(&eax, &ebx, &ecx, &edx);
+      ptr->core_type = get_core_type();
+    }
+    ptr->first_core_id = first_core;
+    ptr->feat = get_features_info(ptr);
+
+    // If any field of the struct is NULL,
+    // return inmideately, as further functions
+    // require valid fields (cach, topo, etc)
+    ptr->arch = get_cpu_uarch(ptr);
+    ptr->freq = get_frequency_info(ptr);
+
+    ptr->cach = get_cache_info(ptr);
+    if(ptr->cach == NULL) return cpu;
+
+    if(cpu->hybrid_flag) {
+      ptr->topo = get_topology_info(ptr, ptr->cach, i);
+    }
+    else {
+      ptr->topo = get_topology_info(ptr, ptr->cach, -1);
+    }
+    if(cpu->topo == NULL) return cpu;
+  }
+
+  cpu->num_cpus = modules;
+  cpu->peak_performance = get_peak_performance(cpu, accurate_pp());
+
   return cpu;
 }
 
@@ -414,9 +625,19 @@ bool get_cache_topology_amd(struct cpuInfo* cpu, struct topology* topo) {
   return true;
 }
 
+void get_topology_from_udev(struct topology* topo) {
+  // TODO: To be improved in the future
+  topo->total_cores = get_ncores_from_cpuinfo();
+  topo->logical_cores = topo->total_cores;
+  topo->physical_cores = topo->total_cores;
+  topo->smt_available = 1;
+  topo->smt_supported = 1;
+  topo->sockets = 1;
+}
+
 // Main reference: https://software.intel.com/content/www/us/en/develop/articles/intel-64-architecture-processor-topology-enumeration.html
 // Very interesting resource: https://wiki.osdev.org/Detecting_CPU_Topology_(80x86)
-struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach) {
+struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int module) {
   struct topology* topo = emalloc(sizeof(struct topology));
   init_topology_struct(topo, cach);
 
@@ -440,10 +661,34 @@ struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach) {
     }
   #endif
 
+  if(cpu->hybrid_flag) {
+    #ifdef __linux__
+      topo->total_cores_module = get_total_cores_module(topo->total_cores, module);
+    #else
+      UNUSED(module);
+      topo->total_cores_module = topo->total_cores;
+    #endif
+  }
+  else {
+    topo->total_cores_module = topo->total_cores;
+  }
+
   switch(cpu->cpu_vendor) {
     case CPU_VENDOR_INTEL:
       if (cpu->maxLevels >= 0x00000004) {
-        get_topology_from_apic(cpu, topo);
+        bool toporet = get_topology_from_apic(cpu, topo);
+        if(!toporet) {
+          #ifdef __linux__
+            printWarn("Failed to retrieve topology from APIC, using udev...\n");
+            get_topology_from_udev(topo);
+          #else
+            printErr("Failed to retrieve topology from APIC, assumming default values...\n");
+            topo->logical_cores = UNKNOWN_DATA;
+            topo->physical_cores = UNKNOWN_DATA;
+            topo->smt_available = 1;
+            topo->smt_supported = 1;
+          #endif
+        }
       }
       else {
         printWarn("Can't read topology information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000001, cpu->maxLevels);
@@ -654,16 +899,16 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
   if(cpu->maxLevels < 0x00000016) {
     #if defined (_WIN32) || defined (__APPLE__)
       printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x00000016, cpu->maxLevels);
-      freq->base = UNKNOWN_FREQ;
-      freq->max = UNKNOWN_FREQ;
+      freq->base = UNKNOWN_DATA;
+      freq->max = UNKNOWN_DATA;
     #else
       printWarn("Can't read frequency information from cpuid (needed level is 0x%.8X, max is 0x%.8X). Using udev", 0x00000016, cpu->maxLevels);
-      freq->base = UNKNOWN_FREQ;
+      freq->base = UNKNOWN_DATA;
       freq->max = get_max_freq_from_file(0);
 
       if(freq->max == 0) {
         printWarn("Read max CPU frequency from udev and got 0 MHz");
-        freq->max = UNKNOWN_FREQ;
+        freq->max = UNKNOWN_DATA;
       }
     #endif
   }
@@ -680,7 +925,7 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
 
     if(freq->base == 0) {
       printWarn("Read base CPU frequency from CPUID and got 0 MHz");
-      freq->base = UNKNOWN_FREQ;
+      freq->base = UNKNOWN_DATA;
     }
     if(freq->max == 0) {
       printWarn("Read max CPU frequency from CPUID and got 0 MHz");
@@ -690,10 +935,10 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
 
         if(freq->max == 0) {
           printWarn("Read max CPU frequency from udev and got 0 MHz");
-          freq->max = UNKNOWN_FREQ;
+          freq->max = UNKNOWN_DATA;
         }
       #else
-        freq->max = UNKNOWN_FREQ;
+        freq->max = UNKNOWN_DATA;
       #endif
     }
   }
@@ -702,11 +947,24 @@ struct frequency* get_frequency_info(struct cpuInfo* cpu) {
 }
 
 // STRING FUNCTIONS
+char* get_str_cpu_name_abbreviated(struct cpuInfo* cpu) {
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
+    if(!abbreviate_intel_cpu_name(&cpu->cpu_name)) {
+      printWarn("Failed to abbreviate CPU name");
+    }
+  }
+  return cpu->cpu_name;
+}
+
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket) {
   int topo_sockets = dual_socket ? topo->sockets : 1;
   char* string;
 
-  if(topo->smt_supported > 1) {
+  if(topo->logical_cores == UNKNOWN_DATA) {
+    string = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN) + 1));
+    strcpy(string, STRING_UNKNOWN);
+  }
+  else if(topo->smt_supported > 1) {
     // 4 for digits, 21 for ' cores (SMT disabled)' which is the longest possible output
     uint32_t max_size = 4+21+1;
     string = emalloc(sizeof(char) * max_size);
@@ -818,6 +1076,9 @@ void print_debug(struct cpuInfo* cpu) {
   if(cpu->cpu_vendor == CPU_VENDOR_AMD) {
     printf("- AMD topology extensions: %d\n", cpu->topology_extensions);
   }
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
+    printf("- Hybrid Flag: %d\n", cpu->hybrid_flag);
+  }
   printf("- CPUID dump: 0x%.8X\n", eax);
 
   free_cpuinfo_struct(cpu);

src/x86/cpuid.h

@@ -6,12 +6,13 @@
 struct cpuInfo* get_cpu_info();
 struct cache* get_cache_info(struct cpuInfo* cpu);
 struct frequency* get_frequency_info(struct cpuInfo* cpu);
-struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach);
+struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, int module);
 
 char* get_str_avx(struct cpuInfo* cpu);
 char* get_str_sse(struct cpuInfo* cpu);
 char* get_str_fma(struct cpuInfo* cpu);
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket);
+char* get_str_cpu_name_abbreviated(struct cpuInfo* cpu);
 
 void print_debug(struct cpuInfo* cpu);
 void print_raw(struct cpuInfo* cpu);

src/x86/freq/freq.c

@@ -0,0 +1,146 @@
+#define  _GNU_SOURCE
+#include <stdio.h>
+
+#include "../../common/global.h"
+#include "../uarch.h"
+#include "freq.h"
+#include "freq_nov.h"
+#include "freq_avx.h"
+#include "freq_avx512.h"
+
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+
+#define MAX_NUMBER_THREADS         512
+#define FREQ_VECTOR_SIZE         1<<16
+
+struct freq_thread {
+  bool end;
+  bool measure;
+  double freq;
+};
+
+double vector_average_harmonic(double* v, int len) {
+  double acc = 0.0;
+  for(int i=0; i < len; i++) {
+    acc += 1 / v[i];
+  }
+  return len / acc;
+}
+
+void sleep_ms(int64_t ms) {
+  struct timespec ts;
+  ts.tv_sec = ms / 1000;
+  ts.tv_nsec = (ms % 1000) * 1000000;
+  nanosleep(&ts, &ts);
+}
+
+void* measure_freq(void *freq_ptr) {
+  struct freq_thread* freq = (struct freq_thread*) freq_ptr;
+
+  char* end = NULL;
+  char* line = NULL;
+  size_t len = 0;
+  ssize_t read;
+
+  int v = 0;
+  double* freq_vector = malloc(sizeof(double) * FREQ_VECTOR_SIZE);
+
+  while(!freq->end) {
+    if(!freq->measure) continue;
+
+    FILE* fp = fopen("/proc/cpuinfo", "r");
+    if(fp == NULL) return NULL;
+    while ((read = getline(&line, &len, fp)) != -1) {
+      if((line = strstr(line, "cpu MHz")) != NULL) {
+        line = strstr(line, "\t: ");
+        if(line == NULL) return NULL;
+        line += sizeof("\t: ") - 1;
+        double f = strtold(line, &end);
+        if(errno != 0) {
+          printf("strtol: %s", strerror(errno));
+          return NULL;
+        }
+
+        freq_vector[v] = f;
+        v++;
+      }
+    }
+    fclose(fp);
+    sleep_ms(500);
+  }
+
+  freq->freq = vector_average_harmonic(freq_vector, v);
+  printWarn("AVX2 measured freq=%f\n", freq->freq);
+
+  return NULL;
+}
+
+int64_t measure_frequency(struct cpuInfo* cpu) {
+  int ret;
+  int num_spaces;
+  struct freq_thread* freq_struct = malloc(sizeof(struct freq_thread));
+  freq_struct->end = false;
+  freq_struct->measure = false;
+
+  void* (*compute_function)(void*);
+
+  if(cpu->feat->AVX512 && vpus_are_AVX512(cpu)) {
+    printf("cpufetch is measuring the AVX512 frequency...");
+    compute_function = compute_avx512;
+    num_spaces = 45;
+  }
+  else if(cpu->feat->AVX || cpu->feat->AVX2) {
+    printf("cpufetch is measuring the AVX frequency...");
+    compute_function = compute_avx;
+    num_spaces = 42;
+  }
+  else {
+    printf("cpufetch is measuring the frequency (no vector instructions)...");
+    compute_function = compute_nov;
+    num_spaces = 63;
+  }
+
+  fflush(stdout);
+
+  pthread_t freq_t;
+  if(pthread_create(&freq_t, NULL, measure_freq, freq_struct)) {
+    fprintf(stderr, "Error creating thread\n");
+    return -1;
+  }
+
+  pthread_t* compute_th = malloc(sizeof(pthread_t) * cpu->topo->total_cores);
+  for(int i=0; i < cpu->topo->total_cores; i++) {
+    ret = pthread_create(&compute_th[i], NULL, compute_function, NULL);
+
+    if(ret != 0) {
+      fprintf(stderr, "Error creating thread\n");
+      return -1;
+    }
+  }
+
+  sleep_ms(500);
+  freq_struct->measure = true;
+
+  for(int i=0; i < cpu->topo->total_cores; i++) {
+    if(pthread_join(compute_th[i], NULL)) {
+      fprintf(stderr, "Error joining thread\n");
+      return -1;
+    }
+    freq_struct->end = true;
+  }
+
+  if(pthread_join(freq_t, NULL)) {
+    fprintf(stderr, "Error joining thread\n");
+    return -1;
+  }
+
+  printf("\r%*c", num_spaces, ' ');
+  return freq_struct->freq;
+}

src/x86/freq/freq.h

@@ -0,0 +1,12 @@
+#ifndef __FREQ__
+#define __FREQ__
+
+#include <stdint.h>
+#include "../../common/cpu.h"
+
+#define MEASURE_TIME_SECONDS         5
+#define LOOP_ITERS           100000000
+
+int64_t measure_frequency(struct cpuInfo* cpu);
+
+#endif

src/x86/freq/freq_avx.c

@@ -0,0 +1,56 @@
+#include <stdio.h>
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+#include <stdint.h>
+#include "freq.h"
+
+void* compute_avx() {
+  bool end = false;
+
+  struct timeval begin, now;
+
+  __m256 a[8];
+  __m256 b[8];
+
+  for(int i=0; i < 8; i++) {
+    a[i] = _mm256_set1_ps(1.5);
+    b[i] = _mm256_set1_ps(1.2);
+  }
+
+  gettimeofday(&begin, NULL);
+  while(!end) {
+    for(uint64_t i=0; i < LOOP_ITERS; i++) {
+      a[0] = _mm256_add_ps(a[0], b[0]);
+      a[1] = _mm256_add_ps(a[1], b[1]);
+      a[2] = _mm256_add_ps(a[2], b[2]);
+      a[3] = _mm256_add_ps(a[3], b[3]);
+      a[4] = _mm256_add_ps(a[4], b[4]);
+      a[5] = _mm256_add_ps(a[5], b[5]);
+      a[6] = _mm256_add_ps(a[6], b[6]);
+      a[7] = _mm256_add_ps(a[7], b[7]);
+    }
+
+    gettimeofday(&now, NULL);
+    double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
+    end = elapsed >= (double) MEASURE_TIME_SECONDS;
+  }
+
+  FILE* fp = fopen("/dev/null", "w");
+  if(fp == NULL) {
+    printf("fopen: %s", strerror(errno));
+  }
+  else {
+    for(int i=0; i < 8; i++)
+      fprintf(fp, "%f", a[i][0]);
+    fclose(fp);
+  }
+
+  return NULL;
+}
+

src/x86/freq/freq_avx.h

@@ -0,0 +1,6 @@
+#ifndef __FREQ_AVX__
+#define __FREQ_AVX__
+
+void* compute_avx();
+
+#endif

src/x86/freq/freq_avx512.c

@@ -0,0 +1,56 @@
+#include <stdio.h>
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+#include <stdint.h>
+#include "freq.h"
+
+void* compute_avx512() {
+  bool end = false;
+
+  struct timeval begin, now;
+
+  __m512 a[8];
+  __m512 b[8];
+
+  for(int i=0; i < 8; i++) {
+    a[i] = _mm512_set1_ps(1.5);
+    b[i] = _mm512_set1_ps(1.2);
+  }
+
+  gettimeofday(&begin, NULL);
+  while(!end) {
+    for(uint64_t i=0; i < LOOP_ITERS; i++) {
+      a[0] = _mm512_add_ps(a[0], b[0]);
+      a[1] = _mm512_add_ps(a[1], b[1]);
+      a[2] = _mm512_add_ps(a[2], b[2]);
+      a[3] = _mm512_add_ps(a[3], b[3]);
+      a[4] = _mm512_add_ps(a[4], b[4]);
+      a[5] = _mm512_add_ps(a[5], b[5]);
+      a[6] = _mm512_add_ps(a[6], b[6]);
+      a[7] = _mm512_add_ps(a[7], b[7]);
+    }
+
+    gettimeofday(&now, NULL);
+    double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
+    end = elapsed >= (double) MEASURE_TIME_SECONDS;
+  }
+
+  FILE* fp = fopen("/dev/null", "w");
+  if(fp == NULL) {
+    printf("fopen: %s", strerror(errno));
+  }
+  else {
+    for(int i=0; i < 8; i++)
+      fprintf(fp, "%f", a[i][0]);
+    fclose(fp);
+  }
+
+  return NULL;
+}
+

src/x86/freq/freq_avx512.h

@@ -0,0 +1,6 @@
+#ifndef __FREQ_AVX512__
+#define __FREQ_AVX512__
+
+void* compute_avx512();
+
+#endif

src/x86/freq/freq_nov.c

@@ -0,0 +1,44 @@
+#include <stdio.h>
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+#include <stdint.h>
+#include "freq.h"
+
+void* compute_nov() {
+  bool end = false;
+
+  struct timeval begin, now;
+
+  float a = 1.5;
+  float b = 1.2;
+  float c = 0.0;
+
+  gettimeofday(&begin, NULL);
+  while(!end) {
+    for(uint64_t i=0; i < LOOP_ITERS; i++) {
+      c = a * b;
+    }
+
+    gettimeofday(&now, NULL);
+    double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
+    end = elapsed >= (double) MEASURE_TIME_SECONDS;
+  }
+
+  FILE* fp = fopen("/dev/null", "w");
+  if(fp == NULL) {
+    printf("fopen: %s", strerror(errno));
+  }
+  else {
+    fprintf(fp, "%f", c);
+    fclose(fp);
+  }
+
+  return NULL;
+}
+

src/x86/freq/freq_nov.h

@@ -0,0 +1,6 @@
+#ifndef __FREQ_NO_VECTOR__
+#define __FREQ_NO_VECTOR__
+
+void* compute_nov();
+
+#endif

src/x86/uarch.c

@@ -78,8 +78,8 @@ enum {
   UARCH_SUNNY_COVE,
   UARCH_GOLDMONT_PLUS,
   UARCH_TREMONT,
-  UARCH_WILLOW_COVE,
-  UARCH_COFFE_LAKE,
+  UARCH_LAKEMONT,
+  UARCH_COFFEE_LAKE,
   UARCH_ITANIUM,
   UARCH_KNIGHTS_FERRY,
   UARCH_KNIGHTS_CORNER,
@@ -89,6 +89,9 @@ enum {
   UARCH_CEDAR_MILL,
   UARCH_ITANIUM2,
   UARCH_ICE_LAKE,
+  UARCH_TIGER_LAKE,
+  UARCH_ALDER_LAKE,
+  UARCH_RAPTOR_LAKE,
   // AMD //
   UARCH_AM486,
   UARCH_AM5X86,
@@ -107,7 +110,9 @@ enum {
   UARCH_ZEN,
   UARCH_ZEN_PLUS,
   UARCH_ZEN2,
-  UARCH_ZEN3
+  UARCH_ZEN3,
+  UARCH_ZEN3_PLUS,
+  UARCH_ZEN4
 };
 
 struct uarch {
@@ -147,7 +152,9 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  5,  0,  4, NA, "P5 MMX",          UARCH_P5,              UNK)
   CHECK_UARCH(arch, 0,  5,  0,  7, NA, "P5 MMX",          UARCH_P5,              UNK)
   CHECK_UARCH(arch, 0,  5,  0,  8, NA, "P5 MMX",          UARCH_P5,              250)
+  CHECK_UARCH(arch, 0,  5,  0,  9,  0, "Lakemont",        UARCH_LAKEMONT,         32)
   CHECK_UARCH(arch, 0,  5,  0,  9, NA, "P5 MMX",          UARCH_P5,              UNK)
+  CHECK_UARCH(arch, 0,  5,  0, 10,  0, "Lakemont",        UARCH_LAKEMONT,         32)
   CHECK_UARCH(arch, 0,  6,  0,  0, NA, "P6 Pentium II",   UARCH_P6,              UNK)
   CHECK_UARCH(arch, 0,  6,  0,  1, NA, "P6 Pentium II",   UARCH_P6,              UNK) // process depends on core
   CHECK_UARCH(arch, 0,  6,  0,  2, NA, "P6 Pentium II",   UARCH_P6,              UNK)
@@ -218,23 +225,26 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  6,  8,  5, NA, "Knights Mill",    UARCH_KNIGHTS_MILL,     14) // no spec update; only MSR_CPUID_table* so far
   CHECK_UARCH(arch, 0,  6,  8,  6, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
   CHECK_UARCH(arch, 0,  6,  8, 10, NA, "Tremont",         UARCH_TREMONT,          10) // no spec update; only geekbench.com example
-  CHECK_UARCH(arch, 0,  6,  8, 12, NA, "Willow Cove",     UARCH_WILLOW_COVE,      10) // found only on en.wikichip.org
-  CHECK_UARCH(arch, 0,  6,  8, 13, NA, "Willow Cove",     UARCH_WILLOW_COVE,      10) // LX*
-  CHECK_UARCH(arch, 0,  6,  8, 14,  9, "Amber Lake",      UARCH_AMBER_LAKE,       14) // wikichip
-  CHECK_UARCH(arch, 0,  6,  8, 14, 10, "Kaby Lake",       UARCH_KABY_LAKE,        14) // wikichip
+  CHECK_UARCH(arch, 0,  6,  8, 12, NA, "Tiger Lake",      UARCH_TIGER_LAKE,       10) // instlatx64
+  CHECK_UARCH(arch, 0,  6,  8, 13, NA, "Tiger Lake",      UARCH_TIGER_LAKE,       10) // instlatx64
+  // CHECK_UARCH(arch, 0,  6,  8, 14,  9, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
+  CHECK_UARCH(arch, 0,  6,  8, 14, 10, "Coffee Lake",     UARCH_COFFEE_LAKE,      14) // wikichip
   CHECK_UARCH(arch, 0,  6,  8, 14, 11, "Whiskey Lake",    UARCH_WHISKEY_LAKE,     14) // wikichip
   CHECK_UARCH(arch, 0,  6,  8, 14, 12, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
   CHECK_UARCH(arch, 0,  6,  9,  6, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
+  CHECK_UARCH(arch, 0,  6,  9,  7, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // instlatx64 (Alder Lake-S)
+  CHECK_UARCH(arch, 0,  6,  9, 10, NA, "Alder Lake",      UARCH_ALDER_LAKE,       10) // instlatx64 (Alder Lake-P)
   CHECK_UARCH(arch, 0,  6,  9, 12, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
   CHECK_UARCH(arch, 0,  6,  9, 13, NA, "Sunny Cove",      UARCH_SUNNY_COVE,       10) // LX*
   CHECK_UARCH(arch, 0,  6,  9, 14,  9, "Kaby Lake",       UARCH_KABY_LAKE,        14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 10, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 11, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 12, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6,  9, 14, 13, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 10, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 11, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 12, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
+  CHECK_UARCH(arch, 0,  6,  9, 14, 13, "Coffee Lake",     UARCH_COFFEE_LAKE,      14)
   CHECK_UARCH(arch, 0,  6, 10,  5, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
   CHECK_UARCH(arch, 0,  6, 10,  6, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // instlatx64.atw.hu (i7-10710U)
   CHECK_UARCH(arch, 0,  6, 10,  7, NA, "Rocket Lake",     UARCH_ROCKET_LAKE,      14) // instlatx64.atw.hu (i7-11700K)
+  CHECK_UARCH(arch, 0,  6, 11,  7, NA, "Raptor Lake",     UARCH_RAPTOR_LAKE,      10) // instlatx64.atw.hu (i5-13600K)
   CHECK_UARCH(arch, 0, 11,  0,  0, NA, "Knights Ferry",   UARCH_KNIGHTS_FERRY,    45) // found only on en.wikichip.org
   CHECK_UARCH(arch, 0, 11,  0,  1, NA, "Knights Corner",  UARCH_KNIGHTS_CORNER,   22)
   CHECK_UARCH(arch, 0, 15,  0,  0, NA, "Willamette",      UARCH_WILLAMETTE,      180)
@@ -251,7 +261,7 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   return arch;
 }
 
-// iNApired in Todd Allen's decode_uarch_amd
+// Inspired in Todd Allen's decode_uarch_amd
 struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
   struct uarch* arch = emalloc(sizeof(struct uarch));
 
@@ -270,6 +280,7 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   CHECK_UARCH(arch,  0,  4, NA, NA, NA, "Am5x86",      UARCH_AM5X86,     UNK)
   CHECK_UARCH(arch,  0,  5,  0,  6, NA, "K6",          UARCH_K6,         300)
   CHECK_UARCH(arch,  0,  5,  0,  7, NA, "K6",          UARCH_K6,         250) // *p from sandpile.org
+  CHECK_UARCH(arch,  0,  5,  0, 10, NA, "K7",          UARCH_K7,         130) // Geode NX
   CHECK_UARCH(arch,  0,  5,  0, 13, NA, "K6",          UARCH_K6,          80) // *p from sandpile.org
   CHECK_UARCH(arch,  0,  5, NA, NA, NA, "K6",          UARCH_K6,         UNK)
   CHECK_UARCH(arch,  0,  6,  0,  1, NA, "K7",          UARCH_K7,         250)
@@ -325,7 +336,7 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   CHECK_UARCH(arch,  2, 15, NA, NA, NA, "Puma 2008",   UARCH_PUMA_2008,   65)
   CHECK_UARCH(arch,  3, 15, NA, NA, NA, "K10",         UARCH_K10,         32)
   CHECK_UARCH(arch,  5, 15, NA, NA, NA, "Bobcat",      UARCH_BOBCAT,      40)
-  CHECK_UARCH(arch,  6, 15,  0,  0, NA, "Bulldozer",   UARCH_BULLDOZER,   32) // iNAtlatx64 engr sample
+  CHECK_UARCH(arch,  6, 15,  0,  0, NA, "Bulldozer",   UARCH_BULLDOZER,   32) // instlatx64 engr sample
   CHECK_UARCH(arch,  6, 15,  0,  1, NA, "Bulldozer",   UARCH_BULLDOZER,   32)
   CHECK_UARCH(arch,  6, 15,  0,  2, NA, "Piledriver",  UARCH_PILEDRIVER,  32)
   CHECK_UARCH(arch,  6, 15,  1,  0, NA, "Piledriver",  UARCH_PILEDRIVER,  32)
@@ -333,36 +344,58 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   CHECK_UARCH(arch,  6, 15,  3,  0, NA, "Steamroller", UARCH_STEAMROLLER, 28)
   CHECK_UARCH(arch,  6, 15,  3,  8, NA, "Steamroller", UARCH_STEAMROLLER, 28)
   CHECK_UARCH(arch,  6, 15,  4,  0, NA, "Steamroller", UARCH_STEAMROLLER, 28) // Software Optimization Guide (15h) says it has the same iNAt latencies as (6,15),(3,x).
-  CHECK_UARCH(arch,  6, 15,  6,  0, NA, "Excavator",   UARCH_EXCAVATOR,   28) // undocumented, but iNAtlatx64 samples
+  CHECK_UARCH(arch,  6, 15,  6,  0, NA, "Excavator",   UARCH_EXCAVATOR,   28) // undocumented, but instlatx64 samples
   CHECK_UARCH(arch,  6, 15,  6,  5, NA, "Excavator",   UARCH_EXCAVATOR,   28) // undocumented, but sample from Alexandros Couloumbis
   CHECK_UARCH(arch,  6, 15,  7,  0, NA, "Excavator",   UARCH_EXCAVATOR,   28)
   CHECK_UARCH(arch,  7, 15,  0,  0, NA, "Jaguar",      UARCH_JAGUAR,      28)
+  CHECK_UARCH(arch,  7, 15,  2,  6, NA, "Jaguar",      UARCH_JAGUAR,      28) // AMD Cato (Xbox One?)
   CHECK_UARCH(arch,  7, 15,  3,  0, NA, "Puma 2014",   UARCH_PUMA_2014,   28)
-  CHECK_UARCH(arch,  8, 15,  0,  0, NA, "Zen",         UARCH_ZEN,         14) // iNAtlatx64 engr sample
+  CHECK_UARCH(arch,  8, 15,  0,  0, NA, "Zen",         UARCH_ZEN,         14) // instlatx64 engr sample
   CHECK_UARCH(arch,  8, 15,  0,  1, NA, "Zen",         UARCH_ZEN,         14)
   CHECK_UARCH(arch,  8, 15,  0,  8, NA, "Zen+",        UARCH_ZEN_PLUS,    12)
-  CHECK_UARCH(arch,  8, 15,  1,  1, NA, "Zen",         UARCH_ZEN,         14) // found only on en.wikichip.org & iNAtlatx64 examples
+  CHECK_UARCH(arch,  8, 15,  1,  1, NA, "Zen",         UARCH_ZEN,         14) // found only on en.wikichip.org & instlatx64 examples
   CHECK_UARCH(arch,  8, 15,  1,  8, NA, "Zen+",        UARCH_ZEN_PLUS,    12) // found only on en.wikichip.org
+  CHECK_UARCH(arch,  8, 15,  2,  0, NA, "Zen",         UARCH_ZEN,         14) // Dali, found on instlatx64 and en.wikichip.org
   CHECK_UARCH(arch,  8, 15,  3,  1, NA, "Zen 2",       UARCH_ZEN2,         7) // found only on en.wikichip.org
+  CHECK_UARCH(arch,  8, 15,  4,  7, NA, "Zen 2",       UARCH_ZEN2,         7) // instlatx64 example (AMD 4700S)
+  CHECK_UARCH(arch,  8, 15,  5,  0, NA, "Zen",         UARCH_ZEN,         14) // instlatx64 example (Subor Z+)
   CHECK_UARCH(arch,  8, 15,  6,  0, NA, "Zen 2",       UARCH_ZEN2,         7) // undocumented, geekbench.com example
   CHECK_UARCH(arch,  8, 15,  6,  8, NA, "Zen 2",       UARCH_ZEN2,         7) // found on instlatx64
   CHECK_UARCH(arch,  8, 15,  7,  1, NA, "Zen 2",       UARCH_ZEN2,         7) // samples from Steven Noonan and instlatx64
+  CHECK_UARCH(arch,  8, 15,  9,  0,  2, "Zen 2",       UARCH_ZEN2,         7) // Steam Deck (instlatx64)
+  CHECK_UARCH(arch, 10, 15,  0,  1, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
   CHECK_UARCH(arch, 10, 15,  2,  1, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  4,  4, NA, "Zen 3+",      UARCH_ZEN3_PLUS,    6) // instlatx64 (they say it is Zen3...)
   CHECK_UARCH(arch, 10, 15,  5,  0, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  6,  1,  2, "Zen 4",       UARCH_ZEN4,         5) // instlatx64
   UARCH_END
 
   return arch;
 }
 
-struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
-  if(cpu->cpu_vendor == CPU_VENDOR_INTEL)
+struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
+    if(dump == 0x000806E9) {
+      // It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
+      struct uarch* arch = emalloc(sizeof(struct uarch));
+
+      if(strstr(cpu->cpu_name, "Y") != NULL) {
+        fill_uarch(arch, "Amber Lake", UARCH_AMBER_LAKE, 14);
+      }
+      else {
+        fill_uarch(arch, "Kaby Lake", UARCH_KABY_LAKE, 14);
+      }
+
+      return arch;
+    }
     return get_uarch_from_cpuid_intel(ef, f, em, m, s);
+  }
   else
     return get_uarch_from_cpuid_amd(ef, f, em, m, s);
 }
 
 bool vpus_are_AVX512(struct cpuInfo* cpu) {
-  return cpu->arch->uarch != UARCH_ICE_LAKE;
+  return cpu->arch->uarch != UARCH_ICE_LAKE && cpu->arch->uarch != UARCH_TIGER_LAKE;
 }
 
 bool is_knights_landing(struct cpuInfo* cpu) {
@@ -382,23 +415,40 @@ int get_number_of_vpus(struct cpuInfo* cpu) {
       case UARCH_ROCKET_LAKE:
       case UARCH_AMBER_LAKE:
       case UARCH_WHISKEY_LAKE:
-      case UARCH_COFFE_LAKE:
+      case UARCH_COFFEE_LAKE:
       case UARCH_PALM_COVE:
 
       case UARCH_KNIGHTS_LANDING:
       case UARCH_KNIGHTS_MILL:
 
       case UARCH_ICE_LAKE:
+      case UARCH_TIGER_LAKE:
+      case UARCH_ALDER_LAKE:
+      case UARCH_RAPTOR_LAKE:
 
       // AMD
       case UARCH_ZEN2:
       case UARCH_ZEN3:
+      case UARCH_ZEN3_PLUS:
+      case UARCH_ZEN4:
         return 2;
       default:
         return 1;
   }
 }
 
+bool choose_new_intel_logo_uarch(struct cpuInfo* cpu) {
+  switch(cpu->arch->uarch) {
+    case UARCH_ALDER_LAKE:
+    case UARCH_ROCKET_LAKE:
+    case UARCH_TIGER_LAKE:
+    case UARCH_RAPTOR_LAKE:
+      return true;
+    default:
+      return false;
+  }
+}
+
 char* get_str_uarch(struct cpuInfo* cpu) {
   return cpu->arch->uarch_str;
 }

src/x86/uarch.h

@@ -7,10 +7,11 @@
 
 struct uarch;
 
-struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
+struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
 bool vpus_are_AVX512(struct cpuInfo* cpu);
 bool is_knights_landing(struct cpuInfo* cpu);
 int get_number_of_vpus(struct cpuInfo* cpu);
+bool choose_new_intel_logo_uarch(struct cpuInfo* cpu);
 char* get_str_uarch(struct cpuInfo* cpu);
 char* get_str_process(struct cpuInfo* cpu);
 void free_uarch_struct(struct uarch* arch);