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7 Commits
i183 ... apple

Author SHA1 Message Date
Dr-Noob
176f2f553f [v1.04][ARM] Add M3 number of SIMD VPUs 2023-12-24 23:38:47 +01:00
Dr-Noob
91de8c7a85 [v1.04][ARM] New fix SoC detection 2023-12-24 17:22:11 +01:00
Dr-Noob
5ffee22dbf [v1.04][ARM] Fix SoC detection 2023-12-24 16:47:29 +01:00
Dr-Noob
2c1b8a2362 [v1.04][ARM] Fix compilation issues 2023-12-24 16:08:34 +01:00
Dr-Noob
727c49fdae [v1.04][ARM] Add additional debug info for Apple ARM chips 2023-12-24 11:40:06 +01:00
Dr-Noob
56e8cc7503 [v1.04][ARM] Some M3 fixes 2023-12-24 11:29:08 +01:00
Dr-Noob
6ae51f2b52 [v1.04][ARM] Preeliminary M3 support 2023-12-22 23:23:42 +01:00
7 changed files with 86 additions and 44 deletions

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@@ -289,7 +289,7 @@ void fill_cpu_info_avalanche_blizzard(struct cpuInfo* cpu, uint32_t pcores, uint
bli->feat = get_features_info();
bli->topo = malloc(sizeof(struct topology));
bli->topo->cach = bli->cach;
bli->topo->total_cores = ecores;
bli->topo->total_cores = pcores;
bli->freq = malloc(sizeof(struct frequency));
bli->freq->base = UNKNOWN_DATA;
bli->freq->max = 2800;
@@ -305,7 +305,7 @@ void fill_cpu_info_avalanche_blizzard(struct cpuInfo* cpu, uint32_t pcores, uint
ava->feat = get_features_info();
ava->topo = malloc(sizeof(struct topology));
ava->topo->cach = ava->cach;
ava->topo->total_cores = pcores;
ava->topo->total_cores = ecores;
ava->freq = malloc(sizeof(struct frequency));
ava->freq->base = UNKNOWN_DATA;
ava->freq->max = 3500;
@@ -324,7 +324,7 @@ void fill_cpu_info_everest_sawtooth(struct cpuInfo* cpu, uint32_t pcores, uint32
saw->feat = get_features_info();
saw->topo = malloc(sizeof(struct topology));
saw->topo->cach = saw->cach;
saw->topo->total_cores = ecores;
saw->topo->total_cores = pcores;
saw->freq = malloc(sizeof(struct frequency));
saw->freq->base = UNKNOWN_DATA;
saw->freq->max = 2750;
@@ -340,7 +340,7 @@ void fill_cpu_info_everest_sawtooth(struct cpuInfo* cpu, uint32_t pcores, uint32
eve->feat = get_features_info();
eve->topo = malloc(sizeof(struct topology));
eve->topo->cach = eve->cach;
eve->topo->total_cores = pcores;
eve->topo->total_cores = ecores;
eve->freq = malloc(sizeof(struct frequency));
eve->freq->base = UNKNOWN_DATA;
eve->freq->max = 4050;
@@ -350,42 +350,92 @@ void fill_cpu_info_everest_sawtooth(struct cpuInfo* cpu, uint32_t pcores, uint32
}
struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
// https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_system_capabilities
uint32_t nperflevels = get_sys_info_by_name("hw.nperflevels");
if((cpu->num_cpus = nperflevels) != 2) {
printBug("Expected to find SoC with 2 perf levels, found: %d", cpu->num_cpus);
return NULL;
}
uint32_t pcores = get_sys_info_by_name("hw.perflevel0.physicalcpu");
uint32_t ecores = get_sys_info_by_name("hw.perflevel1.physicalcpu");
if(ecores <= 0) {
printBug("Expected to find a numer of ecores > 0, found: %d", ecores);
return NULL;
}
if(pcores <= 0) {
printBug("Expected to find a numer of pcores > 0, found: %d", pcores);
return NULL;
}
uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");
// Manually fill the cpuInfo assuming that
// the CPU is an Apple SoC
// the CPU is an Apple M1/M2
if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
fill_cpu_info_firestorm_icestorm(cpu, pcores, ecores);
cpu->num_cpus = 2;
// Now detect the M1 version
uint32_t cpu_subfamily = get_sys_info_by_name("hw.cpusubfamily");
if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
// Apple M1
fill_cpu_info_firestorm_icestorm(cpu, 4, 4);
}
else if(cpu_subfamily == CPUSUBFAMILY_ARM_HS || cpu_subfamily == CPUSUBFAMILY_ARM_HC_HD) {
// Apple M1 Pro/Max/Ultra. Detect number of cores
uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
if(physicalcpu == 20) {
// M1 Ultra
fill_cpu_info_firestorm_icestorm(cpu, 16, 4);
}
else if(physicalcpu == 8 || physicalcpu == 10) {
// M1 Pro/Max
fill_cpu_info_firestorm_icestorm(cpu, physicalcpu-2, 2);
}
else {
printBug("Found invalid physical cpu number: %d", physicalcpu);
return NULL;
}
}
else {
printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
return NULL;
}
cpu->soc = get_soc();
cpu->peak_performance = get_peak_performance(cpu);
}
else if(cpu_family == CPUFAMILY_ARM_AVALANCHE_BLIZZARD) {
fill_cpu_info_avalanche_blizzard(cpu, pcores, ecores);
cpu->num_cpus = 2;
// Now detect the M2 version
uint32_t cpu_subfamily = get_sys_info_by_name("hw.cpusubfamily");
if(cpu_subfamily == CPUSUBFAMILY_ARM_HG) {
// Apple M2
fill_cpu_info_avalanche_blizzard(cpu, 4, 4);
}
else if(cpu_subfamily == CPUSUBFAMILY_ARM_HS) {
// Apple M2 Pro/Max/Ultra. Detect number of cores
uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
if(physicalcpu == 24) {
// M2 Ultra
fill_cpu_info_avalanche_blizzard(cpu, 16, 8);
}
else if(physicalcpu == 10 || physicalcpu == 12) {
// M2 Pro/Max
fill_cpu_info_avalanche_blizzard(cpu, physicalcpu-4, 4);
}
else {
printBug("Found invalid physical cpu number: %d", physicalcpu);
return NULL;
}
}
else {
printBug("Found invalid cpu_subfamily: 0x%.8X", cpu_subfamily);
return NULL;
}
cpu->soc = get_soc();
cpu->peak_performance = get_peak_performance(cpu);
}
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH ||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO ||
cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
fill_cpu_info_everest_sawtooth(cpu, pcores, ecores);
cpu->num_cpus = 2;
// Now detect the M3 version
if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH) {
fill_cpu_info_everest_sawtooth(cpu, 4, 4);
}
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_PRO) {
uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
fill_cpu_info_everest_sawtooth(cpu, physicalcpu-6, 6);
}
else if(cpu_family == CPUFAMILY_ARM_EVEREST_SAWTOOTH_MAX) {
uint32_t physicalcpu = get_sys_info_by_name("hw.physicalcpu");
fill_cpu_info_everest_sawtooth(cpu, physicalcpu-4, 4);
}
else {
printBug("Found invalid cpu_family: 0x%.8X", cpu_family);
return NULL;
}
cpu->soc = get_soc();
cpu->peak_performance = get_peak_performance(cpu);
}

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@@ -734,7 +734,6 @@ bool get_rk_soc_from_efuse(struct system_on_chip* soc, char* efuse) {
rkToSoC socFromRK[] = {
// TODO: Add RK2XXX
// RK3XXX
// Reverse order
{0x2388, {SOC_ROCKCHIP_3288, SOC_VENDOR_ROCKCHIP, 28, "RK3288", NULL} },
{0x2392, {SOC_ROCKCHIP_3229, SOC_VENDOR_ROCKCHIP, 28, "RK3229", NULL} }, // https://gadgetversus.com/processor/rockchip-rk3229-vs-rockchip-rk3128/
{0x3380, {SOC_ROCKCHIP_3308, SOC_VENDOR_ROCKCHIP, 28, "RK3308", NULL} }, // https://en.t-firefly.com/product/rocrk3308cc?theme=pc
@@ -743,12 +742,10 @@ bool get_rk_soc_from_efuse(struct system_on_chip* soc, char* efuse) {
{0x3382, {SOC_ROCKCHIP_3328, SOC_VENDOR_ROCKCHIP, 28, "RK3328", NULL} },
{0x3386, {SOC_ROCKCHIP_3368, SOC_VENDOR_ROCKCHIP, 28, "RK3368", NULL} },
{0x3399, {SOC_ROCKCHIP_3399, SOC_VENDOR_ROCKCHIP, 28, "RK3399", NULL} },
// Normal Order (https://github.com/Dr-Noob/cpufetch/issues/209)
{0x3528, {SOC_ROCKCHIP_3528, SOC_VENDOR_ROCKCHIP, 28, "RK3528", NULL} },
{0x3562, {SOC_ROCKCHIP_3562, SOC_VENDOR_ROCKCHIP, 22, "RK3562", NULL} },
{0x3566, {SOC_ROCKCHIP_3566, SOC_VENDOR_ROCKCHIP, 22, "RK3566", NULL} },
{0x3568, {SOC_ROCKCHIP_3568, SOC_VENDOR_ROCKCHIP, 22, "RK3568", NULL} },
{0x3588, {SOC_ROCKCHIP_3588, SOC_VENDOR_ROCKCHIP, 8, "RK3588", NULL} }, // No known way to distingish between S version: https://github.com/Dr-Noob/cpufetch/issues/188,209
{0x5366, {SOC_ROCKCHIP_3566, SOC_VENDOR_ROCKCHIP, 22, "RK3566", NULL} },
{0x5386, {SOC_ROCKCHIP_3568, SOC_VENDOR_ROCKCHIP, 22, "RK3568", NULL} },
{0x5388, {SOC_ROCKCHIP_3588, SOC_VENDOR_ROCKCHIP, 8, "RK3588", NULL} },
{0x3588, {SOC_ROCKCHIP_3588S, SOC_VENDOR_ROCKCHIP, 8, "RK3588S", NULL} }, // https://github.com/Dr-Noob/cpufetch/issues/188
// Unknown
{0x0000, {UNKNOWN, SOC_VENDOR_UNKNOWN, -1, "", NULL} }
};

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@@ -349,11 +349,10 @@ enum {
SOC_ROCKCHIP_3328,
SOC_ROCKCHIP_3368,
SOC_ROCKCHIP_3399,
SOC_ROCKCHIP_3528,
SOC_ROCKCHIP_3562,
SOC_ROCKCHIP_3566,
SOC_ROCKCHIP_3568,
SOC_ROCKCHIP_3588,
SOC_ROCKCHIP_3588S,
// GOOGLE
SOC_GOOGLE_TENSOR,
SOC_GOOGLE_TENSOR_G2,
@@ -370,7 +369,7 @@ inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8450) return SOC_VENDOR_SNAPDRAGON;
else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M3_MAX) return SOC_VENDOR_APPLE;
else if(soc >= SOC_ALLWINNER_A10 && soc <= SOC_ALLWINNER_R328) return SOC_VENDOR_ALLWINNER;
else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588) return SOC_VENDOR_ROCKCHIP;
else if(soc >= SOC_ROCKCHIP_3288 && soc <= SOC_ROCKCHIP_3588S) return SOC_VENDOR_ROCKCHIP;
else if(soc >= SOC_GOOGLE_TENSOR && soc <= SOC_GOOGLE_TENSOR_G3) return SOC_VENDOR_GOOGLE;
return SOC_VENDOR_UNKNOWN;
}

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@@ -194,7 +194,7 @@ void init_topology_struct(struct topology* topo, struct cache* cach) {
topo->sockets = 0;
#ifdef ARCH_X86
topo->smt_available = 0;
topo->apic = ecalloc(1, sizeof(struct apic));
topo->apic = emalloc(sizeof(struct apic));
#endif
#endif
}

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@@ -38,7 +38,6 @@ enum {
HV_VENDOR_PARALLELS,
HV_VENDOR_PHYP,
HV_VENDOR_BHYVE,
HV_VENDOR_APPLEVZ,
HV_VENDOR_INVALID
};

View File

@@ -20,7 +20,6 @@ static char *hv_vendors_name[] = {
[HV_VENDOR_PARALLELS] = "Parallels",
[HV_VENDOR_PHYP] = "pHyp",
[HV_VENDOR_BHYVE] = "bhyve",
[HV_VENDOR_APPLEVZ] = "Apple VZ",
[HV_VENDOR_INVALID] = STRING_UNKNOWN
};

View File

@@ -30,9 +30,8 @@ static const char *hv_vendors_string[] = {
[HV_VENDOR_VMWARE] = "VMwareVMware",
[HV_VENDOR_XEN] = "XenVMMXenVMM",
[HV_VENDOR_PARALLELS] = "lrpepyh vr",
[HV_VENDOR_PHYP] = NULL,
[HV_VENDOR_BHYVE] = "bhyve bhyve ",
[HV_VENDOR_APPLEVZ] = "Apple VZ"
[HV_VENDOR_PHYP] = NULL
};
static char *hv_vendors_name[] = {
@@ -44,7 +43,6 @@ static char *hv_vendors_name[] = {
[HV_VENDOR_PARALLELS] = "Parallels",
[HV_VENDOR_PHYP] = "pHyp",
[HV_VENDOR_BHYVE] = "bhyve",
[HV_VENDOR_APPLEVZ] = "Apple VZ",
[HV_VENDOR_INVALID] = STRING_UNKNOWN
};
@@ -286,7 +284,7 @@ struct hypervisor* get_hp_info(bool hv_present) {
if(!found) {
hv->hv_vendor = HV_VENDOR_INVALID;
printBug("Unknown hypervisor vendor: '%s'", name);
printBug("Unknown hypervisor vendor: %s", name);
}
}