[v1.01] Remove useless frequency measurement (SSE and novector should report the same frequency!). Increase iterations to improve precision

.github/workflows/lockdown.yml

@@ -0,0 +1,36 @@
+name: 'Disable PR in cpufetch'
+
+on:
+  issues:
+    types: opened
+  pull_request_target:
+    types: opened
+
+permissions:
+  issues: write
+  pull-requests: write
+
+jobs:
+  action:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: dessant/repo-lockdown@v2
+        with:
+          github-token: ${{ github.token }}
+          exclude-issue-created-before: ''
+          exclude-issue-labels: ''
+          issue-labels: ''
+          issue-comment: ''
+          skip-closed-issue-comment: false
+          close-issue: false
+          lock-issue: true
+          issue-lock-reason: ''
+          exclude-pr-created-before: ''
+          exclude-pr-labels: ''
+          pr-labels: ''
+          pr-comment: 'cpufetch does not accept pull requests, see [the contributing guidelines](https://github.com/Dr-Noob/cpufetch/blob/master/CONTRIBUTING.md) for details'
+          skip-closed-pr-comment: false
+          close-pr: true
+          lock-pr: false
+          pr-lock-reason: ''
+          process-only: 'prs'

.gitignore

@@ -1 +1,2 @@
 cpufetch
+*.o

CONTRIBUTING.md

@@ -0,0 +1,52 @@
+# cpufetch contributing guidelines
+
+<!-- START doctoc generated TOC please keep comment here to allow auto update -->
+<!-- DON'T EDIT THIS SECTION, INSTEAD RE-RUN doctoc TO UPDATE -->
+
+- [1. cpufetch does not accept pull requests](#1-cpufetch-does-not-accept-pull-requests)
+- [2. Creating an issue](#2-creating-an-issue)
+  - [2.1: I found a bug in cpufetch (the program provides incorrect / invalid information)](#21-i-found-a-bug-in-cpufetch-the-program-provides-incorrect--invalid-information)
+  - [2.2: I found a bug in cpufetch (the program crashes / does not work properly)](#22-i-found-a-bug-in-cpufetch-the-program-crashes--does-not-work-properly)
+    - [Stacktrace option 1 (best)](#stacktrace-option-1-best)
+    - [Stacktrace option 2 (use this option if option 1 does not work)](#stacktrace-option-2-use-this-option-if-option-1-does-not-work)
+  - [2.3: I have an idea for a new feature in cpufetch / I want to suggest a change in cpufetch](#23-i-have-an-idea-for-a-new-feature-in-cpufetch--i-want-to-suggest-a-change-in-cpufetch)
+
+<!-- END doctoc generated TOC please keep comment here to allow auto update -->
+Thanks for your interest in contributing to cpufetch! Please, read this page carefully to understand how to contribute to cpufetch.
+
+## 1. cpufetch does not accept pull requests
+cpufetch is a small project, and I enjoy developing it. There are for sure some bugs and exciting features to add, but I prefer to make these
+changes myself. For that reason, you should always use the issues page to report anything related to cpufetch. In the rare case that there is
+a concise bug or feature that I am unable to implement myself, I will enable pull requests for this.
+
+## 2. Creating an issue
+
+### 2.1: I found a bug in cpufetch (the program provides incorrect / invalid information)
+In the github issue **you must include**:
+- Exact CPU model.
+- Operating system.
+- The output of `cpufetch`.
+- The output of `cpufetch --debug`.
+
+### 2.2: I found a bug in cpufetch (the program crashes / does not work properly)
+- Exact CPU model.
+- Operating system.
+- The output of `cpufetch`.
+- The output of `cpufetch --debug`.
+- A stacktrace (if program crashes):
+
+#### Stacktrace option 1 (best)
+1. Build cpufetch with debug symbols (`make clean; make debug`).
+2. Install valgrind (if it is not already installed)
+3. Run cpufetch with valgrind (`valgrind ./cpufetch`)
+4. Paste the complete output (preferably on a platform like pastebin)
+
+#### Stacktrace option 2 (use this option if option 1 does not work)
+1. Build cpufetch with debug symbols (`make clean; make debug`).
+2. Install gdb (if it is not already installed)
+3. Debug cpufetch with gdb (`gdb cpufetch`)
+3. Run cpufetch (just r inside gdb console)
+4. Paste the complete output (preferably on a platform like pastebin)
+
+### 2.3: I have an idea for a new feature in cpufetch / I want to suggest a change in cpufetch
+Just explain the feature in the issue and include references (links) to relevant sources if appropriate.

Makefile

@@ -1,8 +1,10 @@
-CXX=gcc
+CC ?= gcc
 
-CXXFLAGS=-Wall -Wextra -Werror -pedantic -fstack-protector-all -pedantic -std=c99
+CFLAGS+=-Wall -Wextra -pedantic
 SANITY_FLAGS=-Wfloat-equal -Wshadow -Wpointer-arith
 
+PREFIX ?= /usr
+
 SRC_COMMON=src/common/
 
 COMMON_SRC = $(SRC_COMMON)main.c $(SRC_COMMON)cpu.c $(SRC_COMMON)udev.c $(SRC_COMMON)printer.c $(SRC_COMMON)args.c $(SRC_COMMON)global.c
@@ -10,16 +12,39 @@ COMMON_HDR = $(SRC_COMMON)ascii.h $(SRC_COMMON)cpu.h $(SRC_COMMON)udev.h $(SRC_C
 
 ifneq ($(OS),Windows_NT)
 	arch := $(shell uname -m)
-	ifeq ($(arch), x86_64)
+	ifeq ($(arch), $(filter $(arch), x86_64 amd64 i686))
 		SRC_DIR=src/x86/
 		SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
-		HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h 
-		CXXFLAGS += -DARCH_X86
-	else
+		HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h $(SRC_DIR)freq/freq.h
+
+                os := $(shell uname -s)
+                ifeq ($(os), Linux)
+			SOURCE += $(SRC_DIR)freq/freq.c freq_nov.o freq_avx.o freq_avx512.o
+			HEADERS += $(SRC_DIR)freq/freq.h
+			CFLAGS += -pthread
+                endif
+		CFLAGS += -DARCH_X86 -std=c99 -fstack-protector-all
+	else ifeq ($(arch), $(filter $(arch), ppc64le ppc64 ppcle ppc))
+		SRC_DIR=src/ppc/
+		SOURCE += $(COMMON_SRC) $(SRC_DIR)ppc.c $(SRC_DIR)uarch.c $(SRC_DIR)udev.c
+		HEADERS += $(COMMON_HDR) $(SRC_DIR)ppc.h $(SRC_DIR)uarch.h  $(SRC_DIR)udev.c
+		CFLAGS += -DARCH_PPC -std=gnu99 -fstack-protector-all
+	else ifeq ($(arch), $(filter $(arch), arm aarch64_be aarch64 arm64 armv8b armv8l armv7l armv6l))
 		SRC_DIR=src/arm/
 		SOURCE += $(COMMON_SRC) $(SRC_DIR)midr.c $(SRC_DIR)uarch.c $(SRC_DIR)soc.c $(SRC_DIR)udev.c
 		HEADERS += $(COMMON_HDR) $(SRC_DIR)midr.h $(SRC_DIR)uarch.h  $(SRC_DIR)soc.h $(SRC_DIR)udev.c $(SRC_DIR)socs.h
-		CXXFLAGS += -DARCH_ARM -Wno-unused-parameter
+		CFLAGS += -DARCH_ARM -Wno-unused-parameter -std=c99 -fstack-protector-all
+
+		os := $(shell uname -s)
+		ifeq ($(os), Darwin)
+			SOURCE += $(SRC_DIR)sysctl.c
+			HEADERS += $(SRC_DIR)sysctl.h
+		endif
+	else
+		# Error lines should not be tabulated because Makefile complains about it
+$(warning Unsupported arch detected: $(arch). See https://github.com/Dr-Noob/cpufetch#1-support)
+$(warning If your architecture is supported but the compilation fails, please open an issue in https://github.com/Dr-Noob/cpufetch/issues)
+$(error Aborting compilation)
 	endif
 
 	OUTPUT=cpufetch
@@ -27,30 +52,48 @@ else
 	# Assume x86_64
 	SRC_DIR=src/x86/
 	SOURCE += $(COMMON_SRC) $(SRC_DIR)cpuid.c $(SRC_DIR)apic.c $(SRC_DIR)cpuid_asm.c $(SRC_DIR)uarch.c
-	HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h 
-	CXXFLAGS += -DARCH_X86
+	HEADERS += $(COMMON_HDR) $(SRC_DIR)cpuid.h $(SRC_DIR)apic.h $(SRC_DIR)cpuid_asm.h $(SRC_DIR)uarch.h
+	CFLAGS += -DARCH_X86 -std=c99
 	SANITY_FLAGS += -Wno-pedantic-ms-format
 	OUTPUT=cpufetch.exe
 endif
 
+all: CFLAGS += -O2
 all: $(OUTPUT)
 
-debug: CXXFLAGS += -g -O0
+debug: CFLAGS += -g -O0
 debug: $(OUTPUT)
 
-release: CXXFLAGS += -static -O3
-release: $(OUTPUT)
+static: CFLAGS += -static -O2
+static: $(OUTPUT)
+
+strict: CFLAGS += -O2 -Werror -fsanitize=undefined -D_FORTIFY_SOURCE=2
+strict: $(OUTPUT)
+
+freq_nov.o: Makefile $(SRC_DIR)freq/freq_nov.c $(SRC_DIR)freq/freq_nov.h
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -pthread $(SRC_DIR)freq/freq_nov.c -o $@
+
+freq_avx.o: Makefile $(SRC_DIR)freq/freq_avx.c $(SRC_DIR)freq/freq_avx.h
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx -mfma -pthread $(SRC_DIR)freq/freq_avx.c -o $@
+
+freq_avx512.o: Makefile $(SRC_DIR)freq/freq_avx512.c $(SRC_DIR)freq/freq_avx512.h
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) -c -mavx512f -mfma -pthread $(SRC_DIR)freq/freq_avx512.c -o $@
 
 $(OUTPUT): Makefile $(SOURCE) $(HEADERS)
-	$(CXX) $(CXXFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
+	$(CC) $(CFLAGS) $(SANITY_FLAGS) $(SOURCE) -o $(OUTPUT)
 
 run: $(OUTPUT)
 	./$(OUTPUT)
 
 clean:
-	@rm $(OUTPUT)
+	@rm -f $(OUTPUT) *.o
 
 install: $(OUTPUT)
-	install -Dm755 "cpufetch"   "/usr/bin/cpufetch"
-	install -Dm644 "LICENSE"    "/usr/share/licenses/cpufetch-git/LICENSE"
-	install -Dm644 "cpufetch.8" "/usr/share/man/man8/cpufetch.8.gz"
+	install -Dm755 "cpufetch"   "$(DESTDIR)$(PREFIX)/bin/cpufetch"
+	install -Dm644 "LICENSE"    "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
+	install -Dm644 "cpufetch.1" "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"
+
+uninstall:
+	rm -f "$(DESTDIR)$(PREFIX)/bin/cpufetch"
+	rm -f "$(DESTDIR)$(PREFIX)/share/licenses/cpufetch-git/LICENSE"
+	rm -f "$(DESTDIR)$(PREFIX)/share/man/man1/cpufetch.1.gz"

README.md

@@ -1,41 +1,85 @@
-# cpufetch
+<p align="center"><img width=50% src="./pictures/cpufetch.png"></p>
 
-Simplistic yet fancy CPU architecture fetching tool
-![cpu1](pictures/i9.png)
+<h4 align="center">Simple yet fancy CPU architecture fetching tool</h4>
 
-### Platforms
-cpufetch currently supports x86_64 CPUs (both Intel and AMD) and ARM (experimental support)
+<p align="center"> </p>
 
-| Platform  | Intel                     | AMD                      | ARM                      | Notes             |
-|:---------:|:-------------------------:|:------------------------:|:------------------------:|:-----------------:|
-| Linux     | :heavy_check_mark:        | :heavy_check_mark:       | :heavy_check_mark:       | Prefered platform. <br> Experimental ARM support |
-| Windows   | :heavy_check_mark:        | :heavy_check_mark:       | :x:                      | Some information may be missing. <br> Colors will be used if supported |
-| Android   | :heavy_exclamation_mark:  | :heavy_exclamation_mark: | :heavy_check_mark:       | Experimental ARM support |
-| macOS     | :heavy_exclamation_mark:  | :heavy_exclamation_mark: | :heavy_exclamation_mark: | Untested |
+<div align="center">
+  <img height="22px" src="https://img.shields.io/github/v/tag/Dr-Noob/cpufetch?label=cpufetch&style=flat-square">
+  <a href="https://github.com/Dr-Noob/cpufetch/stargazers">
+    <img height="22px" src="https://img.shields.io/github/stars/Dr-Noob/cpufetch?color=4CC61F&style=flat-square">
+  </a>
+  <a href="https://github.com/Dr-Noob/cpufetch/issues">
+    <img height="22px" src="https://img.shields.io/github/issues/Dr-Noob/cpufetch?style=flat-square">
+  </a>
+  <a href="https://github.com/Dr-Noob/cpufetch/blob/master/README.md#1-support">
+    <img height="22px" src="pictures/os-shield.jpg">
+  </a>
+  <a href="https://github.com/Dr-Noob/cpufetch/blob/master/LICENSE">
+    <img height="22px" src="https://img.shields.io/github/license/Dr-Noob/cpufetch?color=orange&style=flat-square">
+  </a>
+</div>
 
-| Emoji                   | Meaning       |
-|:-----------------------:|:-------------:|
-|:heavy_check_mark:       | Supported     |
-|:x:                      | Not Supported |
-|:heavy_exclamation_mark: | Unested       |
+<p align="center"> </p>
+
+<p align="center">
+cpufetch is a command-line tool written in C that displays the CPU information in a clean and beautiful way
+</p>
+
+<p align="center">
+<img width=80% src="./pictures/examples.gif">
+</p>
+
+# Table of contents
+<!-- UPDATE with: doctoc --notitle README.md -->
+<!-- START doctoc generated TOC please keep comment here to allow auto update -->
+<!-- DON'T EDIT THIS SECTION, INSTEAD RE-RUN doctoc TO UPDATE -->
 
 
+- [1. Support](#1-support)
+- [2. Installation](#2-installation)
+  - [2.1 Installing from a package](#21-installing-from-a-package)
+  - [2.2 Building from source](#22-building-from-source)
+  - [2.3 Android](#23-android)
+- [3. Examples](#3-examples)
+  - [3.1 x86_64](#31-x86_64)
+  - [3.2 ARM](#32-arm)
+  - [3.3 PowerPC](#33-powerpc)
+- [4. Colors](#4-colors)
+  - [4.1 Specifying a name](#41-specifying-a-name)
+  - [4.2 Specifying the colors in RGB format](#42-specifying-the-colors-in-rgb-format)
+- [5. Implementation](#5-implementation)
+- [6. Bugs or improvements](#6-bugs-or-improvements)
+- [7. Acknowledgements](#7-acknowledgements)
+- [8. cpufetch for GPUs (gpufetch)](#8-cpufetch-for-gpus-gpufetch)
 
+<!-- END doctoc generated TOC please keep comment here to allow auto update -->
 
-### Usage and installation
-#### Linux
-There is a cpufetch package available in Arch Linux ([cpufetch-git](https://aur.archlinux.org/packages/cpufetch-git)).
+## 1. Support
 
-If you are in other distro, you can build `cpufetch` from source (see below)
+| OS          | x86_64 / x86       | ARM                | PowerPC            |
+|:-----------:|:------------------:|:------------------:|:------------------:|
+| GNU / Linux | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
+| Windows     | :heavy_check_mark: | :x:                | :x:                |
+| Android     | :heavy_check_mark: | :heavy_check_mark: | :x:                |
+| macOS       | :heavy_check_mark: | :heavy_check_mark: | :x:                |
+| FreeBSD     | :heavy_check_mark: | :x:                | :x:                |
 
-#### Windows
-In the [releases](https://github.com/Dr-Noob/cpufetch/releases) section you will find some cpufetch executables compiled for Windows. Just download and run it from Windows CMD.
+**NOTES:**
+- Colors will be used in Windows only if the terminal supports it.
+- Support in macOS ARM is limited to Apple M1 only
 
-#### Android
-You need to build `cpufetch` from source (see below).
+## 2. Installation
+### 2.1 Installing from a package
+Choose the right package for your operating system:
+
+[![Packaging status](https://repology.org/badge/vertical-allrepos/cpufetch.svg)](https://repology.org/project/cpufetch/versions)
+
+If there is no available package for your OS, you can download the cpufetch binary from [the releases page](https://github.com/Dr-Noob/cpufetch/releases), or [build cpufetch from source](#22-building-from-source-linuxwindowsmacos) (see below).
+
+### 2.2 Building from source
+You will need a C compiler (e.g, `gcc`) and `make` to compile `cpufetch`. Just clone the repo and run `make`:
 
-### Building from source
-#### Linux and Windows
 ```
 git clone https://github.com/Dr-Noob/cpufetch
 cd cpufetch
@@ -43,43 +87,74 @@ make
 ./cpufetch
 ```
 
-#### Android
-I recommend using `termux` terminal emulator. Once you installed it, run the following commands:
+### 2.3 Android
+1. Install `termux` app (terminal emulator)
+2. Run `pkg install -y git make clang` inside termux.
+3. Build from source normally:
+  - git clone https://github.com/Dr-Noob/cpufetch
+  - cd cpufetch
+  - make
+  - ./cpufetch
 
-```
-pkg install -y git make clang
-git clone https://github.com/Dr-Noob/cpufetch
-cd cpufetch
-make
-./cpufetch
-```
+## 3. Examples
+### 3.1 x86_64
 
-### Examples
+<p align="center"><img width=90% src="pictures/epyc.png"></p>
+<p align="center">AMD EPYC HPC server</p>
+<p align="center"><img width=90% src="pictures/cascade_lake.jpg"></p>
+<p align="center">Intel Xeon HPC server</p>
 
-Here are more examples of how `cpufetch` looks on different CPUs.
+### 3.2 ARM
 
-![cpu2](pictures/epyc.png)
+<p align="center">
+<img width=45% src="pictures/exynos.jpg">
+&nbsp;
+<img width=45% src="pictures/snapd.png">
+</p>
+<p align="center">Samsung Galaxy S8 (left) Xiaomi Redmi Note 7 (right)</p>
 
-![cpu3](pictures/cascade_lake.png)
+### 3.3 PowerPC
 
-### Colors and style
-By default, `cpufetch` will print the CPU art with the system colorscheme. However, you can always set a custom color scheme, either
-specifying Intel or AMD, or specifying the colors in RGB format:
+<p align="center"><img width=90% src="pictures/ibm.png"></p>
+<p align="center">Talos II</p>
+
+## 4. Colors
+By default, `cpufetch` will print the CPU logo with the system colorscheme. However, you can set a custom color scheme in two different ways:
+
+### 4.1 Specifying a name
+
+ By specifying a name, cpufetch will use the specific colors of each manufacture. Valid values are:
+
+- intel
+- intel-new
+- amd
+- ibm
+- arm
 
 ```
 ./cpufetch --color intel (default color for Intel)
-./cpufetch --color amd (default color for AND)
-./cpufetch --color 239,90,45:210,200,200:100,200,45:0,200,200 (example)
 ```
 
-In the case of setting the colors using RGB, 4 colors must be given in with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to CPU art color (2 colors) and for the text colors (following 2). Thus, you can customize all the colors.
+### 4.2 Specifying the colors in RGB format
 
-### Implementation
+5 colors must be given in RGB with the format: ``[R,G,B:R,G,B:R,G,B:R,G,B:R,G,B]``. These colors correspond to the CPU logo color (first 3 colors) and for the text colors (following 2).
 
-`cpufetch` fetches all of the information using the `CPUID` x86 instruction. There are, however, some cases where the CPU does not support fetching some needed information. In this case, `cpufetch` will use `/sys/devices/system/cpu` in Linux as a fallback. If `cpufetch` is running on Windows and `CPUID` does not give all the data, `cpufetch` won't be able to show it. [I hope this can be fixed in the future](https://github.com/Dr-Noob/cpufetch/issues/30)
+```
+./cpufetch --color 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200
+```
 
-### Bugs or improvements
-There are many open issues in github (see [issues](https://github.com/Dr-Noob/cpufetch/issues)). Feel free to open a new one report a issue or propose any improvement in `cpufetch`
+## 5. Implementation
+See [cpufetch programming documentation](https://github.com/Dr-Noob/cpufetch/tree/master/doc).
 
-### Testers
-I would like to thank [Gonzalocl](https://github.com/Gonzalocl) and [OdnetninI](https://github.com/OdnetninI) for their help, running `cpufeth` in many different CPUs they have access to, which makes it easier to debug and check the correctness of `cpufetch`.
+## 6. Bugs or improvements
+See [cpufetch contributing guidelines](https://github.com/Dr-Noob/cpufetch/blob/master/CONTRIBUTING.md).
+
+## 7. Acknowledgements
+Thanks to the fellow contributors and interested people in the project. Special thanks to:
+- [Gonzalocl](https://github.com/Gonzalocl), [OdnetninI](https://github.com/OdnetninI): Tested cpufetch in the earlier versions of the project in many different CPUs.
+- [Kyngo](https://github.com/Kyngo): Tested cpufetch in the Apple M1 CPU.
+- [avollmerhaus](https://github.com/avollmerhaus): Gave me ssh acess to a PowerPC machine, allowing me to develop the PowerPC port.
+- [bbonev](https://github.com/bbonev), [stephan-cr](https://github.com/stephan-cr): Reviewed the source code.
+
+## 8. cpufetch for GPUs (gpufetch)
+See [gpufetch](https://github.com/Dr-Noob/gpufetch) project!

cpufetch.1

@@ -0,0 +1,91 @@
+.\" DO NOT MODIFY THIS FILE!  It was generated by help2man 1.48.3. It was also manually adapted to look correctly
+.\" help2man -N -n "Simple yet fancy CPU architecture fetching tool" ./cpufetch > cpufetch.1
+.TH CPUFETCH "1" "September 2021" "cpufetch v1.00 (Linux x86_64 build)" "User Commands"
+.SH NAME
+cpufetch \- Simple yet fancy CPU architecture fetching tool
+.SH SYNOPSIS
+.B cpufetch
+[\fI\,OPTION\/\fR]...
+.SH DESCRIPTION
+cpufetch is a command-line tool written in C that displays the CPU information in a clean and beautiful way
+.SH OPTIONS
+.TP
+\fB\-c\fR, \fB\-\-color\fR
+Set the color scheme (by default, cpufetch uses the system color scheme)
+.TP
+\fB\-s\fR, \fB\-\-style\fR
+Set the style of CPU logo
+.TP
+\fB\-d\fR, \fB\-\-debug\fR
+Print CPU model and cpuid levels (debug purposes)
+.TP
+\fB\-\-logo\-short\fR
+Show the short version of the logo
+.TP
+\fB\-\-logo\-long\fR
+Show the long version of the logo
+.TP
+\fB\-v\fR, \fB\-\-verbose\fR
+Print extra information (if available) about how cpufetch tried fetching information
+.TP
+\fB\-\-logo\-intel\-old\fR
+Show the old Intel logo
+.TP
+\fB\-\-logo\-intel\-new\fR
+Show the new Intel logo
+.TP
+\fB\-F\fR, \fB\-\-full\-cpu\-name\fR
+Show the full CPU name (do not abbreviate it)
+.TP
+\fB\-r\fR, \fB\-\-raw\fR
+Print raw cpuid data (debug purposes)
+.TP
+\fB\-h\fR, \fB\-\-help\fR
+Print this help and exit
+.TP
+\fB\-V\fR, \fB\-\-version\fR
+Print cpufetch version and exit
+.SH COLORS
+.TP
+* "intel":
+Use Intel default color scheme
+.TP
+* "amd":
+Use AMD default color scheme
+.TP
+* "ibm",
+Use IBM default color scheme
+.TP
+* "arm":
+Use ARM default color scheme
+.TP
+* custom:
+If the argument of \fB\-\-color\fR does not match any of the previous strings, a custom scheme can be specified. 5 colors must be given in RGB with the format: R,G,B:R,G,B:...The first 3 colors are the CPU art color and the next 2 colors are the text colors
+.SH STYLES
+.TP
+* "fancy":
+Default style
+.TP
+* "retro":
+Old cpufetch style
+.TP
+* "legacy":
+Fallback style for terminals that do not support colors
+.SH LOGOS
+.TP
+cpufetch will try to adapt the logo size and the text to the terminal width. When the output (logo and text) is wider than the terminal width, cpufetch will print a smaller version of the logo (if it exists). This behavior can be overridden by \fB\-\-logo\-short\fR  and \fB\-\-logo\-long\fR, which always sets the logo size as specified by the user, even if it is too big. After the logo selection (either automatically or set by the user), cpufetch will check again if the output fits in the terminal. If not, it will use a shorter name for the fields (the left part of the text). If, after all of this, the output still does not fit, cpufetch will cut the text and will only print the text until there is no space left in each line 
+.SH EXAMPLES
+.TP
+Run cpufetch with Intel color scheme:
+.IP
+\&./cpufetch \fB\-\-color\fR intel
+.TP
+Run cpufetch with a custom color scheme:
+.IP
+\&./cpufetch \fB\-\-color\fR 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200
+.SH BUGS
+.TP
+Report bugs to https://github.com/Dr\-Noob/cpufetch/issues
+.SH NOTE
+.TP
+Peak performance information is NOT accurate. cpufetch computes peak performance using the max frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the CPU running AVX code. This value is not be fetched by cpufetch since it depends on each specific CPU. To correctly measure peak performance, see: https://github.com/Dr\-Noob/peakperf

cpufetch.8

@@ -1,57 +0,0 @@
-.TH man 8 "1 Sep 2020" "0.7" "cpufetch man page"
-.SH NAME
-cpufetch \- Simplistic yet fancy CPU architecture fetching tool
-.SH SYNOPSIS
-cpufetch [--version] [--help] [--levels] [--style fancy|retro|legacy] [--color intel|amd|'R,G,B:R,G,B:R,G,B:R,G,B']
-.SH DESCRIPTION
-cpufetch will print CPU information, for which will query CPUID instructions and udev directories on Linux as a fallback method. Some of this features are:
-.IP \[bu] 2
-Name
-.IP \[bu]
-Frequency
-.IP \[bu]
-Number of cores (Physical and Logical)
-.IP \[bu]
-Cache sizes
-.IP \[bu]
-Theoretical peak performance in floating point operations per second (FLOP/s)
-.SH OPTIONS
-.TP
-\fB\-\-style\fR \f[I][intel|amd|R,G,B:R,G,B:R,G,B:R,G,B]\f[]
-Set the color scheme. By default, cpufetch uses the system color scheme. This option lets the user use different colors to print the CPU art:
-.IP \[bu]
-\fB"intel"\fR: Use intel color scheme
-.IP \[bu]
-\fB"amd"\fR: Use amd color scheme
-.IP \[bu]
-\fBcustom\fR: If color do not match "intel" or "amd", a custom scheme can be specified: 4 colors must be given in RGB with the format: R,G,B:R,G,B:... 
-             These colors correspond to CPU art color (2 colors) and for the text colors (following 2) 
-.TP
-\fB\-\-style\fR \f[I]STYLE\f[]
-Specify the style of ascii logo:
-.IP \[bu] 
-\fB"fancy"\fR:  Default style
-.IP \[bu]
-\fB"retro"\fR:  Old cpufetch style
-.IP \[bu]
-\fB"legacy"\fR: Fallback style for terminals that does not support colors
-.TP
-\fB\-\-levels\fR
-Prints CPUID levels and CPU name
-.TP
-\fB\-\-verbose\fR
-Prints extra information (if available) about how cpufetch tried fetching information
-.TP
-\fB\-\-help\fR
-Prints help
-.TP
-\fB\-\-version\fR
-Prints cpufetch version
-.SH BUGS
-Bugs should be posted on: https://github.com/Dr-Noob/cpufetch/issues
-.SH NOTES
-Peak performance information is NOT accurate. cpufetch computes peak performance using the max   
-frequency. However, to properly compute peak performance, you need to know the frequency of the  
-CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU.
-.SH AUTHOR
-Dr-Noob (https://github.com/Dr-Noob)

doc/DOCUMENTATION_ARM.md

@@ -1,2 +1,60 @@
 ### 2. Why ARM cpufetch works on Linux based systems?
-TODO
+CPUID instructions (present in x86 architectures) [[1](#references)] allow user level applications to obtain information about the CPU. In ARM architectures, there are many registers (MIDR [[2](#references)], CCSIDR [[3](#references)]) that provide information about the CPU too. However, those registers can only be read from privilege mode (PL1 or higher). Therefore, any user level tool which can actually read information about the running CPU must use the operating system to do so. cpufetch uses some Linux kernel features (see the remaining sections). Therefore, cpufetch in ARM processors is limited to Linux kernel based systems, such as __GNU/Linux__ and __Android__
+
+### 3. How to get CPU microarchitecture?
+__Involved code: [get_midr_from_cpuinfo (udev.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/arm/udev.c), [midr.c](https://github.com/Dr-Noob/cpufetch/blob/master/src/arm/midr.c)__
+
+Microarchitecture information is acquired from the Main ID Register (MIDR) [[2](#references)]. Currently, cpufetch rebuilds this register using `/proc/cpuinfo` file. While this file does not contain the value of the register per se, it contains the following fields:
+- `CPU implementer`,
+- `CPU architecture`
+- `CPU variant`
+- `CPU part`
+- `CPU revision`
+
+The MIDR register can be built with this information. Another possible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1`
+
+With the MIDR available, the approach is the same as the one used in x86_64 architectures. cpufetch has a file that acts like a database that tries to match the MIDR register with the specific CPU microarchitecture.
+
+### 4. How to get CPU topology?
+__Involved code: [get_ncores_from_cpuinfo (udev.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/arm/udev.c), [midr.c](https://github.com/Dr-Noob/cpufetch/blob/master/src/arm/midr.c)__
+
+ARM provides a new interesting architecture feature: big.LITTLE architectures [[4](#references)]. An ARM CPU can be organized like a typical x86_64 CPU, where all cores share the same microarchitecture. However, ARM big.LITTLE architecture breaks this schema. In a big.LITTLE CPU, two or more CPUs microarchitecture live in the same chip.
+
+This means that cpufetch can't just read which microarchitecture is the first core and assume that the rest of them shares the same microarchitecture. To get the CPU topology, cpufetch first reads the number of CPU cores. This can be obtained from `/sys/devices/system/cpu/present`
+
+Then, for each core, cpufetch reads the MIDR and also the frequency (see section 5). Then, cpufetch assumes that two cores are different when their MIDR are different. This idea allows cpufetch to detect big.LITTLE architectures, and to know how many cores of each architecture the running CPU has.
+
+### 5. How to get the frequency?
+Frequency is read directly from `/sys/devices/system/cpu/cpu*/cpufreq/cpuinfo_max_freq`
+
+### 6. How to get system on chip model?
+__Involved code: [soc.c](https://github.com/Dr-Noob/cpufetch/blob/master/src/arm/soc.c)__
+
+System on chip (SoC) model is obtained using the same idea as the microarchitecture. First, SoC string is read. Then, the string has to be matched against a database-like function (__parse_soc_from_string__). The SoC string of the running CPU can be obtained using two different approaches:
+
+- Using `/proc/cpuinfo`. This is the first thing to try. Linux kernel usually provides the string under the `Hardware` keyword. However, the Linux kernel may be unable to provide this information, or this string may not be found in the database-like function.
+- Using Android properties: This only works on Android systems. Android properties can be read using `__system_property_get` function. cpufetch tries to read two properties:
+  - `ro.mediatek.platform`
+  - `ro.product.board`
+
+  If any string is returned, cpufetch tries to find a match in the database (using the same database as in the case of `/proc/cpuinfo`).
+
+The expected strings have to be hardcoded. I found two ways of knowing which string should correspond to which SoC:
+
+  - Searching on the internet. Manufacturers __usually__ provide this information. For example, Qualcomm usually publishes the chip name along with other characteristics (under the `Part` or `Part number` keyword [[6](#references)]).
+  - "Hunting" for the strings. For example, finding smartphones with a given SoC and manually reading the `/proc/cpuinfo` or the `build.prop` file. A very good resource to do this is the SpecDevice webpage [[7](#references)]).
+
+### 7. How to get cache size and topology?
+ARM architecture supports reading the cache information via some registers (for example, the CCSIDR register  [[3](#references)]). As mentioned earlier, user level applications are not able to read these registers directly. The remaining option is to ask the operating system for this information. However, at the moment, the __Linux kernel does not provide cache information__. Therefore, cpufetch does not print any cache information on ARM CPUs at the moment. There are, however, other approaches to be explored:
+
+- Read the registers in kernel mode. This can be accomplished by running a kernel module [[4](#references)]. Unfortunately, running a custom kernel module is tricky, and sometimes impossible to do reasonably (for example, in Android devices). In any case, my decision is to run cpufetch on user level only.
+- Hardcode the cache information for each SoC: Sometimes, manufacturers publish technical information about the chips, where cache topology and size are shown. This method is impractical, since this kind of information is very hard (or impossible) to find online, and the number of SoC is huge.
+
+#### References
+- [1] [cpufetch x86_64 documentation](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_X86.md)
+- [2] [Main ID Register](https://developer.arm.com/documentation/ddi0433/c/system-control/register-descriptions/main-id-register)
+- [3] [Cache size ID Register](https://developer.arm.com/documentation/100403/0200/register-descriptions/aarch32-system-registers/ccsidr--cache-size-id-register)
+- [4] [How to get the size of the CPU cache in Linux](https://stackoverflow.com/a/63474811/9975463)
+- [5] [ARM big.LITTLE](https://en.wikipedia.org/wiki/ARM_big.LITTLE)
+- [6] [Snapdragon 855+ Mobile Platform](https://www.qualcomm.com/products/snapdragon-855-plus-mobile-platform)
+- [7] [SpecDevice](http://specdevice.com/unmoderated.php)

doc/DOCUMENTATION_PPC.md

@@ -0,0 +1,26 @@
+### 2. How to get CPU microarchitecture?
+__Involved code: [get_uarch_from_pvr (uarch.c)](https://github.com/Dr-Noob/cpufetch/src/ppc/uarch.c)__
+
+Microarchitecture is deduced from the PVR register, which is read using the `mfpvr` instruction. The correspondence between the PVR and the specific microarchitecture has been implemented using the values in `arch/powerpc/kernel/cputable.c` in the Linux kernel. Some of them have been removed. The manufacturing process has been queried by searching on the internet.
+
+### 3. How to get CPU topology?
+__Involved code: [get_topology_info (ppc.c)](https://github.com/Dr-Noob/cpufetch/src/ppc/ppc.c)__
+
+The total number of cores is queried using `sysconf(_SC_NPROCESSORS_ONLN)`. Then, with the number of sockets and the number of physical cores, we can calculate the number of threads per core.
+
+The number of sockets is queried using `/sys/devices/system/cpu/cpu*/topology/physical_package_id`. Once this file has been read for all of the cores, a simple custom algorithm is used to determine the number of sockets.
+
+The number of physical cores is queried using `/sys/devices/system/cpu/cpu*/topology/core_id`. Again, a custom algorithm is used to determine the number of physical cores.
+
+### 4. How to get the frequency?
+Frequency is read directly from `/sys/devices/system/cpu/cpu*/cpufreq/cpuinfo_max_freq`
+
+### 5. How to get cache size and topology?
+Cache size is retrieved directly from Linux (using `/sys/devices/system/cpu/cpu0/cache/index*/size`).
+
+To find the cache topology, the files `/sys/devices/system/cpu/cpu0/cache/index*/shared_cpu_map` are used, and a custom algorithm is used to determine how many caches are there at each level.
+
+_NOTE_: To avoid Linux dependencies at this point, it looks like it is possible to derive the cache size and topology from the microarchitecture. For example, in the POWER9 architecture, wikichip assumes that all the POWER9 CPUs have the same cache size for each core and topology [[1](#references)].
+
+#### References
+- [1] [POWER9 - wikichip](https://en.wikichip.org/wiki/ibm/microarchitectures/power9)

doc/DOCUMENTATION_X86.md

@@ -1,40 +1,38 @@
 ### 2. Why differences between Intel and AMD?
-There are many different CPUID leaves (see [Useful documentation](#useful-documentation)). However, there are cases where a given leaf does the same thing in Intel and AMD, but the majority of them, they don't. For example, leaf 0x4 gives you the caches information, but in
-AMD is a reserved (invalid) leaf! In the case of AMD, is more common to fetch information using extended levels than using the standard levels (the other way around with Intel).
+There are many different CPUID leaves [[1](#references)]. In some cases, a given leaf does the same thing in Intel and AMD processors, but in the majority of them, they don't. For example, leaf 0x4 gives you the caches information, but in AMD is a reserved (invalid) leaf! In the case of AMD, is more common to fetch information using extended levels than using the standard levels (the other way around with Intel).
 
 ### 3. How to get the frequency?
-__Involved code: get_frequency_info (cpuid.c)__
+__Involved code: [get_frequency_info (cpuid.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.c)__
 
-We use CPUID leaf 0x16.
+CPUID leaf 0x16 is used.
 
-If the CPU supports it, we are done. If not:
-- Linux: cpufetch will try to obtain this information using `/sys` filesystem in Linux. I think that, in this case, Linux knows the frequency using MSRs, so at the user level you can't know it, but I will look at the kernel source code to check it.
-- Windows: We are dead. cpufetch can't fetch CPU frequency. This means that peak performance can't be computed because the frequency is needed to compute it.
+If the CPU does not support supports such level:
+- Linux: cpufetch will try to obtain this information using `/sys` filesystem in Linux. I think that Linux knows the frequency using model specific registers (MSRs), which you can't read at the user level.
+- Windows: cpufetch can't obtain CPU frequency. This means that peak performance can't be computed because the frequency is needed to compute it.
 
 ### 4. How to get cache sizes?
-__Involved code: get_cache_info (cpuid.c)__
+__Involved code: [get_cache_info (cpuid.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.c)__
 
-- Intel: We use CPUID leaf 0x4
-- AMD: We use extended CPUID leaf 0x1D
+- Intel: CPUID leaf 0x4 is used (using __get_cache_info_general__). If the CPU does not support it, cpufetch can't get this information.
+- AMD: Extended CPUID leaf 0x1D is used (using __get_cache_info_general__). If the CPU does not support this level, cpufetch uses a fallback method, which uses extended leaves 0x5 and 0x6. This fallback method uses __get_cache_info_amd_fallback__.
 
-If CPU does not support it, we are dead: cpufetch can't get this information. If CPU does, we can fetch it, and 0x4 in Intel behaves the same way as 0x1D in AMD.
 
 ### 5. How to get CPU microarchitecture?
-__Involved code: get_cpu_uarch (cpuid.c), get_uarch_from_cpuid (uarch.c)__
+__Involved code: [get_cpu_uarch (cpuid.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.c), [get_uarch_from_cpuid (uarch.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/uarch.c)__
 
-We use CPUID leaf 0x1. From there, we get:
+CPUID leaf 0x1 is used. From there, we get:
 - Model
 - Extended Model
 - Family
 - Extended Family
 - Stepping
 
-Knowing this information, we can distinguish any CPU microarchitecture. Inside __uarch.c__ there is a function that behaves as it had a database. It will search, for this information, what kind of microarchitecture the current CPU is. I got the data using and adapting the code form Todd Allen's cpuid program (Link 5 in [Useful documentation](#useful-documentation)). From the microarchitecture, we can obtain the manufacturing process (or technology, the size in nm of the transistors).
+Knowing this information, we can distinguish any CPU microarchitecture. Inside __uarch.c__ there is a function that behaves like a database or a lookup table. The function of this database is to find a match between the information obtained from 0x1 and what kind of microarchitecture the current CPU is. I got the data using and adapting the code from Todd Allen's cpuid program [[5](#references)]. Knowing the microarchitecture, we can obtain the manufacturing process (or technology, the size in nm of the transistors).
 
 ### 6. How to get CPU topology?
-__Involved code: cpuid.h, get_topology_info (cpuid.c), apic.c__
+__Involved code: [cpuid.h](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.h), [get_topology_info (cpuid.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.c), [apic.c](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/apic.c)__
 
-cpufetch tries to support the most complex systems, so it supports multi socket CPUs and a detailed SMT (Intel HyperThreading) information. The CPU topology is stored like this:
+cpufetch aims to support the most complex systems, so it supports multi-socket CPUs and detailed SMT (Intel HyperThreading) information. The CPU topology is stored in the following struct:
 
 ```
 struct topology {
@@ -52,7 +50,7 @@ This structure needs a bit of explanation, to know what are we looking for:
 - `logical_cores`: Number of logical cores. In a multi socket system, this field stores the number of logical cores for just one socket.
 - `total_cores`: Total number of logical cores. In a multi socket system, this field stores the number of logical cores for the entire system.
 - `sockets`: How many sockets the system has.
-- `smt_supported`: Stores if SMT (or Intel HT) is supported in the CPU, storing the number of threads per core. So, if `smt_supported == 1`, it means that there is 1 thread per core, and SMT is not supported. If SMT is supported, then `smt_supported >= 1`. Note this field tells if CPU if supports it, but not if SMT is activated or not.
+- `smt_supported`: Stores if SMT (or Intel HT) is supported in the CPU, storing the number of threads per core. So, if `smt_supported == 1`, it means that there is 1 thread per core, and SMT is not supported. If SMT is supported, then `smt_supported >= 1`. Note this field tells if the CPU if supports it, but not if SMT is activated or not.
 - `smt_available`: The same idea as `smt_supported`, but it stores if SMT is available. If SMT is not supported, then `smt_available` is always `1`. The differentiation between supported and available lets cpufetch distinguish when a CPU has SMT capabilities, but are disabled (probably in the BIOS).
 
 Let's give two CPU examples and the values that `struct topology` would have in these CPUs.
@@ -80,8 +78,8 @@ sockets = 1
 
 Now that we know what data are we looking for, let's see how we get it:
 
-- __Intel__: We use the methodology explained in the Intel webpage (Link 2 in [Useful documentation](#useful-documentation)). Here, Intel explains how to do it and also gives an example source code. I used it and modified it to fit cpufetch style. The core of this methodology is the usage of the APIC id, so the code is inside __apic.c__.
-- __AMD__: Intel's algorithm using APIC does not work for AMD. To get the same information in AMD, I used the reference from OSdev(Link 3 in [Useful documentation](#useful-documentation)) and also ideas from lscpu(Link 4 in [Useful documentation](#useful-documentation)). This uses:
+- __Intel__: The methodology used is explained in the Intel webpage [[2](#references)]. Intel explains how to do it and also gives an example source code. I used it and modified it to fit cpufetch style. The core of this methodology is the usage of the APIC id, so the code is inside __apic.c__.
+- __AMD__: Intel's algorithm using APIC does not work for AMD. To get the same information in AMD, I used the reference from OSdev [[3](#references)] and also ideas from lscpu [[4](#references)]. This uses:
   - CPUID extended leaf 0x8: Fill `logical_cores`
   - CPUID extended leaf 0x1E: Fill `smt_supported`
   - CPUID standard leaf 0x1 (APIC): Fill `smt_available`
@@ -97,25 +95,26 @@ Now that we know what data are we looking for, let's see how we get it:
   ```
 
 ### 7. How to get cache topology?
-__Involved code: get_cache_topology_amd (cpuid.c), apic.c__
+__Involved code: [get_cache_topology_amd (cpuid.c)](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/cpuid.c), [apic.c](https://github.com/Dr-Noob/cpufetch/blob/master/src/x86/apic.c)__
 
-The topology is reduced to the idea of how many caches we have at a given level. It usually follows the rule of:
+The topology of a cache gives us information about how many caches we have at a given level. It usually follows the rule of:
 - L1: The same as the number of cores (one L1i and one L1d per core).
 - L2: If L2 is the last level cache, one L2. If not, the same as the number of cores (one L2 per core).
 - L3: One L3 cache per socket (shared among all cores).
 
-These assumptions are generally (but not always) true. For example, for the AMD Zen generation, or the Intel Xeon Phi KNL. Thus, cpufetch does not assume the topology and tries to fetch it instead.
+These assumptions are generally (but not always) true. For example, for the AMD Zen generation, or the Intel Xeon Phi KNL. Thus, cpufetch does not assume the topology but obtains it instead.
 
-- __Intel__: We can use the methodology explained in the Intel webpage (Link 2 in [Useful documentation](#useful-documentation)) again (it also covers how to get cache topology using APIC id).
+- __Intel__: The idea is similar to the mentioned in CPU topology [[2](#references)](it also covers how to get cache topology using APIC id).
 
-- __AMD__: Again, we have to look another path for AMD. This time, the way to do it is easier and (I think) more solid and future proof. We just use extended CPUID leaf 0x1D. If the CPU does not support it, we can still guess the topology of the caches (as mentioned earlier). If it does, CPUID can give us how many cores shares a given level of cache. So, if we have the number of cores, we can guess how many caches are there for any given level (see __get_cache_topology_amd__).
+- __AMD__: Again, we have to look for another path for AMD. This time, the way to do it is easier and (I think) more solid and future proof. The idea is to use extended CPUID leaf 0x1D. If the CPU does not support it, we can still guess the topology of the caches (as mentioned earlier). If it does, CPUID can give us how many cores shares a given level of cache. So, if we have the number of cores, we can guess how many caches are there for any given level (see __get_cache_topology_amd__).
 
-#### Useful documentation
-- Link 1: [sandpile CPUID webpage](https://www.sandpile.org/x86/cpuid.htm)
-- Link 2: [CPU topology and cache topology: Intel](https://software.intel.com/content/www/us/en/develop/articles/intel-64-architecture-processor-topology-enumeration.html)
-- Link 3: [CPU topology: AMD](https://wiki.osdev.org/Detecting_CPU_Topology_(80x86))
-- Link 4: [lscpu](https://github.com/karelzak/util-linux/blob/master/sys-utils/lscpu.c)
-- Link 5: [Todd Allen's cpuid](http://www.etallen.com/cpuid.html)
-- Link 6: [AMD specific CPUID specification](https://www.amd.com/system/files/TechDocs/25481.pdf)
+#### References
+- [1] [sandpile CPUID webpage](https://www.sandpile.org/x86/cpuid.htm)
+- [2] [CPU topology and cache topology: Intel](https://software.intel.com/content/www/us/en/develop/articles/intel-64-architecture-processor-topology-enumeration.html)
+- [3] [CPU topology: AMD](https://wiki.osdev.org/Detecting_CPU_Topology_(80x86))
+- [4] [lscpu](https://github.com/karelzak/util-linux/blob/master/sys-utils/lscpu.c)
+- [5] [Todd Allen's cpuid](http://www.etallen.com/cpuid.html)
+- [6] [AMD specific CPUID specification](https://www.amd.com/system/files/TechDocs/25481.pdf)
+- [7] [Intel vs AMD CPU Architectural Differences: Chips and Chiplets](https://c.mi.com/thread-2585048-1-0.html)
 
-In addition to all these resources, I found very interesting to search in the Linux kernel source code (for example, the directory `arch/x86/kernel/cpu/`), because sometetimes you can find ideas that cannot be found anywhere else!
+In addition to all these resources, I found it very interesting to search in the Linux kernel source code (for example, the directory [`arch/x86/kernel/cpu/`](https://elixir.bootlin.com/linux/latest/source/arch/x86/kernel/cpu)), because sometimes you can find ideas that cannot be found anywhere else!

doc/README.md

@@ -1,12 +1,16 @@
-# cpufetch programming documentation (v0.88)
-This documentation explains how cpufetch works internally and all the design decisions I made. The intention of this documentation is to be useful for me in the future, for everyone interested in the project, and for anyone who is trying to obtain any specific information from the CPU. In this way, this can be used as a manual or a page which collects interesting material in this area.
+# cpufetch programming documentation (v0.98)
+This documentation explains how cpufetch works internally and all the design decisions I made. This document intends to be useful for me in the future, for everyone interested in the project, and for anyone who is trying to obtain any specific information from the CPU. In this way, this can be used as a manual or a page that collects interesting material in this area.
 
 ### 1. Basics
-cpufetch works for __x86_64__ CPUs (Intel and AMD) and experimental support for __ARM__. Other kinds of x86_64 CPU are not supported (I don't think supporting other CPUs may pay off). Depending on the architecture, cpufetch choose certain files to be compiled. A summarized tree of the source code of cpufetch is shown below.
+cpufetch works for __x86_64__ (Intel and AMD),  __ARM__ and __PowerPC__ CPUs. However, cpufetch is expected to work better on x86_64, because the codebase is older and has been tested much more than the ARM and PowerPC versions. Depending on the architecture, cpufetch choose certain files to be compiled. A summarized tree of the source code of cpufetch is shown below.
 
 ```
 cpufetch/
-├── DOCUMENTATION.md
+├── doc
+│   ├── DOCUMENTATION_ARM.md
+|   ├── DOCUMENTATION_PPC.md
+│   ├── DOCUMENTATION_X86.md
+│   └── README.md
 ├── Makefile
 ├── README.md
 └── src/
@@ -16,23 +20,28 @@ cpufetch/
     │   └── other files ...
     ├── common/
     │   └── common files ...
+    ├── ppc/
+    |   ├── ppc.c
+    |   ├── ppc.h
+    |   └── other files ...
     └── x86/
         ├── cpuid.c
         ├── cpuid.h
         └── other files ...
 ```
 
-Source code is divided in three directories:
+Source code is divided into four directories:
 
-- `common/`: Source code shared beteen x86 and ARM
-- `arm/`: ARM dependant source code
-- `x86/`: x86_64 dependant source code
+- `common/`: Source code shared between all architectures
+- `arm/`: ARM source code
+- `ppc/`: PowerPC source code
+- `x86/`: x86 source code
 
 ##### 1.1 Basics (x86_64)
 
-In x86, __cpufetch works using the CPUID instruction__. It is called directly using assembly (see `src/x86/cpuid_asm.c`). To understand how CPUID works you may have a look at the [Useful documentation](https://github.com/Dr-Noob/cpufetch/blob/master/DOCUMENTATION_x86.md#useful-documentation) section (more precisely, Link 1).
+In x86, __cpufetch works using the CPUID instruction__. It is called directly using assembly (see `src/x86/cpuid_asm.c`). To understand how CPUID works, see [DOCUMENTATION_X86.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_X86.md).
 
-At the beginning of execution, cpufetch needs to know the max standard CPUID level and max CPUID extended level supported in the running CPU. We also need to know if the x86 CPU is Intel or AMD because some fetching depends on it. This information will be stored in:
+At the beginning of execution, cpufetch needs to know the max standard CPUID level and max CPUID extended level supported in the running CPU. We also need to know if the x86 CPU is Intel or AMD because sometimes, the way to obtain the information depends on the manufacturer. This information will be stored in:
 
 ```
 struct cpuInfo {
@@ -44,13 +53,17 @@ struct cpuInfo {
 };
 ```
 
-To use any CPUID leaf, we always need to check that it is supported in the current CPU. cpufetch will always check if the leaf is supported in the current CPU, and will use a different workaround if the CPU is Intel or AMD, which leads us to the following section.
+To use any CPUID leaf, cpufetch always needs to check that it is supported in the current CPU.
 
 ##### 1.2 Basics (ARM)
-In ARM, __cpufetch works using the MIDR register and Linux filesystem__. MIDR (Main ID Register) is fetched from `/proc/cpuinfo`. It allows the detection of the microarchitecture of the cores. Furthermore, Linux filesystem `/sys/devices/system/cpu/` is used to fetch the number of cores, and other information. This is the main reason to explain __why `cpufetch` only works on Linux kernel based systems.__
+In ARM, __cpufetch works using the MIDR register and Linux filesystem__. MIDR (Main ID Register) is read from `/proc/cpuinfo`. It allows the detection of the microarchitecture of the cores. Furthermore, Linux filesystem `/sys/devices/system/cpu/` is used to fetch the number of cores and other information. This is the main reason to explain __why `cpufetch` for ARM only works on Linux systems.__
 
-##### 1.3 Documentation organization
-The rest of the documentation is divided into x86 and ARM architectures, since each one need different implementations:
+##### 1.3 Basics (PowerPC)
+In PowerPC, __cpufetch works using the PVR register and Linux filesystem__. PVR (Processor Version Register) is read using assembly and it is used to identify the microarchitecture of the CPU. Linux is also used to query the rest of the information, like the CPU topology, frequency, etc. This is the main reason to explain __why `cpufetch` for PowerPC only works on Linux systems.__
+
+##### 1.4 Documentation organization
+The rest of the documentation is divided in specific files for each architecture, since each one needs different implementations:
 
-- [DOCUMENTATION_X86.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_X86.md)
 - [DOCUMENTATION_ARM.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_ARM.md)
+- [DOCUMENTATION_PPC.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_PPC.md)
+- [DOCUMENTATION_X86.md](https://github.com/Dr-Noob/cpufetch/blob/master/doc/DOCUMENTATION_X86.md)

src/arm/midr.c

@@ -4,8 +4,19 @@
 #include <assert.h>
 #include <stdbool.h>
 #include <errno.h>
-#include <sys/auxv.h>
-#include <asm/hwcap.h>
+
+#ifdef __linux__
+  #include <sys/auxv.h>
+  #include <asm/hwcap.h>
+#elif defined __APPLE__ || __MACH__
+  #include "sysctl.h"
+  // From Linux kernel: arch/arm64/include/asm/cputype.h
+  #define MIDR_APPLE_M1_ICESTORM  0x610F0220
+  #define MIDR_APPLE_M1_FIRESTORM 0x610F0230
+  #ifndef CPUFAMILY_ARM_FIRESTORM_ICESTORM
+    #define CPUFAMILY_ARM_FIRESTORM_ICESTORM 0x1B588BB3
+  #endif
+#endif
 
 #include "../common/global.h"
 #include "udev.h"
@@ -13,29 +24,12 @@
 #include "uarch.h"
 #include "soc.h"
 
-#define STRING_UNKNOWN    "Unknown"
-
-void init_cache_struct(struct cache* cach) {
-  cach->L1i = malloc(sizeof(struct cach));
-  cach->L1d = malloc(sizeof(struct cach));
-  cach->L2 = malloc(sizeof(struct cach));
-  cach->L3 = malloc(sizeof(struct cach));
-
-  cach->cach_arr = malloc(sizeof(struct cach*) * 4);
-  cach->cach_arr[0] = cach->L1i;
-  cach->cach_arr[1] = cach->L1d;
-  cach->cach_arr[2] = cach->L2;
-  cach->cach_arr[3] = cach->L3;
-
-  cach->max_cache_level = 0;
-  cach->L1i->exists = false;
-  cach->L1d->exists = false;
-  cach->L2->exists = false;
-  cach->L3->exists = false;
+bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
+  return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
 }
 
-struct cache* get_cache_info(struct cpuInfo* cpu) { 
-  struct cache* cach = malloc(sizeof(struct cache));
+struct cache* get_cache_info(struct cpuInfo* cpu) {
+  struct cache* cach = emalloc(sizeof(struct cache));
   init_cache_struct(cach);
 
   cach->max_cache_level = 2;
@@ -49,45 +43,60 @@ struct cache* get_cache_info(struct cpuInfo* cpu) {
 }
 
 struct frequency* get_frequency_info(uint32_t core) {
-  struct frequency* freq = malloc(sizeof(struct frequency));
+  struct frequency* freq = emalloc(sizeof(struct frequency));
 
-  freq->base = UNKNOWN_FREQ;
+  freq->base = UNKNOWN_DATA;
   freq->max = get_max_freq_from_file(core);
 
   return freq;
 }
 
-struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint32_t* midr_array, int socket_idx, int ncores) {
-  struct topology* topo = malloc(sizeof(struct topology));
+struct topology* get_topology_info(struct cpuInfo* cpu, struct cache* cach, uint32_t* midr_array, int32_t* freq_array, int socket_idx, int ncores) {
+  struct topology* topo = emalloc(sizeof(struct topology));
+  init_topology_struct(topo, cach);
 
-  topo->cach = cach;
-  topo->total_cores = 0;
-  
   int sockets_seen = 0;
   int first_core_idx = 0;
   int currrent_core_idx = 0;
   int cores_in_socket = 0;
-  
+
   while(socket_idx + 1 > sockets_seen) {
-    if(midr_array[first_core_idx] == midr_array[currrent_core_idx] && currrent_core_idx < ncores) {
+    if(currrent_core_idx < ncores && cores_are_equal(first_core_idx, currrent_core_idx, midr_array, freq_array)) {
       currrent_core_idx++;
       cores_in_socket++;
     }
     else {
-      topo->total_cores = cores_in_socket;  
+      topo->total_cores = cores_in_socket;
       cores_in_socket = 0;
       first_core_idx = currrent_core_idx;
       sockets_seen++;
     }
   }
-  
+
   return topo;
 }
 
-bool cores_are_equal(int c1pos, int c2pos, uint32_t* midr_array, int32_t* freq_array) {
-  return midr_array[c1pos] == midr_array[c2pos] && freq_array[c1pos] == freq_array[c2pos];
+int64_t get_peak_performance(struct cpuInfo* cpu) {
+  struct cpuInfo* ptr = cpu;
+
+  //First check we have consistent data
+  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    if(get_freq(ptr->freq) == UNKNOWN_DATA) {
+      return -1;
+    }
+  }
+
+  int64_t flops = 0;
+
+  ptr = cpu;
+  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
+    flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000);
+  }
+  if(cpu->feat->NEON) flops = flops * 4;
+
+  return flops;
 }
-    
+
 uint32_t fill_ids_from_midr(uint32_t* midr_array, int32_t* freq_array, uint32_t* ids_array, int len) {
   uint32_t latest_id = 0;
   bool found;
@@ -128,17 +137,18 @@ void init_cpu_info(struct cpuInfo* cpu) {
 // ARM32 https://elixir.bootlin.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h
 // ARM64 https://elixir.bootlin.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h
 struct features* get_features_info() {
-  struct features* feat = malloc(sizeof(struct features));
+  struct features* feat = emalloc(sizeof(struct features));
   bool *ptr = &(feat->AES);
   for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
     *ptr = false;
   }
-  
+
+#ifdef __linux__
   errno = 0;
   long hwcaps = getauxval(AT_HWCAP);
-  
+
   if(errno == ENOENT) {
-    printWarn("Unable to retrieve AT_HWCAP using getauxval");    
+    printWarn("Unable to retrieve AT_HWCAP using getauxval");
   }
 #ifdef __aarch64__
   else {
@@ -152,7 +162,7 @@ struct features* get_features_info() {
   else {
     feat->NEON = hwcaps & HWCAP_NEON;
   }
-  
+
   hwcaps = getauxval(AT_HWCAP2);
   if(errno == ENOENT) {
     printWarn("Unable to retrieve AT_HWCAP2 using getauxval");
@@ -163,114 +173,157 @@ struct features* get_features_info() {
     feat->SHA1 = hwcaps & HWCAP2_SHA1;
     feat->SHA2 = hwcaps & HWCAP2_SHA2;
   }
-#endif
+#endif // ifdef __aarch64__
+#elif defined __APPLE__ || __MACH__
+  // Must be M1
+  feat->AES = true;
+  feat->CRC32 = true;
+  feat->SHA1 = true;
+  feat->SHA2 = true;
+  feat->NEON = true;
+#endif  // ifdef __linux__
 
   return feat;
 }
 
-struct cpuInfo* get_cpu_info() {
-  struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
+#ifdef __linux__
+struct cpuInfo* get_cpu_info_linux(struct cpuInfo* cpu) {
   init_cpu_info(cpu);
-
   int ncores = get_ncores_from_cpuinfo();
   bool success = false;
-  int32_t* freq_array = malloc(sizeof(uint32_t) * ncores);
-  uint32_t* midr_array = malloc(sizeof(uint32_t) * ncores);  
-  uint32_t* ids_array = malloc(sizeof(uint32_t) * ncores);
+  int32_t* freq_array = emalloc(sizeof(uint32_t) * ncores);
+  uint32_t* midr_array = emalloc(sizeof(uint32_t) * ncores);
+  uint32_t* ids_array = emalloc(sizeof(uint32_t) * ncores);
 
   for(int i=0; i < ncores; i++) {
     midr_array[i] = get_midr_from_cpuinfo(i, &success);
-    
+
     if(!success) {
       printWarn("Unable to fetch MIDR for core %d. This is probably because the core is offline", i);
       midr_array[i] = midr_array[0];
     }
-    
+
     freq_array[i] = get_max_freq_from_file(i);
-    if(freq_array[i] == UNKNOWN_FREQ) {
+    if(freq_array[i] == UNKNOWN_DATA) {
       printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i);
       freq_array[i] = freq_array[0];
-    }    
+    }
   }
   uint32_t sockets = fill_ids_from_midr(midr_array, freq_array, ids_array, ncores);
-  
+
   struct cpuInfo* ptr = cpu;
   int midr_idx = 0;
   int tmp_midr_idx = 0;
   for(uint32_t i=0; i < sockets; i++) {
     if(i > 0) {
-      ptr->next_cpu = malloc(sizeof(struct cpuInfo));      
+      ptr->next_cpu = emalloc(sizeof(struct cpuInfo));
       ptr = ptr->next_cpu;
       init_cpu_info(ptr);
 
       tmp_midr_idx = midr_idx;
       while(cores_are_equal(midr_idx, tmp_midr_idx, midr_array, freq_array)) tmp_midr_idx++;
       midr_idx = tmp_midr_idx;
-    }    
-    
+    }
+
     ptr->midr = midr_array[midr_idx];
     ptr->arch = get_uarch_from_midr(ptr->midr, ptr);
-    
+
     ptr->feat = get_features_info();
     ptr->freq = get_frequency_info(midr_idx);
     ptr->cach = get_cache_info(ptr);
-    ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, i, ncores);
+    ptr->topo = get_topology_info(ptr, ptr->cach, midr_array, freq_array, i, ncores);
   }
-  
+
   cpu->num_cpus = sockets;
-  cpu->hv = malloc(sizeof(struct hypervisor));
+  cpu->hv = emalloc(sizeof(struct hypervisor));
   cpu->hv->present = false;
-  cpu->soc = get_soc();  
+  cpu->soc = get_soc();
+  cpu->peak_performance = get_peak_performance(cpu);
 
   return cpu;
 }
 
+#elif defined __APPLE__ || __MACH__
+void fill_cpu_info_firestorm_icestorm(struct cpuInfo* cpu) {
+  // 1. Fill ICESTORM
+  struct cpuInfo* ice = cpu;
+
+  ice->midr = MIDR_APPLE_M1_ICESTORM;
+  ice->arch = get_uarch_from_midr(ice->midr, ice);
+  ice->cach = get_cache_info(ice);
+  ice->feat = get_features_info();
+  ice->topo = malloc(sizeof(struct topology));
+  ice->topo->cach = ice->cach;
+  ice->topo->total_cores = 4;
+  ice->freq = malloc(sizeof(struct frequency));
+  ice->freq->base = UNKNOWN_DATA;
+  ice->freq->max = 2064;
+  ice->hv = malloc(sizeof(struct hypervisor));
+  ice->hv->present = false;
+  ice->next_cpu = malloc(sizeof(struct cpuInfo));
+
+  // 2. Fill FIRESTORM
+  struct cpuInfo* fire = ice->next_cpu;
+  fire->midr = MIDR_APPLE_M1_FIRESTORM;
+  fire->arch = get_uarch_from_midr(fire->midr, fire);
+  fire->cach = get_cache_info(fire);
+  fire->feat = get_features_info();
+  fire->topo = malloc(sizeof(struct topology));
+  fire->topo->cach = fire->cach;
+  fire->topo->total_cores = 4;
+  fire->freq = malloc(sizeof(struct frequency));
+  fire->freq->base = UNKNOWN_DATA;
+  fire->freq->max = 3200;
+  fire->hv = malloc(sizeof(struct hypervisor));
+  fire->hv->present = false;
+  fire->next_cpu = NULL;
+}
+
+struct cpuInfo* get_cpu_info_mach(struct cpuInfo* cpu) {
+  uint32_t cpu_family = get_sys_info_by_name("hw.cpufamily");
+
+  // Manually fill the cpuInfo assuming that the CPU
+  // is a ARM_FIRESTORM_ICESTORM (Apple M1)
+  if(cpu_family == CPUFAMILY_ARM_FIRESTORM_ICESTORM) {
+    cpu->num_cpus = 2;
+    cpu->soc = get_soc();
+    fill_cpu_info_firestorm_icestorm(cpu);
+    cpu->peak_performance = get_peak_performance(cpu);
+  }
+  else {
+    printBug("Found invalid cpu_family: 0x%.8X", cpu_family);
+    return NULL;
+  }
+
+  return cpu;
+}
+#endif
+
+struct cpuInfo* get_cpu_info() {
+  struct cpuInfo* cpu = malloc(sizeof(struct cpuInfo));
+  init_cpu_info(cpu);
+
+  #ifdef __linux__
+    return get_cpu_info_linux(cpu);
+  #elif defined __APPLE__ || __MACH__
+    return get_cpu_info_mach(cpu);
+  #endif
+}
+
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket) {
   uint32_t size = 3+7+1;
-  char*  string = malloc(sizeof(char)*size);
+  char*  string = emalloc(sizeof(char)*size);
   snprintf(string, size, "%d cores", topo->total_cores);
 
   return string;
 }
 
-char* get_str_peak_performance(struct cpuInfo* cpu) { 
-  //7 for GFLOP/s and 6 for digits,eg 412.14
-  uint32_t size = 7+6+1+1;
-  assert(strlen(STRING_UNKNOWN)+1 <= size);
-  char* string = malloc(sizeof(char)*size);
-  struct cpuInfo* ptr = cpu;
-  
-  //First check we have consistent data
-  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
-    if(get_freq(ptr->freq) == UNKNOWN_FREQ) {
-      snprintf(string, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
-      return string;
-    }
-  }
-
-  double flops = 0.0;
-  
-  ptr = cpu;
-  for(int i=0; i < cpu->num_cpus; ptr = ptr->next_cpu, i++) {
-    flops += ptr->topo->total_cores * (get_freq(ptr->freq) * 1000000);
-  }
-  if(cpu->feat->NEON) flops = flops * 4;
-  
-  if(flops >= (double)1000000000000.0)
-    snprintf(string,size,"%.2f TFLOP/s",flops/1000000000000);
-  else if(flops >= 1000000000.0)
-    snprintf(string,size,"%.2f GFLOP/s",flops/1000000000);
-  else
-    snprintf(string,size,"%.2f MFLOP/s",flops/1000000);
-
-  return string;
-}
-
 char* get_str_features(struct cpuInfo* cpu) {
-  struct features* feat = cpu->feat;  
-  char* string = malloc(sizeof(char) * 25);
+  struct features* feat = cpu->feat;
+  uint32_t max_len = strlen("NEON,SHA1,SHA2,AES,CRC32,") + 1;
   uint32_t len = 0;
-  
+  char* string = ecalloc(max_len, sizeof(char));
+
   if(feat->NEON) {
     strcat(string, "NEON,");
     len += 5;
@@ -291,19 +344,19 @@ char* get_str_features(struct cpuInfo* cpu) {
     strcat(string, "CRC32,");
     len += 6;
   }
-  
+
   if(len > 0) {
     string[len-1] = '\0';
     return string;
   }
-  else  
-    return NULL;    
+  else
+    return NULL;
 }
 
 void print_debug(struct cpuInfo* cpu) {
   int ncores = get_ncores_from_cpuinfo();
   bool success = false;
-  
+
   for(int i=0; i < ncores; i++) {
     printf("[Core %d] ", i);
     long freq = get_max_freq_from_file(i);
@@ -313,16 +366,16 @@ void print_debug(struct cpuInfo* cpu) {
       printf("0x%.8X ", get_midr_from_cpuinfo(0, &success));
     }
     else {
-      printf("0x%.8X ", midr);    
+      printf("0x%.8X ", midr);
     }
-    if(freq == UNKNOWN_FREQ) {
+    if(freq == UNKNOWN_DATA) {
       printWarn("Unable to fetch max frequency for core %d. This is probably because the core is offline", i);
       printf("%ld MHz\n", get_max_freq_from_file(0));
     }
     else {
-      printf("%ld MHz\n", freq);    
+      printf("%ld MHz\n", freq);
     }
-  }    
+  }
 }
 
 void free_topo_struct(struct topology* topo) {

src/arm/midr.h

@@ -7,7 +7,6 @@ struct cpuInfo* get_cpu_info();
 
 uint32_t get_nsockets(struct topology* topo);
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket);
-char* get_str_peak_performance(struct cpuInfo* cpu);
 char* get_str_features(struct cpuInfo* cpu);
 
 void print_debug(struct cpuInfo* cpu);

src/arm/soc.c

@@ -9,7 +9,7 @@
 #include "../common/global.h"
 
 #define min(a,b) (((a)<(b))?(a):(b))
-#define STRING_UNKNOWN    "Unknown"
+#define ARRAY_SIZE(arr)     (sizeof(arr) / sizeof((arr)[0]))
 
 static char* soc_trademark_string[] = {
   [SOC_VENDOR_SNAPDRAGON] = "Snapdragon ",
@@ -17,6 +17,14 @@ static char* soc_trademark_string[] = {
   [SOC_VENDOR_EXYNOS]     = "Exynos ",
   [SOC_VENDOR_KIRIN]      = "Kirin ",
   [SOC_VENDOR_BROADCOM]   = "Broadcom BCM",
+  [SOC_VENDOR_APPLE]      = "Apple "
+};
+
+static char* soc_rpi_string[] = {
+  "BCM2835",
+  "BCM2836",
+  "BCM2837",
+  "BCM2711"
 };
 
 void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t process) {
@@ -24,34 +32,34 @@ void fill_soc(struct system_on_chip* soc, char* soc_name, SOC soc_model, int32_t
   soc->soc_vendor = get_soc_vendor_from_soc(soc_model);
   soc->process = process;
   int len = strlen(soc_name) + strlen(soc_trademark_string[soc->soc_vendor]) + 1;
-  soc->soc_name = malloc(sizeof(char) * len);
+  soc->soc_name = emalloc(sizeof(char) * len);
   memset(soc->soc_name, 0, sizeof(char) * len);
-  sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);    
+  sprintf(soc->soc_name, "%s%s", soc_trademark_string[soc->soc_vendor], soc_name);
 }
 
 bool match_soc(struct system_on_chip* soc, char* raw_name, char* expected_name, char* soc_name, SOC soc_model, int32_t process) {
   if(strlen(raw_name) > strlen(expected_name))
     return false;
-  
+
   int len = strlen(raw_name);
   if(strncmp(raw_name, expected_name, len) != 0) {
     return false;
   }
   else {
     fill_soc(soc, soc_name, soc_model, process);
-    return true;    
+    return true;
   }
 }
 
 char* toupperstr(char* str) {
   int len = strlen(str) + 1;
-  char* ret = malloc(sizeof(char) * len);
+  char* ret = emalloc(sizeof(char) * len);
   memset(ret, 0, sizeof(char) * len);
-  
+
   for(int i=0; i < len; i++) {
-    ret[i] = toupper((unsigned char) str[i]);    
+    ret[i] = toupper((unsigned char) str[i]);
   }
-  
+
   return ret;
 }
 
@@ -59,6 +67,12 @@ char* toupperstr(char* str) {
 #define SOC_EQ(raw_name, expected_name, soc_name, soc_model, soc, process) \
    else if (match_soc(soc, raw_name, expected_name, soc_name, soc_model, process)) return true;
 #define SOC_END else { return false; }
+// Exynos special define
+#define SOC_EXY_EQ(raw_name, tmpsoc, soc_name, soc_model, soc, process)             \
+   sprintf(tmpsoc, "exynos%s", soc_name);                                           \
+   if (match_soc(soc, raw_name, tmpsoc, soc_name, soc_model, process)) return true; \
+   sprintf(tmpsoc, "universal%s", soc_name);                                        \
+   if (match_soc(soc, raw_name, tmpsoc, soc_name, soc_model, process)) return true;
 
 // https://en.wikipedia.org/wiki/Raspberry_Pi
 // http://phonedb.net/index.php?m=processor&id=562&c=broadcom_bcm21663
@@ -68,22 +82,22 @@ bool match_broadcom(char* soc_name, struct system_on_chip* soc) {
 
   if((tmp = strstr(soc_name, "BCM")) == NULL)
     return false;
-  
+
   SOC_START
-  SOC_EQ(tmp, "BCM2835",              "2835",              SOC_BCM_2835,   soc, 65)    
-  SOC_EQ(tmp, "BCM2836",              "2836",              SOC_BCM_2836,   soc, 40)    
-  SOC_EQ(tmp, "BCM2837",              "2837",              SOC_BCM_2837,   soc, 40) 
-  SOC_EQ(tmp, "BCM2837B0",            "2837B0",            SOC_BCM_2837B0, soc, 40) 
-  SOC_EQ(tmp, "BCM2711",              "2711",              SOC_BCM_2711,   soc, 28)  
-  SOC_EQ(tmp, "BCM21553",             "21553",             SOC_BCM_21553,  soc, 65)    
-  SOC_EQ(tmp, "BCM21553-Thunderbird", "21553 Thunderbird", SOC_BCM_21553T, soc, 65)      
-  SOC_EQ(tmp, "BCM21663",             "21663",             SOC_BCM_21663,  soc, 40) 
-  SOC_EQ(tmp, "BCM21664",             "21664",             SOC_BCM_21664,  soc, 40) 
-  SOC_EQ(tmp, "BCM28155",             "28155",             SOC_BCM_28155,  soc, 40) 
-  SOC_EQ(tmp, "BCM23550",             "23550",             SOC_BCM_23550,  soc, 40) 
-  SOC_EQ(tmp, "BCM28145",             "28145",             SOC_BCM_28145,  soc, 40) 
-  SOC_EQ(tmp, "BCM2157",              "2157",              SOC_BCM_2157,   soc, 65) 
-  SOC_EQ(tmp, "BCM21654",             "21654",             SOC_BCM_21654,  soc, 40) 
+  SOC_EQ(tmp, "BCM2835",              "2835",              SOC_BCM_2835,   soc, 65)
+  SOC_EQ(tmp, "BCM2836",              "2836",              SOC_BCM_2836,   soc, 40)
+  SOC_EQ(tmp, "BCM2837",              "2837",              SOC_BCM_2837,   soc, 40)
+  SOC_EQ(tmp, "BCM2837B0",            "2837B0",            SOC_BCM_2837B0, soc, 40)
+  SOC_EQ(tmp, "BCM2711",              "2711",              SOC_BCM_2711,   soc, 28)
+  SOC_EQ(tmp, "BCM21553",             "21553",             SOC_BCM_21553,  soc, 65)
+  SOC_EQ(tmp, "BCM21553-Thunderbird", "21553 Thunderbird", SOC_BCM_21553T, soc, 65)
+  SOC_EQ(tmp, "BCM21663",             "21663",             SOC_BCM_21663,  soc, 40)
+  SOC_EQ(tmp, "BCM21664",             "21664",             SOC_BCM_21664,  soc, 40)
+  SOC_EQ(tmp, "BCM28155",             "28155",             SOC_BCM_28155,  soc, 40)
+  SOC_EQ(tmp, "BCM23550",             "23550",             SOC_BCM_23550,  soc, 40)
+  SOC_EQ(tmp, "BCM28145",             "28145",             SOC_BCM_28145,  soc, 40)
+  SOC_EQ(tmp, "BCM2157",              "2157",              SOC_BCM_2157,   soc, 65)
+  SOC_EQ(tmp, "BCM21654",             "21654",             SOC_BCM_21654,  soc, 40)
   SOC_END
 }
 
@@ -94,7 +108,7 @@ bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
 
   if((tmp = strstr(soc_name, "Hi")) == NULL)
     return false;
-  
+
   SOC_START
   SOC_EQ(tmp, "Hi3620GFC",  "K3V2",  SOC_HISILICON_3620, soc, 40)
   //SOC_EQ(tmp, "?",        "K3V2E", SOC_KIRIN, soc,  ?)
@@ -130,63 +144,75 @@ bool match_hisilicon(char* soc_name, struct system_on_chip* soc) {
 bool match_exynos(char* soc_name, struct system_on_chip* soc) {
   char* tmp;
 
-  if((tmp = strstr(soc_name, "universal")) == NULL)
-    return false;
-  
+  if((tmp = strstr(soc_name, "universal")) != NULL);
+  else if((tmp = strstr(soc_name, "exynos")) != NULL);
+  else return false;
+
+  // Because exynos are recently using "exynosXXXX" instead
+  // of "universalXXXX" as codenames, SOC_EXY_EQ will check for
+  // both cases, since it seems that there are some SoCs that
+  // can appear with both codenames
+
+  // Used by SOC_EXY_EQ
+  char tmpsoc[14];
+
   SOC_START
-  // universalXXXX //
-  SOC_EQ(tmp, "universal3475", "3475", SOC_EXYNOS_3475, soc, 28) 
-  SOC_EQ(tmp, "universal4210", "4210", SOC_EXYNOS_4210, soc, 45)
-  SOC_EQ(tmp, "universal4212", "4212", SOC_EXYNOS_4212, soc, 32)
-  SOC_EQ(tmp, "universal4412", "4412", SOC_EXYNOS_4412, soc, 32)
-  SOC_EQ(tmp, "universal5250", "5250", SOC_EXYNOS_5250, soc, 32)
-  SOC_EQ(tmp, "universal5410", "5410", SOC_EXYNOS_5410, soc, 28)
-  SOC_EQ(tmp, "universal5420", "5420", SOC_EXYNOS_5420, soc, 28)
-  SOC_EQ(tmp, "universal5422", "5422", SOC_EXYNOS_5422, soc, 28)
-  SOC_EQ(tmp, "universal5430", "5430", SOC_EXYNOS_5430, soc, 20)
-  SOC_EQ(tmp, "universal5433", "5433", SOC_EXYNOS_5433, soc, 20)
-  SOC_EQ(tmp, "universal5260", "5260", SOC_EXYNOS_5260, soc, 28)
-  SOC_EQ(tmp, "universal7270", "7270", SOC_EXYNOS_7270, soc, 14)
-  SOC_EQ(tmp, "universal7420", "7420", SOC_EXYNOS_7420, soc, 14)
-  SOC_EQ(tmp, "universal7570", "7570", SOC_EXYNOS_7570, soc, 14)
-  SOC_EQ(tmp, "universal7870", "7870", SOC_EXYNOS_7870, soc, 14)
-  SOC_EQ(tmp, "universal7872", "7872", SOC_EXYNOS_7872, soc, 14)
-  SOC_EQ(tmp, "universal7880", "7880", SOC_EXYNOS_7880, soc, 14)
-  SOC_EQ(tmp, "universal7884", "7884", SOC_EXYNOS_7884, soc, 14)
-  SOC_EQ(tmp, "universal7885", "7885", SOC_EXYNOS_7885, soc, 14)
-  SOC_EQ(tmp, "universal7904", "7904", SOC_EXYNOS_7904, soc, 14)
-  SOC_EQ(tmp, "universal8890", "8890", SOC_EXYNOS_8890, soc, 14)
-  SOC_EQ(tmp, "universal8895", "8895", SOC_EXYNOS_8895, soc, 10)
-  SOC_EQ(tmp, "universal9110", "9110", SOC_EXYNOS_9110, soc, 14)
-  SOC_EQ(tmp, "universal9609", "9609", SOC_EXYNOS_9609, soc, 10)
-  SOC_EQ(tmp, "universal9610", "9610", SOC_EXYNOS_9610, soc, 10)
-  SOC_EQ(tmp, "universal9611", "9611", SOC_EXYNOS_9611, soc, 10)
-  SOC_EQ(tmp, "universal9810", "9810", SOC_EXYNOS_9810, soc, 10)
-  SOC_EQ(tmp, "universal9820", "9820", SOC_EXYNOS_9820, soc,  8)
-  SOC_EQ(tmp, "universal9825", "9825", SOC_EXYNOS_9825, soc,  7)
-  // New exynos. Dont know if they will work //
-  SOC_EQ(tmp, "universal1080", "1080", SOC_EXYNOS_1080, soc,  5)  
-  SOC_EQ(tmp, "universal990",   "990", SOC_EXYNOS_990,  soc,  7)
-  SOC_EQ(tmp, "universal980",   "980", SOC_EXYNOS_980,  soc,  8)    
-  SOC_EQ(tmp, "universal880",   "880", SOC_EXYNOS_880,  soc,  8)
+  SOC_EXY_EQ(tmp, tmpsoc, "3475", SOC_EXYNOS_3475, soc, 28)
+  SOC_EXY_EQ(tmp, tmpsoc, "4210", SOC_EXYNOS_4210, soc, 45)
+  SOC_EXY_EQ(tmp, tmpsoc, "4212", SOC_EXYNOS_4212, soc, 32)
+  SOC_EXY_EQ(tmp, tmpsoc, "4412", SOC_EXYNOS_4412, soc, 32)
+  SOC_EXY_EQ(tmp, tmpsoc, "5250", SOC_EXYNOS_5250, soc, 32)
+  SOC_EXY_EQ(tmp, tmpsoc, "5410", SOC_EXYNOS_5410, soc, 28)
+  SOC_EXY_EQ(tmp, tmpsoc, "5420", SOC_EXYNOS_5420, soc, 28)
+  SOC_EXY_EQ(tmp, tmpsoc, "5422", SOC_EXYNOS_5422, soc, 28)
+  SOC_EXY_EQ(tmp, tmpsoc, "5430", SOC_EXYNOS_5430, soc, 20)
+  SOC_EXY_EQ(tmp, tmpsoc, "5433", SOC_EXYNOS_5433, soc, 20)
+  SOC_EXY_EQ(tmp, tmpsoc, "5260", SOC_EXYNOS_5260, soc, 28)
+  SOC_EXY_EQ(tmp, tmpsoc, "7270", SOC_EXYNOS_7270, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7420", SOC_EXYNOS_7420, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7570", SOC_EXYNOS_7570, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7570", SOC_EXYNOS_7570, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7870", SOC_EXYNOS_7870, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7870", SOC_EXYNOS_7870, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7872", SOC_EXYNOS_7872, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7880", SOC_EXYNOS_7880, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7884", SOC_EXYNOS_7884, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7885", SOC_EXYNOS_7885, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "7904", SOC_EXYNOS_7904, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "8890", SOC_EXYNOS_8890, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "8895", SOC_EXYNOS_8895, soc, 10)
+  SOC_EXY_EQ(tmp, tmpsoc, "9110", SOC_EXYNOS_9110, soc, 14)
+  SOC_EXY_EQ(tmp, tmpsoc, "9609", SOC_EXYNOS_9609, soc, 10)
+  SOC_EXY_EQ(tmp, tmpsoc, "9610", SOC_EXYNOS_9610, soc, 10)
+  SOC_EXY_EQ(tmp, tmpsoc, "9611", SOC_EXYNOS_9611, soc, 10)
+  SOC_EXY_EQ(tmp, tmpsoc, "9810", SOC_EXYNOS_9810, soc, 10)
+  SOC_EXY_EQ(tmp, tmpsoc, "9820", SOC_EXYNOS_9820, soc,  8)
+  SOC_EXY_EQ(tmp, tmpsoc, "9825", SOC_EXYNOS_9825, soc,  7)
+  SOC_EXY_EQ(tmp, tmpsoc, "1080", SOC_EXYNOS_1080, soc,  5)
+  SOC_EXY_EQ(tmp, tmpsoc, "990",  SOC_EXYNOS_990,  soc,  7)
+  SOC_EXY_EQ(tmp, tmpsoc, "980",  SOC_EXYNOS_980,  soc,  8)
+  SOC_EXY_EQ(tmp, tmpsoc, "880",  SOC_EXYNOS_880,  soc,  8)
   SOC_END
 }
 
 bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
   char* tmp;
+  char* soc_name_upper = toupperstr(soc_name);
 
-  if((tmp = strstr(soc_name, "MT")) == NULL)
+  if((tmp = strstr(soc_name_upper, "MT")) == NULL)
     return false;
-  
+
   SOC_START
   // Dimensity //
-  SOC_EQ(tmp, "MT6889",   "Dimensity 1000",  SOC_MTK_MT6889,   soc, 7) 
-  SOC_EQ(tmp, "MT6885Z",  "Dimensity 1000L", SOC_MTK_MT6885Z,  soc, 7) 
-  //SOC_EQ(tmp, "?",      "Dimensity 700",   SOC_MTK_,         soc, 7) 
-  SOC_EQ(tmp, "MT6853",   "Dimensity 720",   SOC_MTK_MT6853,   soc, 7) 
+  SOC_EQ(tmp, "MT6893",   "Dimensity 1200",  SOC_MTK_MT6893,   soc, 6)
+  SOC_EQ(tmp, "MT6891",   "Dimensity 1100",  SOC_MTK_MT6891,   soc, 6)
+  SOC_EQ(tmp, "MT6889",   "Dimensity 1000",  SOC_MTK_MT6889,   soc, 7)
+  SOC_EQ(tmp, "MT6885Z",  "Dimensity 1000L", SOC_MTK_MT6885Z,  soc, 7)
+  //SOC_EQ(tmp, "?",      "Dimensity 700",   SOC_MTK_,         soc, 7)
+  SOC_EQ(tmp, "MT6853",   "Dimensity 720",   SOC_MTK_MT6853,   soc, 7)
   SOC_EQ(tmp, "MT6873",   "Dimensity 800",   SOC_MTK_MT6873,   soc, 7)
   SOC_EQ(tmp, "MT6875",   "Dimensity 820",   SOC_MTK_MT6875,   soc, 7)
-  // Helio //  
+  // Helio //
   SOC_EQ(tmp, "MT6761D",  "Helio A20",       SOC_MTK_MT6761D,  soc, 12)
   SOC_EQ(tmp, "MT6761",   "Helio A22",       SOC_MTK_MT6761,   soc, 12)
   SOC_EQ(tmp, "MT6762D",  "Helio A25",       SOC_MTK_MT6762D,  soc, 12)
@@ -287,7 +313,7 @@ bool match_mediatek(char* soc_name, struct system_on_chip* soc) {
  *
  * If Qualcomm official website reports the SoC name without the initial two or three SKU name,
  * we assume APQ if second number is 0, or MSM if second number is different than 0
- * 
+ *
  * All SoC names here have been retrieved from official Qualcomm resources. However, Linux kernel
  * and Android may report the SoC with slightly different. Therefore, this function needs some
  * rework (e.g, debug with http://specdevice.com/unmoderated.php?lang=en)
@@ -299,11 +325,11 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   if((tmp = strstr(soc_name_upper, "MSM")) != NULL);
   else if((tmp = strstr(soc_name_upper, "SDM")) != NULL);
   else if((tmp = strstr(soc_name_upper, "APQ")) != NULL);
-  else if((tmp = strstr(soc_name_upper, "SM")) != NULL);    
-  else if((tmp = strstr(soc_name_upper, "QM")) != NULL);      
+  else if((tmp = strstr(soc_name_upper, "SM")) != NULL);
+  else if((tmp = strstr(soc_name_upper, "QM")) != NULL);
   else if((tmp = strstr(soc_name_upper, "QSD")) != NULL);
   else return false;
-  
+
   SOC_START
   // Snapdragon S1 //
   SOC_EQ(tmp, "QSD8650",        "S1",        SOC_SNAPD_QSD8650,        soc, 65)
@@ -317,37 +343,37 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "MSM7625A",       "S1",        SOC_SNAPD_MSM7625A,       soc, 45)
   SOC_EQ(tmp, "MSM7225A",       "S1",        SOC_SNAPD_MSM7225A,       soc, 45)
   // Snapdragon S2 //
-  SOC_EQ(tmp, "MSM8655",        "S2",        SOC_SNAPD_MSM8655,        soc, 45) 
-  SOC_EQ(tmp, "MSM8255",        "S2",        SOC_SNAPD_MSM8255,        soc, 45) 
+  SOC_EQ(tmp, "MSM8655",        "S2",        SOC_SNAPD_MSM8655,        soc, 45)
+  SOC_EQ(tmp, "MSM8255",        "S2",        SOC_SNAPD_MSM8255,        soc, 45)
   SOC_EQ(tmp, "APQ8055",        "S2",        SOC_SNAPD_APQ8055,        soc, 45)
   SOC_EQ(tmp, "MSM7630",        "S2",        SOC_SNAPD_MSM7630,        soc, 45)
-  SOC_EQ(tmp, "MSM7230",        "S2",        SOC_SNAPD_MSM7230,        soc, 45)     
+  SOC_EQ(tmp, "MSM7230",        "S2",        SOC_SNAPD_MSM7230,        soc, 45)
   // Snapdragon S3 //
-  SOC_EQ(tmp, "MSM8660",        "S3",        SOC_SNAPD_MSM8660,        soc, 45) 
-  SOC_EQ(tmp, "MSM8260",        "S3",        SOC_SNAPD_MSM8260,        soc, 45)   
-  SOC_EQ(tmp, "APQ8060",        "S3",        SOC_SNAPD_APQ8060,        soc, 45) 
+  SOC_EQ(tmp, "MSM8660",        "S3",        SOC_SNAPD_MSM8660,        soc, 45)
+  SOC_EQ(tmp, "MSM8260",        "S3",        SOC_SNAPD_MSM8260,        soc, 45)
+  SOC_EQ(tmp, "APQ8060",        "S3",        SOC_SNAPD_APQ8060,        soc, 45)
   // Snapdragon S4 //
   SOC_EQ(tmp, "MSM8225",        "S4 Play",   SOC_SNAPD_MSM8225,        soc, 45)
   SOC_EQ(tmp, "MSM8625",        "S4 Play",   SOC_SNAPD_MSM8625,        soc, 45)
-  SOC_EQ(tmp, "APQ8060A",       "S4 Plus",   SOC_SNAPD_APQ8060A,       soc, 28) 
-  SOC_EQ(tmp, "MSM8960",        "S4 Plus",   SOC_SNAPD_MSM8960,        soc, 28) 
-  SOC_EQ(tmp, "MSM8260A",       "S4 Plus",   SOC_SNAPD_MSM8260A,       soc, 28) 
-  SOC_EQ(tmp, "MSM8627",        "S4 Plus",   SOC_SNAPD_MSM8627,        soc, 28)   
-  SOC_EQ(tmp, "MSM8227",        "S4 Plus",   SOC_SNAPD_MSM8227,        soc, 28)   
-  SOC_EQ(tmp, "APQ8064",        "S4 Pro",    SOC_SNAPD_APQ8064,        soc, 28) 
-  SOC_EQ(tmp, "MSM8960T",       "S4 Pro",    SOC_SNAPD_MSM8960T,       soc, 28) 
+  SOC_EQ(tmp, "APQ8060A",       "S4 Plus",   SOC_SNAPD_APQ8060A,       soc, 28)
+  SOC_EQ(tmp, "MSM8960",        "S4 Plus",   SOC_SNAPD_MSM8960,        soc, 28)
+  SOC_EQ(tmp, "MSM8260A",       "S4 Plus",   SOC_SNAPD_MSM8260A,       soc, 28)
+  SOC_EQ(tmp, "MSM8627",        "S4 Plus",   SOC_SNAPD_MSM8627,        soc, 28)
+  SOC_EQ(tmp, "MSM8227",        "S4 Plus",   SOC_SNAPD_MSM8227,        soc, 28)
+  SOC_EQ(tmp, "APQ8064",        "S4 Pro",    SOC_SNAPD_APQ8064,        soc, 28)
+  SOC_EQ(tmp, "MSM8960T",       "S4 Pro",    SOC_SNAPD_MSM8960T,       soc, 28)
   // Snapdragon 2XX //
-  SOC_EQ(tmp, "MSM8110",        "200",       SOC_SNAPD_MSM8110,        soc, 28) 
-  SOC_EQ(tmp, "MSM8210",        "200",       SOC_SNAPD_MSM8210,        soc, 28) 
-  SOC_EQ(tmp, "MSM8610",        "200",       SOC_SNAPD_MSM8610,        soc, 28) 
-  SOC_EQ(tmp, "MSM8112",        "200",       SOC_SNAPD_MSM8112,        soc, 28) 
-  SOC_EQ(tmp, "MSM8212",        "200",       SOC_SNAPD_MSM8212,        soc, 28) 
-  SOC_EQ(tmp, "MSM8612",        "200",       SOC_SNAPD_MSM8612,        soc, 28) 
-  SOC_EQ(tmp, "MSM8225Q",       "200",       SOC_SNAPD_MSM8225Q,       soc, 45) 
-  SOC_EQ(tmp, "MSM8625Q",       "200",       SOC_SNAPD_MSM8625Q,       soc, 45) 
-  SOC_EQ(tmp, "MSM8208",        "208",       SOC_SNAPD_MSM8208,        soc, 28) 
-  SOC_EQ(tmp, "MSM8905",        "205",       SOC_SNAPD_MSM8905,        soc, 28) 
-  SOC_EQ(tmp, "MSM8909",        "210 / 212", SOC_SNAPD_MSM8909,        soc, 28) // In the future, we can differenciate them using frequency
+  SOC_EQ(tmp, "MSM8110",        "200",       SOC_SNAPD_MSM8110,        soc, 28)
+  SOC_EQ(tmp, "MSM8210",        "200",       SOC_SNAPD_MSM8210,        soc, 28)
+  SOC_EQ(tmp, "MSM8610",        "200",       SOC_SNAPD_MSM8610,        soc, 28)
+  SOC_EQ(tmp, "MSM8112",        "200",       SOC_SNAPD_MSM8112,        soc, 28)
+  SOC_EQ(tmp, "MSM8212",        "200",       SOC_SNAPD_MSM8212,        soc, 28)
+  SOC_EQ(tmp, "MSM8612",        "200",       SOC_SNAPD_MSM8612,        soc, 28)
+  SOC_EQ(tmp, "MSM8225Q",       "200",       SOC_SNAPD_MSM8225Q,       soc, 45)
+  SOC_EQ(tmp, "MSM8625Q",       "200",       SOC_SNAPD_MSM8625Q,       soc, 45)
+  SOC_EQ(tmp, "MSM8208",        "208",       SOC_SNAPD_MSM8208,        soc, 28)
+  SOC_EQ(tmp, "MSM8905",        "205",       SOC_SNAPD_MSM8905,        soc, 28)
+  SOC_EQ(tmp, "MSM8909",        "210 / 212", SOC_SNAPD_MSM8909,        soc, 28) // In the future, we can differentiate them using frequency
   SOC_EQ(tmp, "QM215",          "215",       SOC_SNAPD_QM215,          soc, 28)
   // Snapdragon 4XX //
   SOC_EQ(tmp, "APQ8028",        "400",       SOC_SNAPD_APQ8028,        soc, 28)
@@ -424,6 +450,7 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
   SOC_EQ(tmp, "SM8250",         "865",       SOC_SNAPD_SM8250,         soc,  7)
   SOC_EQ(tmp, "SM8250-AB",      "865+",      SOC_SNAPD_SM8250_AB,      soc,  7)
   SOC_EQ(tmp, "SM8350",         "888",       SOC_SNAPD_SM8350,         soc,  5)
+  SOC_EQ(tmp, "SM8350-AC",      "888+",      SOC_SNAPD_SM8350,         soc,  5)
   SOC_END
 }
 
@@ -435,30 +462,35 @@ bool match_special(char* soc_name, struct system_on_chip* soc) {
     fill_soc(soc, "665", SOC_SNAPD_SM6125, 11);
     return true;
   }
-  
-  return false;  
+
+  // Snapdragon 730 reported as "Qualcomm Technologies, Inc. SDMMAGPIE"
+  if((tmp = strstr(soc_name, "SDMMAGPIE")) != NULL) {
+    fill_soc(soc, "730", SOC_SNAPD_SM7150_AA, 8);
+    return true;
+  }
+
+  return false;
 }
 
 struct system_on_chip* parse_soc_from_string(struct system_on_chip* soc) {
   char* raw_name = soc->raw_name;
-  
+
+  if(match_special(raw_name, soc))
+    return soc;
+
   if (match_qualcomm(raw_name, soc))
     return soc;
-  
+
   if(match_mediatek(raw_name, soc))
     return soc;
-  
+
   if(match_exynos(raw_name, soc))
     return soc;
-  
+
   if(match_hisilicon(raw_name, soc))
     return soc;
-  
-  if(match_broadcom(raw_name, soc))
-    return soc;
-  
-  match_special(raw_name, soc);  
-  
+
+  match_broadcom(raw_name, soc);
   return soc;
 }
 
@@ -469,53 +501,122 @@ static inline int android_property_get(const char* key, char* value) {
   return __system_property_get(key, value);
 }
 
+void try_parse_soc_from_string(struct system_on_chip* soc, int soc_len, char* soc_str) {
+  soc->raw_name = emalloc(sizeof(char) * (soc_len + 1));
+  strncpy(soc->raw_name, soc_str, soc_len + 1);
+  soc->raw_name[soc_len] = '\0';
+  soc->soc_vendor = SOC_VENDOR_UNKNOWN;
+  parse_soc_from_string(soc);
+}
+
 struct system_on_chip* guess_soc_from_android(struct system_on_chip* soc) {
   char tmp[100];
   int property_len = 0;
-  
+
   property_len = android_property_get("ro.mediatek.platform", (char *) &tmp);
   if(property_len > 0) {
-    soc->raw_name = malloc(sizeof(char) * (property_len + 1));
-    strncpy(soc->raw_name, tmp, property_len + 1);
-    soc->raw_name[property_len] = '\0';
-    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-    return parse_soc_from_string(soc);
+    try_parse_soc_from_string(soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.mediatek.platform: %s", tmp);
+    else return soc;
   }
-  
+
   property_len = android_property_get("ro.product.board", (char *) &tmp);
-  if(property_len > 0) {    
-    soc->raw_name = malloc(sizeof(char) * (property_len + 1));
-    strncpy(soc->raw_name, tmp, property_len + 1);
-    soc->raw_name[property_len] = '\0';
-    soc->soc_vendor = SOC_VENDOR_UNKNOWN;
-    return parse_soc_from_string(soc);
-  }    
-  
+  if(property_len > 0) {
+    try_parse_soc_from_string(soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.product.board: %s", tmp);
+    else return soc;
+  }
+
+  property_len = android_property_get("ro.board.platform", (char *) &tmp);
+  if(property_len > 0) {
+    try_parse_soc_from_string(soc, property_len, tmp);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) printWarn("SoC detection failed using Android property ro.board.platform: %s", tmp);
+    else return soc;
+  }
+
   return soc;
 }
 #endif
 
 struct system_on_chip* guess_soc_from_cpuinfo(struct system_on_chip* soc) {
-  char* tmp = get_hardware_from_cpuinfo(&strlen);
-  
+  char* tmp = get_hardware_from_cpuinfo();
+
   if(tmp != NULL) {
     soc->raw_name = tmp;
     return parse_soc_from_string(soc);
   }
-  
+
+  return soc;
+}
+
+int hex2int(char c) {
+  if (c >= '0' && c <= '9')
+    return c - '0';
+  if (c >= 'A' && c <= 'F')
+    return c - 'A' + 10;
+  if (c >= 'a' && c <= 'f')
+    return c - 'a' + 10;
+
+  return -1;
+}
+
+// https://www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md
+struct system_on_chip* guess_soc_raspbery_pi(struct system_on_chip* soc) {
+  char* revision = get_revision_from_cpuinfo();
+
+  if(revision == NULL) {
+    printWarn("[RPi] Couldn't find revision field in cpuinfo");
+    return soc;
+  }
+
+  if(strlen(revision) != 6) {
+    printWarn("[RPi] Found invalid RPi revision code: '%s'", revision);
+    return soc;
+  }
+
+  int arr_size = ARRAY_SIZE(soc_rpi_string);
+  int pppp = hex2int(revision[2]);
+  if(pppp == -1) {
+    printErr("[RPi] Found invalid RPi PPPP code: %s", revision[2]);
+    return soc;
+  }
+
+  if(pppp > arr_size) {
+    printErr("[RPi] Found invalid RPi PPPP code: %d while max is %d", pppp, arr_size);
+    return soc;
+  }
+
+  char* soc_raw_name = soc_rpi_string[pppp];
+  /*int soc_len = strlen(soc_raw_name);
+  soc->raw_name = emalloc(sizeof(char) * (soc_len + 1));
+  strncpy(soc->raw_name, soc_raw_name, soc_len + 1);*/
+
+  match_broadcom(soc_raw_name, soc);
   return soc;
 }
 
 struct system_on_chip* get_soc() {
-  struct system_on_chip* soc = malloc(sizeof(struct system_on_chip));
+  struct system_on_chip* soc = emalloc(sizeof(struct system_on_chip));
   soc->raw_name = NULL;
   soc->soc_vendor = SOC_VENDOR_UNKNOWN;
   soc->process = UNKNOWN;
-  
+
+#ifdef __linux__
+  bool isRPi = is_raspberry_pi();
+  if(isRPi) {
+    soc = guess_soc_raspbery_pi(soc);
+    if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
+      printWarn("SoC detection failed using revision code");
+    }
+    else {
+      return soc;
+    }
+  }
+
   soc = guess_soc_from_cpuinfo(soc);
   if(soc->soc_vendor == SOC_VENDOR_UNKNOWN) {
     if(soc->raw_name != NULL)
-      printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);   
+      printWarn("SoC detection failed using /proc/cpuinfo: Found '%s' string", soc->raw_name);
     else
       printWarn("SoC detection failed using /proc/cpuinfo: No string found");
 #ifdef __ANDROID__
@@ -523,16 +624,19 @@ struct system_on_chip* get_soc() {
     if(soc->raw_name == NULL)
       printWarn("SoC detection failed using Android: No string found");
     else if(soc->soc_vendor == SOC_VENDOR_UNKNOWN)
-      printWarn("SoC detection failed using Android: Found '%s' string", soc->raw_name);   
-#endif
+      printWarn("SoC detection failed using Android: Found '%s' string", soc->raw_name);
+#endif // ifdef __ANDROID__
   }
+#elif defined __APPLE__ || __MACH__
+    fill_soc(soc, "M1", SOC_APPLE_M1, 5);
+#endif // ifdef __linux__
 
   if(soc->raw_name == NULL) {
-    soc->raw_name = malloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+    soc->raw_name = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
     snprintf(soc->raw_name, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
   }
-  
-  return soc;    
+
+  return soc;
 }
 
 char* get_soc_name(struct system_on_chip* soc) {
@@ -547,16 +651,15 @@ VENDOR get_soc_vendor(struct system_on_chip* soc) {
 
 char* get_str_process(struct system_on_chip* soc) {
   char* str;
-  
+
   if(soc->process == UNKNOWN) {
-    str = malloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+    str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
     snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
   }
   else {
-    str = malloc(sizeof(char) * 5);
+    str = emalloc(sizeof(char) * 5);
     memset(str, 0, sizeof(char) * 5);
-    snprintf(str, 5, "%dnm", soc->process);    
+    snprintf(str, 5, "%dnm", soc->process);
   }
   return str;
 }
-

src/arm/soc.h

@@ -12,7 +12,8 @@ enum {
   SOC_VENDOR_MEDIATEK,
   SOC_VENDOR_EXYNOS,
   SOC_VENDOR_KIRIN,
-  SOC_VENDOR_BROADCOM
+  SOC_VENDOR_BROADCOM,
+  SOC_VENDOR_APPLE
 };
 
 struct system_on_chip {

src/arm/socs.h

@@ -63,6 +63,8 @@ enum {
   SOC_EXYNOS_980,
   SOC_EXYNOS_880,
   // Mediatek //
+  SOC_MTK_MT6893,
+  SOC_MTK_MT6891,
   SOC_MTK_MT6889,
   SOC_MTK_MT6885Z,
   SOC_MTK_MT6853,
@@ -250,14 +252,17 @@ enum {
   SOC_SNAPD_SM8250,
   SOC_SNAPD_SM8250_AB,
   SOC_SNAPD_SM8350,
+  // APPLE
+  SOC_APPLE_M1
 };
 
 inline static VENDOR get_soc_vendor_from_soc(SOC soc) {
   if(soc >= SOC_BCM_2835 && soc <= SOC_BCM_21654) return SOC_VENDOR_BROADCOM;
   else if(soc >= SOC_HISILICON_3620 && soc <= SOC_HISILICON_3690) return SOC_VENDOR_KIRIN;
   else if(soc >= SOC_EXYNOS_3475 && soc <= SOC_EXYNOS_880) return SOC_VENDOR_EXYNOS;
-  else if(soc >= SOC_MTK_MT6889 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
+  else if(soc >= SOC_MTK_MT6893 && soc <= SOC_MTK_MT8783) return SOC_VENDOR_MEDIATEK;
   else if(soc >= SOC_SNAPD_QSD8650 && soc <= SOC_SNAPD_SM8350) return SOC_VENDOR_SNAPDRAGON;
+  else if(soc >= SOC_APPLE_M1 && soc <= SOC_APPLE_M1) return SOC_VENDOR_APPLE;
   return SOC_VENDOR_UNKNOWN;  
 }
 

src/arm/sysctl.c

@@ -0,0 +1,25 @@
+#include <sys/types.h>
+#include <sys/sysctl.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
+#include "../common/global.h"
+#include "../common/cpu.h"
+
+uint32_t get_sys_info_by_name(char* name) {
+  size_t size = 0;
+  uint32_t ret = 0;
+
+  if (sysctlbyname(name, NULL, &size, NULL, 0) != 0) {
+    printWarn("sysctlbyname(%s) failed: %s", name, strerror(errno));
+  }
+  else if (size == sizeof(uint32_t)) {
+    sysctlbyname(name, &ret, &size, NULL, 0);
+  }
+  else {
+    printWarn("sysctl does not support non-integer lookup for '%s'", name);
+  }
+
+  return ret;
+}

src/arm/sysctl.h

@@ -0,0 +1,6 @@
+#ifndef __SYSCTL__
+#define __SYSCTL__
+
+uint32_t get_sys_info_by_name(char* name);
+
+#endif

src/arm/uarch.c

@@ -7,8 +7,6 @@
 #include "uarch.h"
 #include "../common/global.h"
 
-#define STRING_UNKNOWN    "Unknown"
-
 // Data not available
 #define NA                   -1
 
@@ -24,40 +22,49 @@ struct uarch {
 };
 
 enum {
+  ISA_ARMv6,
+  ISA_ARMv6_T2,
+  ISA_ARMv6_KZ,
+  ISA_ARMv6_K,
   ISA_ARMv7_A,
   ISA_ARMv8_A,
   ISA_ARMv8_A_AArch32,
   ISA_ARMv8_1_A,
   ISA_ARMv8_2_A,
   ISA_ARMv8_3_A,
+  ISA_ARMv8_4_A,
 };
 
 enum {
   UARCH_UNKNOWN,
   // ARM
   UARCH_ARM7,
-  UARCH_ARM9,  
-  UARCH_ARM11,       // ARM 1136, ARM 1156, ARM 1176, or ARM 11MPCore.
-  UARCH_CORTEX_A5,  
-  UARCH_CORTEX_A7,  
-  UARCH_CORTEX_A8,    
-  UARCH_CORTEX_A9,    
-  UARCH_CORTEX_A12,    
-  UARCH_CORTEX_A15,    
-  UARCH_CORTEX_A17,    
-  UARCH_CORTEX_A32,    
-  UARCH_CORTEX_A35,    
-  UARCH_CORTEX_A53,    
+  UARCH_ARM9,
+  UARCH_ARM1136,
+  UARCH_ARM1156,
+  UARCH_ARM1176,
+  UARCH_ARM11MPCORE,
+  UARCH_CORTEX_A5,
+  UARCH_CORTEX_A7,
+  UARCH_CORTEX_A8,
+  UARCH_CORTEX_A9,
+  UARCH_CORTEX_A12,
+  UARCH_CORTEX_A15,
+  UARCH_CORTEX_A17,
+  UARCH_CORTEX_A32,
+  UARCH_CORTEX_A35,
+  UARCH_CORTEX_A53,
   UARCH_CORTEX_A55r0, // ARM Cortex-A55 revision 0 (restricted dual-issue capabilities compared to revision 1+).
-  UARCH_CORTEX_A55, 
-  UARCH_CORTEX_A57, 
-  UARCH_CORTEX_A65, 
-  UARCH_CORTEX_A72, 
-  UARCH_CORTEX_A73, 
-  UARCH_CORTEX_A75, 
+  UARCH_CORTEX_A55,
+  UARCH_CORTEX_A57,
+  UARCH_CORTEX_A65,
+  UARCH_CORTEX_A72,
+  UARCH_CORTEX_A73,
+  UARCH_CORTEX_A75,
   UARCH_CORTEX_A76,
   UARCH_CORTEX_A77,
-  UARCH_CORTEX_A78, 
+  UARCH_CORTEX_A78,
+  UARCH_CORTEX_X1,
   UARCH_NEOVERSE_N1,
   UARCH_NEOVERSE_E1,
   UARCH_SCORPION,
@@ -86,6 +93,8 @@ enum {
   UARCH_TEMPEST,    // Apple A12 processor (big cores).
   UARCH_LIGHTNING,  // Apple A13 processor (big cores).
   UARCH_THUNDER,    // Apple A13 processor (little cores).
+  UARCH_ICESTORM,   // Apple M1 processor (little cores).
+  UARCH_FIRESTORM,  // Apple M1 processor (big cores).
   // CAVIUM
   UARCH_THUNDERX,   // Cavium ThunderX
   UARCH_THUNDERX2,  //  Cavium ThunderX2 (originally Broadcom Vulkan).
@@ -98,6 +107,10 @@ enum {
 };
 
 static const ISA isas_uarch[] = {
+  [UARCH_ARM1136]      = ISA_ARMv6,
+  [UARCH_ARM1156]      = ISA_ARMv6_T2,
+  [UARCH_ARM1176]      = ISA_ARMv6_KZ,
+  [UARCH_ARM11MPCORE]  = ISA_ARMv6_K,
   [UARCH_CORTEX_A5]    = ISA_ARMv7_A,
   [UARCH_CORTEX_A7]    = ISA_ARMv7_A,
   [UARCH_CORTEX_A8]    = ISA_ARMv7_A,
@@ -107,17 +120,18 @@ static const ISA isas_uarch[] = {
   [UARCH_CORTEX_A17]   = ISA_ARMv7_A,
   [UARCH_CORTEX_A32]   = ISA_ARMv8_A_AArch32,
   [UARCH_CORTEX_A35]   = ISA_ARMv8_A,
-  [UARCH_CORTEX_A53]   = ISA_ARMv8_A,  
+  [UARCH_CORTEX_A53]   = ISA_ARMv8_A,
   [UARCH_CORTEX_A55r0] = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A55]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A57]   = ISA_ARMv8_A,
-  [UARCH_CORTEX_A65]   = ISA_ARMv8_2_A,  
+  [UARCH_CORTEX_A65]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A72]   = ISA_ARMv8_A,
   [UARCH_CORTEX_A73]   = ISA_ARMv8_A,
   [UARCH_CORTEX_A75]   = ISA_ARMv8_2_A,
-  [UARCH_CORTEX_A76]   = ISA_ARMv8_2_A,  
+  [UARCH_CORTEX_A76]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A77]   = ISA_ARMv8_2_A,
   [UARCH_CORTEX_A78]   = ISA_ARMv8_2_A,
+  [UARCH_CORTEX_X1]    = ISA_ARMv8_2_A,
   [UARCH_NEOVERSE_N1]  = ISA_ARMv8_2_A,
   [UARCH_NEOVERSE_E1]  = ISA_ARMv8_2_A,
   [UARCH_BRAHMA_B15]   = ISA_ARMv7_A,   // Same as Cortex-A15
@@ -139,34 +153,41 @@ static const ISA isas_uarch[] = {
   [UARCH_EXYNOS_M3]    = ISA_ARMv8_A,
   [UARCH_EXYNOS_M4]    = ISA_ARMv8_2_A,
   [UARCH_EXYNOS_M5]    = ISA_ARMv8_2_A,
+  [UARCH_ICESTORM]     = ISA_ARMv8_4_A,
+  [UARCH_FIRESTORM]    = ISA_ARMv8_4_A,
   [UARCH_PJ4]          = ISA_ARMv7_A,
 };
 
 static char* isas_string[] = {
+  [ISA_ARMv6]  = "ARMv6",
+  [ISA_ARMv6_T2] = "ARMv6T2",
+  [ISA_ARMv6_KZ] = "ARMv6KZ",
+  [ISA_ARMv6_K] = "ARMv6K",
   [ISA_ARMv7_A] = "ARMv7",
   [ISA_ARMv8_A] = "ARMv8",
   [ISA_ARMv8_A_AArch32] = "ARMv8 AArch32",
   [ISA_ARMv8_1_A] = "ARMv8.1",
   [ISA_ARMv8_2_A] = "ARMv8.2",
   [ISA_ARMv8_3_A] = "ARMv8.3",
+  [ISA_ARMv8_4_A] = "ARMv8.4"
 };
 
 #define UARCH_START if (false) {}
 #define CHECK_UARCH(arch, cpu, im_, p_, v_, r_, str, uarch, vendor) \
    else if (im_ == im && p_ == p && (v_ == NA || v_ == v) && (r_ == NA || r_ == r)) fill_uarch(arch, cpu, str, uarch, vendor);
 #define UARCH_END else { printBug("Unknown microarchitecture detected: IM=0x%.8X P=0x%.8X V=0x%.8X R=0x%.8X", im, p, v, r); fill_uarch(arch, cpu, "Unknown", UARCH_UNKNOWN, CPU_VENDOR_UNKNOWN); }
-   
+
 void fill_uarch(struct uarch* arch, struct cpuInfo* cpu, char* str, MICROARCH u, VENDOR vendor) {
-  arch->uarch = u;  
+  arch->uarch = u;
   arch->isa = isas_uarch[arch->uarch];
   cpu->cpu_vendor = vendor;
-  
-  arch->uarch_str = malloc(sizeof(char) * (strlen(str)+1));
+
+  arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1));
   strcpy(arch->uarch_str, str);
-  
-  arch->isa_str = malloc(sizeof(char) * (strlen(isas_string[arch->isa])+1));
-  strcpy(arch->isa_str, isas_string[arch->isa]);  
-}   
+
+  arch->isa_str = emalloc(sizeof(char) * (strlen(isas_string[arch->isa])+1));
+  strcpy(arch->isa_str, isas_string[arch->isa]);
+}
 
 /*
  * Codes are based on pytorch/cpuinfo, more precisely:
@@ -176,12 +197,12 @@ void fill_uarch(struct uarch* arch, struct cpuInfo* cpu, char* str, MICROARCH u,
  * - https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/cputype.h
  */
 struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
-  struct uarch* arch = malloc(sizeof(struct uarch));
+  struct uarch* arch = emalloc(sizeof(struct uarch));
   uint32_t im = midr_get_implementer(midr);
   uint32_t p = midr_get_part(midr);
   uint32_t v = midr_get_variant(midr);
   uint32_t r = midr_get_revision(midr);
-  
+
   // ----------------------------------------------------------------------- //
   // IM: Implementer                                                         //
   // P:  Part                                                                //
@@ -189,7 +210,11 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   // R:  Revision                                                            //
   // ----------------------------------------------------------------------- //
   //                     IM   P      V   R                                   //
-  UARCH_START  
+  UARCH_START
+  CHECK_UARCH(arch, cpu, 'A', 0xB36, NA, NA, "ARM1136",               UARCH_ARM1136,      CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xB56, NA, NA, "ARM1156",               UARCH_ARM1156,      CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xB76, NA, NA, "ARM1176",               UARCH_ARM1176,      CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xB02, NA, NA, "ARM11 MPCore",          UARCH_ARM11MPCORE,  CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xC05, NA, NA, "Cortex-A5",             UARCH_CORTEX_A5,    CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xC07, NA, NA, "Cortex-A7",             UARCH_CORTEX_A7,    CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xC08, NA, NA, "Cortex-A8",             UARCH_CORTEX_A8,    CPU_VENDOR_ARM)
@@ -202,7 +227,7 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'A', 0xD03, NA, NA, "Cortex-A53",            UARCH_CORTEX_A53,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD04, NA, NA, "Cortex-A35",            UARCH_CORTEX_A35,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD05, NA,  0, "Cortex-A55",            UARCH_CORTEX_A55r0, CPU_VENDOR_ARM)
-  CHECK_UARCH(arch, cpu, 'A', 0xD05, NA, NA, "Cortex-A55",            UARCH_CORTEX_A55,   CPU_VENDOR_ARM)  
+  CHECK_UARCH(arch, cpu, 'A', 0xD05, NA, NA, "Cortex-A55",            UARCH_CORTEX_A55,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD06, NA, NA, "Cortex-A65",            UARCH_CORTEX_A65,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD07, NA, NA, "Cortex-A57",            UARCH_CORTEX_A57,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD08, NA, NA, "Cortex-A72",            UARCH_CORTEX_A72,   CPU_VENDOR_ARM)
@@ -213,27 +238,28 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'A', 0xD0D, NA, NA, "Cortex-A77",            UARCH_CORTEX_A77,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD0E, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD41, NA, NA, "Cortex-A78",            UARCH_CORTEX_A78,   CPU_VENDOR_ARM)
+  CHECK_UARCH(arch, cpu, 'A', 0xD44, NA, NA, "Cortex-X1",             UARCH_CORTEX_X1,    CPU_VENDOR_ARM)
   CHECK_UARCH(arch, cpu, 'A', 0xD4A, NA, NA, "Neoverse E1",           UARCH_NEOVERSE_E1,  CPU_VENDOR_ARM)
-     
+
   CHECK_UARCH(arch, cpu, 'B', 0x00F, NA, NA, "Brahma B15",            UARCH_BRAHMA_B15,   CPU_VENDOR_BROADCOM)
   CHECK_UARCH(arch, cpu, 'B', 0x100, NA, NA, "Brahma B53",            UARCH_BRAHMA_B53,   CPU_VENDOR_BROADCOM)
   CHECK_UARCH(arch, cpu, 'B', 0x516, NA, NA, "ThunderX2",             UARCH_THUNDERX2,    CPU_VENDOR_CAVIUM)
-  
+
   CHECK_UARCH(arch, cpu, 'C', 0x0A0, NA, NA, "ThunderX",              UARCH_THUNDERX,     CPU_VENDOR_CAVIUM)
   CHECK_UARCH(arch, cpu, 'C', 0x0A1, NA, NA, "ThunderX 88XX",         UARCH_THUNDERX,     CPU_VENDOR_CAVIUM)
   CHECK_UARCH(arch, cpu, 'C', 0x0A2, NA, NA, "ThunderX 81XX",         UARCH_THUNDERX,     CPU_VENDOR_CAVIUM)
   CHECK_UARCH(arch, cpu, 'C', 0x0A3, NA, NA, "ThunderX 81XX",         UARCH_THUNDERX,     CPU_VENDOR_CAVIUM)
   CHECK_UARCH(arch, cpu, 'C', 0x0AF, NA, NA, "ThunderX2 99XX",        UARCH_THUNDERX2,    CPU_VENDOR_CAVIUM)
-  
+
   CHECK_UARCH(arch, cpu, 'H', 0xD01, NA, NA, "TaiShan v110",          UARCH_TAISHAN_V110, CPU_VENDOR_HUAWUEI) // Kunpeng 920 series
   CHECK_UARCH(arch, cpu, 'H', 0xD40, NA, NA, "Cortex-A76",            UARCH_CORTEX_A76,   CPU_VENDOR_ARM)     // Kirin 980 Big/Medium cores -> Cortex-A76
-  
+
   CHECK_UARCH(arch, cpu, 'N', 0x000, NA, NA, "Denver",                UARCH_DENVER,       CPU_VENDOR_NVIDIA)
   CHECK_UARCH(arch, cpu, 'N', 0x003, NA, NA, "Denver2",               UARCH_DENVER2,      CPU_VENDOR_NVIDIA)
   CHECK_UARCH(arch, cpu, 'N', 0x004, NA, NA, "Carmel",                UARCH_CARMEL,       CPU_VENDOR_NVIDIA)
-  
+
   CHECK_UARCH(arch, cpu, 'P', 0x000, NA, NA, "Xgene",                 UARCH_XGENE,        CPU_VENDOR_APM)
-  
+
   CHECK_UARCH(arch, cpu, 'Q', 0x00F, NA, NA, "Scorpion",              UARCH_SCORPION,     CPU_VENDOR_QUALCOMM)
   CHECK_UARCH(arch, cpu, 'Q', 0x02D, NA, NA, "Scorpion",              UARCH_KRAIT,        CPU_VENDOR_QUALCOMM)
   CHECK_UARCH(arch, cpu, 'Q', 0x04D,  1,  0, "Krait 200",             UARCH_KRAIT,        CPU_VENDOR_QUALCOMM)
@@ -254,29 +280,31 @@ struct uarch* get_uarch_from_midr(uint32_t midr, struct cpuInfo* cpu) {
   CHECK_UARCH(arch, cpu, 'Q', 0x803, NA, NA, "Kryo 385 Silver",       UARCH_CORTEX_A55r0, CPU_VENDOR_ARM)      // Low-power Kryo 385 "Silver" -> Cortex-A55r0
   CHECK_UARCH(arch, cpu, 'Q', 0x804, NA, NA, "Kryo 485 Gold",         UARCH_CORTEX_A76,   CPU_VENDOR_ARM)      // High-performance Kryo 485 "Gold" / "Gold Prime" -> Cortex-A76
   CHECK_UARCH(arch, cpu, 'Q', 0x805, NA, NA, "Kryo 485 Silver",       UARCH_CORTEX_A55,   CPU_VENDOR_ARM)      // Low-performance Kryo 485 "Silver" -> Cortex-A55
-  CHECK_UARCH(arch, cpu, 'Q', 0xC00, NA, NA, "Falkor",                UARCH_FALKOR,       CPU_VENDOR_QUALCOMM)      
-  CHECK_UARCH(arch, cpu, 'Q', 0xC01, NA, NA, "Saphira",               UARCH_SAPHIRA,      CPU_VENDOR_QUALCOMM)     
-  
+  CHECK_UARCH(arch, cpu, 'Q', 0xC00, NA, NA, "Falkor",                UARCH_FALKOR,       CPU_VENDOR_QUALCOMM)
+  CHECK_UARCH(arch, cpu, 'Q', 0xC01, NA, NA, "Saphira",               UARCH_SAPHIRA,      CPU_VENDOR_QUALCOMM)
+
   CHECK_UARCH(arch, cpu, 'S', 0x001, 1,  NA, "Exynos M1",             UARCH_EXYNOS_M1,    CPU_VENDOR_SAMSUNG)   // Exynos 8890
   CHECK_UARCH(arch, cpu, 'S', 0x001, 4,  NA, "Exynos M2",             UARCH_EXYNOS_M2,    CPU_VENDOR_SAMSUNG)   // Exynos 8895
   CHECK_UARCH(arch, cpu, 'S', 0x002, 1,  NA, "Exynos M3",             UARCH_EXYNOS_M3,    CPU_VENDOR_SAMSUNG)   // Exynos 9810
   CHECK_UARCH(arch, cpu, 'S', 0x003, 1,  NA, "Exynos M4",             UARCH_EXYNOS_M4,    CPU_VENDOR_SAMSUNG)   // Exynos 9820
   CHECK_UARCH(arch, cpu, 'S', 0x004, 1,  NA, "Exynos M5",             UARCH_EXYNOS_M5,    CPU_VENDOR_SAMSUNG)   // Exynos 9820 (this one looks wrong at uarch.c ...)
-            
+
+  CHECK_UARCH(arch, cpu, 'a', 0x022, NA, NA, "Icestorm",              UARCH_ICESTORM,     CPU_VENDOR_APPLE)
+  CHECK_UARCH(arch, cpu, 'a', 0x023, NA, NA, "Firestorm",             UARCH_FIRESTORM,    CPU_VENDOR_APPLE)
+
   CHECK_UARCH(arch, cpu, 'V', 0x581, NA, NA, "PJ4",                   UARCH_PJ4,          CPU_VENDOR_MARVELL)
   CHECK_UARCH(arch, cpu, 'V', 0x584, NA, NA, "PJ4B-MP",               UARCH_PJ4,          CPU_VENDOR_MARVELL)
-  
+
   UARCH_END
-  
+
   return arch;
 }
 
 char* get_str_uarch(struct cpuInfo* cpu) {
-  return cpu->arch->uarch_str;    
+  return cpu->arch->uarch_str;
 }
 
-void free_uarch_struct(struct uarch* arch) {    
+void free_uarch_struct(struct uarch* arch) {
   free(arch->uarch_str);
   free(arch);
 }
-

src/arm/udev.c

@@ -1,7 +1,8 @@
+#include "../common/global.h"
 #include "udev.h"
 #include "midr.h"
 
-#define _PATH_CPUS_PRESENT           _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
+#define _PATH_DEVICETREE_MODEL       "/sys/firmware/devicetree/base/model"
 #define _PATH_CPUINFO                "/proc/cpuinfo"
 //#define _PATH_CPUINFO                "cpuinfo_debug"
 
@@ -11,42 +12,10 @@
 #define CPUINFO_CPU_PART_STR         "CPU part\t: "
 #define CPUINFO_CPU_REVISION_STR     "CPU revision\t: "
 #define CPUINFO_HARDWARE_STR         "Hardware\t: "
+#define CPUINFO_REVISION_STR         "Revision\t: "
 
 #define CPUINFO_CPU_STRING "processor"
 
-// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
-int get_ncores_from_cpuinfo() {
-  // Examples:
-  // 0-271
-  // 0-5
-  // 0-7
-  int filelen;
-  char* buf;
-  if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
-    perror("open");
-    return UNKNOWN;    
-  }
-  
-  int ncores = 0;
-  char* tmp1 = strstr(buf, "-") + 1;
-  char* tmp2 = strstr(buf, "\n");
-  char ncores_str[filelen];
-  memset(ncores_str, 0, sizeof(char) * filelen);
-  memcpy(ncores_str, tmp1, tmp2-tmp1);
-  
-  char* end;
-  errno = 0;
-  ncores = strtol(ncores_str, &end, 10) + 1;  
-  if(errno != 0) {
-    perror("strtol");
-    return UNKNOWN;
-  }
-
-  free(buf);
-
-  return ncores;
-}
-
 long parse_cpuinfo_field(char* buf, char* field_str, int field_base) {
   char* tmp = strstr(buf, field_str);
   if(tmp == NULL) return -1;
@@ -56,7 +25,7 @@ long parse_cpuinfo_field(char* buf, char* field_str, int field_base) {
   errno = 0;
   long ret = strtol(tmp, &end, field_base);
   if(errno != 0) {
-    perror("strtol");
+    printWarn("strtol: %s:\n", strerror(errno));
     return -1;
   }
 
@@ -69,9 +38,9 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
   char* buf;
   *success = true;
   if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
-    perror("open");
-    *success = false;     
-    return 0;    
+    printWarn("read_file: %s: %s\n", _PATH_CPUINFO, strerror(errno));
+    *success = false;
+    return 0;
   }
 
   char* tmp = strstr(buf, CPUINFO_CPU_STRING);
@@ -81,9 +50,9 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
     current_core++;
     tmp = strstr(tmp, CPUINFO_CPU_STRING);
   }
-  
+
   if(tmp == NULL) {
-    *success = false;    
+    *success = false;
     return 0;
   }
 
@@ -96,36 +65,36 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
   long ret;
 
   if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_IMPLEMENTER_STR, 16)) < 0) {
-    printf("Failed parsing cpu_implementer\n");
-    *success = false;    
+    printBug("get_midr_from_cpuinfo: Failed parsing cpu_implementer\n");
+    *success = false;
     return 0;
   }
   cpu_implementer = (uint32_t) ret;
 
   if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_ARCHITECTURE_STR, 10)) < 0) {
-    printf("Failed parsing cpu_architecture\n");
-    *success = false;    
+    printBug("get_midr_from_cpuinfo: Failed parsing cpu_architecture\n");
+    *success = false;
     return 0;
   }
   cpu_architecture = (uint32_t) 0xF; // Why?
 
   if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_VARIANT_STR, 16)) < 0) {
-    printf("Failed parsing cpu_variant\n");
-    *success = false;    
+    printBug("get_midr_from_cpuinfo: Failed parsing cpu_variant\n");
+    *success = false;
     return 0;
   }
   cpu_variant = (uint32_t) ret;
 
   if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_PART_STR, 16)) < 0) {
-    printf("Failed parsing cpu_part\n");
-    *success = false;    
+    printBug("get_midr_from_cpuinfo: Failed parsing cpu_part\n");
+    *success = false;
     return 0;
   }
   cpu_part = (uint32_t) ret;
 
   if ((ret = parse_cpuinfo_field(tmp, CPUINFO_CPU_REVISION_STR, 10)) < 0) {
-    printf("Failed parsing cpu_revision\n");
-    *success = false;    
+    printBug("get_midr_from_cpuinfo: Failed parsing cpu_revision\n");
+    *success = false;
     return 0;
   }
   cpu_revision = (uint32_t) ret;
@@ -139,24 +108,45 @@ uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success) {
   return midr;
 }
 
-char* get_hardware_from_cpuinfo() {
+char* get_field_from_cpuinfo(char* CPUINFO_FIELD) {
   int filelen;
   char* buf;
   if((buf = read_file(_PATH_CPUINFO, &filelen)) == NULL) {
-    perror("open");
-    return NULL;    
+    printWarn("read_file: %s: %s:\n", _PATH_CPUINFO, strerror(errno));
+    return NULL;
   }
-  
-  char* tmp1 = strstr(buf, CPUINFO_HARDWARE_STR);
+
+  char* tmp1 = strstr(buf, CPUINFO_FIELD);
   if(tmp1 == NULL) return NULL;
-  tmp1 = tmp1 + strlen(CPUINFO_HARDWARE_STR);
+  tmp1 = tmp1 + strlen(CPUINFO_FIELD);
   char* tmp2 = strstr(tmp1, "\n");
-  
+
   int strlen = (1 + (tmp2-tmp1));
-  char* hardware = malloc(sizeof(char) * strlen);
+  char* hardware = emalloc(sizeof(char) * strlen);
   memset(hardware, 0, sizeof(char) * strlen);
   strncpy(hardware, tmp1, tmp2-tmp1);
-  
+
   return hardware;
 }
 
+char* get_hardware_from_cpuinfo() {
+  return get_field_from_cpuinfo(CPUINFO_HARDWARE_STR);
+}
+
+char* get_revision_from_cpuinfo() {
+  return get_field_from_cpuinfo(CPUINFO_REVISION_STR);
+}
+
+bool is_raspberry_pi() {
+  int filelen;
+  char* buf;
+  if((buf = read_file(_PATH_DEVICETREE_MODEL, &filelen)) == NULL) {
+    return false;
+  }
+
+  char* tmp;
+  if((tmp = strstr(buf, "Raspberry Pi")) == NULL) {
+    return false;
+  }
+  return true;
+}

src/arm/udev.h

@@ -7,6 +7,8 @@
 int get_ncores_from_cpuinfo();
 uint32_t get_midr_from_cpuinfo(uint32_t core, bool* success);
 char* get_hardware_from_cpuinfo();
+char* get_revision_from_cpuinfo();
+bool is_raspberry_pi();
 
 #endif
 

src/common/args.c

@@ -5,9 +5,13 @@
 #include "args.h"
 #include "global.h"
 
-#define COLOR_STR_INTEL "intel"
-#define COLOR_STR_AMD   "amd"
-#define COLOR_STR_ARM   "arm"
+#define NUM_COLORS      5
+
+#define COLOR_STR_INTEL     "intel"
+#define COLOR_STR_INTEL_NEW "intel-new"
+#define COLOR_STR_AMD       "amd"
+#define COLOR_STR_IBM       "ibm"
+#define COLOR_STR_ARM       "arm"
 
 static const char *SYTLES_STR_LIST[] = {
   [STYLE_EMPTY]   = NULL,
@@ -17,22 +21,52 @@ static const char *SYTLES_STR_LIST[] = {
   [STYLE_INVALID] = NULL
 };
 
-enum {
-  ARG_CHAR_STYLE,
-  ARG_CHAR_COLOR,
-  ARG_CHAR_HELP,
-  ARG_CHAR_DEBUG,
-  ARG_CHAR_VERBOSE,
-  ARG_CHAR_VERSION
-};
-
 struct args_struct {
   bool debug_flag;
   bool help_flag;
+  bool raw_flag;
+  bool accurate_pp;
+  bool full_cpu_name_flag;
+  bool logo_long;
+  bool logo_short;
+  bool logo_intel_new;
+  bool logo_intel_old;
   bool verbose_flag;
   bool version_flag;
   STYLE style;
-  struct colors* colors;
+  struct color** colors;
+};
+
+const char args_chr[] = {
+  /* [ARG_STYLE]          = */ 's',
+  /* [ARG_COLOR]          = */ 'c',
+  /* [ARG_HELP]           = */ 'h',
+  /* [ARG_RAW]            = */ 'r',
+  /* [ARG_FULLCPUNAME]    = */ 'F',
+  /* [ARG_LOGO_LONG]      = */ 1,
+  /* [ARG_LOGO_SHORT]     = */ 2,
+  /* [ARG_LOGO_INTEL_NEW] = */ 3,
+  /* [ARG_LOGO_INTEL_OLD] = */ 4,
+  /* [ARG_ACCURATE_PP]    = */ 5,
+  /* [ARG_DEBUG]          = */ 'd',
+  /* [ARG_VERBOSE]        = */ 'v',
+  /* [ARG_VERSION]        = */ 'V',
+};
+
+const char *args_str[] = {
+  /* [ARG_STYLE]          = */ "style",
+  /* [ARG_COLOR]          = */ "color",
+  /* [ARG_HELP]           = */ "help",
+  /* [ARG_RAW]            = */ "raw",
+  /* [ARG_FULLCPUNAME]    = */ "full-cpu-name",
+  /* [ARG_LOGO_LONG]      = */ "logo-long",
+  /* [ARG_LOGO_SHORT]     = */ "logo-short",
+  /* [ARG_LOGO_INTEL_NEW] = */ "logo-intel-new",
+  /* [ARG_LOGO_INTEL_OLD] = */ "logo-intel-old",
+  /* [ARG_ACCURATE_PP]    = */ "accurate-pp",
+  /* [ARG_DEBUG]          = */ "debug",
+  /* [ARG_VERBOSE]        = */ "verbose",
+  /* [ARG_VERSION]        = */ "version",
 };
 
 static struct args_struct args;
@@ -41,7 +75,7 @@ STYLE get_style() {
   return args.style;
 }
 
-struct colors* get_colors() {
+struct color** get_colors() {
   return args.colors;
 }
 
@@ -57,203 +91,286 @@ bool show_debug() {
   return args.debug_flag;
 }
 
+bool show_raw() {
+  return args.raw_flag;
+}
+
+bool accurate_pp() {
+  return args.accurate_pp;
+}
+
+bool show_full_cpu_name() {
+  return args.full_cpu_name_flag;
+}
+
+bool show_logo_long() {
+  return args.logo_long;
+}
+
+bool show_logo_short() {
+  return args.logo_short;
+}
+
+bool show_logo_intel_new() {
+  return args.logo_intel_new;
+}
+
+bool show_logo_intel_old() {
+  return args.logo_intel_old;
+}
+
 bool verbose_enabled() {
   return args.verbose_flag;
 }
 
+int max_arg_str_length() {
+  int max_len = -1;
+  int len = sizeof(args_str) / sizeof(args_str[0]);
+  for(int i=0; i < len; i++) {
+    max_len = max(max_len, (int) strlen(args_str[i]));
+  }
+  return max_len;
+}
+
 STYLE parse_style(char* style) {
   uint8_t i = 0;
   uint8_t styles_count = sizeof(SYTLES_STR_LIST) / sizeof(SYTLES_STR_LIST[0]);
-  
+
   while(i != styles_count && (SYTLES_STR_LIST[i] == NULL || strcmp(SYTLES_STR_LIST[i], style) != 0))
     i++;
 
   if(i == styles_count)
     return STYLE_INVALID;
-  
+
   return i;
 }
 
-void free_colors_struct(struct colors* cs) {
-  free(cs->c1);
-  free(cs->c2);
-  free(cs->c3);
-  free(cs->c4);
+void free_colors_struct(struct color** cs) {
+  for(int i=0; i < NUM_COLORS; i++) {
+    free(cs[i]);
+  }
   free(cs);
 }
 
-bool parse_color(char* optarg_str, struct colors** cs) {
-  *cs = malloc(sizeof(struct colors));        
-  (*cs)->c1 = malloc(sizeof(struct color));
-  (*cs)->c2 = malloc(sizeof(struct color));
-  (*cs)->c3 = malloc(sizeof(struct color));
-  (*cs)->c4 = malloc(sizeof(struct color));
-  struct color** c1 = &((*cs)->c1);
-  struct color** c2 = &((*cs)->c2);
-  struct color** c3 = &((*cs)->c3);
-  struct color** c4 = &((*cs)->c4);
+bool parse_color(char* optarg_str, struct color*** cs) {
+  for(int i=0; i < NUM_COLORS; i++) {
+    (*cs)[i] = emalloc(sizeof(struct color));
+  }
+
+  struct color** c = *cs;
   int32_t ret;
   char* str_to_parse = NULL;
-  bool free_ptr;
-  
-  if(strcmp(optarg_str, COLOR_STR_INTEL) == 0) {
-    str_to_parse = malloc(sizeof(char) * 46);
-    strcpy(str_to_parse, COLOR_DEFAULT_INTEL);
-    free_ptr = true;
-  }
-  else if(strcmp(optarg_str, COLOR_STR_AMD) == 0) {
-    str_to_parse = malloc(sizeof(char) * 44);
-    strcpy(str_to_parse, COLOR_DEFAULT_AMD);  
-    free_ptr = true;
-  }
-  else if(strcmp(optarg_str, COLOR_STR_ARM) == 0) {
-    str_to_parse = malloc(sizeof(char) * 46);
-    strcpy(str_to_parse, COLOR_DEFAULT_ARM);  
-    free_ptr = true;
-  }
-  else {  
+  char* color_to_copy = NULL;
+  bool free_ptr = true;
+
+  if(strcmp(optarg_str, COLOR_STR_INTEL) == 0) color_to_copy = COLOR_DEFAULT_INTEL;
+  else if(strcmp(optarg_str, COLOR_STR_INTEL_NEW) == 0) color_to_copy = COLOR_DEFAULT_INTEL_NEW;
+  else if(strcmp(optarg_str, COLOR_STR_AMD) == 0) color_to_copy = COLOR_DEFAULT_AMD;
+  else if(strcmp(optarg_str, COLOR_STR_IBM) == 0) color_to_copy = COLOR_DEFAULT_IBM;
+  else if(strcmp(optarg_str, COLOR_STR_ARM) == 0) color_to_copy = COLOR_DEFAULT_ARM;
+  else {
     str_to_parse = optarg_str;
     free_ptr = false;
   }
-  
-  ret = sscanf(str_to_parse, "%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d", 
-               &(*c1)->R, &(*c1)->G, &(*c1)->B,
-               &(*c2)->R, &(*c2)->G, &(*c2)->B,
-               &(*c3)->R, &(*c3)->G, &(*c3)->B,
-               &(*c4)->R, &(*c4)->G, &(*c4)->B);
-  
-  if(ret != 12) {
-    printErr("Expected to read 12 values for color but read %d", ret);
-    return false;    
+
+  if(str_to_parse == NULL) {
+    str_to_parse = emalloc(sizeof(char) * (strlen(color_to_copy) + 1));
+    strcpy(str_to_parse, color_to_copy);
   }
-  
-  //TODO: Refactor c1->R c2->R ... to c[i]->R
-  if((*c1)->R < 0 || (*c1)->R > 255) {
-    printErr("Red in color 1 is invalid. Must be in range (0, 255)");
+
+  ret = sscanf(str_to_parse, "%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d:%d,%d,%d",
+               &c[0]->R, &c[0]->G, &c[0]->B,
+               &c[1]->R, &c[1]->G, &c[1]->B,
+               &c[2]->R, &c[2]->G, &c[2]->B,
+               &c[3]->R, &c[3]->G, &c[3]->B,
+               &c[4]->R, &c[4]->G, &c[4]->B);
+
+  int expected_colors = 3 * NUM_COLORS;
+  if(ret != expected_colors) {
+    printErr("Expected to read %d values for color but read %d", expected_colors, ret);
     return false;
   }
-  if((*c1)->G < 0 || (*c1)->G > 255) {
-    printErr("Green in color 1 is invalid. Must be in range (0, 255)");
-    return false;
+
+  for(int i=0; i < NUM_COLORS; i++) {
+    if(c[i]->R < 0 || c[i]->R > 255) {
+      printErr("Red in color %d is invalid: %d; must be in range (0, 255)", i+1, c[i]->R);
+      return false;
+    }
+    if(c[i]->G < 0 || c[i]->G > 255) {
+      printErr("Green in color %d is invalid: %d; must be in range (0, 255)", i+1, c[i]->G);
+      return false;
+    }
+    if(c[i]->B < 0 || c[i]->B > 255) {
+      printErr("Blue in color %d is invalid: %d; must be in range (0, 255)", i+1, c[i]->B);
+      return false;
+    }
   }
-  if((*c1)->B < 0 || (*c1)->B > 255) {
-    printErr("Blue in color 1 is invalid. Must be in range (0, 255)");
-    return false;
-  }
-  if((*c2)->R < 0 || (*c2)->R > 255) {
-    printErr("Red in color 2 is invalid. Must be in range (0, 255)");
-    return false;
-  }
-  if((*c2)->G < 0 || (*c2)->G > 255) {
-    printErr("Green in color 2 is invalid. Must be in range (0, 255)");
-    return false;
-  }
-  if((*c2)->B < 0 || (*c2)->B > 255) {
-    printErr("Blue in color 2 is invalid. Must be in range (0, 255)");
-    return false;
-  }  
-  
+
   if(free_ptr) free (str_to_parse);
-  
-  return true;      
+
+  return true;
+}
+
+char* build_short_options() {
+  const char *c = args_chr;
+  int len = sizeof(args_chr) / sizeof(args_chr[0]);
+  char* str = (char *) emalloc(sizeof(char) * (len*2 + 1));
+  memset(str, 0, sizeof(char) * (len*2 + 1));
+
+#ifdef ARCH_X86
+  sprintf(str, "%c:%c:%c%c%c%c%c%c%c%c%c%c%c",
+  c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
+  c[ARG_RAW], c[ARG_FULLCPUNAME],
+  c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
+  c[ARG_LOGO_INTEL_NEW], c[ARG_LOGO_INTEL_OLD],
+  c[ARG_ACCURATE_PP], c[ARG_DEBUG], c[ARG_VERBOSE],
+  c[ARG_VERSION]);
+#else
+  sprintf(str, "%c:%c:%c%c%c%c%c%c",
+  c[ARG_STYLE], c[ARG_COLOR], c[ARG_HELP],
+  c[ARG_LOGO_SHORT], c[ARG_LOGO_LONG],
+  c[ARG_DEBUG], c[ARG_VERBOSE],
+  c[ARG_VERSION]);
+#endif
+
+  return str;
 }
 
 bool parse_args(int argc, char* argv[]) {
-  int c;
-  int option_index = 0;  
+  int opt;
+  int option_index = 0;
   opterr = 0;
 
   bool color_flag = false;
   args.debug_flag = false;
+  args.accurate_pp = false;
+  args.full_cpu_name_flag = false;
+  args.raw_flag = false;
   args.verbose_flag = false;
+  args.logo_long = false;
+  args.logo_short = false;
+  args.logo_intel_new = false;
+  args.logo_intel_old = false;
   args.help_flag = false;
   args.style = STYLE_EMPTY;
   args.colors = NULL;
 
-  static struct option long_options[] = {
-      {"style",    required_argument, 0, ARG_CHAR_STYLE   },
-      {"color",    required_argument, 0, ARG_CHAR_COLOR   },
-      {"help",     no_argument,       0, ARG_CHAR_HELP    },
-      {"debug",    no_argument,       0, ARG_CHAR_DEBUG   },
-      {"verbose",  no_argument,       0, ARG_CHAR_VERBOSE },
-      {"version",  no_argument,       0, ARG_CHAR_VERSION },
-      {0, 0, 0, 0}
+  // Temporary enable verbose level to allow printing warnings inside parse_args
+  set_log_level(true);
+
+  const struct option long_options[] = {
+    {args_str[ARG_STYLE],          required_argument, 0, args_chr[ARG_STYLE]          },
+    {args_str[ARG_COLOR],          required_argument, 0, args_chr[ARG_COLOR]          },
+    {args_str[ARG_HELP],           no_argument,       0, args_chr[ARG_HELP]           },
+#ifdef ARCH_X86
+    {args_str[ARG_LOGO_INTEL_NEW], no_argument,       0, args_chr[ARG_LOGO_INTEL_NEW] },
+    {args_str[ARG_LOGO_INTEL_OLD], no_argument,       0, args_chr[ARG_LOGO_INTEL_OLD] },
+    {args_str[ARG_ACCURATE_PP],    no_argument,       0, args_chr[ARG_ACCURATE_PP]    },
+    {args_str[ARG_FULLCPUNAME],    no_argument,       0, args_chr[ARG_FULLCPUNAME]    },
+    {args_str[ARG_RAW],            no_argument,       0, args_chr[ARG_RAW]            },
+#endif
+    {args_str[ARG_LOGO_SHORT],     no_argument,       0, args_chr[ARG_LOGO_SHORT]     },
+    {args_str[ARG_LOGO_LONG],      no_argument,       0, args_chr[ARG_LOGO_LONG]      },
+    {args_str[ARG_DEBUG],          no_argument,       0, args_chr[ARG_DEBUG]          },
+    {args_str[ARG_VERBOSE],        no_argument,       0, args_chr[ARG_VERBOSE]        },
+    {args_str[ARG_VERSION],        no_argument,       0, args_chr[ARG_VERSION]        },
+    {0, 0, 0, 0}
   };
 
-  c = getopt_long(argc, argv, "", long_options, &option_index);
+  char* short_options = build_short_options();
+  opt = getopt_long(argc, argv, short_options, long_options, &option_index);
 
-  while (c != -1) {
-     if(c == ARG_CHAR_COLOR) {
-       if(color_flag) {
-         printErr("Color option specified more than once");
-         return false;
-       }
-       color_flag  = true;       
-       if(!parse_color(optarg, &args.colors)) {
-         printErr("Color parsing failed");
-         return false;
-       }
-     }
-     else if(c == ARG_CHAR_STYLE) {
-       if(args.style != STYLE_EMPTY) {
-         printErr("Style option specified more than once");
-         return false;
-       }
-       args.style = parse_style(optarg);
-       if(args.style == STYLE_INVALID) {
-         printErr("Invalid style '%s'",optarg);
-         return false;
-       }
-     }
-     else if(c == ARG_CHAR_HELP) {
-       if(args.help_flag) {
-         printErr("Help option specified more than once");
-         return false;
-       }
-       args.help_flag  = true;
-     }
-     else if(c == ARG_CHAR_VERBOSE) {
-       if(args.verbose_flag) {
-         printErr("Verbose option specified more than once");
-         return false;
-       }
-       args.verbose_flag  = true;
-     }
-     else if(c == ARG_CHAR_DEBUG) {
-       if(args.debug_flag) {
-         printErr("Debug option specified more than once");
-         return false;
-       }
-       args.debug_flag  = true;
-     }
-     else if (c == ARG_CHAR_VERSION) {
-       if(args.version_flag) {
-         printErr("Version option specified more than once");
-         return false;
-       }
-       args.version_flag = true;
-     }
-     else if(c == '?') {
-       printWarn("Invalid options");
-       args.help_flag  = true;
-       break;
-     }
-     else
-      printBug("Bug at line number %d in file %s", __LINE__, __FILE__);
+  while (!args.help_flag && !args.debug_flag && !args.version_flag && opt != -1) {
+    if(opt == args_chr[ARG_COLOR]) {
+      if(color_flag) {
+        printErr("Color option specified more than once");
+        return false;
+      }
+      color_flag  = true;
+      args.colors = emalloc(sizeof(struct color *) * NUM_COLORS);
+      if(!parse_color(optarg, &args.colors)) {
+        return false;
+      }
+    }
+    else if(opt == args_chr[ARG_STYLE]) {
+      if(args.style != STYLE_EMPTY) {
+        printErr("Style option specified more than once");
+        return false;
+      }
+      args.style = parse_style(optarg);
+      if(args.style == STYLE_INVALID) {
+        printErr("Invalid style '%s'",optarg);
+        return false;
+      }
+    }
+    else if(opt == args_chr[ARG_HELP]) {
+      args.help_flag  = true;
+    }
+    else if(opt == args_chr[ARG_ACCURATE_PP]) {
+       args.accurate_pp = true;
+    }
+    else if(opt == args_chr[ARG_FULLCPUNAME]) {
+       args.full_cpu_name_flag = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_SHORT]) {
+       args.logo_short = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_LONG]) {
+       args.logo_long = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_INTEL_NEW]) {
+       args.logo_intel_new = true;
+    }
+    else if(opt == args_chr[ARG_LOGO_INTEL_OLD]) {
+       args.logo_intel_old = true;
+    }
+    else if(opt == args_chr[ARG_RAW]) {
+       args.raw_flag  = true;
+    }
+    else if(opt == args_chr[ARG_VERBOSE]) {
+      args.verbose_flag  = true;
+    }
+    else if(opt == args_chr[ARG_DEBUG]) {
+      args.debug_flag  = true;
+    }
+    else if(opt == args_chr[ARG_VERSION]) {
+      args.version_flag = true;
+    }
+    else {
+      printWarn("Invalid options");
+      args.help_flag  = true;
+    }
 
     option_index = 0;
-    c = getopt_long(argc, argv,"",long_options, &option_index);
+    opt = getopt_long(argc, argv, short_options, long_options, &option_index);
   }
 
-  if (optind < argc) {
+  if(optind < argc) {
     printWarn("Invalid options");
     args.help_flag  = true;
   }
 
-  if((args.help_flag + args.version_flag + color_flag) > 1) {
-    printWarn("You should specify just one option");
+  if(args.logo_intel_new && args.logo_intel_old) {
+    printWarn("%s and %s cannot be specified together", args_str[ARG_LOGO_INTEL_NEW], args_str[ARG_LOGO_INTEL_OLD]);
+    args.logo_intel_new = false;
+    args.logo_intel_old = false;
+  }
+
+  if(args.logo_short && args.logo_long) {
+    printWarn("%s and %s cannot be specified together", args_str[ARG_LOGO_SHORT], args_str[ARG_LOGO_LONG]);
+    args.logo_short = false;
+    args.logo_long = false;
+  }
+
+#if defined(ARCH_X86) && ! defined(__linux__)
+  if(args.accurate_pp) {
+    printWarn("%s option is valid only in Linux x86_64", args_str[ARG_ACCURATE_PP]);
     args.help_flag  = true;
   }
+#endif
+
+  // Leave log level untouched after returning
+  set_log_level(false);
 
   return true;
 }

src/common/args.h

@@ -10,31 +10,50 @@ struct color {
   int32_t B;
 };
 
-struct colors {
-  struct color* c1;
-  struct color* c2;
-  struct color* c3;
-  struct color* c4;
-};
-
 enum {
   STYLE_EMPTY,
   STYLE_FANCY,
-  STYLE_WILD,
   STYLE_RETRO,
   STYLE_LEGACY,
   STYLE_INVALID
 };
 
+enum {
+  ARG_STYLE,
+  ARG_COLOR,
+  ARG_HELP,
+  ARG_RAW,
+  ARG_FULLCPUNAME,
+  ARG_LOGO_LONG,
+  ARG_LOGO_SHORT,
+  ARG_LOGO_INTEL_NEW,
+  ARG_LOGO_INTEL_OLD,
+  ARG_ACCURATE_PP,
+  ARG_DEBUG,
+  ARG_VERBOSE,
+  ARG_VERSION
+};
+
+extern const char args_chr[];
+extern const char *args_str[];
+
 #include "printer.h"
 
+int max_arg_str_length();
 bool parse_args(int argc, char* argv[]);
 bool show_help();
+bool accurate_pp();
+bool show_full_cpu_name();
+bool show_logo_long();
+bool show_logo_short();
+bool show_logo_intel_new();
+bool show_logo_intel_old();
+bool show_raw();
 bool show_debug();
 bool show_version();
 bool verbose_enabled();
-void free_colors_struct(struct colors* cs);
-struct colors* get_colors();
+void free_colors_struct(struct color** cs);
+struct color** get_colors();
 STYLE get_style();
 
 #endif

src/common/ascii.h

@@ -1,208 +1,329 @@
 #ifndef __ASCII__
 #define __ASCII__
 
-#define NUMBER_OF_LINES   19
-#define LINE_SIZE         62
+#define COLOR_NONE     ""
+#define C_FG_BLACK     "\x1b[30;1m"
+#define C_FG_RED       "\x1b[31;1m"
+#define C_FG_GREEN     "\x1b[32;1m"
+#define C_FG_YELLOW    "\x1b[33;1m"
+#define C_FG_BLUE      "\x1b[34;1m"
+#define C_FG_MAGENTA   "\x1b[35;1m"
+#define C_FG_CYAN      "\x1b[36;1m"
+#define C_FG_WHITE     "\x1b[37;1m"
+#define C_BG_BLACK     "\x1b[40;1m"
+#define C_BG_RED       "\x1b[41;1m"
+#define C_BG_GREEN     "\x1b[42;1m"
+#define C_BG_YELLOW    "\x1b[43;1m"
+#define C_BG_BLUE      "\x1b[44;1m"
+#define C_BG_MAGENTA   "\x1b[45;1m"
+#define C_BG_CYAN      "\x1b[46;1m"
+#define C_BG_WHITE     "\x1b[47;1m"
+#define C_FG_B_BLACK   "\x1b[90;1m"
+#define C_FG_B_RED     "\x1b[91;1m"
+#define C_FG_B_GREEN   "\x1b[92;1m"
+#define C_FG_B_YELLOW  "\x1b[93;1m"
+#define C_FG_B_BLUE    "\x1b[94;1m"
+#define C_FG_B_MAGENTA "\x1b[95;1m"
+#define C_FG_B_CYAN    "\x1b[96;1m"
+#define C_FG_B_WHITE   "\x1b[97;1m"
+#define COLOR_RESET    "\x1b[m"
 
-#define AMD_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-     @@@@      @@@       @@@   @@@@@@@@        ############   \
-    @@@@@@     @@@@@    @@@@   @@@    @@@@       ##########   \
-   @@@  @@@    @@@@@@@@@@@@@   @@@      @@      #      ####   \
-  @@@    @@@   @@@  @@@  @@@   @@@      @@@   ###      ####   \
- @@@@@@@@@@@@  @@@       @@@   @@@     @@@   ####    ## ###   \
- @@@      @@@  @@@       @@@   @@@@@@@@@     ########    ##   \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
+struct ascii_logo {
+  char* art;
+  uint32_t width;
+  uint32_t height;
+  bool replace_blocks;
+  char color_ascii[3][100];
+  char color_text[2][100];
+};
 
-#define INTEL_ASCII \
-"                              ################                \
-                      #######                #######          \
-                 ####                              ####       \
-             ###                                     ####     \
-        ###                                             ###   \
-        ###                                             ###   \
-     #                    ###                ###        ###   \
-   ##   ###   #########   ######   ######    ###        ###   \
-  ##    ###   ###    ###  ###    ####  ####  ###        ###   \
- ##     ###   ###    ###  ###    ###    ###  ###       ###    \
-##      ###   ###    ###  ###    ##########  ###     ####     \
-##      ###   ###    ###  ###    ###         ###   #####      \
-##       ##   ###    ###   #####  #########   ##  ###         \
-###                                                           \
- ###                                                          \
- ####                                        ####             \
-   #####                               ##########             \
-     ##########               ################                \
-         ###############################                      "
-                                                             
-#define SNAPDRAGON_ASCII \
-"                                                              \
-                     @@########                               \
-                  @@@@@###########                            \
-            @@  @@@@@#################                        \
-          @@@@@@@@@@####################                      \
-         @@@@@@@@@@@@#####################                    \
-        @@@@@@@@@@@@@@@####################                   \
-        @@@@@@@@@@@@@@@@@###################                  \
-        @@@@@@@@@@@@@@@@@@@@################                  \
-           @@@@@@@@@@@@@@@@@@@@#############                  \
-              @@@@@@@@@@@@@@@@@@############                  \
-       @          @@@@@@@@@@@@@@@###########                  \
-        @@@@@       @@@@@@@@@@@@@##########                   \
-         @@@@@@@@@   @@@@@@@@@@@@########                     \
-           @@@@@@@@@  @@@@@@@@@@#######                       \
-              @@@@@@@@@@@@@@@@#######                         \
-                  @@@@###########                             \
-                                                              \
-                                                              "
-                                                             
-#define MEDIATEK_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-      ##  ## ######  ######  #     ### @@@@@@ @@@@@@ @@  @@   \
-     ### ### #       #    #  #    ####   @@   @      @@ @@    \
-    ######## # ###   #    #  #   ## ##   @@   @ @@@  @@@@     \
-   ## ### ## #       #    #  #  ##  ##   @@   @      @@ @@    \
-  ##  ##  ## ######  #####   # ##   ##   @@   @@@@@@ @@  @@   \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
+/*
+ * ASCII logos brief documentation
+ * ----------------------------------------------------
+ * C1, C2, ...: ColorN, gets replaced by printer.c with
+ *              the color in ascii_logo->color_ascii[N]
+ * CR:          Color reset, gets replaced by the reset
+ *              color by printer.c
+ *
+ * Logos with replace_blocks=true are replaced by character
+ * blocks (actually, spaces with background color), so
+ * the color in the structure must be C_BG_XXX. When
+ * replace_blocks is true, the characters '#' are replaced
+ * by spaces printed with color_ascii[0], and '@' are
+ * printed with color_ascii[1]. If replace_blocks=true,
+ * color format specified in ASCIIs ($C1, $C2) are ignored.
+ *
+ * In any case, '$' is a illegal character to be used in
+ * the ascii logos because it is used to parse colors
+ *
+ * LONG_LOGOS will be printed only if the fit in the screen,
+ * otherwise SHORT_LOGOS will be used
+ */
 
-#define EXYNOS_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                         ##  ##  ##                           \
-                           ##  ##                             \
-                             ##                               \
-                           ##  ##                             \
-                         ##  ##  ##                           \
-                                                              \
-                         SAMSUNG                              \
-                         Exynos                               \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
-                                                              
-#define KIRIN_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                   #######                    \
-       #####             ####################                 \
-          ######################################              \
-            #######################################           \
-               #######################################        \
-                 ##############################               \
-                ##########################                    \
-             #########################                        \
-           ########################                           \
-        ########################                              \
-     #########################                                \
-   #########################                                  \
-                                                              \
-                                                              "                                                                                                                           
-                                                              
-#define BROADCOM_ASCII \
-"                                                              \
-                    ################                          \
-               #########################                      \
-            ###############################                   \
-          ################@@@@################                \
-         ################@@@@@@################               \
-        #################@@@@@@################               \
-       #################@@@@@@@@#################             \
-       #################@@@@@@@@#################             \
-      #################@@@@##@@@@################             \
-       ################@@@@##@@@@################             \
-       ###############@@@@####@@@@###############             \
-        @@@@@@@@@@####@@@@####@@@@####@@@@@@@@@@              \
-         ######@@@@@@@@@@######@@@@@@@@@@######               \
-           ##################################                 \
-             ##############################                   \
-                ########################                      \
-                    ###############                           \
-                                                              "
-                                                                                                              
-#define ARM_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-      ############     ##########   ####  ######  ########    \
-   ###############     #########    #######################   \
-  ####        ####     ####         #####   #######   #####   \
- ####         ####     ####         ####     #####     ####   \
- ####         ####     ####         ####     ####      ####   \
-  ####       #####     ####         ####     ####      ####   \
-   ###############     ####         ####     ####      ####   \
-    ########  ####     ####         ####     ####      ####   \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "                                                                                                               
+// SHORT LOGOS //
+#define ASCII_AMD \
+"$C2          '###############             \
+$C2             ,#############            \
+$C2                      .####            \
+$C2              #.      .####            \
+$C2            :##.      .####            \
+$C2           :###.      .####            \
+$C2           #########.   :##            \
+$C2           #######.       ;            \
+$C1                                       \
+$C1    ###     ###      ###   #######     \
+$C1   ## ##    #####  #####   ##     ##   \
+$C1  ##   ##   ### #### ###   ##      ##  \
+$C1 #########  ###  ##  ###   ##      ##  \
+$C1##       ## ###      ###   ##     ##   \
+$C1##       ## ###      ###   #######     "
 
-#define UNKNOWN_ASCII \
-"                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              \
-                                                              "
-                                                             
-static const char* ASCII_ARRAY [] = {
-  AMD_ASCII,
-  INTEL_ASCII,
-  ARM_ASCII,
-  SNAPDRAGON_ASCII,
-  MEDIATEK_ASCII,
-  EXYNOS_ASCII,
-  KIRIN_ASCII,
-  BROADCOM_ASCII,
-  UNKNOWN_ASCII
-};                                                             
+#define ASCII_INTEL \
+"$C1                   .#################.          \
+$C1              .####                   ####.     \
+$C1          .##                             ###   \
+$C1       ##                          :##     ###  \
+$C1    #                ##            :##      ##  \
+$C1  ##   ##  ######.   ####  ######  :##      ##  \
+$C1 ##    ##  ##:  ##:  ##   ##   ### :##     ###  \
+$C1##     ##  ##:  ##:  ##  :######## :##    ##    \
+$C1##     ##  ##:  ##:  ##   ##.   .  :## ####     \
+$C1##      #  ##:  ##:  ####  #####:   ##          \
+$C1 ##                                             \
+$C1  ###.                         ..o####.         \
+$C1   ######oo...         ..oo#######              \
+$C1          o###############o                     "
+
+#define ASCII_INTEL_NEW \
+"$C1  MMM                 oddl                   MMN   \
+$C1  MMM                 dMMN                   MMN   \
+$C1  ...  ....   ...     dMMM..      .cc.       NMN   \
+$C1  MMM  :MMMdWMMMMMX.  dMMMMM,  .XMMMMMMNo    MMN   \
+$C1  MMM  :MMMp    dMMM  dMMX   .NMW      WMN.  MMN   \
+$C1  MMM  :MMM      WMM  dMMK   kMMXooooooNMMx  MMN   \
+$C1  MMM  :MMM      NMM  dMMK   dMMX            MMN   \
+$C1  MMM  :MMM      NMM  dMMMoo  OMM0....:Nx.   MMN   \
+$C1  MMM  :WWW      XWW   lONMM   'xXMMMMNOc    MMN   "
+
+#define ASCII_SNAPD \
+"              $C1@@$C2########               \
+           $C1@@@@@$C2###########            \
+     $C1@@  @@@@@$C2#################        \
+   $C1@@@@@@@@@@$C2####################      \
+  $C1@@@@@@@@@@@@$C2#####################    \
+ $C1@@@@@@@@@@@@@@@$C2####################   \
+ $C1@@@@@@@@@@@@@@@@@$C2###################  \
+ $C1@@@@@@@@@@@@@@@@@@@@$C2################  \
+    $C1@@@@@@@@@@@@@@@@@@@@$C2#############  \
+       $C1@@@@@@@@@@@@@@@@@@$C2############  \
+$C1@          @@@@@@@@@@@@@@@$C2###########  \
+ $C1@@@@@       @@@@@@@@@@@@@$C2##########   \
+  $C1@@@@@@@@@   @@@@@@@@@@@@$C2########     \
+    $C1@@@@@@@@@  @@@@@@@@@@$C2#######       \
+       $C1@@@@@@@@@@@@@@@@$C2#######         \
+           $C1@@@@$C2###########             "
+
+#define ASCII_MTK \
+"$C1    ##  ## ######  ######  #     ### $C2@@@@@@ @@@@@@ @@  @@  \
+$C1   ### ### #       #    #  #    ####   $C2@@   @      @@ @@   \
+$C1  ######## # ###   #    #  #   ## ##   $C2@@   @ @@@  @@@@    \
+$C1 ## ### ## #       #    #  #  ##  ##   $C2@@   @      @@ @@   \
+$C1##  ##  ## ######  #####   # ##   ##   $C2@@   @@@@@@ @@  @@  "
+
+#define ASCII_EXYNOS \
+"$C2                      \
+$C2                      \
+$C2                      \
+     $C1##$CR  $C1##$CR  $C1##$CR       \
+       $C1##$CR  $C1##$CR         \
+         $C1##$CR           \
+       $C1##$CR  $C1##$CR         \
+     $C1##$CR  $C1##$CR  $C1##$CR       \
+$C2                      \
+$C2     SAMSUNG          \
+$C2     Exynos           \
+$C2                      \
+$C2                      "
+
+#define ASCII_KIRIN \
+"$C1                                #######              \
+$C1    #####             ####################           \
+$C1       ######################################        \
+$C1         #######################################     \
+$C1            #######################################  \
+$C1              ##############################         \
+$C1             ##########################              \
+$C1          #########################                  \
+$C1        ########################                     \
+$C1     ########################                        \
+$C1  #########################                          \
+$C1#########################                            "
+
+#define ASCII_BROADCOM \
+"$C2                                            \
+$C2             ################               \
+$C2        ##########################          \
+$C2     ################################       \
+$C2   ################$C1@@@@$C2################     \
+$C2  ################$C1@@@@@@$C2################    \
+$C2 #################$C1@@@@@@$C2#################   \
+$C2#################$C1@@@@@@@@$C2#################  \
+$C2#################$C1@@@@@@@@$C2#################  \
+$C2################$C1@@@@$C2##$C1@@@@$C2################  \
+$C2################$C1@@@@$C2##$C1@@@@$C2################  \
+$C2###############$C1@@@@$C2####$C1@@@@$C2###############  \
+$C1 @@@@@@@@@@$C2####$C1@@@@$C2####$C1@@@@$C2####$C1@@@@@@@@@@   \
+$C2  ######$C1@@@@@@@@@@$C2######$C1@@@@@@@@@@$C2######    \
+$C2    ##################################      \
+$C2      ##############################        \
+$C2         ########################           \
+$C2             ###############                \
+$C2                                            "
+
+#define ASCII_ARM \
+"$C1   #####  ##   # #####  ## ####  ######   \
+$C1 ###    ####   ###      ####  ###   ###   \
+$C1###       ##   ###      ###    ##    ###  \
+$C1 ###    ####   ###      ###    ##    ###  \
+$C1  ######  ##   ###      ###    ##    ###  "
+
+#define ASCII_IBM \
+"$C1######## ##########   ######       ###### \
+$C1######## ###########  #######     ####### \
+$C1  ####     ###   ####   ######   ######   \
+$C1  ####     ###   ###    ####### #######   \
+$C1  ####     ########     ###############   \
+$C1  ####     ###   ###    #### ##### ####   \
+$C1  ####     ###   ####   ####  ###  ####   \
+$C1######## ###########  ######   #   ###### \
+$C1######## ##########   ######       ###### "
+
+// inspired by the neofetch mac logo
+#define ASCII_APPLE \
+"$C1                   .\"c.         \
+$C1                 ,xNMM.         \
+$C1                .lMM\"           \
+$C1                MM*             \
+$C1     .;loddo;:.   olloddol;.    \
+$C1   cKMMMMMMMMMMNWMMMMMMMMMMM0:  \
+$C1 .KMMMMMMMMMMMMMMMMMMMMMMMW*    \
+$C1 XMMMMMMMMMMMMMMMMMMMMMMMX.     \
+$C1;MMMMMMMMMMMMMMMMMMMMMMMM:      \
+$C1:MMMMMMMMMMMMMMMMMMMMMMMM:      \
+$C1.MMMMMMMMMMMMMMMMMMMMMMMMX.     \
+$C1 kMMMMMMMMMMMMMMMMMMMMMMMMWd.   \
+$C1 'XMMMMMMMMMMMMMMMMMMMMMMMMMMk  \
+$C1  'XMMMMMMMMMMMMMMMMMMMMMMMMK.  \
+$C1    kMMMMMMMMMMMMMMMMMMMMMMd    \
+$C1     'KMMMMMMMWXXWMMMMMMMk.     \
+$C1       \"cooc\"*    \"*coo'\"       "
+
+// --------------------- LONG LOGOS ------------------------- //
+#define ASCII_AMD_L \
+"$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1     @@@@      @@@       @@@   @@@@@@@@      $C2  ############   \
+$C1    @@@@@@     @@@@@   @@@@@   @@@    @@@    $C2    ##########   \
+$C1   @@@  @@@    @@@@@@@@@@@@@   @@@      @@   $C2   #     #####   \
+$C1  @@@    @@@   @@@  @@@  @@@   @@@      @@   $C2 ###     #####   \
+$C1 @@@@@@@@@@@@  @@@       @@@   @@@    @@@    $C2#########  ###   \
+$C1 @@@      @@@  @@@       @@@   @@@@@@@@@     $C2########    ##   \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              \
+$C1                                                              "
+
+#define ASCII_INTEL_L \
+"$C1                               ###############@               \
+$C1                       ######@                ######@         \
+$C1                  ###@                              ###@      \
+$C1              ##@                                     ###@    \
+$C1         ##@                                             ##@  \
+$C1         ##@                                             ##@  \
+$C1      @                    ##@                ##@        ##@  \
+$C1    #@   ##@   ########@   #####@   #####@    ##@        ##@  \
+$C1   #@    ##@   ##@    ##@  ##@    ###@  ###@  ##@        ##@  \
+$C1  #@     ##@   ##@    ##@  ##@    ##@    ##@  ##@       ##@   \
+$C1 #@      ##@   ##@    ##@  ##@    #########@  ##@     ###@    \
+$C1 #@      ##@   ##@    ##@  ##@    ##@         ##@   ####@     \
+$C1 #@       #@   ##@    ##@   ####@  ########@   #@  ##@        \
+$C1 ##@                                                          \
+$C1  ##@                                                         \
+$C1  ###@                                        ###@            \
+$C1    ####@                               #########@            \
+$C1      #########@               ###############@               \
+$C1          ##############################@                     "
+
+#define ASCII_INTEL_L_NEW \
+" ####################################################### \
+ ####################################################### \
+ ####%%%#################@@@#####################@@@#### \
+ ####%%%#################@@@#####################@@@#### \
+ ########################@@@#####################@@@#### \
+ ####@@@##@@@#@@@@@@@####@@@@@@####@@@@@@@@@#####@@@#### \
+ ####@@@##@@@@@@@@@@@@###@@@@@@##@@@@#####@@@@###@@@#### \
+ ####@@@##@@@@#####@@@@##@@@####@@@@#######@@@@##@@@#### \
+ ####@@@##@@@#######@@@##@@@####@@@@@@@@@@@@@@@##@@@#### \
+ ####@@@##@@@#######@@@##@@@####@@@@#############@@@#### \
+ ####@@@##@@@#######@@@##@@@@@@##@@@@#####@@@@###@@@#### \
+ ####@@@##@@@#######@@@###@@@@@####@@@@@@@@@#####@@@#### \
+ ####################################################### \
+ ####################################################### "
+
+#define ASCII_ARM_L \
+"$C1     ############    ##########   ####  #######  ########   \
+$C1  ###############    #########    ########################  \
+$C1 ####        ####    ####         #####   ########   #####  \
+$C1####         ####    ####         ####     ######     ####  \
+$C1####         ####    ####         ####      ####      ####  \
+$C1 ####       #####    ####         ####      ####      ####  \
+$C1  ###############    ####         ####      ####      ####  \
+$C1   ########  ####    ####         ####      ####      ####  "
+
+#define ASCII_IBM_L \
+"$C1 ############ ################   ##########        ########## \
+$C1                                                              \
+$C1 ############ ################## ############    ############ \
+$C1                                                              \
+$C1    ######       ######    ######    ####################     \
+$C1                                                              \
+$C1    ######       ##############      ####################     \
+$C1                                                              \
+$C1    ######       ######    ######    #####  ######  #####     \
+$C1                                                              \
+$C1 ############ ################## #########   ####   ######### \
+$C1                                                              \
+$C1 ############ ################   #########    ##    ######### "
+
+typedef struct ascii_logo asciiL;
+
+//                        ------------------------------------------------------------------------------------------------------+
+//                        | LOGO             | W | H | REPLACE | COLORS LOGO (>0 && <10)          | COLORS TEXT (=2)            |
+//                        ------------------------------------------------------------------------------------------------------+
+asciiL logo_amd         = { ASCII_AMD,         39, 15, false, {C_FG_WHITE, C_FG_GREEN},           {C_FG_WHITE,   C_FG_GREEN}   };
+asciiL logo_intel       = { ASCII_INTEL,       48, 14, false, {C_FG_CYAN},                        {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_intel_new   = { ASCII_INTEL_NEW,   51,  9, false, {C_FG_CYAN},                        {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_snapd       = { ASCII_SNAPD,       39, 16, false, {C_FG_RED, C_FG_WHITE},             {C_FG_RED,     C_FG_WHITE}   };
+asciiL logo_mtk         = { ASCII_MTK,         59,  5, false, {C_FG_BLUE, C_FG_YELLOW},           {C_FG_BLUE,    C_FG_YELLOW}  };
+asciiL logo_exynos      = { ASCII_EXYNOS,      22, 13, true,  {C_BG_BLUE, C_FG_WHITE},            {C_FG_BLUE,    C_FG_WHITE}   };
+asciiL logo_kirin       = { ASCII_KIRIN,       53, 12, false, {C_FG_RED},                         {C_FG_WHITE,   C_FG_RED}     };
+asciiL logo_broadcom    = { ASCII_BROADCOM,    44, 19, false, {C_FG_WHITE, C_FG_RED},             {C_FG_WHITE,   C_FG_RED}     };
+asciiL logo_arm         = { ASCII_ARM,         42,  5, false, {C_FG_CYAN},                        {C_FG_WHITE,   C_FG_CYAN}    };
+asciiL logo_ibm         = { ASCII_IBM,         42,  9, false, {C_FG_CYAN, C_FG_WHITE},            {C_FG_CYAN,    C_FG_WHITE}   };
+asciiL logo_apple       = { ASCII_APPLE,       32, 17, false, {C_FG_WHITE},                       {C_FG_B_BLACK, C_FG_B_WHITE} };
+// Long variants          | ----------------------------------------------------------------------------------------------------|
+asciiL logo_amd_l       = { ASCII_AMD_L,       62, 19, true,  {C_BG_WHITE, C_BG_GREEN},           {C_FG_WHITE, C_FG_GREEN}     };
+asciiL logo_intel_l     = { ASCII_INTEL_L,     62, 19, true,  {C_BG_CYAN, C_BG_WHITE},            {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_intel_l_new = { ASCII_INTEL_L_NEW, 57, 14, true,  {C_BG_CYAN, C_BG_WHITE, C_BG_BLUE}, {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_arm_l       = { ASCII_ARM_L,       60,  8, true,  {C_BG_CYAN},                        {C_FG_WHITE, C_FG_CYAN}      };
+asciiL logo_ibm_l       = { ASCII_IBM_L,       62, 13, true,  {C_BG_CYAN, C_FG_WHITE},            {C_FG_CYAN,  C_FG_WHITE}     };
+asciiL logo_unknown     = { NULL,               0,  0, false, {COLOR_NONE},                       {COLOR_NONE, COLOR_NONE}     };
 
 #endif

src/common/cpu.c

@@ -9,11 +9,15 @@
 
 #ifdef ARCH_X86
   #include "../x86/uarch.h"
+  #include "../x86/apic.h"
+#elif ARCH_PPC
+  #include "../ppc/uarch.h"
 #elif ARCH_ARM
   #include "../arm/uarch.h"
 #endif
 
-#define STRING_UNKNOWN    "Unknown"
+#define UNUSED(x) (void)(x)
+
 #define STRING_YES        "Yes"
 #define STRING_NO         "No"
 #define STRING_NONE       "None"
@@ -30,13 +34,20 @@ int64_t get_freq(struct frequency* freq) {
   return freq->max;
 }
 
-#ifdef ARCH_X86
-char* get_str_cpu_name(struct cpuInfo* cpu) {
-  return cpu->cpu_name;    
+#if defined(ARCH_X86) || defined(ARCH_PPC)
+char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname) {
+  #ifdef ARCH_X86
+  if(!fcpuname) {
+    return get_str_cpu_name_abbreviated(cpu);
+  }
+  #elif ARCH_PPC
+  UNUSED(fcpuname);
+  #endif
+  return cpu->cpu_name;
 }
 
 char* get_str_sockets(struct topology* topo) {
-  char* string = malloc(sizeof(char) * 2);
+  char* string = emalloc(sizeof(char) * 2);
   int32_t sanity_ret = snprintf(string, 2, "%d", topo->sockets);
   if(sanity_ret < 0) {
     printBug("get_str_sockets: snprintf returned a negative value for input: '%d'", topo->sockets);
@@ -51,71 +62,58 @@ uint32_t get_nsockets(struct topology* topo) {
 #endif
 
 int32_t get_value_as_smallest_unit(char ** str, uint32_t value) {
-  int32_t sanity_ret;
-  *str = malloc(sizeof(char)* 11); //8 for digits, 2 for units
+  int32_t ret;
+  int max_len = 10; // Max is 8 for digits, 2 for units
+  *str = emalloc(sizeof(char)* (max_len + 1));
 
   if(value/1024 >= 1024)
-    sanity_ret = snprintf(*str, 10,"%.4g"STRING_MEGABYTES, (double)value/(1<<20));
+    ret = snprintf(*str, max_len, "%.4g"STRING_MEGABYTES, (double)value/(1<<20));
   else
-    sanity_ret = snprintf(*str, 10,"%.4g"STRING_KILOBYTES, (double)value/(1<<10));  
-  
-  return sanity_ret;
+    ret = snprintf(*str, max_len, "%.4g"STRING_KILOBYTES, (double)value/(1<<10));
+
+  return ret;
 }
 
-// String functions 
+// String functions
 char* get_str_cache_two(int32_t cache_size, uint32_t physical_cores) {
-  // 4 for digits, 2 for units, 2 for ' (', 3 digits, 2 for units and 7 for ' Total)'
-  uint32_t max_size = 4+2 + 2 + 4+2 + 7 + 1;
-  int32_t sanity_ret;
-  char* string = malloc(sizeof(char) * max_size);  
   char* tmp1;
-  char* tmp2;  
+  char* tmp2;
   int32_t tmp1_len = get_value_as_smallest_unit(&tmp1, cache_size);
   int32_t tmp2_len = get_value_as_smallest_unit(&tmp2, cache_size * physical_cores);
-  
+
+  // tmp1_len for first output, 2 for ' (', tmp2_len for second output and 7 for ' Total)'
+  uint32_t size = tmp1_len + 2 + tmp2_len + 7 + 1;
+  char* string = emalloc(sizeof(char) * size);
+
   if(tmp1_len < 0) {
-    printBug("get_value_as_smallest_unit: snprintf returned a negative value for input: %d\n", cache_size);
-    return NULL;    
+    printBug("get_value_as_smallest_unit: snprintf failed for input: %d\n", cache_size);
+    return NULL;
   }
   if(tmp2_len < 0) {
-    printBug("get_value_as_smallest_unit: snprintf returned a negative value for input: %d\n", cache_size * physical_cores);
-    return NULL;    
+    printBug("get_value_as_smallest_unit: snprintf failed for input: %d\n", cache_size * physical_cores);
+    return NULL;
   }
-    
-  uint32_t size = tmp1_len + 2 + tmp2_len + 7 + 1;
-  sanity_ret = snprintf(string, size, "%s (%s Total)", tmp1, tmp2);  
-  
-  if(sanity_ret < 0) {
-    printBug("get_str_cache_two: snprintf returned a negative value for input: '%s' and '%s'\n", tmp1, tmp2);
-    return NULL;    
+
+  if(snprintf(string, size, "%s (%s Total)", tmp1, tmp2) < 0) {
+    printBug("get_str_cache_two: snprintf failed for input: '%s' and '%s'\n", tmp1, tmp2);
+    return NULL;
   }
-  
+
   free(tmp1);
   free(tmp2);
+
   return string;
 }
 
 char* get_str_cache_one(int32_t cache_size) {
-  // 4 for digits, 2 for units, 2 for ' (', 3 digits, 2 for units and 7 for ' Total)'
-  uint32_t max_size = 4+2 + 1;
-  int32_t sanity_ret;
-  char* string = malloc(sizeof(char) * max_size);  
-  char* tmp;
-  int32_t tmp_len = get_value_as_smallest_unit(&tmp, cache_size);
-  
-  if(tmp_len < 0) {
-    printBug("get_value_as_smallest_unit: snprintf returned a negative value for input: %d", cache_size);
-    return NULL;    
+  char* string;
+  int32_t str_len = get_value_as_smallest_unit(&string, cache_size);
+
+  if(str_len < 0) {
+    printBug("get_value_as_smallest_unit: snprintf failed for input: %d", cache_size);
+    return NULL;
   }
-      
-  uint32_t size = tmp_len + 1;
-  sanity_ret = snprintf(string, size, "%s", tmp);
-  
-  if(sanity_ret < 0) {
-    printBug("get_str_cache_one: snprintf returned a negative value for input: '%s'", tmp);
-    return NULL;    
-  }
-  free(tmp);
+
   return string;
 }
 
@@ -141,27 +139,85 @@ char* get_str_l2(struct cache* cach) {
 
 char* get_str_l3(struct cache* cach) {
   if(!cach->L3->exists)
-    return NULL;  
+    return NULL;
   return get_str_cache(cach->L3->size, cach->L3->num_caches);
 }
 
 char* get_str_freq(struct frequency* freq) {
   //Max 3 digits and 3 for '(M/G)Hz' plus 1 for '\0'
-  uint32_t size = (4+3+1);
+  uint32_t size = (5+1+3+1);
   assert(strlen(STRING_UNKNOWN)+1 <= size);
-  char* string = malloc(sizeof(char)*size);
+  char* string = emalloc(sizeof(char)*size);
   memset(string, 0, sizeof(char)*size);
-  
-  if(freq->max == UNKNOWN_FREQ || freq->max < 0)
+
+  if(freq->max == UNKNOWN_DATA || freq->max < 0)
     snprintf(string,strlen(STRING_UNKNOWN)+1,STRING_UNKNOWN);
   else if(freq->max >= 1000)
-    snprintf(string,size,"%.2f"STRING_GIGAHERZ,(float)(freq->max)/1000);
+    snprintf(string,size,"%.3f "STRING_GIGAHERZ,(float)(freq->max)/1000);
   else
-    snprintf(string,size,"%d"STRING_MEGAHERZ,freq->max);
-  
+    snprintf(string,size,"%d "STRING_MEGAHERZ,freq->max);
+
   return string;
 }
 
+char* get_str_peak_performance(int64_t flops) {
+  char* str;
+
+  if(flops == -1) {
+    str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN) + 1));
+    strncpy(str, STRING_UNKNOWN, strlen(STRING_UNKNOWN) + 1);
+    return str;
+  }
+
+  // 7 for digits (e.g, XXXX.XX), 7 for XFLOP/s
+  double flopsd = (double) flops;
+  uint32_t max_size = 7+1+7+1;
+  str = ecalloc(max_size, sizeof(char));
+
+  if(flopsd >= (double)1000000000000.0)
+    snprintf(str, max_size, "%.2f TFLOP/s", flopsd/1000000000000);
+  else if(flopsd >= 1000000000.0)
+    snprintf(str, max_size, "%.2f GFLOP/s", flopsd/1000000000);
+  else
+    snprintf(str, max_size, "%.2f MFLOP/s", flopsd/1000000);
+
+  return str;
+}
+
+void init_topology_struct(struct topology* topo, struct cache* cach) {
+  topo->total_cores = 0;
+  topo->cach = cach;
+#if defined(ARCH_X86) || defined(ARCH_PPC)
+  topo->physical_cores = 0;
+  topo->logical_cores = 0;
+  topo->smt_supported = 0;
+  topo->sockets = 0;
+#ifdef ARCH_X86
+  topo->smt_available = 0;
+  topo->apic = emalloc(sizeof(struct apic));
+#endif
+#endif
+}
+
+void init_cache_struct(struct cache* cach) {
+  cach->L1i = emalloc(sizeof(struct cach));
+  cach->L1d = emalloc(sizeof(struct cach));
+  cach->L2 = emalloc(sizeof(struct cach));
+  cach->L3 = emalloc(sizeof(struct cach));
+
+  cach->cach_arr = emalloc(sizeof(struct cach*) * 4);
+  cach->cach_arr[0] = cach->L1i;
+  cach->cach_arr[1] = cach->L1d;
+  cach->cach_arr[2] = cach->L2;
+  cach->cach_arr[3] = cach->L3;
+
+  cach->max_cache_level = 0;
+  cach->L1i->exists = false;
+  cach->L1d->exists = false;
+  cach->L2->exists = false;
+  cach->L3->exists = false;
+}
+
 void free_cache_struct(struct cache* cach) {
   for(int i=0; i < 4; i++) free(cach->cach_arr[i]);
   free(cach->cach_arr);

src/common/cpu.h

@@ -10,6 +10,7 @@ enum {
   CPU_VENDOR_AMD,
 // ARCH_ARM
   CPU_VENDOR_ARM,
+  CPU_VENDOR_APPLE,
   CPU_VENDOR_BROADCOM,
   CPU_VENDOR_CAVIUM,
   CPU_VENDOR_NVIDIA,
@@ -33,7 +34,7 @@ enum {
   HV_VENDOR_INVALID
 };
 
-#define UNKNOWN_FREQ -1
+#define UNKNOWN_DATA -1
 #define CPU_NAME_MAX_LENGTH 64
 
 typedef int32_t VENDOR;
@@ -69,14 +70,16 @@ struct cache {
 struct topology {
   int32_t total_cores;  
   struct cache* cach;
-#ifdef ARCH_X86
-  uint32_t physical_cores;  
-  uint32_t logical_cores;
-  uint32_t smt_available; // Number of SMT that is currently enabled
-  uint32_t smt_supported; // Number of SMT that CPU supports (equal to smt_available if SMT is enabled)
+#if defined(ARCH_X86) || defined(ARCH_PPC)
+  int32_t physical_cores;
+  int32_t logical_cores;
   uint32_t sockets;
+  uint32_t smt_supported; // Number of SMT that CPU supports (equal to smt_available if SMT is enabled)
+#ifdef ARCH_X86
+  uint32_t smt_available; // Number of SMT that is currently enabled
   struct apic* apic;
 #endif
+#endif
 };
 
 struct features {
@@ -94,7 +97,9 @@ struct features {
   bool SSE4_2;
   bool FMA3;
   bool FMA4;
-  bool SHA;  
+  bool SHA;
+#elif ARCH_PPC
+  bool altivec;
 #elif ARCH_ARM
   bool NEON;  
   bool SHA1;
@@ -111,14 +116,22 @@ struct cpuInfo {
   struct cache* cach;
   struct topology* topo;
   struct features* feat;
-  
-#ifdef ARCH_X86
+  int64_t peak_performance;
+
+#if defined(ARCH_X86) || defined(ARCH_PPC)
   // CPU name from model
   char* cpu_name;
+#endif
+
+#ifdef ARCH_X86
   //  Max cpuids levels
   uint32_t maxLevels;
   // Max cpuids extended levels
   uint32_t maxExtendedLevels;
+  // Topology Extensions (AMD only)
+  bool topology_extensions;
+#elif ARCH_PPC
+  uint32_t pvr;
 #elif ARCH_ARM
   // Main ID register
   uint32_t midr;
@@ -134,8 +147,8 @@ struct cpuInfo {
 #endif
 };
 
-#ifdef ARCH_X86
-char* get_str_cpu_name(struct cpuInfo* cpu);
+#if defined(ARCH_X86) || defined(ARCH_PPC)
+char* get_str_cpu_name(struct cpuInfo* cpu, bool fcpuname);
 char* get_str_sockets(struct topology* topo);
 uint32_t get_nsockets(struct topology* topo);
 #endif
@@ -150,6 +163,10 @@ char* get_str_l1d(struct cache* cach);
 char* get_str_l2(struct cache* cach);
 char* get_str_l3(struct cache* cach);
 char* get_str_freq(struct frequency* freq);
+char* get_str_peak_performance(int64_t flops);
+
+void init_topology_struct(struct topology* topo, struct cache* cach);
+void init_cache_struct(struct cache* cach);
 
 void free_cache_struct(struct cache* cach);
 void free_freq_struct(struct frequency* freq);

src/common/global.c

@@ -1,5 +1,9 @@
 #include <stdarg.h>
 #include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+
 #include "global.h"
 
 #ifdef _WIN32
@@ -53,10 +57,10 @@ void printBug(const char *fmt, ...) {
   vsnprintf(buffer,buffer_size, fmt, args);
   va_end(args);
   fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
-#ifdef ARCH_X86
-  fprintf(stderr,"Please, create a new issue with this error message and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
+#if defined(ARCH_X86) || defined(ARCH_PPC)
+  fprintf(stderr, "Please, create a new issue with this error message, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
 #elif ARCH_ARM
-  fprintf(stderr,"Please, create a new issue with this error message, your smartphone/computer model and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
+  fprintf(stderr, "Please, create a new issue with this error message, your smartphone/computer model, the output of 'cpufetch' and 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
 #endif
 }
 
@@ -64,3 +68,46 @@ void set_log_level(bool verbose) {
   if(verbose) LOG_LEVEL = LOG_LEVEL_VERBOSE;
   else LOG_LEVEL = LOG_LEVEL_NORMAL;
 }
+
+int max(int a, int b) {
+  return a > b ? a : b;
+}
+
+int min(int a, int b) {
+  return a < b ? a : b;
+}
+
+char *strremove(char *str, const char *sub) {
+  char *p, *q, *r;
+  if (*sub && (q = r = strstr(str, sub)) != NULL) {
+    size_t len = strlen(sub);
+    while ((r = strstr(p = r + len, sub)) != NULL) {
+      memmove(q, p, r - p);
+      q += r - p;
+    }
+    memmove(q, p, strlen(p) + 1);
+  }
+  return str;
+}
+
+void* emalloc(size_t size) {
+  void* ptr = malloc(size);
+
+  if(ptr == NULL) {
+    printErr("malloc failed: %s", strerror(errno));
+    exit(1);
+  }
+
+  return ptr;
+}
+
+void* ecalloc(size_t nmemb, size_t size) {
+  void* ptr = calloc(nmemb, size);
+
+  if(ptr == NULL) {
+    printErr("calloc failed: %s", strerror(errno));
+    exit(1);
+  }
+
+  return ptr;
+}

src/common/global.h

@@ -2,10 +2,18 @@
 #define __GLOBAL__
 
 #include <stdbool.h>
+#include <stddef.h>
+
+#define STRING_UNKNOWN "Unknown"
 
 void set_log_level(bool verbose);
 void printWarn(const char *fmt, ...);
 void printErr(const char *fmt, ...);
 void printBug(const char *fmt, ...);
+int min(int a, int b);
+int max(int a, int b);
+char *strremove(char *str, const char *sub);
+void* emalloc(size_t size);
+void* ecalloc(size_t nmemb, size_t size);
 
 #endif

src/common/main.c

@@ -1,5 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
 
 #include "args.h"
 #include "printer.h"
@@ -8,50 +9,105 @@
 #ifdef ARCH_X86
   static const char* ARCH_STR = "x86_64 build";
   #include "../x86/cpuid.h"
+#elif ARCH_PPC
+  static const char* ARCH_STR = "PowerPC build";
+  #include "../ppc/ppc.h"
 #elif ARCH_ARM
   static const char* ARCH_STR = "ARM build";
   #include "../arm/midr.h"
 #endif
 
-static const char* VERSION = "0.94";
-
-void print_help(char *argv[]) {
-  printf("Usage: %s [--version] [--help] [--debug] [--style \"fancy\"|\"retro\"|\"legacy\"] [--color \"intel\"|\"amd\"|'R,G,B:R,G,B:R,G,B:R,G,B']\n\n", argv[0]);
-
-  printf("Options: \n\
-  --color       Set the color scheme. By default, cpufetch uses the system color scheme. This option \n\
-                lets the user use different colors to print the CPU art:  \n\
-   * \"intel\":   Use Intel default color scheme \n\
-   * \"amd\":     Use AMD default color scheme \n\
-   * \"arm\":     Use ARM default color scheme \n\
-   * custom:    If color argument do not match \"Intel\", \"AMD\" or \"ARM\", a custom scheme can be specified: \n\
-                4 colors must be given in RGB with the format: R,G,B:R,G,B:... \n\
-                These colors correspond to CPU art color (2 colors) and for the text colors (following 2) \n\
-                For example: --color 239,90,45:210,200,200:100,200,45:0,200,200 \n\n\
-  --style       Set the style of CPU art: \n\
-    * \"fancy\":  Default style      \n\
-    * \"retro\":  Old cpufetch style \n\
-    * \"legacy\": Fallback style for terminals that does not support colors                       \n\n");
-
-#ifdef ARCH_X86
-  printf("  --debug       Prints CPU model and cpuid levels (debug purposes)\n\n");
-#elif ARCH_ARM
-  printf("  --debug       Prints main ID register values for all cores (debug purposes)\n\n");
+#ifdef __linux__
+  #ifdef __ANDROID__
+    static const char* OS_STR = "Android";
+  #else
+    static const char* OS_STR = "Linux";
+  #endif
+#elif __FreeBSD__
+  static const char* OS_STR = "FreeBSD";
+#elif _WIN32
+  static const char* OS_STR = "Windows";
+#elif defined __APPLE__ || __MACH__
+  static const char* OS_STR = "macOS";
+#else
+  static const char* OS_STR = "Unknown OS";
 #endif
 
-  printf("  --verbose     Prints extra information (if available) about how cpufetch tried fetching information\n\n\
-  --help        Prints this help and exit\n\n\
-  --version     Prints cpufetch version and exit\n\n\
-                                                   \n\
-NOTES: \n\
-  - Bugs or improvements should be submitted to: github.com/Dr-Noob/cpufetch/issues        \n\
-  - Peak performance information is NOT accurate. cpufetch computes peak performance using the max   \n\
-    frequency. However, to properly compute peak performance, you need to know the frequency of the  \n\
-    CPU running AVX code, which is not be fetched by cpufetch since it depends on each specific CPU. \n");
+static const char* VERSION = "1.01";
+
+void print_help(char *argv[]) {
+  const char **t = args_str;
+  const char *c = args_chr;
+  int max_len = max_arg_str_length();
+
+  printf("Usage: %s [OPTION]...\n", argv[0]);
+  printf("Simple yet fancy CPU architecture fetching tool\n\n");
+
+  printf("OPTIONS: \n");
+  printf("  -%c, --%s %*s Set the color scheme (by default, cpufetch uses the system color scheme)\n", c[ARG_COLOR], t[ARG_COLOR], (int) (max_len-strlen(t[ARG_COLOR])), "");
+  printf("  -%c, --%s %*s Set the style of CPU logo\n", c[ARG_STYLE], t[ARG_STYLE], (int) (max_len-strlen(t[ARG_STYLE])), "");
+#ifdef ARCH_X86
+  printf("  -%c, --%s %*s Print CPU model and cpuid levels (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
+#elif ARCH_PPC
+  printf("  -%c, --%s %*s Print PVR register (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
+#elif ARCH_ARM
+  printf("  -%c, --%s %*s Print main ID register values (debug purposes)\n", c[ARG_DEBUG], t[ARG_DEBUG], (int) (max_len-strlen(t[ARG_DEBUG])), "");
+#endif
+  printf("      --%s %*s Show the short version of the logo\n", t[ARG_LOGO_SHORT], (int) (max_len-strlen(t[ARG_LOGO_SHORT])), "");
+  printf("      --%s %*s Show the long version of the logo\n", t[ARG_LOGO_LONG], (int) (max_len-strlen(t[ARG_LOGO_LONG])), "");
+  printf("  -%c, --%s %*s Print extra information (if available) about how cpufetch tried fetching information\n", c[ARG_VERBOSE], t[ARG_VERBOSE], (int) (max_len-strlen(t[ARG_VERBOSE])), "");
+#ifdef ARCH_X86
+#ifdef __linux__
+  printf("      --%s %*s Compute the peak performance accurately (measure the CPU frequency instead of using the maximum)\n", t[ARG_ACCURATE_PP], (int) (max_len-strlen(t[ARG_ACCURATE_PP])), "");
+#endif
+  printf("      --%s %*s Show the old Intel logo\n", t[ARG_LOGO_INTEL_OLD], (int) (max_len-strlen(t[ARG_LOGO_INTEL_OLD])), "");
+  printf("      --%s %*s Show the new Intel logo\n", t[ARG_LOGO_INTEL_NEW], (int) (max_len-strlen(t[ARG_LOGO_INTEL_NEW])), "");
+  printf("  -%c, --%s %*s Show the full CPU name (do not abbreviate it)\n", c[ARG_FULLCPUNAME], t[ARG_FULLCPUNAME], (int) (max_len-strlen(t[ARG_FULLCPUNAME])), "");
+  printf("  -%c, --%s %*s Print raw cpuid data (debug purposes)\n", c[ARG_RAW], t[ARG_RAW], (int) (max_len-strlen(t[ARG_RAW])), "");
+#endif
+  printf("  -%c, --%s %*s Print this help and exit\n", c[ARG_HELP], t[ARG_HELP], (int) (max_len-strlen(t[ARG_HELP])), "");
+  printf("  -%c, --%s %*s Print cpufetch version and exit\n", c[ARG_VERSION], t[ARG_VERSION], (int) (max_len-strlen(t[ARG_VERSION])), "");
+
+  printf("\nCOLORS: \n");
+  printf("  * \"intel\":     Use Intel default color scheme \n");
+  printf("  * \"amd\":       Use AMD default color scheme \n");
+  printf("  * \"ibm\",       Use IBM default color scheme \n");
+  printf("  * \"arm\":       Use ARM default color scheme \n");
+  printf("  * custom:      If the argument of --color does not match any of the previous strings, a custom scheme can be specified.\n");
+  printf("                 5 colors must be given in RGB with the format: R,G,B:R,G,B:...\n");
+  printf("                 The first 3 colors are the CPU art color and the next 2 colors are the text colors\n");
+
+  printf("\nSTYLES: \n");
+  printf("  * \"fancy\":     Default style\n");
+  printf("  * \"retro\":     Old cpufetch style\n");
+  printf("  * \"legacy\":    Fallback style for terminals that do not support colors\n");
+
+  printf("\nLOGOS: \n");
+  printf("    cpufetch will try to adapt the logo size and the text to the terminal width. When the output (logo and text) is wider than\n");
+  printf("    the terminal width, cpufetch will print a smaller version of the logo (if it exists). This behavior can be overridden by\n");
+  printf("    --logo-short  and --logo-long, which always sets the logo size as specified by the user, even if it is too big. After the\n");
+  printf("    logo selection (either automatically or set by the user), cpufetch will check again if the output fits in the terminal.\n");
+  printf("    If not, it will use a shorter name for the fields (the left part of the text). If, after all of this, the output still does\n");
+  printf("    not fit, cpufetch will cut the text and will only print the text until there is no space left in each line\n");
+
+  printf("\nEXAMPLES: \n");
+  printf("    Run cpufetch with Intel color scheme:\n");
+  printf("      ./cpufetch --color intel\n");
+  printf("    Run cpufetch with a custom color scheme:\n");
+  printf("      ./cpufetch --color 239,90,45:210,200,200:0,0,0:100,200,45:0,200,200\n");
+
+  printf("\nBUGS: \n");
+  printf("    Report bugs to https://github.com/Dr-Noob/cpufetch/issues\n");
+
+  printf("\nNOTE: \n");
+  printf("    Peak performance information is NOT accurate. cpufetch computes peak performance using the max\n");
+  printf("    frequency of the CPU. However, to compute the peak performance, you need to know the frequency of the\n");
+  printf("    CPU running AVX code. This value is not be fetched by cpufetch since it depends on each specific CPU.\n");
+  printf("    To correctly measure peak performance, see: https://github.com/Dr-Noob/peakperf\n");
 }
 
 void print_version() {
-  printf("cpufetch v%s (%s)\n",VERSION, ARCH_STR);
+  printf("cpufetch v%s (%s %s)\n",VERSION, OS_STR, ARCH_STR);
 }
 
 int main(int argc, char* argv[]) {
@@ -59,7 +115,6 @@ int main(int argc, char* argv[]) {
     return EXIT_FAILURE;
 
   if(show_help()) {
-    print_version();
     print_help(argv);
     return EXIT_SUCCESS;
   }
@@ -80,8 +135,20 @@ int main(int argc, char* argv[]) {
     print_debug(cpu);
     return EXIT_SUCCESS;
   }
-  
-  if(print_cpufetch(cpu, get_style(), get_colors()))
+
+  // TODO: This should be moved to the end of args.c
+  if(show_raw()) {
+  #ifdef ARCH_X86
+    print_version();
+    print_raw(cpu);
+    return EXIT_SUCCESS;
+  #else
+    printErr("raw option is valid only in x86_64");
+    return EXIT_FAILURE;
+  #endif
+  }
+
+  if(print_cpufetch(cpu, get_style(), get_colors(), show_full_cpu_name()))
     return EXIT_SUCCESS;
   else
     return EXIT_FAILURE;

src/common/printer.h

@@ -7,18 +7,25 @@ typedef int STYLE;
 
 #ifdef ARCH_X86
   #include "../x86/cpuid.h"
-#else
+#elif ARCH_PPC
+  #include "../ppc/ppc.h"
+#elif ARCH_ARM
   #include "../arm/midr.h"
 #endif
 
-#define COLOR_DEFAULT_INTEL "15,125,194:230,230,230:40,150,220:230,230,230"
-#define COLOR_DEFAULT_AMD   "250,250,250:0,154,102:250,250,250:0,154,102"
-#define COLOR_DEFAULT_ARM   "0,145,189:0,145,189:240,240,240:0,145,189"
+//                              +-----------------------------------+-----------------------+
+//                              | Color logo                        | Color text            |
+//                              | Color 1   | Color 2   | Color 3   | Color 1   | Color 2   |
+#define COLOR_DEFAULT_INTEL     "015,125,194:230,230,230:000,000,000:040,150,220:230,230,230"
+#define COLOR_DEFAULT_INTEL_NEW "030,204,251:250,250,250:000,104,181:230,230,230:030,204,251"
+#define COLOR_DEFAULT_AMD       "250,250,250:000,154,102:000,000,000:250,250,250:000,154,102"
+#define COLOR_DEFAULT_IBM       "092,119,172:092,119,172:000,000,000:240,240,240:092,119,172"
+#define COLOR_DEFAULT_ARM       "000,145,189:000,145,189:000,000,000:240,240,240:000,145,189"
 
 #ifdef ARCH_X86
 void print_levels(struct cpuInfo* cpu);
 #endif
 
-bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct colors* cs);
+bool print_cpufetch(struct cpuInfo* cpu, STYLE s, struct color** cs, bool fcpuname);
 
 #endif

src/common/udev.c

@@ -2,9 +2,51 @@
 #include "global.h"
 #include "cpu.h"
 
+// https://www.kernel.org/doc/html/latest/core-api/cpu_hotplug.html
+int get_ncores_from_cpuinfo() {
+  // Examples:
+  // 0-271
+  // 0-7
+  // 0
+
+  int filelen;
+  char* buf;
+  if((buf = read_file(_PATH_CPUS_PRESENT, &filelen)) == NULL) {
+    printWarn("read_file: %s: %s\n", _PATH_CPUS_PRESENT, strerror(errno));
+    return -1;
+  }
+
+  int ncores;
+  char* tmp1;
+  if((tmp1 = strstr(buf, "-")) == NULL) {
+    // file contains no - character, we assume that it contains 0,
+    // which means that the CPU contains only one core
+    return 1;
+  }
+  else {
+    tmp1++;
+  }
+  char* tmp2 = strstr(buf, "\n");
+  char ncores_str[filelen];
+  memset(ncores_str, 0, sizeof(char) * filelen);
+  memcpy(ncores_str, tmp1, tmp2-tmp1);
+
+  char* end;
+  errno = 0;
+  ncores = strtol(ncores_str, &end, 10) + 1;
+  if(errno != 0) {
+    printWarn("strtol: %s:\n", strerror(errno));
+    return -1;
+  }
+
+  free(buf);
+
+  return ncores;
+}
+
 char* read_file(char* path, int* len) {
   int fd = open(path, O_RDONLY);
-  
+
   if(fd == -1) {
     return NULL;
   }
@@ -13,17 +55,17 @@ char* read_file(char* path, int* len) {
   int bytes_read = 0;
   int offset = 0;
   int block = 128;
-  char* buf = malloc(sizeof(char)*DEFAULT_FILE_SIZE);
+  char* buf = emalloc(sizeof(char)*DEFAULT_FILE_SIZE);
   memset(buf, 0, sizeof(char)*DEFAULT_FILE_SIZE);
 
   while (  (bytes_read = read(fd, buf+offset, block)) > 0 ) {
     offset += bytes_read;
-  }    
-  
+  }
+
   if (close(fd) == -1) {
     return NULL;
   }
-  
+
   *len = offset;
   return buf;
 }
@@ -32,38 +74,56 @@ long get_freq_from_file(char* path) {
   int filelen;
   char* buf;
   if((buf = read_file(path, &filelen)) == NULL) {
-  #ifdef ARCH_X86
-    perror("open");
-    printBug("Could not open '%s'", path); 
-  #elif ARCH_ARM
-    printWarn("Could not open '%s'", path); 
-  #endif
-    return UNKNOWN_FREQ;
+    printWarn("Could not open '%s'", path);
+    return UNKNOWN_DATA;
   }
 
   char* end;
   errno = 0;
   long ret = strtol(buf, &end, 10);
   if(errno != 0) {
-    perror("strtol");
-    printBug("Failed parsing '%s' file. Read data was: '%s'", path, buf);
+    printBug("strtol: %s", strerror(errno));
     free(buf);
-    return UNKNOWN_FREQ;
+    return UNKNOWN_DATA;
   }
-  
+
   // We will be getting the frequency in KHz
   // We consider it is an error if frequency is
   // greater than 10 GHz or less than 100 MHz
   if(ret > 10000 * 1000 || ret <  100 * 1000) {
     printBug("Invalid data was read from file '%s': %ld\n", path, ret);
-    return UNKNOWN_FREQ;
+    return UNKNOWN_DATA;
   }
-  
+
   free(buf);
-  
+
   return ret/1000;
 }
 
+long get_cache_size_from_file(char* path) {
+  int filelen;
+  char* buf;
+  if((buf = read_file(path, &filelen)) == NULL) {
+    printWarn("Could not open '%s'", path);
+    return -1;
+  }
+
+  buf[filelen] = '\0'; // remove the K at the end
+
+  char* end;
+  errno = 0;
+  long ret = strtol(buf, &end, 10);
+  if(errno != 0) {
+    printBug("strtol: %s", strerror(errno));
+    free(buf);
+    return -1;
+  }
+
+  free(buf);
+
+  return ret * 1024;
+}
+
 long get_max_freq_from_file(uint32_t core) {
   char path[_PATH_FREQUENCY_MAX_LEN];
   sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MAX);
@@ -75,3 +135,104 @@ long get_min_freq_from_file(uint32_t core) {
   sprintf(path, "%s%s/cpu%d%s%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_FREQUENCY, _PATH_FREQUENCY_MIN);
   return get_freq_from_file(path);
 }
+
+long get_l1i_cache_size(uint32_t core) {
+  char path[_PATH_CACHE_MAX_LEN];
+  sprintf(path, "%s%s/cpu%d%s%s",  _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L1I, _PATH_CACHE_SIZE);
+  return get_cache_size_from_file(path);
+}
+
+long get_l1d_cache_size(uint32_t core) {
+  char path[_PATH_CACHE_MAX_LEN];
+  sprintf(path, "%s%s/cpu%d%s%s",  _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L1D, _PATH_CACHE_SIZE);
+  return get_cache_size_from_file(path);
+}
+
+long get_l2_cache_size(uint32_t core) {
+  char path[_PATH_CACHE_MAX_LEN];
+  sprintf(path, "%s%s/cpu%d%s%s",  _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L2, _PATH_CACHE_SIZE);
+  return get_cache_size_from_file(path);
+}
+
+long get_l3_cache_size(uint32_t core) {
+  char path[_PATH_CACHE_MAX_LEN];
+  sprintf(path, "%s%s/cpu%d%s%s",  _PATH_SYS_SYSTEM, _PATH_SYS_CPU, core, _PATH_CACHE_L3, _PATH_CACHE_SIZE);
+  return get_cache_size_from_file(path);
+}
+
+int get_num_caches_from_files(char** paths, int num_paths) {
+  int SHARED_MAP_MAX_LEN = 8 + 1;
+  int filelen;
+  char* buf;
+  uint32_t* shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
+
+  // 1. Read cpu_shared_map from every core
+  for(int i=0; i < num_paths; i++) {
+    if((buf = read_file(paths[i], &filelen)) == NULL) {
+      printWarn("Could not open '%s'", paths[i]);
+      return -1;
+    }
+
+    if(filelen > SHARED_MAP_MAX_LEN) {
+      printBug("Shared map length is %d while the max is be %d", filelen, SHARED_MAP_MAX_LEN);
+      return -1;
+    }
+
+    char* end;
+    errno = 0;
+    long ret = strtol(buf, &end, 16);
+    if(errno != 0) {
+      printBug("strtol: %s", strerror(errno));
+      free(buf);
+      return -1;
+    }
+
+    shared_maps[i] = (uint32_t) ret;
+  }
+
+  // 2. Count number of different masks; this is the number of caches
+  int num_caches = 0;
+  bool found = false;
+  uint32_t* unique_shared_maps = emalloc(sizeof(uint32_t *) * num_paths);
+  for(int i=0; i < num_paths; i++) unique_shared_maps[i] = 0;
+
+  for(int i=0; i < num_paths; i++) {
+    for(int j=0; j < num_paths && !found; j++) {
+      if(shared_maps[i] == unique_shared_maps[j]) found = true;
+    }
+    if(!found) {
+      unique_shared_maps[num_caches] = shared_maps[i];
+      num_caches++;
+    }
+    found = false;
+  }
+
+  return num_caches;
+}
+
+int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level) {
+  char** paths = emalloc(sizeof(char *) * cpu->topo->total_cores);
+  char* cache_path = NULL;
+
+  if(level == 0) cache_path = _PATH_CACHE_L1I;
+  else if(level == 1) cache_path = _PATH_CACHE_L1D;
+  else if(level == 2) cache_path = _PATH_CACHE_L2;
+  else if(level == 3) cache_path = _PATH_CACHE_L3;
+  else {
+    printBug("Found invalid cache level to inspect: %d\n", level);
+    return -1;
+  }
+
+  for(int i=0; i < cpu->topo->total_cores; i++) {
+    paths[i] = emalloc(sizeof(char) * _PATH_CACHE_MAX_LEN);
+    sprintf(paths[i], "%s%s/cpu%d%s%s",  _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, cache_path, _PATH_CACHE_SHARED_MAP);
+  }
+
+  int ret = get_num_caches_from_files(paths, cpu->topo->total_cores);
+
+  for(int i=0; i < cpu->topo->total_cores; i++)
+    free(paths[i]);
+  free(paths);
+
+  return ret;
+}

src/common/udev.h

@@ -10,17 +10,33 @@
 #include <fcntl.h>
 #include <errno.h>
 
+#include "cpu.h"
+
 #define _PATH_SYS_SYSTEM        "/sys/devices/system"
 #define _PATH_SYS_CPU           "/cpu"
 #define _PATH_FREQUENCY         "/cpufreq"
 #define _PATH_FREQUENCY_MAX     "/cpuinfo_max_freq"
 #define _PATH_FREQUENCY_MIN     "/cpuinfo_min_freq"
+#define _PATH_CACHE_L1D         "/cache/index0"
+#define _PATH_CACHE_L1I         "/cache/index1"
+#define _PATH_CACHE_L2          "/cache/index2"
+#define _PATH_CACHE_L3          "/cache/index3"
+#define _PATH_CACHE_SIZE        "/size"
+#define _PATH_CACHE_SHARED_MAP  "/shared_cpu_map"
+#define _PATH_CPUS_PRESENT           _PATH_SYS_SYSTEM _PATH_SYS_CPU "/present"
 
 #define _PATH_FREQUENCY_MAX_LEN 100
+#define _PATH_CACHE_MAX_LEN     200
 #define DEFAULT_FILE_SIZE       4096
 
 char* read_file(char* path, int* len);
 long get_max_freq_from_file(uint32_t core);
 long get_min_freq_from_file(uint32_t core);
+long get_l1i_cache_size(uint32_t core);
+long get_l1d_cache_size(uint32_t core);
+long get_l2_cache_size(uint32_t core);
+long get_l3_cache_size(uint32_t core);
+int get_num_caches_by_level(struct cpuInfo* cpu, uint32_t level);
+int get_ncores_from_cpuinfo();
 
 #endif

src/ppc/ppc.c

@@ -0,0 +1,223 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <assert.h>
+
+#include "ppc.h"
+#include "uarch.h"
+#include "udev.h"
+#include "../common/udev.h"
+#include "../common/global.h"
+
+struct cache* get_cache_info(struct cpuInfo* cpu) {
+  struct cache* cach = emalloc(sizeof(struct cache));
+  init_cache_struct(cach);
+
+  cach->L1i->size = get_l1i_cache_size(0);
+  cach->L1d->size = get_l1d_cache_size(0);
+  cach->L2->size = get_l2_cache_size(0);
+  cach->L3->size = get_l3_cache_size(0);
+
+  if(cach->L1i->size > 0) {
+    cach->L1i->exists = true;
+    cach->L1i->num_caches = get_num_caches_by_level(cpu, 0);
+    cach->max_cache_level = 1;
+  }
+  if(cach->L1d->size > 0) {
+    cach->L1d->exists = true;
+    cach->L1d->num_caches = get_num_caches_by_level(cpu, 1);
+    cach->max_cache_level = 2;
+  }
+  if(cach->L2->size > 0) {
+    cach->L2->exists = true;
+    cach->L2->num_caches = get_num_caches_by_level(cpu, 2);
+    cach->max_cache_level = 3;
+  }
+  if(cach->L3->size > 0) {
+    cach->L3->exists = true;
+    cach->L3->num_caches = get_num_caches_by_level(cpu, 3);
+    cach->max_cache_level = 4;
+  }
+
+  return cach;
+}
+
+struct topology* get_topology_info(struct cache* cach) {
+  struct topology* topo = emalloc(sizeof(struct topology));
+  init_topology_struct(topo, cach);
+
+  // 1. Total cores detection
+  if((topo->total_cores = sysconf(_SC_NPROCESSORS_ONLN)) == -1) {
+    printWarn("sysconf(_SC_NPROCESSORS_ONLN): %s", strerror(errno));
+    topo->total_cores = 1; // fallback
+  }
+
+  // To find physical cores, we use topo->total_cores and core_ids
+  // To find number of sockets, we use package_ids
+  int* core_ids = emalloc(sizeof(int) * topo->total_cores);
+  int* package_ids = emalloc(sizeof(int) * topo->total_cores);
+
+  if(!fill_core_ids_from_sys(core_ids, topo->total_cores)) {
+    printWarn("fill_core_ids_from_sys failed, output may be incomplete/invalid");
+    for(int i=0; i < topo->total_cores; i++) core_ids[i] = 0;
+  }
+  if(!fill_package_ids_from_sys(package_ids, topo->total_cores)) {
+    printWarn("fill_package_ids_from_sys failed, output may be incomplete/invalid");
+    for(int i=0; i < topo->total_cores; i++) package_ids[i] = 0;
+  }
+
+  // 2. Socket detection
+  int *package_ids_count = emalloc(sizeof(int) * topo->total_cores);
+  for(int i=0; i < topo->total_cores; i++) {
+    package_ids_count[i] = 0;
+  }
+  for(int i=0; i < topo->total_cores; i++) {
+    package_ids_count[package_ids[i]]++;
+  }
+  for(int i=0; i < topo->total_cores; i++) {
+    if(package_ids_count[i] != 0) {
+      topo->sockets++;
+    }
+  }
+
+  // 3. Physical cores detection
+  int *core_ids_unified = emalloc(sizeof(int) * topo->total_cores);
+  for(int i=0; i < topo->total_cores; i++) {
+    core_ids_unified[i] = -1;
+  }
+  bool found = false;
+  for(int i=0; i < topo->total_cores; i++) {
+    for(int j=0; j < topo->total_cores && !found; j++) {
+      if(core_ids_unified[j] == core_ids[i]) found = true;
+    }
+    if(!found) {
+      core_ids_unified[topo->physical_cores] = core_ids[i];
+      topo->physical_cores++;
+    }
+    found = false;
+  }
+
+  topo->physical_cores = topo->physical_cores / topo->sockets; // only count cores on one socket
+  topo->logical_cores = topo->total_cores / topo->sockets;     // only count threads on one socket
+  topo->smt_supported = topo->logical_cores / topo->physical_cores;
+
+  free(core_ids);
+  free(package_ids);
+  free(package_ids_count);
+  free(core_ids_unified);
+
+  return topo;
+}
+
+static inline uint32_t mfpvr() {
+    uint32_t pvr;
+
+    asm ("mfpvr %0"
+         : "=r"(pvr));
+    return pvr;
+}
+
+struct uarch* get_cpu_uarch(struct cpuInfo* cpu) {
+  return get_uarch_from_pvr(cpu->pvr);
+}
+
+struct frequency* get_frequency_info() {
+  struct frequency* freq = emalloc(sizeof(struct frequency));
+
+  freq->max = get_max_freq_from_file(0);
+  freq->base = get_min_freq_from_file(0);
+
+  return freq;
+}
+
+int64_t get_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq) {
+  /*
+   * Not sure about this
+   * PP(SP) = N_CORES * FREQUENCY * 4(If altivec)
+   */
+
+  //First check we have consistent data
+  if(freq == UNKNOWN_DATA) {
+    return -1;
+  }
+
+  struct features* feat = cpu->feat;
+  int64_t flops = topo->physical_cores * topo->sockets * (freq * 1000000);
+  if(feat->altivec) flops = flops * 4;
+
+  // POWER9 has the concept called "slices". Each SMT4 core has two super-slices,
+  // and each super-slice is capable of doing two FLOPS per cycle. In the case of
+  // SMT8, it has 4 super-slices, thus four FLOPS per cycle.
+  if(is_power9(cpu->arch)) {
+    int threads_per_core = topo->logical_cores / topo->physical_cores;
+    flops = flops * (threads_per_core / 2);
+  }
+
+  return flops;
+}
+
+struct cpuInfo* get_cpu_info() {
+  struct cpuInfo* cpu = emalloc(sizeof(struct cpuInfo));
+  struct features* feat = emalloc(sizeof(struct features));
+  cpu->feat = feat;
+
+  bool *ptr = &(feat->AES);
+  for(uint32_t i = 0; i < sizeof(struct features)/sizeof(bool); i++, ptr++) {
+    *ptr = false;
+  }
+
+  int len;
+  char* path = emalloc(sizeof(char) * (strlen(_PATH_DT) + strlen(_PATH_DT_PART) + 1));
+  sprintf(path, "%s%s", _PATH_DT, _PATH_DT_PART);
+
+  cpu->cpu_name = read_file(path, &len);
+  cpu->pvr = mfpvr();
+  cpu->arch = get_cpu_uarch(cpu);
+  cpu->freq = get_frequency_info();
+  cpu->topo = get_topology_info(cpu->cach);
+  cpu->cach = get_cache_info(cpu);
+  feat->altivec = has_altivec(cpu->arch);
+  cpu->peak_performance = get_peak_performance(cpu, cpu->topo, get_freq(cpu->freq));
+
+  if(cpu->cach == NULL || cpu->topo == NULL) {
+    return NULL;
+  }
+  return cpu;
+}
+
+char* get_str_altivec(struct cpuInfo* cpu) {
+  char* string = ecalloc(4, sizeof(char));
+
+  if(cpu->feat->altivec) strcpy(string, "Yes");
+  else strcpy(string, "No");
+
+  return string;
+}
+
+char* get_str_topology(struct topology* topo, bool dual_socket) {
+  char* string;
+  if(topo->smt_supported > 1) {
+    uint32_t size = 3+3+17+1;
+    string = emalloc(sizeof(char)*size);
+    if(dual_socket)
+      snprintf(string, size, "%d cores (%d threads)", topo->physical_cores * topo->sockets, topo->logical_cores * topo->sockets);
+    else
+      snprintf(string, size, "%d cores (%d threads)",topo->physical_cores,topo->logical_cores);
+  }
+  else {
+    uint32_t size = 3+7+1;
+    string = emalloc(sizeof(char)*size);
+    if(dual_socket)
+      snprintf(string, size, "%d cores",topo->physical_cores * topo->sockets);
+    else
+      snprintf(string, size, "%d cores",topo->physical_cores);
+  }
+  return string;
+}
+
+
+void print_debug(struct cpuInfo* cpu) {
+  printf("PVR: 0x%.8X\n", cpu->pvr);
+}

src/ppc/ppc.h

@@ -0,0 +1,11 @@
+#ifndef __POWERPC__
+#define __POWERPC__
+
+#include "../common/cpu.h"
+
+struct cpuInfo* get_cpu_info();
+char* get_str_altivec(struct cpuInfo* cpu);
+char* get_str_topology(struct topology* topo, bool dual_socket);
+void print_debug(struct cpuInfo* cpu);
+
+#endif

src/ppc/pvr_kern_to_cpufetch.sh

@@ -0,0 +1,28 @@
+#!/bin/bash
+
+# This script takes as input cputable.c from linux kernel
+# and generates a valid output for cpufetch in src/ppc/uarch.c
+
+CPUTABLE_PATH="linux-5.13.7/arch/powerpc/kernel/cputable.c"
+
+raw_values=$(grep '\.pvr_value' "$CPUTABLE_PATH" | grep -oP "= .*," | cut -d' ' -f2 | tr -d ',')
+raw_masks=$(grep '\.pvr_mask' "$CPUTABLE_PATH" | grep -oE "0x........")
+
+raw_v_len=$(echo "$raw_values" | wc -l)
+raw_m_len=$(echo "$raw_masks" | wc -l)
+
+if [ $raw_v_len -ne $raw_m_len ]
+then
+  echo "Lengths do not match!"
+  echo "values length: $raw_v_len"
+  echo "masks length:  $raw_m_len"
+  exit 1
+fi
+
+IFS=$'\n' read -r -d ' ' -a values <<< "$raw_values"
+IFS=$'\n' read -r -d ' ' -a masks <<< "$raw_masks"
+
+for i in "${!values[@]}"
+do
+  echo '  CHECK_UARCH(arch, pvr, '"${masks[i]}"', '"${values[i]}"', "POWERX", UARCH_POWERX, -1)'
+done

src/ppc/uarch.c

@@ -0,0 +1,286 @@
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/auxv.h>
+#include <errno.h>
+
+#include "uarch.h"
+#include "../common/global.h"
+
+typedef uint32_t MICROARCH;
+
+// Data not available
+#define NA                   -1
+
+// Unknown manufacturing process
+#define UNK                  -1
+
+enum {
+  UARCH_UNKNOWN,
+  UARCH_PPC604,
+  UARCH_PPCG3,
+  UARCH_PPCG4,
+  UARCH_PPC405,
+  UARCH_PPC603,
+  UARCH_PPC440,
+  UARCH_PPC470,
+  UARCH_PPC970,
+  UARCH_PPC970FX,
+  UARCH_PPC970MP,
+  UARCH_CELLBE,
+  UARCH_POWER5,
+  UARCH_POWER5PLUS,
+  UARCH_POWER6,
+  UARCH_POWER7,
+  UARCH_POWER7PLUS,
+  UARCH_POWER8,
+  UARCH_POWER9,
+  UARCH_POWER9_DD20,
+  UARCH_POWER9_DD21,
+  UARCH_POWER9_DD22,
+  UARCH_POWER9_DD23,
+  UARCH_POWER10,
+};
+
+struct uarch {
+  MICROARCH uarch;
+  char* uarch_str;
+  int32_t process; // measured in nanometers
+};
+
+#define UARCH_START if (false) {}
+#define CHECK_UARCH(arch, cpu_pvr, pvr_mask, pvr_value, uarch) \
+   else if ((cpu_pvr & pvr_mask) == pvr_value) fill_uarch(arch, uarch);
+#define UARCH_END else { printBug("Unknown microarchitecture detected: 0x%.8X", pvr); fill_uarch(arch, UARCH_UNKNOWN); }
+
+#define FILL_START if (false) {}
+#define FILL_UARCH(u, uarch, uarch_str, uarch_process) \
+   else if(u == uarch) { fill = true; str = uarch_str; process = uarch_process; }
+#define FILL_END else { printBug("Found invalid microarchitecture: %d", u); }
+
+void fill_uarch(struct uarch* arch, MICROARCH u) {
+  arch->uarch = u;
+  char* str = NULL;
+  int32_t process = UNK;
+  bool fill = false;
+
+  FILL_START
+  FILL_UARCH(arch->uarch, UARCH_UNKNOWN,     STRING_UNKNOWN,  UNK)
+  FILL_UARCH(arch->uarch, UARCH_PPC604,      "PowerPC 604",   500)
+  FILL_UARCH(arch->uarch, UARCH_PPCG3,       "PowerPC G3",    UNK) // varies
+  FILL_UARCH(arch->uarch, UARCH_PPCG4,       "PowerPC G4",    UNK) // varies
+  FILL_UARCH(arch->uarch, UARCH_PPC405,      "PowerPC 405",   UNK)
+  FILL_UARCH(arch->uarch, UARCH_PPC603,      "PowerPC 603",   UNK) // varies
+  FILL_UARCH(arch->uarch, UARCH_PPC440,      "PowerPC 440",   UNK)
+  FILL_UARCH(arch->uarch, UARCH_PPC470,      "PowerPC 470",    45) // strange...
+  FILL_UARCH(arch->uarch, UARCH_PPC970,      "PowerPC 970",   130)
+  FILL_UARCH(arch->uarch, UARCH_PPC970FX,    "PowerPC 970FX",  90)
+  FILL_UARCH(arch->uarch, UARCH_PPC970MP,    "PowerPC 970MP",  90)
+  FILL_UARCH(arch->uarch, UARCH_CELLBE,      "Cell BE",       UNK) // varies depending on manufacturer
+  FILL_UARCH(arch->uarch, UARCH_POWER5,      "POWER5",        130)
+  FILL_UARCH(arch->uarch, UARCH_POWER5PLUS,  "POWER5+",        90)
+  FILL_UARCH(arch->uarch, UARCH_POWER6,      "POWER6",         65)
+  FILL_UARCH(arch->uarch, UARCH_POWER7,      "POWER7",         45)
+  FILL_UARCH(arch->uarch, UARCH_POWER7PLUS,  "POWER7+",        32)
+  FILL_UARCH(arch->uarch, UARCH_POWER8,      "POWER8",         22)
+  FILL_UARCH(arch->uarch, UARCH_POWER9,      "POWER9",         14)
+  FILL_UARCH(arch->uarch, UARCH_POWER9_DD20, "POWER9 (DD2.0)", 14)
+  FILL_UARCH(arch->uarch, UARCH_POWER9_DD21, "POWER9 (DD2.1)", 14)
+  FILL_UARCH(arch->uarch, UARCH_POWER9_DD22, "POWER9 (DD2.2)", 14)
+  FILL_UARCH(arch->uarch, UARCH_POWER9_DD23, "POWER9 (DD2.3)", 14)
+  FILL_UARCH(arch->uarch, UARCH_POWER10,     "POWER10",         7)
+  FILL_END
+
+  if(fill) {
+    arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1));
+    strcpy(arch->uarch_str, str);
+    arch->process= process;
+  }
+}
+
+/*
+ * PVR masks/values from arch/powerpc/kernel/cputable.c (Linux kernel)
+ * This list may be incorrect, incomplete or overly simplified,
+ * specially in the case of 32 bit entries
+ */
+struct uarch* get_uarch_from_pvr(uint32_t pvr) {
+  struct uarch* arch = emalloc(sizeof(struct uarch));
+
+  UARCH_START
+  // 64 bit
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00390000, UARCH_PPC970)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x003c0000, UARCH_PPC970FX)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x00440100, UARCH_PPC970MP)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00440000, UARCH_PPC970MP)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x003a0000, UARCH_POWER5)
+  CHECK_UARCH(arch, pvr, 0xffffff00, 0x003b0300, UARCH_POWER5PLUS)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x003b0000, UARCH_POWER5)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000001, UARCH_POWER5)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x003e0000, UARCH_POWER6)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000002, UARCH_POWER6)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000003, UARCH_POWER7)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000004, UARCH_POWER8)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000005, UARCH_POWER9)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x0f000006, UARCH_POWER10)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x003f0000, UARCH_POWER7)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004A0000, UARCH_POWER7PLUS)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004b0000, UARCH_POWER8)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004c0000, UARCH_POWER8)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x004d0000, UARCH_POWER8)
+  CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0200, UARCH_POWER9_DD20)
+  CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0201, UARCH_POWER9_DD21)
+  CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0202, UARCH_POWER9_DD22)
+  CHECK_UARCH(arch, pvr, 0xffffefff, 0x004e0203, UARCH_POWER9_DD23)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00800000, UARCH_POWER10)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00700000, UARCH_CELLBE)
+  // 32 bit
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00040000, UARCH_PPC604)
+  CHECK_UARCH(arch, pvr, 0xfffff000, 0x00090000, UARCH_PPC604)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00090000, UARCH_PPC604)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x000a0000, UARCH_PPC604)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x00084202, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xfffffff0, 0x00080100, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xfffffff0, 0x00082200, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xfffffff0, 0x00082210, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x00083214, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xfffff0e0, 0x00087000, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xfffff000, 0x00083000, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffffff00, 0x70000100, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x70000200, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x70000000, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x70020000, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00080000, UARCH_PPCG3)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x000c1101, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x000c0000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x800c0000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x80000200, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x80000201, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x80000000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffffff00, 0x80010100, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x80010200, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x80010000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x80020100, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x80020101, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x80020000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x80030000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x80040000, UARCH_PPCG4)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00030000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00060000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00070000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00810000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00820000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00830000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00840000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00850000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0x7fff0000, 0x00860000, UARCH_PPC603)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x41810000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x41610000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x40B10000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x41410000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x50910000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x51510000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x41F10000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x51210000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910007, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x1291000d, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x1291000f, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910003, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910005, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910001, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910009, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x1291000b, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff000f, 0x12910002, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x41510000, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff11432, UARCH_PPC405)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000850, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000858, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x400008d3, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000ff7, 0x400008d4, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x400008db, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000ffb, 0x200008D0, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000ffb, 0x200008D8, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000440, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x40000481, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000850, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000851, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000892, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xf0000fff, 0x50000894, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xfff00fff, 0x53200891, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xfff00fff, 0x53400890, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xfff00fff, 0x53400891, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xffff0006, 0x13020002, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xffff0007, 0x13020004, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xffff0006, 0x13020000, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xffff0007, 0x13020005, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xffffff00, 0x13541800, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xfffffff0, 0x12C41C80, UARCH_PPC440)
+  CHECK_UARCH(arch, pvr, 0xffffffff, 0x11a52080, UARCH_PPC470)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x7ff50000, UARCH_PPC470)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x00050000, UARCH_PPC470)
+  CHECK_UARCH(arch, pvr, 0xffff0000, 0x11a50000, UARCH_PPC470)
+  UARCH_END
+
+  return arch;
+}
+
+bool has_altivec(struct uarch* arch) {
+  switch(arch->uarch) {
+    case UARCH_PPC970FX:
+    case UARCH_PPC970MP:
+    case UARCH_CELLBE:
+    case UARCH_POWER6:
+    case UARCH_POWER7:
+    case UARCH_POWER7PLUS:
+    case UARCH_POWER8:
+    case UARCH_POWER9:
+    case UARCH_POWER9_DD20:
+    case UARCH_POWER9_DD21:
+    case UARCH_POWER9_DD22:
+    case UARCH_POWER9_DD23:
+    case UARCH_POWER10:
+      return true;
+    default:
+      return false;
+  }
+}
+
+bool is_power9(struct uarch* arch) {
+  return arch->uarch == UARCH_POWER9      ||
+         arch->uarch == UARCH_POWER9_DD20 ||
+         arch->uarch == UARCH_POWER9_DD21 ||
+         arch->uarch == UARCH_POWER9_DD22 ||
+         arch->uarch == UARCH_POWER9_DD23;
+}
+
+char* get_str_uarch(struct cpuInfo* cpu) {
+  return cpu->arch->uarch_str;
+}
+
+char* get_str_process(struct cpuInfo* cpu) {
+  char* str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+  int32_t process = cpu->arch->process;
+
+  if(process == UNK) {
+    snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+  }
+  else if(process > 100) {
+    sprintf(str, "%.2fum", (double)process/100);
+  }
+  else if(process > 0){
+    sprintf(str, "%dnm", process);
+  }
+  else {
+    snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+    printBug("Found invalid process: '%d'", process);
+  }
+
+  return str;
+}
+
+void free_uarch_struct(struct uarch* arch) {
+  free(arch->uarch_str);
+  free(arch);
+}

src/ppc/uarch.h

@@ -0,0 +1,16 @@
+#ifndef __UARCH__
+#define __UARCH__
+
+#include <stdint.h>
+#include "ppc.h"
+
+struct uarch;
+
+struct uarch* get_uarch_from_pvr(uint32_t pvr);
+bool has_altivec(struct uarch* arch);
+bool is_power9(struct uarch* arch);
+char* get_str_uarch(struct cpuInfo* cpu);
+char* get_str_process(struct cpuInfo* cpu);
+void free_uarch_struct(struct uarch* arch);
+
+#endif

src/ppc/udev.c

@@ -0,0 +1,40 @@
+#include <errno.h>
+
+#include "../common/global.h"
+#include "udev.h"
+
+#define _PATH_TOPO_CORE_ID    "topology/core_id"
+#define _PATH_TOPO_PACKAGE_ID "topology/physical_package_id"
+
+bool fill_array_from_sys(int *core_ids, int total_cores, char* SYS_PATH) {
+  int filelen;
+  char* buf;
+  char* end;
+  char path[128];
+
+  for(int i=0; i < total_cores; i++) {
+    sprintf(path, "%s%s/cpu%d/%s", _PATH_SYS_SYSTEM, _PATH_SYS_CPU, i, SYS_PATH);
+    if((buf = read_file(path, &filelen)) == NULL) {
+      printWarn("fill_array_from_sys: %s: %s", path, strerror(errno));
+      return false;
+    }
+
+    errno = 0;
+    core_ids[i] = strtol(buf, &end, 10);
+    if(errno != 0) {
+      printWarn("fill_array_from_sys: %s:", strerror(errno));
+      return false;
+    }
+    free(buf);
+  }
+
+  return true;
+}
+
+bool fill_core_ids_from_sys(int *core_ids, int total_cores) {
+  return fill_array_from_sys(core_ids, total_cores, _PATH_TOPO_CORE_ID);
+}
+
+bool fill_package_ids_from_sys(int* package_ids, int total_cores) {
+  return fill_array_from_sys(package_ids, total_cores, _PATH_TOPO_PACKAGE_ID);
+}

src/ppc/udev.h

@@ -0,0 +1,11 @@
+#ifndef __UDEV_PPC__
+#define __UDEV_PPC__
+
+#include "../common/udev.h"
+#define _PATH_DT              "/proc/device-tree/vpd/root-node-vpd@a000/enclosure@1e00/backplane@800/processor@1000"
+#define _PATH_DT_PART         "/part-number"
+
+bool fill_core_ids_from_sys(int *core_ids, int total_cores);
+bool fill_package_ids_from_sys(int* package_ids, int total_cores);
+
+#endif

src/x86/apic.c

@@ -1,14 +1,22 @@
 #ifdef _WIN32
-#include <windows.h>
-#else
-#define _GNU_SOURCE
-#include <sched.h>
+  #define NOMINMAX
+  #include <windows.h>
+#elif defined __linux__
+  #define _GNU_SOURCE
+  #include <sched.h>
+#elif defined __FreeBSD__
+  #include <sys/param.h>
+  #include <sys/cpuset.h>
+#elif defined __APPLE__
+  #define UNUSED(x) (void)(x)
 #endif
 
 #include <stdlib.h>
 #include <stdint.h>
 #include <string.h>
 #include <stdio.h>
+#include <unistd.h>
+#include <errno.h>
 
 #include "apic.h"
 #include "cpuid_asm.h"
@@ -20,7 +28,7 @@
  */
 unsigned char bit_scan_reverse(uint32_t* index, uint64_t mask) {
   for(uint64_t i = (8 * sizeof(uint64_t)); i > 0; i--) {
-    if((mask & (1LL << (i-1))) != 0) {
+    if((mask & (1ULL << (i-1))) != 0) {
       *index = (uint64_t) (i-1);
       break;
     }
@@ -53,7 +61,7 @@ uint32_t get_apic_id(bool x2apic_id) {
   uint32_t ebx = 0;
   uint32_t ecx = 0;
   uint32_t edx = 0;
-  
+
   if(x2apic_id) {
     eax = 0x0000000B;
     cpuid(&eax, &ebx, &ecx, &edx);
@@ -66,22 +74,33 @@ uint32_t get_apic_id(bool x2apic_id) {
   }
 }
 
+#ifndef __APPLE__
 bool bind_to_cpu(int cpu_id) {
   #ifdef _WIN32
     HANDLE process = GetCurrentProcess();
     DWORD_PTR processAffinityMask = 1 << cpu_id;
     return SetProcessAffinityMask(process, processAffinityMask);
-  #else    
+  #elif defined __linux__
     cpu_set_t currentCPU;
     CPU_ZERO(&currentCPU);
     CPU_SET(cpu_id, &currentCPU);
     if (sched_setaffinity (0, sizeof(currentCPU), &currentCPU) == -1) {
-      perror("sched_setaffinity");
+      printWarn("sched_setaffinity: %s", strerror(errno));
       return false;
     }
     return true;
-  #endif  
+  #elif defined __FreeBSD__
+    cpuset_t currentCPU;
+    CPU_ZERO(&currentCPU);
+    CPU_SET(cpu_id, &currentCPU);
+    if(cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset_t), &currentCPU) == -1) {
+      printWarn("cpuset_setaffinity: %s", strerror(errno));
+      return false;
+    }
+    return true;
+  #endif
 }
+#endif
 
 bool fill_topo_masks_apic(struct topology* topo) {
   uint32_t eax = 0x00000001;
@@ -91,51 +110,51 @@ bool fill_topo_masks_apic(struct topology* topo) {
   uint32_t core_plus_smt_id_max_cnt;
   uint32_t core_id_max_cnt;
   uint32_t smt_id_per_core_max_cnt;
-  
+
   cpuid(&eax, &ebx, &ecx, &edx);
-  
+
   core_plus_smt_id_max_cnt = (ebx >> 16) & 0xFF;
-  
+
   eax = 0x00000004;
   ecx = 0;
   cpuid(&eax, &ebx, &ecx, &edx);
-  
+
   core_id_max_cnt = (eax >> 26) + 1;
-  smt_id_per_core_max_cnt = core_plus_smt_id_max_cnt / core_id_max_cnt; 
-            
-  topo->apic->smt_mask = create_mask(smt_id_per_core_max_cnt, &(topo->apic->smt_mask_width));    
+  smt_id_per_core_max_cnt = core_plus_smt_id_max_cnt / core_id_max_cnt;
+
+  topo->apic->smt_mask = create_mask(smt_id_per_core_max_cnt, &(topo->apic->smt_mask_width));
   topo->apic->core_mask = create_mask(core_id_max_cnt,&(topo->apic->pkg_mask_shift));
   topo->apic->pkg_mask_shift += topo->apic->smt_mask_width;
   topo->apic->core_mask <<= topo->apic->smt_mask_width;
   topo->apic->pkg_mask = (-1) ^ (topo->apic->core_mask | topo->apic->smt_mask);
-  
+
   return true;
 }
 
 bool fill_topo_masks_x2apic(struct topology* topo) {
   int32_t level_type;
   int32_t level_shift;
-  
+
   int32_t coreplus_smt_mask = 0;
   bool level2 = false;
   bool level1 = false;
-  
+
   uint32_t eax = 0;
   uint32_t ebx = 0;
   uint32_t ecx = 0;
   uint32_t edx = 0;
   uint32_t i = 0;
-  
+
   while(true) {
     eax = 0x0000000B;
     ecx = i;
     cpuid(&eax, &ebx, &ecx, &edx);
     if(ebx == 0) break;
-    
+
     level_type = (ecx >> 8) & 0xFF;
-    level_shift = eax & 0xFFF; 
-    
-    switch(level_type) {      
+    level_shift = eax & 0xFFF;
+
+    switch(level_type) {
       case 1: // SMT
         topo->apic->smt_mask = ~(0xFFFFFFFF << level_shift);
         topo->apic->smt_mask_width = level_shift;
@@ -152,10 +171,10 @@ bool fill_topo_masks_x2apic(struct topology* topo) {
         printErr("Found invalid level when querying topology: %d", level_type);
         break;
     }
-    
+
     i++; // sublevel to query
   }
-  
+
   if (level1 && level2) {
     topo->apic->core_mask = coreplus_smt_mask ^ topo->apic->smt_mask;
   }
@@ -176,13 +195,13 @@ bool fill_topo_masks_x2apic(struct topology* topo) {
 // as the number of cores, but in the case of Xeon Phi KNL it is not
 uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
   uint32_t max = 0;
-  
+
   for(int i=0; i < topo->cach->max_cache_level; i++) {
-    for(int j=0; j < topo->total_cores; j++) {          
+    for(int j=0; j < topo->total_cores; j++) {
       if(cache_id_apic[j][i] > max) max = cache_id_apic[j][i];
     }
   }
-  
+
   max++;
   if(max > (uint32_t) topo->total_cores) return max;
   return topo->total_cores;
@@ -190,15 +209,15 @@ uint32_t max_apic_id_size(uint32_t** cache_id_apic, struct topology* topo) {
 
 bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cache_id_apic, struct topology* topo) {
   uint32_t size = max_apic_id_size(cache_id_apic, topo);
-  uint32_t* sockets = malloc(sizeof(uint32_t) * size);
-  uint32_t* smt = malloc(sizeof(uint32_t) * size);
-  uint32_t* apic_id = malloc(sizeof(uint32_t) * size);
+  uint32_t* sockets = emalloc(sizeof(uint32_t) * size);
+  uint32_t* smt = emalloc(sizeof(uint32_t) * size);
+  uint32_t* apic_id = emalloc(sizeof(uint32_t) * size);
   uint32_t num_caches = 0;
-  
+
   memset(sockets, 0, sizeof(uint32_t) * size);
   memset(smt, 0, sizeof(uint32_t) * size);  
-  memset(apic_id, 0, sizeof(uint32_t) * size);  
-  
+  memset(apic_id, 0, sizeof(uint32_t) * size);
+
   // System topology
   for(int i=0; i < topo->total_cores; i++) {
     sockets[apic_pkg[i]] = 1;
@@ -210,101 +229,185 @@ bool build_topo_from_apic(uint32_t* apic_pkg, uint32_t* apic_smt, uint32_t** cac
     if(smt[i] != 0)
       topo->smt_available++;
   }
-  
+
   topo->logical_cores = topo->total_cores / topo->sockets;
   topo->physical_cores = topo->logical_cores / topo->smt_available;
-  
+
   // Cache topology
   for(int i=0; i < topo->cach->max_cache_level; i++) {
     num_caches = 0;
     memset(apic_id, 0, sizeof(uint32_t) * size);
-    
-    for(int c=0; c < topo->total_cores; c++) {      
+
+    for(int c=0; c < topo->total_cores; c++) {
       apic_id[cache_id_apic[c][i]]++;
     }
-    for(uint32_t c=0; c < size; c++) {      
+    for(uint32_t c=0; c < size; c++) {
       if(apic_id[c] > 0) num_caches++;
     }
-    
+
     topo->cach->cach_arr[i]->num_caches = num_caches;
   }
-  
+
   free(sockets);
   free(smt);
   free(apic_id);
-  
+
   return true;
 }
 
-void get_cache_topology_from_apic(struct topology* topo) {  
+void get_cache_topology_from_apic(struct topology* topo) {
   uint32_t eax = 0x00000004;
   uint32_t ebx = 0;
   uint32_t ecx = 0;
   uint32_t edx = 0;
-     
-  for(int i=0; i < topo->cach->max_cache_level; i++) { 
+
+  for(int i=0; i < topo->cach->max_cache_level; i++) {
     eax = 0x00000004;
     ecx = i;
-    
+
     cpuid(&eax, &ebx, &ecx, &edx);
-  
+
     uint32_t SMTMaxCntPerEachCache = ((eax >> 14) & 0x7FF) + 1;
     uint32_t dummy;
     topo->apic->cache_select_mask[i] = create_mask(SMTMaxCntPerEachCache,&dummy);
   }
 }
 
-bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) { 
-  uint32_t apic_id;
-  uint32_t* apic_pkg = malloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_core = malloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t* apic_smt = malloc(sizeof(uint32_t) * topo->total_cores);
-  uint32_t** cache_smt_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
-  uint32_t** cache_id_apic = malloc(sizeof(uint32_t*) * topo->total_cores);
-  bool x2apic_id = cpu->maxLevels >= 0x0000000B;
-  
-  for(int i=0; i < topo->total_cores; i++) {
-    cache_smt_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
-    cache_id_apic[i] = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
+bool apic_array_full(uint32_t* apic_ids, int n) {
+  for(int i=0; i < n; i++) {
+    if(apic_ids[i] == (uint32_t) -1) return false;
   }
-  topo->apic->cache_select_mask = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
-  topo->apic->cache_id_apic = malloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
-  
+  return true;
+}
+
+void add_apic_to_array(uint32_t apic, uint32_t* apic_ids, int n) {
+  int i=0;
+  int last=0;
+  bool found = false;
+
+  while(!found && i < n) {
+    if(apic_ids[i] == apic) found = true;
+    if(apic_ids[i] != (uint32_t) -1) last = i+1;
+    i++;
+  }
+
+  if(!found) {
+    apic_ids[last] = apic;
+    //printf("Added %d\n", apic);
+  }
+}
+
+bool fill_apic_ids(uint32_t* apic_ids, int n, bool x2apic_id) {
+#ifdef __APPLE__
+  // macOS extremely dirty approach...
+  printf("cpufetch is computing APIC IDs, please wait...\n");
+  bool end = false;
+  uint32_t apic;
+  for(int i=0; i < n; i++) apic_ids[i] = (uint32_t) -1;
+
+  while(!end) {
+    apic = get_apic_id(x2apic_id);
+
+    add_apic_to_array(apic, apic_ids, n);
+    end = apic_array_full(apic_ids, n);
+    usleep(1000);
+  }
+#else
+  #ifdef __linux__
+  // In Linux we reset the affinity; first we get the original mask
+  cpu_set_t original_mask;
+  if(sched_getaffinity(0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_getaffinity: %s", strerror(errno));
+    return false;
+  }
+  #endif
+
+  for(int i=0; i < n; i++) {
+    if(!bind_to_cpu(i)) {
+      printErr("Failed binding the process to CPU %d", i);
+      return false;
+    }
+    apic_ids[i] = get_apic_id(x2apic_id);
+  }
+
+  #ifdef __linux__
+  // With the original mask previosly retrieved, we reset the affinity
+  if (sched_setaffinity (0, sizeof(original_mask), &original_mask) == -1) {
+    printWarn("sched_setaffinity: %s", strerror(errno));
+    return false;
+  }
+  #endif
+#endif
+
+  return true;
+}
+
+bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
+  uint32_t apic_id;
+  uint32_t* apic_ids = emalloc(sizeof(uint32_t) * topo->total_cores);
+  uint32_t* apic_pkg = emalloc(sizeof(uint32_t) * topo->total_cores);
+  uint32_t* apic_core = emalloc(sizeof(uint32_t) * topo->total_cores);
+  uint32_t* apic_smt = emalloc(sizeof(uint32_t) * topo->total_cores);
+  uint32_t** cache_smt_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
+  uint32_t** cache_id_apic = emalloc(sizeof(uint32_t*) * topo->total_cores);
+  bool x2apic_id;
+
+  if(cpu->maxLevels >= 0x0000000B) {
+    uint32_t eax = 0x0000000B;
+    uint32_t ebx = 0;
+    uint32_t ecx = 0;
+    uint32_t edx = 0;
+
+    cpuid(&eax, &ebx, &ecx, &edx);
+
+    if(ebx == 0) x2apic_id = false;
+    else x2apic_id = true;
+  }
+  else {
+    x2apic_id = false;
+  }
+
+  for(int i=0; i < topo->total_cores; i++) {
+    cache_smt_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
+    cache_id_apic[i] = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
+  }
+  topo->apic->cache_select_mask = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
+  topo->apic->cache_id_apic = emalloc(sizeof(uint32_t) * (topo->cach->max_cache_level));
+
   if(x2apic_id) {
     if(!fill_topo_masks_x2apic(topo))
       return false;
   }
   else {
     if(!fill_topo_masks_apic(topo))
-      return false;    
-  }
-  
-  get_cache_topology_from_apic(topo);  
-  
-  for(int i=0; i < topo->total_cores; i++) {
-    if(!bind_to_cpu(i)) {
-      printErr("Failed binding to CPU %d", i);
       return false;
-    }
-    apic_id = get_apic_id(x2apic_id);
-    
+  }
+
+  get_cache_topology_from_apic(topo);
+
+  if(!fill_apic_ids(apic_ids, topo->total_cores, x2apic_id))
+    return false;
+
+  for(int i=0; i < topo->total_cores; i++) {
+    apic_id = apic_ids[i];
+
     apic_pkg[i] = (apic_id & topo->apic->pkg_mask) >> topo->apic->pkg_mask_shift;
     apic_core[i] = (apic_id & topo->apic->core_mask) >> topo->apic->smt_mask_width;
     apic_smt[i] = apic_id & topo->apic->smt_mask;
-    
+
     for(int c=0; c < topo->cach->max_cache_level; c++) {
       cache_smt_id_apic[i][c] = apic_id & topo->apic->cache_select_mask[c];
       cache_id_apic[i][c] = apic_id & (-1 ^ topo->apic->cache_select_mask[c]);
     }
   }
-  
+
   /* DEBUG
   for(int i=0; i < topo->cach->max_cache_level; i++) {
     printf("[CACH %1d]", i);
     for(int j=0; j < topo->total_cores; j++)
       printf("[%03d]", cache_id_apic[j][i]);
     printf("\n");
-  }  
+  }
   for(int i=0; i < topo->total_cores; i++)
     printf("[%2d] 0x%.8X\n", i, apic_pkg[i]);
   printf("\n");
@@ -313,16 +416,16 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
   printf("\n");
   for(int i=0; i < topo->total_cores; i++)
     printf("[%2d] 0x%.8X\n", i, apic_smt[i]);*/
-    
-  
+
+
   bool ret = build_topo_from_apic(apic_pkg, apic_smt, cache_id_apic, topo);
-  
+
   // Assumption: If we cant get smt_available, we assume it is equal to smt_supported...
   if (!x2apic_id) {
-    printWarn("Can't read SMT from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x0000000B, cpu->maxLevels); 
+    printWarn("Can't read SMT from cpuid (needed level is 0x%.8X, max is 0x%.8X)", 0x0000000B, cpu->maxLevels);
     topo->smt_supported = topo->smt_available;
   }
-  
+
   free(apic_pkg);
   free(apic_core);
   free(apic_smt);
@@ -332,13 +435,17 @@ bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo) {
   }
   free(cache_smt_id_apic);
   free(cache_id_apic);
-    
+
   return ret;
-} 
+}
 
 uint32_t is_smt_enabled_amd(struct topology* topo) {
+#ifdef __APPLE__
+  UNUSED(topo);
+  return 1;
+#else
   uint32_t id;
-  
+
   for(int i = 0; i < topo->total_cores; i++) {
     if(!bind_to_cpu(i)) {
       printErr("Failed binding to CPU %d", i);
@@ -347,6 +454,7 @@ uint32_t is_smt_enabled_amd(struct topology* topo) {
     id = get_apic_id(false) & 1; // get the last bit
     if(id == 1) return 2; // We assume there isn't any AMD CPU with more than 2th per core.
   }
-  
-  return 1;  
+
+  return 1;
+#endif
 }

src/x86/apic.h

@@ -17,4 +17,8 @@ struct apic {
 bool get_topology_from_apic(struct cpuInfo* cpu, struct topology* topo);
 uint32_t is_smt_enabled_amd(struct topology* topo);
 
+#ifndef __APPLE__
+bool bind_to_cpu(int cpu_id);
+#endif
+
 #endif

src/x86/cpuid.h

@@ -12,9 +12,10 @@ char* get_str_avx(struct cpuInfo* cpu);
 char* get_str_sse(struct cpuInfo* cpu);
 char* get_str_fma(struct cpuInfo* cpu);
 char* get_str_topology(struct cpuInfo* cpu, struct topology* topo, bool dual_socket);
-char* get_str_peak_performance(struct cpuInfo* cpu, struct topology* topo, int64_t freq);
+char* get_str_cpu_name_abbreviated(struct cpuInfo* cpu);
 
 void print_debug(struct cpuInfo* cpu);
+void print_raw(struct cpuInfo* cpu);
 
 void free_topo_struct(struct topology* topo);
 

src/x86/freq/freq.c

@@ -0,0 +1,146 @@
+#define  _GNU_SOURCE
+#include <stdio.h>
+
+#include "../../common/global.h"
+#include "../uarch.h"
+#include "freq.h"
+#include "freq_nov.h"
+#include "freq_avx.h"
+#include "freq_avx512.h"
+
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+
+#define MAX_NUMBER_THREADS         512
+#define FREQ_VECTOR_SIZE         1<<16
+
+struct freq_thread {
+  bool end;
+  bool measure;
+  double freq;
+};
+
+double vector_average_harmonic(double* v, int len) {
+  double acc = 0.0;
+  for(int i=0; i < len; i++) {
+    acc += 1 / v[i];
+  }
+  return len / acc;
+}
+
+void sleep_ms(int64_t ms) {
+  struct timespec ts;
+  ts.tv_sec = ms / 1000;
+  ts.tv_nsec = (ms % 1000) * 1000000;
+  nanosleep(&ts, &ts);
+}
+
+void* measure_freq(void *freq_ptr) {
+  struct freq_thread* freq = (struct freq_thread*) freq_ptr;
+
+  char* end = NULL;
+  char* line = NULL;
+  size_t len = 0;
+  ssize_t read;
+
+  int v = 0;
+  double* freq_vector = malloc(sizeof(double) * FREQ_VECTOR_SIZE);
+
+  while(!freq->end) {
+    if(!freq->measure) continue;
+
+    FILE* fp = fopen("/proc/cpuinfo", "r");
+    if(fp == NULL) return NULL;
+    while ((read = getline(&line, &len, fp)) != -1) {
+      if((line = strstr(line, "cpu MHz")) != NULL) {
+        line = strstr(line, "\t: ");
+        if(line == NULL) return NULL;
+        line += sizeof("\t: ") - 1;
+        double f = strtold(line, &end);
+        if(errno != 0) {
+          printf("strtol: %s", strerror(errno));
+          return NULL;
+        }
+
+        freq_vector[v] = f;
+        v++;
+      }
+    }
+    fclose(fp);
+    sleep_ms(500);
+  }
+
+  freq->freq = vector_average_harmonic(freq_vector, v);
+  printWarn("AVX2 measured freq=%f\n", freq->freq);
+
+  return NULL;
+}
+
+int64_t measure_frequency(struct cpuInfo* cpu) {
+  int ret;
+  int num_spaces;
+  struct freq_thread* freq_struct = malloc(sizeof(struct freq_thread));
+  freq_struct->end = false;
+  freq_struct->measure = false;
+
+  void* (*compute_function)(void*);
+
+  if(cpu->feat->AVX512 && vpus_are_AVX512(cpu)) {
+    printf("cpufetch is measuring the AVX512 frequency...");
+    compute_function = compute_avx512;
+    num_spaces = 45;
+  }
+  else if(cpu->feat->AVX || cpu->feat->AVX2) {
+    printf("cpufetch is measuring the AVX frequency...");
+    compute_function = compute_avx;
+    num_spaces = 42;
+  }
+  else {
+    printf("cpufetch is measuring the frequency (no vector instructions)...");
+    compute_function = compute_nov;
+    num_spaces = 63;
+  }
+
+  fflush(stdout);
+
+  pthread_t freq_t;
+  if(pthread_create(&freq_t, NULL, measure_freq, freq_struct)) {
+    fprintf(stderr, "Error creating thread\n");
+    return -1;
+  }
+
+  pthread_t* compute_th = malloc(sizeof(pthread_t) * cpu->topo->total_cores);
+  for(int i=0; i < cpu->topo->total_cores; i++) {
+    ret = pthread_create(&compute_th[i], NULL, compute_function, NULL);
+
+    if(ret != 0) {
+      fprintf(stderr, "Error creating thread\n");
+      return -1;
+    }
+  }
+
+  sleep_ms(500);
+  freq_struct->measure = true;
+
+  for(int i=0; i < cpu->topo->total_cores; i++) {
+    if(pthread_join(compute_th[i], NULL)) {
+      fprintf(stderr, "Error joining thread\n");
+      return -1;
+    }
+    freq_struct->end = true;
+  }
+
+  if(pthread_join(freq_t, NULL)) {
+    fprintf(stderr, "Error joining thread\n");
+    return -1;
+  }
+
+  printf("\r%*c", num_spaces, ' ');
+  return freq_struct->freq;
+}

src/x86/freq/freq.h

@@ -0,0 +1,12 @@
+#ifndef __FREQ__
+#define __FREQ__
+
+#include <stdint.h>
+#include "../../common/cpu.h"
+
+#define MEASURE_TIME_SECONDS         5
+#define LOOP_ITERS          1000000000
+
+int64_t measure_frequency(struct cpuInfo* cpu);
+
+#endif

src/x86/freq/freq_avx.c

@@ -0,0 +1,44 @@
+#include <stdio.h>
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+#include <stdint.h>
+#include "freq.h"
+
+void* compute_avx() {
+  bool end = false;
+
+  struct timeval begin, now;
+
+  __m256 a = _mm256_set1_ps(1.5);
+  __m256 b = _mm256_set1_ps(1.2);
+  __m256 c = _mm256_set1_ps(0.0);
+
+  gettimeofday(&begin, NULL);
+  while(!end) {
+    for(uint64_t i=0; i < LOOP_ITERS; i++) {
+      c = _mm256_fmadd_ps(a, b, c);
+    }
+
+    gettimeofday(&now, NULL);
+    double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
+    end = elapsed >= (double) MEASURE_TIME_SECONDS;
+  }
+
+  FILE* fp = fopen("/dev/null", "w");
+  if(fp == NULL) {
+    printf("fopen: %s", strerror(errno));
+  }
+  else {
+    fprintf(fp, "%f", c[0]);
+    fclose(fp);
+  }
+
+  return NULL;
+}
+

src/x86/freq/freq_avx.h

@@ -0,0 +1,6 @@
+#ifndef __FREQ_AVX__
+#define __FREQ_AVX__
+
+void* compute_avx();
+
+#endif

src/x86/freq/freq_avx512.c

@@ -0,0 +1,63 @@
+#include <stdio.h>
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+#include <stdint.h>
+#include "freq.h"
+
+/*
+ * For AVX512, it seems that multiple independent
+ * instructions are needed to force the CPU to
+ * use AVX512 frequency, since with only one instruction
+ * (as the AVX implementaion) it still uses AVX frequency
+ */
+void* compute_avx512() {
+  bool end = false;
+
+  struct timeval begin, now;
+
+  __m512 a[8];
+  __m512 b[8];
+  __m512 mult;
+
+  for(int i=0; i < 8; i++) {
+    a[i] = _mm512_set1_ps(1.5);
+    b[i] = _mm512_set1_ps(1.2);
+  }
+
+  gettimeofday(&begin, NULL);
+  while(!end) {
+    for(uint64_t i=0; i < LOOP_ITERS; i++) {
+      a[0] = _mm512_fmadd_ps(mult, a[0], b[0]);
+      a[1] = _mm512_fmadd_ps(mult, a[1], b[1]);
+      a[2] = _mm512_fmadd_ps(mult, a[2], b[2]);
+      a[3] = _mm512_fmadd_ps(mult, a[3], b[3]);
+      a[4] = _mm512_fmadd_ps(mult, a[4], b[4]);
+      a[5] = _mm512_fmadd_ps(mult, a[5], b[5]);
+      a[6] = _mm512_fmadd_ps(mult, a[6], b[6]);
+      a[7] = _mm512_fmadd_ps(mult, a[7], b[7]);
+    }
+
+    gettimeofday(&now, NULL);
+    double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
+    end = elapsed >= (double) MEASURE_TIME_SECONDS;
+  }
+
+  FILE* fp = fopen("/dev/null", "w");
+  if(fp == NULL) {
+    printf("fopen: %s", strerror(errno));
+  }
+  else {
+    for(int i=0; i < 8; i++)
+      fprintf(fp, "%f", a[i][0]);
+    fclose(fp);
+  }
+
+  return NULL;
+}
+

src/x86/freq/freq_avx512.h

@@ -0,0 +1,6 @@
+#ifndef __FREQ_AVX512__
+#define __FREQ_AVX512__
+
+void* compute_avx512();
+
+#endif

src/x86/freq/freq_nov.c

@@ -0,0 +1,44 @@
+#include <stdio.h>
+#include <immintrin.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/time.h>
+#include <time.h>
+#include <errno.h>
+#include <string.h>
+#include <pthread.h>
+#include <stdint.h>
+#include "freq.h"
+
+void* compute_nov() {
+  bool end = false;
+
+  struct timeval begin, now;
+
+  float a = 1.5;
+  float b = 1.2;
+  float c = 0.0;
+
+  gettimeofday(&begin, NULL);
+  while(!end) {
+    for(uint64_t i=0; i < LOOP_ITERS; i++) {
+      c = a * b;
+    }
+
+    gettimeofday(&now, NULL);
+    double elapsed = (now.tv_sec - begin.tv_sec) + ((now.tv_usec - begin.tv_usec)/1000000.0);
+    end = elapsed >= (double) MEASURE_TIME_SECONDS;
+  }
+
+  FILE* fp = fopen("/dev/null", "w");
+  if(fp == NULL) {
+    printf("fopen: %s", strerror(errno));
+  }
+  else {
+    fprintf(fp, "%f", c);
+    fclose(fp);
+  }
+
+  return NULL;
+}
+

src/x86/freq/freq_nov.h

@@ -0,0 +1,6 @@
+#ifndef __FREQ_NO_VECTOR__
+#define __FREQ_NO_VECTOR__
+
+void* compute_nov();
+
+#endif

src/x86/uarch.c

@@ -11,6 +11,7 @@
  *   http://www.etallen.com/cpuid.html
  * - This should be updated from time to time, to support newer CPUs. A good reference to look at:
  *   https://en.wikichip.org/
+ *   http://instlatx64.atw.hu/
  */
 
 // From Todd Allen:
@@ -63,6 +64,10 @@ enum {
   UARCH_BROADWELL,
   UARCH_AIRMONT,
   UARCH_KABY_LAKE,
+  UARCH_COMET_LAKE,
+  UARCH_ROCKET_LAKE,
+  UARCH_AMBER_LAKE,
+  UARCH_WHISKEY_LAKE,
   UARCH_SKYLAKE,
   UARCH_CASCADE_LAKE,
   UARCH_COOPER_LAKE,
@@ -73,7 +78,7 @@ enum {
   UARCH_SUNNY_COVE,
   UARCH_GOLDMONT_PLUS,
   UARCH_TREMONT,
-  UARCH_WILLOW_COVE,
+  UARCH_LAKEMONT,
   UARCH_COFFE_LAKE,
   UARCH_ITANIUM,
   UARCH_KNIGHTS_FERRY,
@@ -84,6 +89,7 @@ enum {
   UARCH_CEDAR_MILL,
   UARCH_ITANIUM2,
   UARCH_ICE_LAKE,
+  UARCH_TIGER_LAKE,
   // AMD //
   UARCH_AM486,
   UARCH_AM5X86,
@@ -114,19 +120,19 @@ struct uarch {
 #define UARCH_START if (false) {}
 #define CHECK_UARCH(arch, ef_, f_, em_, m_, s_, str, uarch, process) \
    else if (ef_ == ef && f_ == f && (em_ == NA || em_ == em) && (m_ == NA || m_ == m) && (s_ == NA || s_ == s)) fill_uarch(arch, str, uarch, process);
-#define UARCH_END else { printBug("Unknown microarchitecture detected: M=0x%.8X EM=0x%.8X F=0x%.8X EF=0x%.8X S=0x%.8X", m, em, f, ef, s); fill_uarch(arch, "Unknown", UARCH_UNKNOWN, 0); }
+#define UARCH_END else { printBug("Unknown microarchitecture detected: M=0x%.8X EM=0x%.8X F=0x%.8X EF=0x%.8X S=0x%.8X", m, em, f, ef, s); fill_uarch(arch, STRING_UNKNOWN, UARCH_UNKNOWN, 0); }
 
 void fill_uarch(struct uarch* arch, char* str, MICROARCH u, uint32_t process) {
-  arch->uarch_str = malloc(sizeof(char) * (strlen(str)+1));
+  arch->uarch_str = emalloc(sizeof(char) * (strlen(str)+1));
   strcpy(arch->uarch_str, str);
   arch->uarch = u;
   arch->process= process;
 }
 
-// iNApired in Todd Allen's decode_uarch_intel
+// Inspired in Todd Allen's decode_uarch_intel
 struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
-  struct uarch* arch = malloc(sizeof(struct uarch));
-  
+  struct uarch* arch = emalloc(sizeof(struct uarch));
+
   // EF: Extended Family                                                           //
   // F:  Family                                                                    //
   // EM: Extended Model                                                            //
@@ -134,7 +140,7 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   // S: Stepping                                                                   //
   // ----------------------------------------------------------------------------- //
   //                EF  F  EM   M   S                                              //
-  UARCH_START  
+  UARCH_START
   CHECK_UARCH(arch, 0,  5,  0,  0, NA, "P5",              UARCH_P5,              800)
   CHECK_UARCH(arch, 0,  5,  0,  1, NA, "P5",              UARCH_P5,              800)
   CHECK_UARCH(arch, 0,  5,  0,  2, NA, "P5",              UARCH_P5,              UNK)
@@ -142,7 +148,9 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  5,  0,  4, NA, "P5 MMX",          UARCH_P5,              UNK)
   CHECK_UARCH(arch, 0,  5,  0,  7, NA, "P5 MMX",          UARCH_P5,              UNK)
   CHECK_UARCH(arch, 0,  5,  0,  8, NA, "P5 MMX",          UARCH_P5,              250)
+  CHECK_UARCH(arch, 0,  5,  0,  9,  0, "Lakemont",        UARCH_LAKEMONT,         32)
   CHECK_UARCH(arch, 0,  5,  0,  9, NA, "P5 MMX",          UARCH_P5,              UNK)
+  CHECK_UARCH(arch, 0,  5,  0, 10,  0, "Lakemont",        UARCH_LAKEMONT,         32)
   CHECK_UARCH(arch, 0,  6,  0,  0, NA, "P6 Pentium II",   UARCH_P6,              UNK)
   CHECK_UARCH(arch, 0,  6,  0,  1, NA, "P6 Pentium II",   UARCH_P6,              UNK) // process depends on core
   CHECK_UARCH(arch, 0,  6,  0,  2, NA, "P6 Pentium II",   UARCH_P6,              UNK)
@@ -213,10 +221,14 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  6,  8,  5, NA, "Knights Mill",    UARCH_KNIGHTS_MILL,     14) // no spec update; only MSR_CPUID_table* so far
   CHECK_UARCH(arch, 0,  6,  8,  6, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
   CHECK_UARCH(arch, 0,  6,  8, 10, NA, "Tremont",         UARCH_TREMONT,          10) // no spec update; only geekbench.com example
-  CHECK_UARCH(arch, 0,  6,  8, 12, NA, "Willow Cove",     UARCH_WILLOW_COVE,      10) // found only on en.wikichip.org
-  CHECK_UARCH(arch, 0,  6,  8, 13, NA, "Willow Cove",     UARCH_WILLOW_COVE,      10) // LX*
-  CHECK_UARCH(arch, 0,  6,  8, 14, NA, "Kaby Lake",       UARCH_KABY_LAKE,        14)
+  CHECK_UARCH(arch, 0,  6,  8, 12, NA, "Tiger Lake",      UARCH_TIGER_LAKE,       10) // instlatx64
+  CHECK_UARCH(arch, 0,  6,  8, 13, NA, "Tiger Lake",      UARCH_TIGER_LAKE,       10) // instlatx64
+  // CHECK_UARCH(arch, 0,  6,  8, 14,  9, ...) It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
+  CHECK_UARCH(arch, 0,  6,  8, 14, 10, "Kaby Lake",       UARCH_KABY_LAKE,        14) // wikichip
+  CHECK_UARCH(arch, 0,  6,  8, 14, 11, "Whiskey Lake",    UARCH_WHISKEY_LAKE,     14) // wikichip
+  CHECK_UARCH(arch, 0,  6,  8, 14, 12, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
   CHECK_UARCH(arch, 0,  6,  9,  6, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
+  CHECK_UARCH(arch, 0,  6,  9, 10, NA, "Tremont",         UARCH_TREMONT,          10) // instlatx64
   CHECK_UARCH(arch, 0,  6,  9, 12, NA, "Tremont",         UARCH_TREMONT,          10) // LX*
   CHECK_UARCH(arch, 0,  6,  9, 13, NA, "Sunny Cove",      UARCH_SUNNY_COVE,       10) // LX*
   CHECK_UARCH(arch, 0,  6,  9, 14,  9, "Kaby Lake",       UARCH_KABY_LAKE,        14)
@@ -224,8 +236,9 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 0,  6,  9, 14, 11, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
   CHECK_UARCH(arch, 0,  6,  9, 14, 12, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
   CHECK_UARCH(arch, 0,  6,  9, 14, 13, "Coffee Lake",     UARCH_COFFE_LAKE,       14)
-  CHECK_UARCH(arch, 0,  6, 10,  5, NA, "Kaby Lake",       UARCH_KABY_LAKE,        14) // LX*
-  CHECK_UARCH(arch, 0,  6, 10,  6, NA, "Kaby Lake",       UARCH_KABY_LAKE,        14) // no spec update; only iNAtlatx64 example
+  CHECK_UARCH(arch, 0,  6, 10,  5, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // wikichip
+  CHECK_UARCH(arch, 0,  6, 10,  6, NA, "Comet Lake",      UARCH_COMET_LAKE,       14) // instlatx64.atw.hu (i7-10710U)
+  CHECK_UARCH(arch, 0,  6, 10,  7, NA, "Rocket Lake",     UARCH_ROCKET_LAKE,      14) // instlatx64.atw.hu (i7-11700K)
   CHECK_UARCH(arch, 0, 11,  0,  0, NA, "Knights Ferry",   UARCH_KNIGHTS_FERRY,    45) // found only on en.wikichip.org
   CHECK_UARCH(arch, 0, 11,  0,  1, NA, "Knights Corner",  UARCH_KNIGHTS_CORNER,   22)
   CHECK_UARCH(arch, 0, 15,  0,  0, NA, "Willamette",      UARCH_WILLAMETTE,      180)
@@ -238,14 +251,14 @@ struct uarch* get_uarch_from_cpuid_intel(uint32_t ef, uint32_t f, uint32_t em, u
   CHECK_UARCH(arch, 1, 15,  0,  1, NA, "Itanium2",        UARCH_ITANIUM2,        130)
   CHECK_UARCH(arch, 1, 15,  0,  2, NA, "Itanium2",        UARCH_ITANIUM2,        130)
   UARCH_END
-    
+
   return arch;
 }
 
 // iNApired in Todd Allen's decode_uarch_amd
 struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
-  struct uarch* arch = malloc(sizeof(struct uarch));
-  
+  struct uarch* arch = emalloc(sizeof(struct uarch));
+
   // EF: Extended Family                                                           //
   // F:  Family                                                                    //
   // EM: Extended Model                                                            //
@@ -253,7 +266,7 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   // S: Stepping                                                                   //
   // ----------------------------------------------------------------------------- //
   //                 EF  F  EM   M   S                                             //
-  UARCH_START  
+  UARCH_START
   CHECK_UARCH(arch,  0,  4,  0,  3, NA, "Am486",       UARCH_AM486,      UNK)
   CHECK_UARCH(arch,  0,  4,  0,  7, NA, "Am486",       UARCH_AM486,      UNK)
   CHECK_UARCH(arch,  0,  4,  0,  8, NA, "Am486",       UARCH_AM486,      UNK)
@@ -261,7 +274,8 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   CHECK_UARCH(arch,  0,  4, NA, NA, NA, "Am5x86",      UARCH_AM5X86,     UNK)
   CHECK_UARCH(arch,  0,  5,  0,  6, NA, "K6",          UARCH_K6,         300)
   CHECK_UARCH(arch,  0,  5,  0,  7, NA, "K6",          UARCH_K6,         250) // *p from sandpile.org
-  CHECK_UARCH(arch,  0,  5,  0, 13, NA, "K6",          UARCH_K6,         80)  // *p from sandpile.org
+  CHECK_UARCH(arch,  0,  5,  0, 10, NA, "K7",          UARCH_K7,         130) // Geode NX
+  CHECK_UARCH(arch,  0,  5,  0, 13, NA, "K6",          UARCH_K6,          80) // *p from sandpile.org
   CHECK_UARCH(arch,  0,  5, NA, NA, NA, "K6",          UARCH_K6,         UNK)
   CHECK_UARCH(arch,  0,  6,  0,  1, NA, "K7",          UARCH_K7,         250)
   CHECK_UARCH(arch,  0,  6,  0,  2, NA, "K7",          UARCH_K7,         180)
@@ -316,7 +330,7 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   CHECK_UARCH(arch,  2, 15, NA, NA, NA, "Puma 2008",   UARCH_PUMA_2008,   65)
   CHECK_UARCH(arch,  3, 15, NA, NA, NA, "K10",         UARCH_K10,         32)
   CHECK_UARCH(arch,  5, 15, NA, NA, NA, "Bobcat",      UARCH_BOBCAT,      40)
-  CHECK_UARCH(arch,  6, 15,  0,  0, NA, "Bulldozer",   UARCH_BULLDOZER,   32) // iNAtlatx64 engr sample
+  CHECK_UARCH(arch,  6, 15,  0,  0, NA, "Bulldozer",   UARCH_BULLDOZER,   32) // instlatx64 engr sample
   CHECK_UARCH(arch,  6, 15,  0,  1, NA, "Bulldozer",   UARCH_BULLDOZER,   32)
   CHECK_UARCH(arch,  6, 15,  0,  2, NA, "Piledriver",  UARCH_PILEDRIVER,  32)
   CHECK_UARCH(arch,  6, 15,  1,  0, NA, "Piledriver",  UARCH_PILEDRIVER,  32)
@@ -324,82 +338,128 @@ struct uarch* get_uarch_from_cpuid_amd(uint32_t ef, uint32_t f, uint32_t em, uin
   CHECK_UARCH(arch,  6, 15,  3,  0, NA, "Steamroller", UARCH_STEAMROLLER, 28)
   CHECK_UARCH(arch,  6, 15,  3,  8, NA, "Steamroller", UARCH_STEAMROLLER, 28)
   CHECK_UARCH(arch,  6, 15,  4,  0, NA, "Steamroller", UARCH_STEAMROLLER, 28) // Software Optimization Guide (15h) says it has the same iNAt latencies as (6,15),(3,x).
-  CHECK_UARCH(arch,  6, 15,  6,  0, NA, "Excavator",   UARCH_EXCAVATOR,   28) // undocumented, but iNAtlatx64 samples
+  CHECK_UARCH(arch,  6, 15,  6,  0, NA, "Excavator",   UARCH_EXCAVATOR,   28) // undocumented, but instlatx64 samples
   CHECK_UARCH(arch,  6, 15,  6,  5, NA, "Excavator",   UARCH_EXCAVATOR,   28) // undocumented, but sample from Alexandros Couloumbis
   CHECK_UARCH(arch,  6, 15,  7,  0, NA, "Excavator",   UARCH_EXCAVATOR,   28)
   CHECK_UARCH(arch,  7, 15,  0,  0, NA, "Jaguar",      UARCH_JAGUAR,      28)
+  CHECK_UARCH(arch,  7, 15,  2,  6, NA, "Jaguar",      UARCH_JAGUAR,      28) // AMD Cato (Xbox One?)
   CHECK_UARCH(arch,  7, 15,  3,  0, NA, "Puma 2014",   UARCH_PUMA_2014,   28)
-  CHECK_UARCH(arch,  8, 15,  0,  0, NA, "Zen",         UARCH_ZEN,         14) // iNAtlatx64 engr sample
+  CHECK_UARCH(arch,  8, 15,  0,  0, NA, "Zen",         UARCH_ZEN,         14) // instlatx64 engr sample
   CHECK_UARCH(arch,  8, 15,  0,  1, NA, "Zen",         UARCH_ZEN,         14)
   CHECK_UARCH(arch,  8, 15,  0,  8, NA, "Zen+",        UARCH_ZEN_PLUS,    12)
-  CHECK_UARCH(arch,  8, 15,  1,  1, NA, "Zen",         UARCH_ZEN,         14) // found only on en.wikichip.org & iNAtlatx64 examples
+  CHECK_UARCH(arch,  8, 15,  1,  1, NA, "Zen",         UARCH_ZEN,         14) // found only on en.wikichip.org & instlatx64 examples
   CHECK_UARCH(arch,  8, 15,  1,  8, NA, "Zen+",        UARCH_ZEN_PLUS,    12) // found only on en.wikichip.org
+  CHECK_UARCH(arch,  8, 15,  2,  0, NA, "Zen",         UARCH_ZEN,         14) // Dali, found on instlatx64 and en.wikichip.org
   CHECK_UARCH(arch,  8, 15,  3,  1, NA, "Zen 2",       UARCH_ZEN2,         7) // found only on en.wikichip.org
+  CHECK_UARCH(arch,  8, 15,  4,  7, NA, "Zen 2",       UARCH_ZEN2,         7) // instlatx64 example (AMD 4700S)
+  CHECK_UARCH(arch,  8, 15,  5,  0, NA, "Zen",         UARCH_ZEN,         14) // instlatx64 example (Subor Z+)
   CHECK_UARCH(arch,  8, 15,  6,  0, NA, "Zen 2",       UARCH_ZEN2,         7) // undocumented, geekbench.com example
-  CHECK_UARCH(arch,  8, 15,  7,  1, NA, "Zen 2",       UARCH_ZEN2,         7) // undocumented, but samples from Steven Noonan
-  CHECK_UARCH(arch, 10, 15, NA, NA, NA, "Zen 3",       UARCH_ZEN3,         7) // undocumented, LX*
+  CHECK_UARCH(arch,  8, 15,  6,  8, NA, "Zen 2",       UARCH_ZEN2,         7) // found on instlatx64
+  CHECK_UARCH(arch,  8, 15,  7,  1, NA, "Zen 2",       UARCH_ZEN2,         7) // samples from Steven Noonan and instlatx64
+  CHECK_UARCH(arch, 10, 15,  0,  1, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  2,  1, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
+  CHECK_UARCH(arch, 10, 15,  5,  0, NA, "Zen 3",       UARCH_ZEN3,         7) // instlatx64
   UARCH_END
-    
+
   return arch;
 }
 
-struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
-  if(cpu->cpu_vendor == CPU_VENDOR_INTEL)
+struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s) {
+  if(cpu->cpu_vendor == CPU_VENDOR_INTEL) {
+    if(dump == 0x000806E9) {
+      // It is not possible to determine uarch only from CPUID dump (can be Kaby Lake or Amber Lake)
+      struct uarch* arch = emalloc(sizeof(struct uarch));
+
+      if(strstr(cpu->cpu_name, "Y") != NULL) {
+        fill_uarch(arch, "Amber Lake", UARCH_AMBER_LAKE, 14);
+      }
+      else {
+        fill_uarch(arch, "Kaby Lake", UARCH_KABY_LAKE, 14);
+      }
+
+      return arch;
+    }
     return get_uarch_from_cpuid_intel(ef, f, em, m, s);
-  else 
+  }
+  else
     return get_uarch_from_cpuid_amd(ef, f, em, m, s);
 }
 
 bool vpus_are_AVX512(struct cpuInfo* cpu) {
-  return cpu->arch->uarch != UARCH_ICE_LAKE;    
-  return cpu->arch->uarch != UARCH_ICE_LAKE;
+  return cpu->arch->uarch != UARCH_ICE_LAKE && cpu->arch->uarch != UARCH_TIGER_LAKE;
 }
 
 bool is_knights_landing(struct cpuInfo* cpu) {
-  return cpu->arch->uarch == UARCH_KNIGHTS_LANDING;  
+  return cpu->arch->uarch == UARCH_KNIGHTS_LANDING;
 }
 
 int get_number_of_vpus(struct cpuInfo* cpu) {
-  if(cpu->cpu_vendor == CPU_VENDOR_AMD)
-    return 1;
-  
   switch(cpu->arch->uarch) {
+      // Intel
       case UARCH_HASWELL:
       case UARCH_BROADWELL:
-          
+
       case UARCH_SKYLAKE:
-      case UARCH_CASCADE_LAKE:                    
+      case UARCH_CASCADE_LAKE:
       case UARCH_KABY_LAKE:
+      case UARCH_COMET_LAKE:
+      case UARCH_ROCKET_LAKE:
+      case UARCH_AMBER_LAKE:
+      case UARCH_WHISKEY_LAKE:
       case UARCH_COFFE_LAKE:
-      case UARCH_PALM_COVE:    
-      
+      case UARCH_PALM_COVE:
+
       case UARCH_KNIGHTS_LANDING:
       case UARCH_KNIGHTS_MILL:
-          
-      case UARCH_ICE_LAKE:      
+
+      case UARCH_ICE_LAKE:
+      case UARCH_TIGER_LAKE:
+
+      // AMD
+      case UARCH_ZEN2:
+      case UARCH_ZEN3:
         return 2;
       default:
         return 1;
   }
 }
 
+bool choose_new_intel_logo_uarch(struct cpuInfo* cpu) {
+  switch(cpu->arch->uarch) {
+    case UARCH_ROCKET_LAKE:
+    case UARCH_TIGER_LAKE:
+      return true;
+    default:
+      return false;
+  }
+}
+
 char* get_str_uarch(struct cpuInfo* cpu) {
-  return cpu->arch->uarch_str;    
+  return cpu->arch->uarch_str;
 }
 
 char* get_str_process(struct cpuInfo* cpu) {
-  char* str = malloc(sizeof(char) * (4+2+1));
-  uint32_t process = cpu->arch->process;
-  
-  if(process > 100)    
+  char* str = emalloc(sizeof(char) * (strlen(STRING_UNKNOWN)+1));
+  int32_t process = cpu->arch->process;
+
+  if(process == UNK) {
+    snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+  }
+  else if(process > 100) {
     sprintf(str, "%.2fum", (double)process/100);
-  else
+  }
+  else if(process > 0){
     sprintf(str, "%dnm", process);
-  
+  }
+  else {
+    snprintf(str, strlen(STRING_UNKNOWN)+1, STRING_UNKNOWN);
+    printBug("Found invalid process: '%d'", process);
+  }
+
   return str;
 }
 
-void free_uarch_struct(struct uarch* arch) {    
+void free_uarch_struct(struct uarch* arch) {
   free(arch->uarch_str);
   free(arch);
 }

src/x86/uarch.h

@@ -7,10 +7,11 @@
 
 struct uarch;
 
-struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
+struct uarch* get_uarch_from_cpuid(struct cpuInfo* cpu, uint32_t dump, uint32_t ef, uint32_t f, uint32_t em, uint32_t m, int s);
 bool vpus_are_AVX512(struct cpuInfo* cpu);
 bool is_knights_landing(struct cpuInfo* cpu);
 int get_number_of_vpus(struct cpuInfo* cpu);
+bool choose_new_intel_logo_uarch(struct cpuInfo* cpu);
 char* get_str_uarch(struct cpuInfo* cpu);
 char* get_str_process(struct cpuInfo* cpu);
 void free_uarch_struct(struct uarch* arch);

src/x86/uarch_decode.sh

@@ -0,0 +1,23 @@
+#!/bin/bash -u
+
+CPUID=0x00A50F00
+
+efamily=$(((${CPUID}>>20)&0xFF))
+family=$(((${CPUID}>>8)&0xF))
+emodel=$(((${CPUID}>>16)&0xF))
+model=$(((${CPUID}>>4)&0xF))
+stepping=$((${CPUID}&0xF))
+
+printf 'CPUID: 0x%.8X\n' $CPUID
+printf -- '- EF = 0x%X (%d)\n' $efamily $efamily
+printf -- '- F  = 0x%X (%d)\n' $family $family
+printf -- '- EM = 0x%X (%d)\n' $emodel $emodel
+printf -- '- M  = 0x%X (%d)\n' $model $model
+printf -- '- S  = 0x%X (%d)\n' $stepping $stepping
+
+#EF=$efamily
+#F=$family
+#EM=$emodel
+#M=$model
+#S=$stepping
+#grep -E "\s*CHECK_UARCH\(arch,\s*${EF},\s*${F},\s*(${EM}|NA),\s*(${M}|NA),\s*(${S}|NA)" uarch.c